CN116667666B - High-gain Boost converter and control method thereof - Google Patents

High-gain Boost converter and control method thereof Download PDF

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Publication number
CN116667666B
CN116667666B CN202310938718.4A CN202310938718A CN116667666B CN 116667666 B CN116667666 B CN 116667666B CN 202310938718 A CN202310938718 A CN 202310938718A CN 116667666 B CN116667666 B CN 116667666B
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diode
inductor
terminal
switching tube
electrically connected
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CN116667666A (en
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乐卫平
林桂浩
唐亚海
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Shenzhen CSL Vacuum Science and Technology Co Ltd
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Shenzhen CSL Vacuum Science and Technology Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/083—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The application discloses a high-gain Boost converter and a control method thereof, wherein the converter comprises a power supply V g, a switching tube S, a resistor R, a diode D 1-D8, an inductor L 1-L5, a voltage doubling capacitor C, a parasitic diode D S, a parasitic capacitor C S and a resistor R; the application has the advantages that: (1) Parasitic capacitance C S, inductance L 3 and L 4 resonate to realize ZVS of switching tube S; when the switch is closed, the capacitor C is charged through D 4, and when the switch is opened, the voltage applied to L 3 and L 4 is higher than that of a traditional Boost circuit, so that high gain is realized and the voltage stress of the device is reduced; (2) The high output is realized by only one switching tube, the cost is saved, and the structure is simplified; (3) Five working modes exist in one period, so that the application scene is expanded; (4) The parallel design of the inductors can reduce the output current ripple in the CCM mode.

Description

High-gain Boost converter and control method thereof
Technical Field
The invention mainly relates to the technical field of converters, in particular to a high-gain Boost converter and a control method thereof.
Background
In the prior art, in the process of etching a chip, an etching machine needs the chip to have high-voltage positive charges to adsorb electrons, and after etching is finished, the chip needs to have high-voltage negative charges to repel electrons. In the implementation of high voltage direct current, there are a number of ways by which: (1) The alternating current is boosted by a transformer and then rectified to form high-voltage direct current; (2) Converting the low-voltage direct current into alternating current through an inverter, boosting the alternating current through a transformer, and rectifying to form high-voltage direct current; (3) boosting is achieved using DC-DC conversion in the power electronics. However, the boost converter of the prior art has the following disadvantages: (1) The method of boosting and rectifying the direct current inversion through the transformer is adopted, and more steps are easy to generate larger energy loss; (2) The alternating current is directly boosted and rectified, and the device can face serious stress problem under the high-voltage environment; (3) The output EMI of the converter is higher, the voltage gain is smaller, the duty ratio required for realizing higher gain is larger, the circuit structure is complex, and the cost is high.
Therefore, how to design a boost converter with large voltage gain, small stress, small output EMI, small energy loss, simple circuit structure and low cost is a technical problem to be solved.
Disclosure of Invention
Based on this, it is necessary to provide a high-gain Boost converter and a control method thereof in order to solve the existing problems.
In a first aspect, an embodiment of the present application provides a high-gain Boost converter, including a power supply V g, a switching tube S, a resistor R, a first diode D 1, a second diode D 2, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a seventh diode D 7, an eighth diode D 8, a first inductor L 1, a second inductor L 2, a third inductor L 3, a fourth inductor L 4, a voltage doubling capacitor C, a parasitic diode D s, and a parasitic capacitor C s;
the positive terminal of the power supply V g is electrically connected to the first terminal of the first inductor L 1 and the positive terminal of the first diode D 1, and the negative terminal of the power supply V g is electrically connected to the second terminal of the switching tube S, the positive terminal of the parasitic diode D s, the second terminal of the parasitic capacitor C s, the second terminal of the fourth inductor L 4, the negative terminal of the eighth diode D 8 and the second terminal of the resistor R, respectively;
The positive terminal of the second diode D 2 is electrically connected to the negative terminal of the first diode D 1 and the first terminal of the second inductor L 2, respectively, and the negative terminal of the second diode D 2 is electrically connected to the second terminal of the first inductor L 1 and the positive terminal of the third diode D 3, respectively; the first end of the first inductor L 1 is electrically connected with the positive electrode end of the first diode D 1; the negative terminal of the third diode D 3 is electrically connected to the second terminal of the second inductor L 2; the first end of the first inductor L 1 is electrically connected with the positive electrode end of the first diode D 1;
The first end of the voltage doubling capacitor C is respectively and electrically connected with the negative end of the fourth diode D 4 and the first end of the resistor R, and the second end of the voltage doubling capacitor C is respectively and electrically connected with the negative end of the fifth diode D 5, the positive end of the sixth diode D 6 and the first end of the third inductor L 3;
The first end of the switching tube S is respectively and electrically connected with the negative end of the parasitic diode D S, the first end of the parasitic capacitor C S, the negative end of the third diode D 3, the positive end of the fourth diode D 4, the positive end of the fifth diode D 5 and the second end of the second inductor L 2, and the third end of the switching tube S is connected with the control circuit;
The positive terminal of the seventh diode D 7 is electrically connected to the negative terminal of the sixth diode D 6 and the first terminal of the fourth inductor L 4, respectively, and the negative terminal of the seventh diode D 7 is electrically connected to the second terminal of the third inductor L 3 and the positive terminal of the eighth diode D 8, respectively; the positive terminal of the sixth diode D 6 is electrically connected with the first terminal of the third inductor; the second end of the fourth inductor L 4 is electrically connected to the negative end of the eighth diode D 8;
wherein the first and second ends of the resistor R form an output terminal.
Preferably, the switching tube S is a MOS tube, a first end of the switching tube S is a drain, a second end of the switching tube S is a source, and a third end of the switching tube S is a gate.
Preferably, the control circuit is a PI control circuit.
In a second aspect, an embodiment of the present application provides a control method for a high-gain Boost converter, including the following steps:
generating a control signal, and transmitting the control signal to a third end of the switching tube S;
And controlling the on and off of the switching tube S according to the control signal, so that the converter alternately works in a plurality of working modes in one working period.
Preferably, the plurality of working modes are five working modes, and the five working modes are a first working mode, a second working mode, a third working mode, a fourth working mode and a fifth working mode respectively.
Preferably, the first working mode is: the switching tube S is turned off, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6, and the eighth diode D 8 are turned on, the first inductor L 1, the second inductor L 2, the inductor L 3, and the inductor L 4 store energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 decreases linearly.
Preferably, the second working mode is: the switching transistor S is turned off, and the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, and the seventh diode D 7 are turned on, so that the parasitic capacitor C s, the third inductor L 3, and the fourth inductor L 4 resonate.
Preferably, the third working mode is: the switching transistor S is turned off, the parasitic diode D s, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6, and the eighth diode D 8 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 store energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 increases linearly.
Preferably, the fourth operation mode is: the switching tube S is turned on, the first diode D 1, the third diode D 3, and the seventh diode D 7 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 release energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 decreases linearly.
Preferably, the fifth working mode is: the switching tube S is turned off, and the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, and the eighth diode D 8 are turned on, and the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 charge the parasitic capacitor C s until the voltage of the parasitic capacitor C s is equal to the voltage of the voltage doubling capacitor C.
Compared with the prior art, the high-gain Boost converter has the following advantages: (1) The parasitic capacitor C s, the third inductor L 3 and the fourth inductor L 4 form a resonant network, so that Zero Voltage Switching (ZVS) of the switching tube S is realized; when the switch is closed, the voltage doubling capacitor C is charged through the fourth diode D 4, and when the switch is opened, the voltage applied to the third inductor L 3 and the fourth inductor L 4 is higher than that of a traditional Boost circuit, so that the voltage stress of the device is reduced while the high gain is realized; (2) The high-output converter structure is realized by only using one switching tube and circuit element in the circuit, so that the cost is saved and the circuit structure is simplified; (3) Five different working modes can be realized by the switching tube in the on-off mode, so that various changes of the modes are realized, and the application scene of the converter is expanded; (4) The parallel design of the first inductor L 1 and the second inductor L 2 enables the circuit to reduce output current ripple in CCM mode; (5) Compared with other high-gain converters, the high-gain converter has the advantages of simple circuit structure, simple control scheme, fewer power devices, high efficiency, low cost, small switching loss, low output EMI and the like.
Drawings
Exemplary embodiments of the present application may be more fully understood by reference to the following drawings. The accompanying drawings are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate the application and together with the embodiments of the application, and not constitute a limitation to the application. In the drawings, like reference numerals generally refer to like parts or steps.
FIG. 1 is a circuit diagram of a prior art Boost chopper circuit;
FIG. 2 is a circuit diagram of a prior art soft-switch based Boost converter;
FIG. 3 is a circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 4 is a control circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 5 is a waveform diagram of a duty cycle of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 6 is a first operating mode circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 7 is a second mode of operation circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 8 is a third operating mode circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 9 is a fourth operational mode circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
FIG. 10 is a fifth mode of operation circuit diagram of a high gain Boost converter according to an exemplary embodiment of the present application;
fig. 11 is a flowchart of a control method of a high-gain Boost converter according to another exemplary embodiment of the present application.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Referring to fig. 1, a Boost chopper circuit of the prior art has a voltage gain derived from the following formula (1):
（1）；
Where D is the duty cycle of switch S, and its voltage gain M is related only to the duty cycle of switch S.
Referring to fig. 2, a circuit diagram of a Boost converter in the prior art includes two inductors, two capacitors, two diodes, two parasitic capacitors, two switching tubes, and a resistive load R, and the Boost chopper circuit combined by the structure of the converter has the advantages of significantly improving the conversion efficiency of the converter, but has the problems of higher output EMI, smaller voltage gain, larger duty ratio required when realizing higher gain, complex circuit structure, high cost, and the like.
Based on this, an embodiment of the present application provides a high-gain Boost converter, which is described below with reference to the accompanying drawings.
Referring to fig. 3, a high-gain Boost converter includes a power supply V g, a switch S, a resistor R, a first diode D 1, a second diode D 2, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a seventh diode D 7, an eighth diode D 8, a first inductor L 1, a second inductor L 2, a third inductor L 3, a fourth inductor L 4, a voltage doubling capacitor C, a parasitic diode D s, and a parasitic capacitor C s;
the positive terminal of the power supply V g is electrically connected to the first terminal of the first inductor L 1 and the positive terminal of the first diode D 1, and the negative terminal of the power supply V g is electrically connected to the second terminal of the switching tube S, the positive terminal of the parasitic diode D s, the second terminal of the parasitic capacitor C s, the second terminal of the fourth inductor L 4, the negative terminal of the eighth diode D 8 and the second terminal of the resistor R, respectively;
The positive terminal of the second diode D 2 is electrically connected to the negative terminal of the first diode D 1 and the first terminal of the second inductor L 2, respectively, and the negative terminal of the second diode D 2 is electrically connected to the second terminal of the first inductor L 1 and the positive terminal of the third diode D 3, respectively; the first end of the first inductor L 1 is electrically connected with the positive electrode end of the first diode D 1; the negative terminal of the third diode D 3 is electrically connected to the second terminal of the second inductor L 2; the first end of the first inductor L 1 is electrically connected with the positive electrode end of the first diode D 1;
The first end of the voltage doubling capacitor C is respectively and electrically connected with the negative end of the fourth diode D 4 and the first end of the resistor R, and the second end of the voltage doubling capacitor C is respectively and electrically connected with the negative end of the fifth diode D 5, the positive end of the sixth diode D 6 and the first end of the third inductor L 3;
The first end of the switching tube S is respectively and electrically connected with the negative end of the parasitic diode D S, the first end of the parasitic capacitor C S, the negative end of the third diode D 3, the positive end of the fourth diode D 4, the positive end of the fifth diode D 5 and the second end of the second inductor L 2, and the third end of the switching tube S is connected with the control circuit;
The positive terminal of the seventh diode D 7 is electrically connected to the negative terminal of the sixth diode D 6 and the first terminal of the fourth inductor L 4, respectively, and the negative terminal of the seventh diode D 7 is electrically connected to the second terminal of the third inductor L 3 and the positive terminal of the eighth diode D 8, respectively; the positive terminal of the sixth diode D 6 is electrically connected with the first terminal of the third inductor; the second end of the fourth inductor L 4 is electrically connected to the negative end of the eighth diode D 8;
wherein the first and second ends of the resistor R form an output terminal.
Specifically, the power supply V g is a dc power supply for storing energy to the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 and supplying energy to the voltage doubling capacitor C, and then charging the switching tube and the load resistor R.
Preferably, the switching tube S is a MOS tube, a first end of the switching tube S is a drain, a second end of the switching tube S is a source, and a third end of the switching tube S is a gate; the parasitic diode D s is connected in parallel with the source electrode and the drain electrode of the switching tube S, and is a common high-speed diode, and the parasitic diode D s has the function of discharging reverse induced current generated by the inductive load when the load of the tube is the inductive load, thereby playing the role of protecting the switching tube S.
Referring to fig. 4, the control circuit of the converter of the present embodiment adopts PI control, and outputs a PWM (pulse width modulation, which is an analog control method, to modulate the bias of the base or the gate of the transistor according to the change of the corresponding load, so as to change the on time of the transistor or the MOS transistor, thereby realizing the change of the output of the switching regulator).
Specifically, in the converter of the present embodiment, the on/off of the switching tube S of the circuit is controlled, so that the converter can alternately work in five working modes in one working period, referring to fig. 5, a waveform diagram of the converter in one working period is shown, where in a period t 0-t1, the converter is in a first working mode; in the period of t 1-t2, the converter is in the second working mode; in the period of t 2-t3, the converter is in a third working mode; during the period t 3-t4, the converter is in a fourth operating mode; during the period t 4-t5, the converter is in the fifth mode of operation.
(1) In the period t 0-t1, the converter is in the first operation mode, as shown in fig. 6, the switching tube S is turned off, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6 and the eighth diode D 8 are turned on, their conduction currents are the same, and the currents flowing through them from the time t 0 are linearly reduced, at this time, the voltage across the voltage doubling capacitor CThe following relationship is satisfied:
（2）；
wherein, Representing the output voltage,/>Representing the voltage of the third inductance L 3. Meanwhile, the first inductor L 1, the second inductor L 2, the third inductor L 3 and the fourth inductor L 4 store energy through the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6 and the eighth diode D 8, respectively, and since the energy stored in the first inductor L 1 and the second inductor L 2 is greater than the energy stored in the third inductor L 3 and the fourth inductor L 4, the current ripple of the first inductor L 1 and the second inductor L 2 is smaller than the ripple of the third inductor L 3 and the fourth inductor L 4; at this time, the voltages of the first inductance L 1, the second inductance L 2, the third inductance L 3, and the fourth inductance L 4 are expressed by the following formulas:
（3）；
（4）；
wherein, 、/>、/>And/>The voltages across the first inductance L 1, the second inductance L 2, the third inductance L 3 and the fourth inductance L 4 are shown, respectively. When the current flowing through the sixth diode D 6 and the eighth diode D 8 drops to 0, the first operation mode ends.
(2) In the period t 1-t2, the converter is in the second operation mode, as shown in fig. 7, at this time, the switching tube S is turned off, the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6 and the seventh diode D 7 are turned on, the parasitic capacitor C s, the third inductor L 3 and the fourth inductor L 4 resonate, and referring to fig. 5, the resonant currentCan be regarded as a half-sinusoid, the duration in this mode being the resonance time/>Half of (1), resonance time/>The method comprises the following steps:
（5）；
when the resonance is ended, the second mode of operation is ended.
(3) In the period t 2-t3, the converter is in the third operation mode, as shown in fig. 8, at this time, the parasitic diode D S, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6 and the eighth diode D 8 of the switching tube S are turned on, the voltage across the switching tube S is kept to be 0, and the voltages across the first inductance L 1, the second inductance L 2, the third inductance L 3 and the fourth inductance L 4 are represented by the following formula:
（6）；
（7）；
In this mode of operation, the first inductance L 1, the second inductance L 2, the third inductance L 3, and the fourth inductance L 4 begin to store energy, and the current flowing through them begins to increase linearly.
(4) In the period t 3-t4, the converter is in the fourth operation mode, as shown in fig. 9, at this time, the driving signal of the switching tube S starts to be not 0, the driving signal makes the switching tube S realize ZVS on, at this time, the first diode D 1, the third diode D 3 and the seventh diode D 7 in the circuit are turned on, and the voltages of the first inductor L 1, the second inductor L 2, the third inductor L 3 and the fourth inductor L 4 are represented by the following formulas:
（8）；
（9）；
In this mode of operation, the first inductance L 1, the second inductance L 2, the third inductance L 3, and the fourth inductance L 4 begin to release energy, and the current flowing through them continues to decrease linearly. When the drive signal is 0, the fourth operation mode ends.
(5) In the period t 3-t4, the converter is in the fourth operation mode, as shown in fig. 10, at this time, the switching tube S is turned off, the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6 and the eighth diode D 8 are turned on, and since the parasitic capacitor C s is connected in parallel with the switching tube S, when the switching tube S is turned off, the first inductor L 1, the second inductor L 2, the third inductor L 3 and the fourth inductor L 4 start charging the parasitic capacitor C s, and when the voltage of the parasitic capacitor C s is equal to the voltage of the voltage doubling capacitor C, the fifth operation mode ends.
Wherein,Is the driving voltage of the switching tube,/>Is the voltage across parasitic capacitance D s,/>For the current flowing through the parasitic capacitance D S,/>、/>、/>And/>The currents flowing through the first inductance L 1, the second inductance L 2, the third inductance L 3, and the fourth inductance L 4, respectively.
In this embodiment, according to formulas (2) and (4), the voltage across the voltage doubling capacitor C can be obtained as follows:
（10）；
Meanwhile, according to the principle of volt-second balance, the voltages at two ends of the inductor should meet the following conditions in one period:
（11）；
Referring to fig. 5, the voltage of the inductor is non-linearly transformed in the second operation mode, which may be considered as volt-second balance for simplicity of calculation, and thus, equation (11) may be expressed as:
（12）；
from this, the voltage gain of the high-gain Boost converter of this embodiment can be calculated as:
（13）；
The constraint conditions are as follows:
（14）；
Wherein T is the duration of one working period, D is the duty ratio of the switching tube S in one working period, ，/>，/>，/>，/>，/>，。
In this embodiment, when the duty ratio of the switching tube S is large or too small, ZVS characteristics of the switching tube S may be lost. Wherein when the duty cycle is too small, the switching voltage will resonate to multiply during the second mode of operation; when the duty ratio is too large, the switching voltage cannot resonate to zero during the second operation mode, so, for the accuracy and convenience of calculation, the duty ratio is only the maximum duty ratio as an example, the switching tube S is selected to be a soft switch, and when the driving signal arrives, the switching voltage can resonate to zero again, so that the switching voltage only has one complete resonance in the second operation mode, in this case, the resonance period can be directly calculated without calculating the resonance amplitude, and the accuracy and the high efficiency of calculation can be ensured.
Compared with the prior art, the high-gain Boost converter has the following advantages: (1) The parasitic capacitance C s, the third inductance L 3 and the fourth inductance L 4 form a resonant network to realize Zero Voltage Switching (ZVS) of the switching tube S; when the switch is closed, the voltage doubling capacitor C is charged through the fourth diode D 4, and when the switch is opened, the voltage applied to the third inductor L 3 and the fourth inductor L 4 is higher than that of a traditional Boost circuit, so that the voltage stress of the device is reduced while the high gain is realized; (2) The high-output converter structure is realized by only using one switching tube and circuit element in the circuit, so that the cost is saved and the circuit structure is simplified; (3) Five different working modes can be realized by the switching tube in the on-off mode, so that various changes of the modes are realized, and the application scene of the converter is expanded; (4) The parallel design of the first inductor L 1 and the second inductor L 2 enables the circuit to reduce output current ripple in CCM mode; (5) Compared with other high-gain converters, the high-gain converter has the advantages of simple circuit structure, simple control scheme, fewer power devices, high efficiency, low cost, small switching loss, low output EMI and the like.
In other embodiments of the present application, a method for controlling a high gain Boost converter is provided, and is described below with reference to the accompanying drawings.
The methods provided in other implementations of the embodiments of the present application have the same advantages as those provided by the foregoing embodiments of the present application due to the same inventive concept.
Referring to fig. 11, a schematic diagram of a control method according to other embodiments of the application is shown. Since the method embodiments are substantially similar to the structural embodiments, the description is relatively simple, and reference is made to the description of the structural embodiments described above. The method embodiments described below are merely illustrative.
As shown in fig. 11, a control method of a high-gain Boost converter may include the following steps:
s1101: generating a control signal, and transmitting the control signal to a third end of the switching tube S;
s1102: and controlling the on and off of the switching tube S according to the control signal, so that the converter alternately works in a plurality of working modes in one working period.
Specifically, the plurality of operation modes are five operation modes, and more specifically, the five operation modes are a first operation mode, a second operation mode, a third operation mode, a fourth operation mode, and a fifth operation mode, respectively.
Specifically, the first working mode is: the switching tube S is turned off, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6, and the eighth diode D 8 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 store energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 decreases linearly.
Specifically, the second working mode is: the switching tube S is turned off, and the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, and the seventh diode D 7 are turned on, so that the parasitic capacitor C s, the third inductor L 3, and the fourth inductor L 4 resonate.
Specifically, the third working mode is: the switching transistor S is turned off, the parasitic diode D s, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6, and the eighth diode D 8 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 store energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 increases linearly.
Specifically, the fourth mode of operation is: the switching tube S is turned on, the first diode D 1, the third diode D 3, and the seventh diode D 7 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 release energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 decreases linearly.
Specifically, the fifth working mode is: the switching tube S is turned off, and the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, and the eighth diode D 8 are turned on, and the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 charge the parasitic capacitor C s until the voltage of the parasitic capacitor C s is equal to the voltage of the voltage doubling capacitor C.
It is noted that the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application, and are intended to be included within the scope of the appended claims and description.

Claims (10)

1. The high-gain Boost converter is characterized by comprising a power supply V g, a switch tube S, a resistor R, a first diode D 1, a second diode D 2, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a seventh diode D 7, an eighth diode D 8, a first inductor L 1, a second inductor L 2, a third inductor L 3, a fourth inductor L 4, a voltage doubling capacitor C, a parasitic diode D s and a parasitic capacitor C s;
the positive terminal of the power supply V g is electrically connected to the first terminal of the first inductor L 1 and the positive terminal of the first diode D 1, and the negative terminal of the power supply V g is electrically connected to the second terminal of the switching tube S, the positive terminal of the parasitic diode D s, the second terminal of the parasitic capacitor C s, the second terminal of the fourth inductor L 4, the negative terminal of the eighth diode D 8 and the second terminal of the resistor R, respectively;
The positive terminal of the second diode D 2 is electrically connected to the negative terminal of the first diode D 1 and the first terminal of the second inductor L 2, respectively, and the negative terminal of the second diode D 2 is electrically connected to the second terminal of the first inductor L 1 and the positive terminal of the third diode D 3, respectively; the first end of the first inductor L 1 is electrically connected with the positive electrode end of the first diode D 1; the negative terminal of the third diode D 3 is electrically connected to the second terminal of the second inductor L 2;
The first end of the voltage doubling capacitor C is respectively and electrically connected with the negative end of the fourth diode D 4 and the first end of the resistor R, and the second end of the voltage doubling capacitor C is respectively and electrically connected with the negative end of the fifth diode D 5, the positive end of the sixth diode D 6 and the first end of the third inductor L 3;
The first end of the switching tube S is respectively and electrically connected with the negative end of the parasitic diode D S, the first end of the parasitic capacitor C S, the negative end of the third diode D 3, the positive end of the fourth diode D 4, the positive end of the fifth diode D 5 and the second end of the second inductor L 2, and the third end of the switching tube S is connected with the control circuit;
the positive terminal of the seventh diode D 7 is electrically connected to the negative terminal of the sixth diode D 6 and the first terminal of the fourth inductor L 4, respectively, and the negative terminal of the seventh diode D 7 is electrically connected to the second terminal of the third inductor L 3 and the positive terminal of the eighth diode D 8, respectively; the positive terminal of the sixth diode D 6 is electrically connected to the first terminal of the third inductor L 3; the second end of the fourth inductor L 4 is electrically connected to the negative end of the eighth diode D 8;
wherein the first end of the resistor R and the second end of the resistor R form an output end of the high gain Boost converter.
2. The high-gain Boost converter of claim 1, wherein the switching tube S is a MOS transistor, a first end of the switching tube S is a drain, a second end of the switching tube S is a source, and a third end of the switching tube S is a gate.
3. The high gain Boost converter of claim 1, wherein the control circuit is a PI control circuit.
4. A method of controlling a high gain Boost converter according to any one of claims 1-3, comprising the steps of:
generating a control signal, and transmitting the control signal to a third end of the switching tube S;
And controlling the on and off of the switching tube S according to the control signal, so that the high-gain Boost converter alternately works in a plurality of working modes in one working period.
5. The method for controlling a high-gain Boost converter according to claim 4, wherein the plurality of operation modes are five operation modes, and the five operation modes are a first operation mode, a second operation mode, a third operation mode, a fourth operation mode and a fifth operation mode, respectively.
6. The method for controlling a high-gain Boost converter according to claim 5, wherein the first operating mode is: the switching tube S is turned off, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6, and the eighth diode D 8 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 store energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 decreases linearly.
7. The method for controlling a high-gain Boost converter according to claim 5, wherein the second operating mode is: the switching tube S is turned off, and the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, and the seventh diode D 7 are turned on, so that the parasitic capacitor C s, the third inductor L 3, and the fourth inductor L 4 resonate.
8. The method for controlling a high-gain Boost converter according to claim 5, wherein the third operating mode is: the switching transistor S is turned off, the parasitic diode D s, the first diode D 1, the third diode D 3, the fourth diode D 4, the sixth diode D 6, and the eighth diode D 8 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 store energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 increases linearly.
9. The method of claim 5, wherein the fourth operation mode is: the switching tube S is turned on, the first diode D 1, the third diode D 3, and the seventh diode D 7 are turned on, the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 release energy, and the current flowing through the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 decreases linearly.
10. The method for controlling a high-gain Boost converter according to claim 5, wherein the fifth operating mode is: the switching tube S is turned off, and the first diode D 1, the third diode D 3, the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, and the eighth diode D 8 are turned on, and the first inductor L 1, the second inductor L 2, the third inductor L 3, and the fourth inductor L 4 charge the parasitic capacitor C s until the voltage of the parasitic capacitor C s is equal to the voltage of the voltage doubling capacitor C.
CN202310938718.4A 2023-07-28 2023-07-28 High-gain Boost converter and control method thereof Active CN116667666B (en)

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CN105634275A (en) * 2016-03-23 2016-06-01 西安工业大学 Boost converter of switch inductor
CN206698111U (en) * 2017-02-13 2017-12-01 华南理工大学 It is a kind of using switched inductors and the quasi- boost switching DC DC converters of switching capacity
CN111541369A (en) * 2020-04-30 2020-08-14 南京理工大学 Staggered parallel DC/DC boost converter based on switch inductor/switch capacitor unit
US20210313890A1 (en) * 2020-03-30 2021-10-07 Qatar University Dc to dc switched inductor boost converter
CN114629349A (en) * 2021-09-02 2022-06-14 浙江大有实业有限公司杭州科技发展分公司 Improved high-frequency high step-up ratio SEPIC converter based on switching inductor
CN116169882A (en) * 2023-04-26 2023-05-26 深圳市恒运昌真空技术有限公司 High-gain boost converter

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060226816A1 (en) * 2005-04-11 2006-10-12 Yuan Ze University Boost converter utilizing bi-directional magnetic energy transfer of coupling inductor
CN105553254A (en) * 2015-12-24 2016-05-04 厦门大学 Zero-voltage switch high-gain DC-DC converter containing switched capacitors
CN105634275A (en) * 2016-03-23 2016-06-01 西安工业大学 Boost converter of switch inductor
CN206698111U (en) * 2017-02-13 2017-12-01 华南理工大学 It is a kind of using switched inductors and the quasi- boost switching DC DC converters of switching capacity
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CN111541369A (en) * 2020-04-30 2020-08-14 南京理工大学 Staggered parallel DC/DC boost converter based on switch inductor/switch capacitor unit
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