CN116644813B - Method and device for determining optimal combination scheme by utilizing quantum circuit - Google Patents
Method and device for determining optimal combination scheme by utilizing quantum circuit Download PDFInfo
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Abstract
The invention discloses a method and a device for determining an optimal combination scheme by utilizing a quantum circuit, wherein the method comprises the following steps: firstly, a plurality of preprocessing services are arranged and combined to form a plurality of combination schemes, then a target quantum circuit for simulating the combination results of the plurality of combination schemes is constructed, finally the target quantum circuit is operated, and an optimal combination scheme is determined from the combination results of the plurality of combination schemes based on the operation results of the target quantum circuit.
Description
Technical Field
The invention belongs to the technical field of quantum computing, and particularly relates to a method and a device for determining an optimal combination scheme by utilizing a quantum circuit.
Background
In recent years, as the problem of "memory wall" in the traditional classical computer architecture becomes more and more severe, the limited bandwidth between the processor and the memory has become one of the key bottlenecks for improving the system performance, and the concept of quantum computers is therefore getting hot. A quantum computer is a system for realizing mathematical and logical operations, processing and storing information by quantum mechanics law. The quantum dynamics can be utilized to accelerate the solution of complex discrete optimization, constraint satisfaction, combination optimization problems, simulation problems and other problems which are difficult to solve by the traditional computer.
Among the above problems, the combinatorial optimization problem is the most representative. The problem of combination optimization refers to evaluating various combinations in a set of pre-processing services, and finally finding the optimal combination scheme. As the number of combinations increases explosively with the number of factors to be considered. Therefore, how to determine the optimal combination scheme is difficult to solve by NP, has high solving difficulty and high research value, and is a problem to be solved urgently.
Disclosure of Invention
The invention aims to provide a method and a device for determining an optimal combination scheme by utilizing a quantum circuit, which solve the defects in the prior art.
One embodiment of the present application provides a method of determining an optimal combination scheme using quantum circuits, the method comprising:
arranging and combining a plurality of preprocessing services to form a plurality of combination schemes;
Constructing a target quantum circuit for simulating the combined result of the multiple combination schemes;
And operating the target quantum circuit, and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the target quantum circuit.
Optionally, the arranging and combining the plurality of preprocessing services includes:
k preprocessing services are selected from n preprocessing services to be arranged and combined, wherein n and k are positive integers, and n is greater than k.
Optionally, the constructing a target quantum circuit for simulating the combined result of the multiple combining schemes includes:
And determining the number of quantum logic gates acting on the quantum bit, the action time sequence of the quantum logic gates and the regulation and control relation between the quantum bit and the quantum logic gates according to the n and the k, and generating a target quantum circuit to be constructed.
Optionally, the determining, according to the n and the k, the number of quantum logic gates acting on the qubit, the action time sequence of the quantum logic gates, and the regulation relationship between the qubit and the quantum logic gates, and generating a target quantum circuit to be constructed includes:
obtaining n quantum bits, wherein the number i of the quantum bits is more than or equal to 0 and less than or equal to n-1;
When (when) When the first quantum logic gate combination is utilized, a first sub-quantum circuit module is sequentially constructed on the first (2 k-1) quantum bits and the quantum bits with even numbers;
and constructing a second sub-quantum circuit module in the next time sequence of each first sub-quantum circuit module by using a second quantum logic gate combination so as to generate a first target quantum circuit.
Optionally, the first sub-quantum circuit module includes k first quantum logic gate combinations;
the second sub-quantum circuit module includes (kn-k 2) second quantum logic gate combinations.
Optionally, the method further comprises:
When (when) When the first quantum logic gate combination is utilized, a third sub-quantum circuit module is sequentially constructed on the front (2 (n-) -1) quantum bits and the quantum bits with even numbers;
utilizing a second quantum logic gate combination to sequentially construct a plurality of fourth sub-quantum circuit modules in the next time sequence of each third sub-quantum circuit module;
constructing a fifth sub-quantum circuit module on all the qubits using the first quantum logic gate combination;
and combining the third sub-quantum circuit module, the fourth sub-quantum circuit module and the fifth sub-quantum circuit module in sequence to generate a second target quantum circuit.
Optionally, the third sub-quantum circuit module comprises (n-k) first quantum logic gate combinations;
the fourth sub-quantum circuit module comprises (kn-k 2) second quantum logic gate combinations;
the fifth sub-quantum circuit module includes n first quantum logic gate combinations.
Optionally, the first quantum logic gate combination comprises a brix gate;
The second quantum logic gate combination includes a controlled not gate and a controlled rotate gate.
Yet another embodiment of the present application provides an apparatus for determining an optimal combination scheme using quantum circuits, the apparatus comprising:
the combination module is used for arranging and combining a plurality of preprocessing services to form a plurality of combination schemes;
The building module is used for building a target quantum circuit for simulating the combination result of the plurality of combination schemes;
And the operation module is used for operating the target quantum circuit and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the target quantum circuit.
Optionally, the combination module includes:
and the combination unit is used for selecting k preprocessing services from n preprocessing services to be arranged and combined, wherein n and k are positive integers, and n is greater than k.
Optionally, the building module includes:
and the determining unit is used for determining the number of quantum logic gates acting on the quantum bit, the action time sequence of the quantum logic gates and the regulation and control relation between the quantum bit and the quantum logic gates according to the n and the k, and generating a target quantum circuit to be constructed.
Optionally, the determining unit includes:
the method comprises the steps of obtaining a subunit, wherein n quantum bits are obtained, and the number i of the quantum bits is more than or equal to 0 and less than or equal to n-1;
A first construction subunit for, when When the first quantum logic gate combination is utilized, a first sub-quantum circuit module is sequentially constructed on the first (2 k-1) quantum bits and the quantum bits with even numbers;
and the second construction subunit is used for constructing a second sub-quantum circuit module in the next time sequence of each first sub-quantum circuit module in sequence by using a second quantum logic gate combination so as to generate a first target quantum circuit.
Optionally, the determining unit further includes:
A third building subunit for when When the first quantum logic gate combination is utilized, a third sub-quantum circuit module is sequentially constructed on the front (2 (n-k) -1) quantum bits and the quantum bits with even numbers;
A fourth constructing subunit, configured to sequentially construct a plurality of fourth sub-quantum circuit modules in a next time sequence of each third sub-quantum circuit module by using a second quantum logic gate combination;
A fifth building subunit for building a fifth sub-quantum circuit module on all of the qubits using the first quantum logic gate combinations;
and the combining subunit is used for sequentially combining the third sub-quantum circuit module, the fourth sub-quantum circuit module and the fifth sub-quantum circuit module to generate a second target quantum circuit.
Yet another embodiment of the present application provides a superscalar system implementing determination of optimal combination schemes using quantum circuits according to the method described in any of the above.
A further embodiment of the application provides a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the method of any of the preceding claims when run.
Yet another embodiment of the application provides an electronic device comprising a memory having a computer program stored therein and a processor configured to run the computer program to perform the method described in any of the above.
Compared with the prior art, the invention firstly arranges and combines a plurality of preprocessing services to form a plurality of combination schemes, then constructs the target quantum circuit for simulating the combination result of the plurality of combination schemes, finally operates the target quantum circuit, and determines the optimal combination scheme from the combination result of the plurality of combination schemes based on the operation result of the target quantum circuit.
Drawings
FIG. 1 is a block diagram of a system network for determining an optimal combination scheme using quantum circuits, provided by an embodiment of the present invention;
FIG. 2 is a method for determining an optimal combination scheme using quantum circuits, provided by an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a first sub-quantum circuit module according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a first target quantum circuit according to an embodiment of the present invention;
Fig. 5 is a schematic structural diagram of a third sub-quantum circuit module according to an embodiment of the present invention;
Fig. 6 is a schematic structural diagram of a combination of a third sub-quantum circuit module and a fourth sub-quantum circuit module according to an embodiment of the present invention;
Fig. 7 is a schematic structural diagram of a combination of a third sub-quantum circuit module, a fourth sub-quantum circuit module and a fifth sub-quantum circuit module according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a quantum circuit with a one-layer ladder structure according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of an apparatus for determining an optimal combination scheme by using a quantum circuit according to an embodiment of the present invention.
Detailed Description
The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
The embodiment of the invention firstly provides a method for determining an optimal combination scheme by utilizing a quantum circuit, which can be applied to electronic equipment such as a computer terminal, in particular to a common computer, a quantum computer and the like.
The following describes the operation of the computer terminal in detail by taking it as an example. Fig. 1 is a network block diagram of a system for determining an optimal combination scheme using quantum circuits according to an embodiment of the present invention. Systems that are applied to determine optimal combination schemes using quantum circuits may include network 110, server 120, wireless device 130, client 140, storage unit 150, classical processing system 160, quantum processing system 170, and may include additional memory, classical processors, quantum processors, and other devices not shown.
Network 110 is a medium that provides a communication link between various devices and computers connected together within a system network that is utilized to determine an optimal combination scheme using quantum circuits, including but not limited to the internet, intranets, local area networks, mobile communication networks, and combinations thereof, and may be connected by wired, wireless communication links, or fiber optic cables, etc.
Server 120 and client 140 are conventional data processing systems that may contain data and have applications or software tools that perform conventional computing processes. The client 140 may be a personal computer or a network computer, so the data may also be provided by the server 120. The wireless device 130 may be a smart phone, tablet, notebook, smart wearable device, or the like. The memory unit 150 may include a database 151 that may be configured to store data of qubit parameters, quantum logic gate parameters, quantum circuits, quantum programs, and the like.
Classical processing system 160 (quantum processing system 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data), which may be boot files, operating system images, and applications 162 (application 173), and a memory 163 (memory 172) for storing classical data (quantum data), which may be boot files, operating system images, and applications 162 (application 173), which may be used to implement quantum algorithms compiled using quantum circuits to determine an optimal combination scheme provided in accordance with embodiments of the present invention.
Any data or information stored or generated in classical processing system 160 (quantum processing system 170) may also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, as may any application program executed thereby.
It should be noted that, the real quantum computer is a hybrid structure, and it includes at least two major parts in fig. 1: classical processing system 160, responsible for performing classical calculations and controls; the quantum processing system 170 is responsible for running quantum programs to implement quantum computing.
The classical processing system 160 and the quantum processing system 170 may be integrated in one device or may be distributed among two different devices. A first device, for example, comprising classical processing system 160 runs a classical computer operating system on which quantum application development tools and services are provided, and also provides storage and network services required by quantum applications. The user develops the quantum application through the quantum application development tool and service thereon, and sends the quantum application through the web service thereon to a second device comprising the quantum processing system 170. The second device runs the quantum computer operating system, analyzes the code of the quantum program through the quantum computer operating system, compiles the code into an instruction which can be identified and executed by the quantum computer measurement and control system, and the quantum processor 170 realizes a quantum algorithm corresponding to the quantum program according to the instruction.
In a classical processing system 160 based on silicon chips, the unit of classical processor 161 is a CMOS tube, and such a computational unit is not limited by time and coherence, i.e. it is not limited by time of use, and is ready to use. Furthermore, the number of such computational units is also sufficient in silicon chips, and the number of computational units in a classical processor is now thousands of. The number of computational cells is sufficient and the CMOS transistor selectable computational logic is fixed, e.g., and logic. When the CMOS tube is used for operation, a large number of CMOS tubes are combined with limited logic functions, so that the operation effect is realized.
Unlike such logic units in classical processing system 160, the basic computational unit of quantum processor 171 in quantum processing system 170 is a qubit, the input of which is limited by coherence and also by coherence time, i.e., the qubit is limited in terms of time of use and is not readily available. Full use of qubits within the usable lifetime of the qubits is a critical challenge for quantum computing. Furthermore, the number of qubits in a quantum computer is one of the representative indicators of the performance of the quantum computer, each qubit realizes a calculation function by a logic function configured as needed, whereas the logic function in the field of quantum calculation is diversified in view of the limited number of qubits, such as Hadamard gate (H gate), brix gate (X gate), brix-Y gate (Y gate) brix-Z gate (Z gate), X gate, RY gate, RZ gate, CNOT gate, CR gate, iSWAP gate, toffoli gate, and the like. In quantum computation, the operation effect is realized by combining limited quantum bits with various logic function combinations.
Based on these differences, the design of the logic function acting on the qubits (including the design of whether the qubits are used or not and the design of the use efficiency of each qubit) is a key to improving the operational performance of the quantum computer, and special designs are required. The above design for qubits is a technical problem that is not considered nor faced by common computing devices. The number of combinations in view of the combination optimization problem in the present application increases explosively with the number of factors to be considered. Therefore, how to determine the optimal combination scheme is difficult to solve by NP, has high solving difficulty and high research value, and is a problem to be solved urgently. The application provides a method for determining an optimal combination scheme by utilizing a quantum circuit, which solves the defects in the prior art, and reduces the solving difficulty of the optimal combination problem and accelerates the solving speed by constructing a target quantum circuit for simulating the combination result of a plurality of combination schemes.
Referring to fig. 2, fig. 2 is a method for determining an optimal combination scheme by using a quantum circuit according to an embodiment of the present invention, which may include the following steps:
s201: the plurality of pre-processed services are arranged and combined to form a plurality of combination schemes.
Specifically, the arranging and combining the plurality of preprocessing services may include: k preprocessing services are selected from n preprocessing services to be arranged and combined, wherein n and k are positive integers, and n is greater than k. The preprocessing service may be a shortest path selection service, a grid power optimization service, a financial product selection service, and the like.
For example, for the financial investment field, k of n candidate assets are selected for investment to achieve maximum benefit while risk is controlled, with a total of possible portfolio scenariosA kind of module is assembled in the module and the module is assembled in the module.
S202: a target quantum circuit is constructed for simulating the combined result of the multiple combining schemes.
Specifically, constructing a target quantum circuit for simulating the combined result of the multiple combining schemes may include: and determining the number of quantum logic gates acting on the quantum bit, the action time sequence of the quantum logic gates and the regulation and control relation between the quantum bit and the quantum logic gates according to the n and the k, and generating a target quantum circuit to be constructed.
It will be appreciated by those skilled in the art that in classical computers, the basic unit of information is a bit, one bit having two states, 0 and 1, the most common physical implementation being to represent both states by the level of high and low. In quantum computing, the basic unit of information is a qubit, and one qubit also has two states of 0 and 1, denoted as |0> and |1>, but it can be in a superposition of the two states of 0 and 1, which can be expressed asWhere a, b are complex numbers representing the amplitude (probability amplitude) of the 0> state and 1> state, which is not possessed by classical bits. After measurement, the state of the qubit collapses to a certain state, where the probability of collapsing to |0> is |a| 2, the probability of collapsing to |1> is |b| 2,|a|2+|b|2 =1, and | > is a dirac sign.
Quantum circuits, which are one embodiment of quantum programs, also weigh sub-logic circuits, are the most commonly used general quantum computing model, representing circuits that operate on qubits under abstract concepts, the composition of which includes qubits, circuits (timelines), and various quantum logic gates, and finally the results often need to be read out by quantum measurement operations. Unlike conventional circuits, which are connected by metal lines to pass a voltage signal or a current signal, in a quantum circuit, the circuit can be seen as being connected by time, i.e., the state of the qubit naturally evolves over time, as indicated by the hamiltonian operator, during which time the circuit is operated upon until a logic gate is encountered.
Specifically, the determining, according to the n and the k, the number of quantum logic gates acting on the qubit, the action time sequence of the quantum logic gates, and the regulation relationship between the qubit and the quantum logic gates, and generating the target quantum circuit to be constructed may include:
1. Obtaining n quantum bits, wherein the number i of the quantum bits is more than or equal to 0 and less than or equal to n-1.
2. When (when)And when the first quantum logic gate combination is utilized, a first sub-quantum circuit module is sequentially constructed on the first (2 k-1) quantum bits and the even numbered quantum bits.
Specifically, the problem of determining an optimal combination scheme from the combination results of a plurality of combination schemes can be understood as a problem of preparing a state-corresponding scheme of a specific hamming weight, where k is the hamming weight.
Illustratively, taking n=5, k=1 as an example, the following is satisfiedAnd utilizing a first quantum logic gate combination to sequentially construct a first sub-quantum circuit module on the quantum bit with the number i less than or equal to 1 and the quantum bit with the number even, namely constructing the first sub-quantum circuit module in a first time sequence with the number q [0], wherein the first quantum logic gate combination comprises a Brix-X gate or an X gate for short.
The manner of processing the qubit may be a quantum logic gate. Quantum logic gates are used, which are the basis for forming a quantum circuit, and include single-bit quantum logic gates, such as Hadamard gates (H gates, hadamard gates), brix gates (X gates), brix-Y gates (Y gates), brix-Z gates (Z gates), RX gates, RY gates, RZ gates, and the like; multi-bit quantum logic gates such as CNOT gates, CR gates, iSWAP gates, toffoli gates, and the like. Quantum logic gates are typically represented using unitary matrices, which are not only in matrix form, but also an operation and transformation. The effect of a general quantum logic gate on a quantum state is calculated by multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.
Referring to FIG. 3, FIG. 3 is a schematic diagram of a first sub-quantum circuit module according to an embodiment of the present invention, as shown in FIG. 3, a group of quantum bits respectively including q [0], q [1], q [2], q [3], q [4] represent the 0 st, 1 st, 2 nd, 3 rd and 4 th quantum bits, and the q [4] q [3] q [2] q [1] q [0] is ordered from high order to low order, wherein the first sequence of the quantum bits numbered q [0] includes 1 first quantum logic gate combination, i.e. a British-X gate is provided.
3. And constructing a second sub-quantum circuit module in the next time sequence of each first sub-quantum circuit module by using a second quantum logic gate combination so as to generate a first target quantum circuit.
With reference to fig. 4, fig. 4 is a schematic structural diagram of a first target quantum circuit according to an embodiment of the present invention, and as shown in fig. 4, a second sub-quantum circuit module occupies a position in the quantum circuit, which may be collectively referred to as a second timing sequence. In a second timing sequence, the second sub-quantum circuit module includes (kn-k 2), i.e., (1 x 5-1), second quantum logic gate combinations, and the second quantum logic gate combinations include controlled not gates and controlled rotate gates, i.e., combinations including 4 sets of controlled not gates (CNOT quantum logic gates) and controlled rotate gates (e.g., controlled RY quantum logic gates). Wherein the controlled bits of the controlled RY quantum logic gate and the CNOT quantum logic gate are different, and the 4 groups of controlled RY quantum logic gates and the CNOT quantum logic gate combinations exhibit a regular ladder arrangement in the quantum circuit.
In an alternative embodiment, the method for determining the number of quantum logic gates acting on the qubit, the action time sequence of the quantum logic gates and the regulation relationship between the qubit and the quantum logic gates according to the n and the k, and generating the target quantum circuit to be constructed may further include the following steps:
Step 1: when (when) And when the first quantum logic gate combination is utilized, a third sub-quantum circuit module is sequentially constructed on the first (2 (n-k) -1) quantum bits and the even numbered quantum bits.
Illustratively, taking n=5, k=3 as an example, a first quantum logic gate combination is utilized to sequentially construct a third sub-quantum circuit module on the first 3 qubits, even numbered qubits, i.e., within a first timing sequence numbered q [0] and q [2], wherein the first quantum logic gate combination includes a brix gate or simply an X gate.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a third sub-quantum circuit module according to an embodiment of the present invention, as shown in fig. 5, a group of quantum bits are q [0], q [1], q [2], q [3], q [4], where the first sequence of quantum bits numbered q [0] and q [2] includes 2 first quantum logic gate combinations, i.e., two brix gates are disposed.
Step 2: and constructing a plurality of fourth sub-quantum circuit modules in the next time sequence of each third sub-quantum circuit module by using the second quantum logic gate combination.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a combination of a third sub-quantum circuit module and a fourth sub-quantum circuit module according to an embodiment of the present invention, where the fourth sub-quantum circuit module occupies a position in the quantum circuit, and may be collectively referred to as a second timing sequence as shown in fig. 6. In the second timing sequence, the fourth sub-quantum circuit module includes (5×3-3×3) second quantum logic gate combinations, and the second quantum logic gate combinations include controlled not gates and controlled rotate gates, i.e., combinations including 6 sets of CNOT quantum logic gates and controlled RY quantum logic gates. Wherein the controlled RY quantum logic gates and the CNOT quantum logic gates differ in controlled bits, and the 6 groups of controlled RY quantum logic gates and the CNOT quantum logic gates in combination also exhibit a regular ladder arrangement in the quantum circuit.
Step 3: and constructing a fifth sub-quantum circuit module on all the quantum bits by using the first quantum logic gate combination.
Referring to fig. 7, fig. 7 is a schematic structural diagram of a third sub-quantum circuit module, a fourth sub-quantum circuit module, and a fifth sub-quantum circuit module according to an embodiment of the present invention, where the fifth sub-quantum circuit module occupies a position in the quantum circuit, and may be collectively referred to as a third timing sequence, as shown in fig. 7. In the third timing sequence, the fifth sub-quantum circuit module includes 5 first quantum logic gate combinations, and the first quantum logic gate combinations include the brix gates, i.e., 1 brix gate is respectively provided at 5 qubits.
Step 4: and combining the third sub-quantum circuit module, the fourth sub-quantum circuit module and the fifth sub-quantum circuit module in sequence to generate a second target quantum circuit.
The second target quantum circuit is generated by combining the third sub-quantum circuit module, the fourth sub-quantum circuit module and the fifth sub-quantum circuit module as shown in fig. 7.
It should be noted that, referring to fig. 8, fig. 8 is a schematic diagram of a quantum circuit with a one-layer ladder structure, and the second quantum logic gate combination, that is, the CNOT, controlled RY and CNOT quantum logic gate combination, is used, and the ladder structure is adopted, so that a hamming weight state with accurate output can be obtained after operation. When (when)When the hamming weight state is to be obtainedNamely, a k-layer ladder structure circuit shown in fig. 8 needs to be configured, and the difference of each layer is that the starting time steps of the layers are the same, namely, the layers are aligned with the modules combined by the first quantum logic gate and the second quantum logic gate of the ladder, and a British-X gate is added on the controlled bit of the CNOT gate of the first time step of each ladder structure circuit; likewise, whenWhen in use, is adopted inFinally, a layer of Brix-X gate is added to complete the Hamming weight stateIs prepared by the following steps.
S203: and operating the target quantum circuit, and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the target quantum circuit.
Specifically, by constructing and running a target quantum circuit and counting output conditions under different inputs, a ladder-type target quantum circuit only comprising neighbor interactions is summarized, the ladder-type target quantum circuit is a problem-friendly type quasi-designed quantum circuit meeting the current quantum hardware limiting conditions, the output quantum state mainly comprises a base vector of target hamming weight, the hamming weight state of an accurate specific k value can be output, and the ladder-type target quantum circuit can be used for determining an optimal combination scheme from combination results of multiple combination schemes, so that space dimension and parameter quantity in the quantum circuit are greatly reduced, a barren altitude problem is effectively overcome, solving difficulty of the optimal combination problem is reduced, and solving speed is increased.
It should be noted that, although the above-mentioned target quantum circuit is constructed to better operate on NISQ and obtain better execution results, this also results in a very small parameter amount of the parameter-containing sub-logic gate with the depth of the target quantum circuit. It will be appreciated that with the reduction of the number of parameters, the base vectors in the target quantum circuits are caused to change synchronously with the same parameters, which also causes limitation of the degree of freedom of the target quantum circuits, so that it is not always possible to obtain an optimal execution result with a higher probability. To solve the above-described problem, a number of layers of a ladder-structured quantum circuit as shown in fig. 8 may be added to the target quantum circuit.
Therefore, the invention firstly arranges and combines a plurality of preprocessing services to form a plurality of combination schemes, then constructs a target quantum circuit for simulating the combination result of the plurality of combination schemes, finally operates the target quantum circuit, and determines an optimal combination scheme from the combination result of the plurality of combination schemes based on the operation result of the target quantum circuit.
Referring to fig. 9, fig. 9 is a schematic structural diagram of an apparatus for determining an optimal combination scheme by using a quantum circuit according to an embodiment of the present invention, which corresponds to the flow shown in fig. 2, may include:
a combination module 901, configured to arrange and combine a plurality of preprocessing services to form a plurality of combination schemes;
A construction module 902, configured to construct a target quantum circuit for simulating a combination result of the multiple combination schemes;
and the operation module 903 is configured to operate the target quantum circuit, and determine an optimal combination scheme from the combination results of the multiple combination schemes based on the operation result of the target quantum circuit.
Specifically, the combination module includes:
and the combination unit is used for selecting k preprocessing services from n preprocessing services to be arranged and combined, wherein n and k are positive integers, and n is more than k.
Specifically, the construction module includes:
and the determining unit is used for determining the number of quantum logic gates acting on the quantum bit, the action time sequence of the quantum logic gates and the regulation and control relation between the quantum bit and the quantum logic gates according to the n and the k, and generating a target quantum circuit to be constructed.
Specifically, the determining unit includes:
the method comprises the steps of obtaining a subunit, wherein n quantum bits are obtained, and the number i of the quantum bits is more than or equal to 0 and less than or equal to n-1;
A first construction subunit for, when When the first quantum logic gate combination is utilized, a first sub-quantum circuit module is sequentially constructed on the first (2 k-1) quantum bits and the quantum bits with even numbers;
and the second construction subunit is used for constructing a second sub-quantum circuit module in the next time sequence of each first sub-quantum circuit module in sequence by using a second quantum logic gate combination so as to generate a first target quantum circuit.
Specifically, the determining unit further includes:
A third building subunit for when When the first quantum logic gate combination is utilized, a third sub-quantum circuit module is sequentially constructed on the first (2 (n-k) -1) quantum bits and the even numbered quantum bits:
A fourth constructing subunit, configured to sequentially construct a plurality of fourth sub-quantum circuit modules in a next time sequence of each third sub-quantum circuit module by using a second quantum logic gate combination;
A fifth building subunit for building a fifth sub-quantum circuit module on all of the qubits using the first quantum logic gate combinations;
and the combining subunit is used for sequentially combining the third sub-quantum circuit module, the fourth sub-quantum circuit module and the fifth sub-quantum circuit module to generate a second target quantum circuit.
Compared with the prior art, the invention firstly arranges and combines a plurality of preprocessing services to form a plurality of combination schemes, then constructs the target quantum circuit for simulating the combination result of the plurality of combination schemes, finally operates the target quantum circuit, and determines the optimal combination scheme from the combination result of the plurality of combination schemes based on the operation result of the target quantum circuit.
The embodiment of the invention also provides a quantum supercooperation system which runs on a quantum computer comprising a quantum processor and/or a supercomputer comprising a classical processor and is used for determining an optimal combination scheme by utilizing a quantum circuit according to the method of the embodiment of the method side of the invention.
The embodiment of the invention also provides a storage medium in which a computer program is stored, wherein the computer program is arranged to perform the steps of the method embodiment of any of the above when run.
Specifically, in the present embodiment, the above-described storage medium may be configured to store a computer program for executing the steps of:
s201: arranging and combining a plurality of preprocessing services to form a plurality of combination schemes;
s202: constructing a target quantum circuit for simulating the combined result of the multiple combination schemes;
s203: and operating the target quantum circuit, and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the target quantum circuit.
Specifically, in the present embodiment, the storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
An embodiment of the invention also provides an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of the method embodiment of any of the above.
Specifically, the electronic apparatus may further include a transmission device and an input/output device, where the transmission device is connected to the processor, and the input/output device is connected to the processor.
Specifically, in the present embodiment, the above-described processor may be configured to execute the following steps by a computer program:
s201: arranging and combining a plurality of preprocessing services to form a plurality of combination schemes;
s202: constructing a target quantum circuit for simulating the combined result of the multiple combination schemes;
s203: and operating the target quantum circuit, and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the target quantum circuit.
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (7)
1. A method for determining an optimal combination scheme using quantum circuits, the method comprising:
From the slave Selection among individual pre-processing servicesEach arranged and combined to form a plurality of combination schemes, wherein,、Are all positive integers, and；
ObtainingNumber of qubits, and numbering of the qubitsSatisfy the following requirements；
When (when)At the time, the first quantum logic gate combination is utilized to sequentially precedeConstructing a first sub-quantum circuit module on the quantum bits with even numbers; constructing a second sub-quantum circuit module in the next time sequence of each first sub-quantum circuit module by using a second quantum logic gate combination so as to generate a first target quantum circuit; the first sub-quantum circuit module comprisesA first quantum logic gate combination; the second sub-quantum circuit module comprisesA second quantum logic gate combination; the first quantum logic gate combination includes a brix gate; the second quantum logic gate combination comprises a controlled NOT gate and a controlled rotary gate;
and operating the first target quantum circuit, and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the first target quantum circuit.
2. The method according to claim 1, wherein the method further comprises:
When (when) At the time, the first quantum logic gate combination is utilized to sequentially precedeConstructing a third sub-quantum circuit module on the quantum bits with even numbers;
utilizing a second quantum logic gate combination to sequentially construct a plurality of fourth sub-quantum circuit modules in the next time sequence of each third sub-quantum circuit module;
constructing a fifth sub-quantum circuit module on all the qubits using the first quantum logic gate combination;
combining the third sub-quantum circuit module, the fourth sub-quantum circuit module and the fifth sub-quantum circuit module in sequence to generate a second target quantum circuit;
And operating the second target quantum circuit, and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the second target quantum circuit.
3. The method of claim 2, wherein the third sub-quantum circuit module comprisesA first quantum logic gate combination;
The fourth sub-quantum circuit module comprises A second quantum logic gate combination;
The fifth sub-quantum circuit module comprises A first quantum logic gate combination.
4. An apparatus for determining an optimal combination scheme using quantum circuits, the apparatus comprising:
a combination module for slave Selection among individual pre-processing servicesEach arranged and combined to form a plurality of combination schemes, wherein,、Are all positive integers, and；
Building up a module to obtainNumber of qubits, and numbering of the qubitsSatisfy the following requirements; When (when)At the time, the first quantum logic gate combination is utilized to sequentially precedeConstructing a first sub-quantum circuit module on the quantum bits with even numbers; constructing a second sub-quantum circuit module in the next time sequence of each first sub-quantum circuit module by using a second quantum logic gate combination so as to generate a first target quantum circuit; the first sub-quantum circuit module comprisesA first quantum logic gate combination; the second sub-quantum circuit module comprisesA second quantum logic gate combination; the first quantum logic gate combination includes a brix gate; the second quantum logic gate combination comprises a controlled NOT gate and a controlled rotary gate;
And the operation module is used for operating the first target quantum circuit and determining an optimal combination scheme from the combination results of the plurality of combination schemes based on the operation result of the first target quantum circuit.
5. A superscalar system, characterized in that it implements the determination of optimal combination schemes using quantum circuits according to the method as claimed in any one of claims 1 to 3.
6. A storage medium having a computer program stored therein, wherein the computer program is arranged to perform the method of any of claims 1 to 3 when run.
7. An electronic device comprising a memory and a processor, characterized in that the memory has stored therein a computer program, the processor being arranged to run the computer program to perform the method of any of the claims 1 to 3.
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| CN115545947A (en) * | 2022-10-18 | 2022-12-30 | 合肥本源量子计算科技有限责任公司 | Optimal investment portfolio determination method based on variational quantum circuit and related device |
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| CN114996581A (en) * | 2022-06-17 | 2022-09-02 | 合肥本源量子计算科技有限责任公司 | Service combination recommendation method and device, electronic equipment and storage medium |
| CN115545947A (en) * | 2022-10-18 | 2022-12-30 | 合肥本源量子计算科技有限责任公司 | Optimal investment portfolio determination method based on variational quantum circuit and related device |
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