CN116643640A

CN116643640A - Step-by-step power-up method, device, equipment and storage medium of server system

Info

Publication number: CN116643640A
Application number: CN202310442906.8A
Authority: CN
Inventors: 申明伟; 徐良; 杨占
Original assignee: Hexin Technology Co ltd; Hexin Technology Suzhou Co ltd
Current assignee: Hexin Technology Co ltd; Hexin Technology Suzhou Co ltd
Priority date: 2023-04-23
Filing date: 2023-04-23
Publication date: 2023-08-25
Anticipated expiration: 2043-04-23
Also published as: CN116643640B

Abstract

The application relates to the technical field of server power-on and discloses a step-by-step power-on method, device, equipment and storage medium of a server system. And when the initialization node meets the power-on condition, power-on operation is carried out on the functional module corresponding to the power-on condition in the server system, so that step-by-step peak staggering power-on of different functional modules is carried out according to different initialization nodes in the server. The power-on device has the advantages that power-on to each functional module in a short time is avoided, and the problems of power waste and surge caused by power-on in a short time are avoided.

Description

Step-by-step power-up method, device, equipment and storage medium of server system

Technical Field

The application relates to the technical field of server power-on, in particular to a step-by-step power-on method, device and equipment of a server system and a storage medium.

Background

Most of the existing servers are formed by mutually matching all functional modules such as a fan module, a hard disk module, a PCIe IO module, a CPU module, a memory module and the like so as to realize specific functions. In order to improve the reliability and maintainability of the server, a Hot plug (Hot plug) protection mechanism is arranged between the functional modules, so that the normal operation of the server is not affected by inserting each functional module under the condition that the power supply of the server is not closed. The hot plug protection mechanism is a mechanism for setting an enabling signal for controlling whether the module is powered on or not in each functional module so as to ensure that the functional module is powered on or powered off normally.

The enable signal may be output and controlled by a complex programmable logic device (Complex Programmable Logic Device, CPLD). Under normal conditions, a CPLD time sequence control scheme is introduced on a server main board to control the power-on or power-off of each functional module in the server, so that the aims of accurate control, simple circuit topology, repeated modification and adjustment and the like are achieved. However, in the CPLD timing control scheme in the prior art, when the server is started, power rails (Power rails) in each functional module in the server are powered on in sequence according to a Power-on timing in a short time. The fan module, the hard disk module, the PCIe IO module, the CPU module and the memory module in the server are always powered on synchronously, however, the time points of initialization or the time points of entering the working state of the functional modules in the server are different, which leads to the situation that power on certain functional modules is performed prematurely, resulting in wasting server power; and all the functional modules are electrified in a short time, so that the burden of a power supply and a machine room power supply system is increased, and other equipment is influenced.

Therefore, how to avoid the power waste and the surge problem caused by the power-up of each functional module in a short time during the initialization process of the server system has become an urgent problem to be solved.

Disclosure of Invention

In view of the above, the embodiments of the present application provide a method, an apparatus, a device, and a storage medium for step-by-step power-up of a server system, so as to solve the problems of power waste and surge caused by power-up of each functional module in a short time during the initialization process of the server system.

In a first aspect, an embodiment of the present application provides a step-wise power-up method of a server system, where the method includes:

when a starting instruction is received, starting a server system initialization process;

monitoring startup self-checking information generated by a server system in an initialization process;

according to the startup self-checking information, determining an initialization node where a server system is located;

and when the initialization node meets the power-on condition, performing power-on operation on a functional module corresponding to the power-on condition in the server system so as to realize step-by-step power-on of the server system.

In the technical scheme, when a starting instruction is received, a server initialization process is started, and starting self-checking information generated in the initialization process of the server is monitored to determine an initialization node where the server is located. Because the initialization node of the server corresponds to the initialization of each functional module in the server, when the initialization node meets the power-on condition, the current functional module in the server needs to be powered on to ensure that the initialization process of the server is successfully completed. And when the initialization node meets the power-on condition, power-on operation is carried out on the functional module corresponding to the power-on condition in the server, so that step-by-step peak staggering power-on of different functional modules according to different initialization nodes in the server is realized. The power-on device has the advantages that power-on to each functional module in a short time is avoided, and the problems of power waste and surge caused by power-on in a short time are avoided.

In some embodiments, when the initialization node satisfies the power-on condition, performing a power-on operation on a functional module in the server system corresponding to the power-on condition, so as to implement step-by-step power-on of the server system includes:

monitoring whether a previous functional module of the functional module corresponding to the power-on condition outputs a power-on completion signal;

monitoring whether the startup self-checking information corresponding to the initialization node is target information; the target information is used for indicating the functional module corresponding to the power-on condition to reach the power-on time node;

when a last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition;

when the initialization node meets the power-on condition, a load switch function in the hot plug chip corresponding to the power-on condition is started so as to perform power-on operation on the functional module corresponding to the power-on condition.

In the technical scheme, when a starting instruction is received, the system main power module, the system power supply module and the CPU module in the server system are electrified in sequence, so that the normal starting of the server system is ensured. And further, whether the last-stage functional module of the functional module outputs a power-on completion signal or not and whether the starting-up self-checking information is target information or not are monitored, so that the current functional module reaches a node which is required to be powered on. And starting a load switch function in the hot plug chip corresponding to the current functional module to perform power-on operation on the current functional module. And determining whether to start the hot plug service corresponding to the current functional module according to the power-on completion signal and the target information output by the upper functional module of the current functional module, so that the hot plug protection mechanism in the server system is satisfied while the step-by-step peak-shifting power-on of each functional module in the server system is realized.

In some embodiments, a server system includes a CPU module and a fan module; the fan module is the next-stage functional module of the CPU module;

when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

when the CPU module outputs a power-on completion signal and the target information indicates that the fan module reaches a power-on time node, the initialization node is determined to meet the power-on condition of the fan module.

In the above technical scheme, when the functional module is a fan module, whether the last-stage CPU module of the fan module outputs a power-on completion signal and whether the startup self-checking information indicates that the fan module reaches a power-on time node is triggered by two dimensions to determine whether to start a load switch function in a hot plug chip corresponding to the fan module so as to power on the fan module, so that the power-on of the fan module when the CPU module outputs the power-on completion signal is avoided, the power-on time span between the CPU module and the fan module is prolonged, and the power waste and the surge problem caused by power-on in a short time are avoided.

In some embodiments, the server system further comprises a baseboard management controller;

The method further comprises the steps of:

when receiving the overheat signal sent by the baseboard management controller, the load switch function in the hot plug chip corresponding to the fan module is started to power up the fan module.

In the technical scheme, the temperature problem in the initializing process of the server system is considered, when the overheat signal sent by the baseboard management controller is received, the temperature of the server system is indicated to reach or exceed the preset temperature threshold, and the fan module is electrified at the moment, so that the server system can be cooled, and the influence of the overhigh temperature of the server system on the initializing process and performance of the server system is avoided.

In some embodiments, the server system further includes a memory module, where the memory module is a next-level functional module of the fan module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

when the fan module outputs a power-on completion signal and the target information indicates that the memory module reaches a power-on time node, a load switch function in a hot plug chip corresponding to the memory module is started so as to perform power-on operation on the memory module.

In the above technical solution, when the functional module is the memory module, whether the power-on completion signal is output from the fan module at the upper stage of the memory module and whether the startup self-checking information indicates that the memory module reaches the power-on time node is triggered by two dimensions to determine whether to start the load switch function in the hot plug chip corresponding to the memory module so as to power on the memory module, thereby avoiding the power-on of the memory module as soon as the fan module outputs the power-on completion signal, prolonging the power-on time span between the fan module and the memory module, and avoiding the power waste and surge problem caused by power-on in a short time.

In some embodiments, the server system further includes a PCIe IO module, where the memory module is a next-level functional module of the PCIe IO module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

when the memory module outputs a power-on completion signal and the target information indicates that the PCIe IO module reaches a power-on time node, a load switch function in a hot plug chip corresponding to the PCIe IO module is started so as to perform power-on operation on the PCIe IO module.

In the above technical scheme, when the functional module is a PCIe IO module, whether the PCIe IO module reaches a power-on time node or not is determined by triggering whether to start a load switch function in a hot plug chip corresponding to the PCIe IO module from two dimensions of a memory module of a previous stage of the PCIe IO module to power on the PCIe IO module or not, power-on time span between the memory module and the PCIe IO module is lengthened as soon as the memory module outputs the power-on completion signal, and power waste and surge problems caused by power-on in a short time are avoided.

In some embodiments, the server system further comprises a hard disk module, wherein the hard disk module is a next-level functional module of the PCIe IO module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

and when the PCIe IO module outputs a power-on completion signal and the target information indicates whether the hard disk module reaches a power-on time node, starting a load switch function in a hot plug chip corresponding to the hard disk module so as to perform power-on operation on the hard disk module.

In the above technical scheme, when the functional module is a hard disk module, whether the power-on completion signal is output from the PCIe IO module at the upper stage of the hard disk module and whether the startup self-checking information indicates that the hard disk module reaches the power-on time node are triggered to determine whether to start the load switch function in the hot plug chip corresponding to the hard disk module so as to power on the hard disk module, so that the problem that the power-on time span between the PCIe IO module and the hard disk module is prolonged as soon as the PCIe IO module outputs the power-on completion signal, and the power waste and the surge problem caused by power-on in a short time are avoided.

In a second aspect, an embodiment of the present application provides a step-wise power-up device of a server system, where the device includes:

the starting module is used for starting the initialization process of the server system when a starting instruction is received;

the monitoring module is used for monitoring the startup self-checking information generated in the initialization process of the server system;

the determining and analyzing judging module is used for determining and analyzing the initialization node where the server system is located according to the starting-up self-checking information;

and the power-on module is used for performing power-on operation on the functional module corresponding to the power-on condition in the server system when the initialization node meets the power-on condition so as to realize step-by-step power-on of the server system.

In a third aspect, an embodiment of the present application provides a computer apparatus, including: the server system comprises a memory and a processor, wherein the memory and the processor are in communication connection, the memory stores computer instructions, and the processor executes the computer instructions so as to execute the step-by-step power-up method of the server system according to the first aspect or any corresponding embodiment of the first aspect.

In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, where computer instructions are stored on the computer readable storage medium, where the computer instructions are configured to cause a computer to perform the step-up method of the server system according to the first aspect or any implementation manner corresponding to the first aspect.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present application, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

FIG. 1 is a block diagram illustrating a server system according to one embodiment of the application;

FIG. 2 is an explanatory diagram of POST information generated by a server system in a start-up initialization process, functions corresponding to each POST information, functional modules corresponding to specific POST information, and power rails inside the functional modules in the related art;

FIG. 3 is a flow chart of a step-up method of a server system according to an embodiment of the present application;

FIG. 4 is a flow chart illustrating a step-up method of yet another server system according to an embodiment of the present application;

FIG. 5 is a step-wise current flow diagram of a server system in an application scenario according to the present application;

FIG. 6a is a power-on timing diagram of a conventional server system;

FIG. 6b is a power-on timing diagram corresponding to a step-by-step power-on method of the server system according to the present application;

FIG. 7 is a block diagram illustrating a step-up device of a server system according to an embodiment of the present application;

fig. 8 is a schematic diagram of a hardware structure of a computer device according to an embodiment of the present application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. Based on the embodiments of the present application, all other embodiments that can be obtained by a person skilled in the art without making any inventive effort fall within the scope of the present application.

It should be understood that the "indication" mentioned in the embodiments of the present application may be a direct indication, an indirect indication, or an indication having an association relationship. For example, a indicates B, which may mean that a indicates B directly, e.g., B may be obtained by a; it may also indicate that a indicates B indirectly, e.g. a indicates C, B may be obtained by C; it may also be indicated that there is an association between a and B.

In the description of the embodiments of the present application, the term "corresponding" may indicate that there is a direct correspondence or an indirect correspondence between the two, or may indicate that there is an association between the two, or may indicate a relationship between the two and the indicated, configured, etc.

In the embodiment of the present application, the "predefining" may be implemented by pre-storing corresponding codes, tables or other manners that may be used to indicate relevant information in devices (including, for example, terminal devices and network devices), and the present application is not limited to the specific implementation manner thereof.

Fig. 1 is a schematic diagram illustrating a server system according to some embodiments of the present application. The server system includes a system total power module 110, a system power module 120, a CPU module 130, a memory module 140, a PCIe IO module 150, a fan module 160, a hard disk module 170, and a processing device.

The system power supply module 120, the CPU module 130, the memory module 140, the PCIe IO module 150, the fan module 160 and the hard disk module 170 are all connected with the system main power supply module 110 through corresponding HOT Plug interfaces (HOT Plug); the processing device is connected to the system power module 120, the CPU module 130, the memory module 140, the PCIe IO module 150, the fan module 160, the hard disk module 170, and the system total power module 110. The processing equipment is used for executing the step-by-step power-on method of the server, when a starting-up instruction is received, after the server initialization process is started, the initialization node where the server system is located is judged through starting-up self-checking (Power On Self Test, POST) information, and further when the initialization node meets the power-on condition, a power-on enabling signal is sent to a hot-plug interface chip corresponding to the functional module, so that a load switch (LoadSwitch) function in the hot-plug chip is started, and the functional module is powered on. The processing device is any device with the functions of monitoring, receiving and controlling whether each functional module in the server system is electrified, and the CPLD is taken as an example in the embodiment of the application. The p12v_psu shown in fig. 1 is a system total power module 110, p12v_sys is a system power module 120, p12v_cpu is a CPU module 130, p12v_mem is a memory module 140, p12v_io is a PCIe IO module 150, p12v_fan is a FAN module 160, and p12v_hdd6 is a hard disk module 170.

It should be noted that, the number of functional modules that the server system can divide is not limited in the embodiment of the present application, and the embodiment of the present application uses 6 functional modules as an example.

Optionally, the system POWER module 120, the CPU module 130, the memory module 140, the PCIe IO module 150, the fan module 160, and the hard disk module 170 each include at least one sub-module, for example, the system POWER module 120 shown in fig. 1 includes a SYS POWER sub-module, a clk_gen sub-module, and a PCI e_sw sub-module; the CPU module 130 includes CPU sub-modules; the memory module 140 includes a mem_bu_fer sub-module and a DIMMS sub-module; the PCIe IO module 150 includes a PCIe Slot sub-module and a PCIe Riser sub-module; FAN module 160 includes a FAN sub-module; the hard disk module 170 includes an HD D sub-module.

Optionally, the system power module 120, the CPU module 130, the memory module 140, the PCIe IO module 150, the fan module 160, and the hard disk module 170 all include power rails, and the processing device controls power-up of the power rails by sending a power-up enable signal to each power rail.

In one application scenario, the server system may be divided into 6 power modules: p12v_sys, p12v_cpu, p12v_mem, p12v_io, p12v_fan, and p12v_hdd6, wherein p12v_sys is the system power module 120, p12v_cpu is the CPU module 130, p12v_mem is the memory module 140, p12v_io is the PCIe IO module 150, p12v_fan is the FAN module 160, and p12v_hdd6 is the hard disk module 170. The 6 Power modules comprise 21 paths of Power Rai l. A system overall power module, i.e. p12v_psu, is also included, which includes only one power rail p12v_psu for the power device (Power Supply Unit, PSU) output, which is the source of the system overall power input.

The p12v_sys is used for supplying Power to a 12V system, and the Power Rail at the back end mainly includes P5V, P V3, P1V, P0V9, and the like, and mainly supplies Power to submodules or devices in the server system, such as a PCIe Switch submodule, a clock unit, some logic devices, and the like. The P12V_CPU is a source of CPU Power supply, and the main Power Rail at the rear end of the P12V_CPU is mainly provided with CPU_VIO, CPU_VDD, CPU_VCS, CPU_VPCIE and the like, and mainly supplies Power to the CPU. The P12V_MEM is a source for supplying Power to the memory related sub-modules, and the main Power Rail at the back end of the P0V9_CT, P1V035_CT, DIMM_VPP, DIMM_VDD and DIMM_VTT are used for supplying Power to the memory buffers and the memory banks on the memory sub-card. The P12V_IO is a source for supplying power to the IO interface, and the module only comprises a power rail P12V_IO which mainly supplies power to a PCIe slot and a PCIe sub-card on the main board. The P12V_FAN is the source of power to the FAN back plane, and the module includes only one power rail P12V_FAN primarily for use with the FAN. The P12V_HDD is a source for supplying Power to the hard disk backboard, and the main Power Rail at the back end is the P12V_HDD, the P5V_HDD and the P3V3_HDD which mainly supply Power to the hard disk.

Because the POST information has 25 pieces of information such as iSTEP 0-21, OPAL, boot Loader, linux and the like, and each piece of information corresponds to different functions, the POST information can indicate different initialization nodes in the initialization process of the server system. Specifically, as shown in fig. 2, POST information generated in the whole initialization process of the server system, functions corresponding to each POST information, a functional module corresponding to specific POST information, and a power rail inside the functional module are listed, where POST CODE is POST information; the content of the related power supply dividing column is a functional module corresponding to specific POST information; the content of the power supply rail column in the module is the power supply rail in the functional module; the content of the function profile column is an initialization node where the server system is currently located; the content of the function description column is the function corresponding to the PSOT information. The processing device determines the initialization node where the server system is located by monitoring POST information, for example, when the processing device monitors iSTEP6, it determines that the initialization node where the server system is currently located is an initialization FSI bus. And when the initialization node meets the power-on condition, a power-on enabling signal is sent to the hot plug interface corresponding to the functional module, so that a load switch (LoadSwitch) function in the hot plug chip is started, and the functional module is powered on. It will be appreciated that the processing device monitors the server system for a power-on command NA prior to generating iSTEP0, and preferably powers up p12v_sys and p12v_cpu.

Optionally, the server system further comprises a baseboard management controller (Baseboard Management Con troller, BMC) for monitoring the temperature of the server system, and sending a signal with logic level 1 to the processing device when the temperature of the server system reaches or exceeds a temperature threshold value, so that the processing device performs a power-on operation on the fan module 160.

Fig. 3 is a flow chart of a method of step-up of a server system, the method being performed by a processing device, which may be the processing device shown in fig. 1, according to some embodiments of the application. As shown in fig. 3, the process includes the steps of:

step 301, when a startup instruction is received, a server system initialization process is started.

When an operator starts the server system, the server system is connected with the power supply processing equipment to receive a starting instruction, and the initialization process of the server system is started by executing a power-on self-checking program through the server system. The server system is the server system shown in fig. 1.

Step 302, monitoring boot self-test information generated by the server system in the initialization process.

When the server system executes the power-on self-checking program, a CPU in the server system can generate power-on self-checking (Power On Self Test, POST) information corresponding to the current power-on self-checking program and output the POST information through a bus (Low Pin Count, LPC), and the processing equipment can monitor the POST information output by the CPU through a monitor and also can receive the POST information sent by the CPU to complete monitoring of the POST information.

Step 303, determining an initialization node where the server system is located according to the boot self-test information.

The processing device can judge the initialization node where the server system executes the current power-on self-checking program according to the functions corresponding to the monitored different POST information.

And step 304, when the initialization node meets the power-on condition, performing power-on operation on the functional module corresponding to the power-on condition in the server system so as to realize step-by-step power-on of the server system.

When the processing equipment monitors that the startup self-checking information corresponding to the current initialization node of the server system is specific information, the current initialization node of the server system is judged to meet the power-on condition, and further a power-on enabling signal is sent to a functional module indicated by the specific information, so that the power-on operation of the functional module is completed, and further step-by-step power-on of the server system is realized.

In summary, when a startup instruction is received, a server initialization process is started and startup self-checking information generated in the initialization process of the server is monitored to determine an initialization node where the server is located. Because the initialization node of the server corresponds to the initialization of each functional module in the server, when the initialization node meets the power-on condition, the current functional module in the server needs to be powered on to ensure that the initialization process of the server is successfully completed. And when the initialization node meets the power-on condition, power-on operation is carried out on the functional module corresponding to the power-on condition in the server, so that step-by-step peak staggering power-on of different functional modules according to different initialization nodes in the server is realized. The power-on device has the advantages that power-on to each functional module in a short time is avoided, and the problems of power waste and surge caused by power-on in a short time are avoided.

Fig. 4 is a flow chart of a method of step-up of a server system, the method being performed by a processing device, which may be the processing device shown in fig. 1, according to some embodiments of the application. As shown in fig. 4, the flow includes the steps of:

step 401, when a startup instruction is received, a server system initialization process is started.

Please refer to step 301 in the embodiment shown in fig. 3 in detail, which is not described herein.

Optionally, when a startup instruction is received, the system main power module, the system power module and the CPU module are powered on in sequence to start the initialization process of the server system.

The server system comprises a CPU module and a system main power module, and when receiving a starting instruction, the processing equipment sequentially transmits a power-on enabling signal to the system main power module and the CPU module in the server system, and the initialization of the CPU in the server system is preferably completed to ensure that the initialization process of the server is smoothly started, so that the follow-up monitoring of starting self-checking information is facilitated, and the step-by-step power-on is realized.

Optionally, when a startup instruction is received, powering up the system main power module, the system power module and the CPU module in sequence, so as to start the initialization process of the server system, including:

When a starting instruction is received, powering up the system main power module; monitoring whether a system voltage module outputs a power-on completion signal; when the system main power module outputs a power-on completion signal, each power rail in the system power supply module and the CPU voltage module is powered on in sequence according to a preset power-on time sequence so as to start a server system initialization process.

When the processing equipment receives a starting instruction, the processing equipment can send a power-on enabling signal to the system main power module preferentially according to a preset power-on time sequence, and power on the system main power module. The system main power supply module sends a power-on completion signal to the processing equipment after normal operation, and the processing equipment sequentially sends power-on enabling signals to each power rail in the system power supply module and the CPU module according to the sequence specified by the preset time sequence after receiving the power-on completion signal sent by the system main power supply module so as to enable the system power supply module and the CPU module to be powered on, thereby ensuring the normal initialization process of the server system and facilitating the follow-up monitoring of the power-on self-checking information generated in the initialization process of the server system. The specific process of the processing equipment for powering on the system power supply module and the CPU module is that when the processing equipment judges that the current power supply rail reaches the power-on time according to the preset power-on time sequence and receives a power-on completion signal sent by the upper stage power supply rail of the current power supply rail, a power-on enabling signal is sent to the current power supply rail so that the current power supply rail can normally work when powered on. The preset power-on time sequence is used for indicating specific power-on time of each functional module in the server system and is burnt into the processing equipment in advance.

In an application scenario, as shown in fig. 5, in conjunction with fig. 1, taking the processing device as a CPLD as an example, each block in fig. 5 represents each voltage regulation module (Voltage Regulated, VR) in the server system, and each VR is a power rail in each functional module shown in fig. 1. The power-on Enable signal in the embodiment of the application is denoted as EN (Enable); PGD (Power Good) is the output signal of VR, is used for representing the output state of VR, and when PGD signal is logic 1, represents that VR reaches normal output form, and when PGD signal is logic 0, represents that VR does not reach normal output state. The PGD signal of logic 1 is the power-on completion signal in the embodiment of the present application. "≡" is a logical symbol and, and specific logic is defined as 1 at the same time, and outputs 1, and the rest is 0. The "|" is a logical symbol or, and specific logic is defined as 0 at the same time, and outputs 0, and the rest is 1. The power-up sequence of each power rail illustrated in fig. 5 is a power-up sequence indicated by a preset power-up sequence.

The specific power-on step in the initialization process of the CPLD to the server system comprises the following steps:

step 1, when the CPLD receives a power-on instruction, the processing device will preferentially send an EN signal to the p12v_psu according to a preset power-on sequence, so that the p12v_psu is powered on, when the p12v_psu output reaches a normal state, the PGD becomes 1, and the total P12V is output for the back end.

And 2, after the CPLD receives the P12V_PSU PGD signal, the CPLD delays for a certain time and then sends out P12V_SYS EN, the P12V_SYSHOTPlug corresponding to the P12V_SYS starts working after receiving the enabling signal, the P12V_SYS is electrified, and the PGD becomes 1 after the output reaches a normal output state.

Step 3, after the CPLD receives the P12V_SYSPGD signal, the CPLD delays for a certain time and then sends out P5V EN and P3V3 EN; the P5V VR and the P3V3 VR start to work after receiving the enabling signals, and the PGD becomes 1 after the output reaches the normal output state.

Step 4, after the CPLD receives the P5V PGD and the P3V3 PGD signals, the result of the two signals is 1, and the CPLD delays for a certain time and then sends out P1V8 EN; the P1V8 VR starts working after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state.

Step 5, after the CPLD receives the P1V8 PGD signal, the CPLD delays for a certain time and then sends out P0V9EN; the P0V9 VR starts to operate after receiving the enable signal, and the PGD becomes 1 when the output reaches the normal output state.

Step 6, after the CPLD receives the P0V9 PGD signal, the CPLD delays for a certain time and then sends out a P12V_CPU EN; and after receiving the enabling signal, the P12V_CPU HotPlug corresponding to the P12V_CPU starts to work, and when the output reaches a normal output state, the PGD becomes 1.

Step 7, after the CPLD receives the P12V_CPU PGD signal, the CPLD delays for a certain time and then sends out a CPU_VIO EN; the CPU_VIO VR starts working after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state.

Step 8, after the CPLD receives the CPU_VIO PGD signal, the CPLD delays for a certain time and then sends out CPU_VDD EN; the CPU_VDD VR starts to work after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state.

Step 9, after the CPLD receives the CPU_VDD PGD signal, the CPLD delays for a certain time and then sends out a CPU_VCS EN; the cpu_vcs VR starts to operate after receiving the enable signal, and the PGD becomes 1 when the output reaches the normal output state.

Step 10, after the CPLD receives a CPU_VCS PGD signal, the CPLD delays for a certain time and then sends out a CPU_VPCIEN; the CPU_VPCIE VR starts working after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state. Steps 1 to 10 are the flow paths shown in fig. 5 (1) to (2).

Step 402, monitoring startup self-checking information generated by the server system in the initialization process.

Please refer to step 302 in the embodiment shown in fig. 3 in detail, which is not described herein.

Step 403, determining an initialization node where the server system is located according to the boot self-test information.

Please refer to step 303 in the embodiment shown in fig. 3 in detail, which is not described herein.

And step 404, when the initialization node meets the power-on condition, performing power-on operation on the functional module corresponding to the power-on condition in the server system so as to realize step-by-step power-on of the server system.

Please refer to step 304 in the embodiment shown in fig. 3 in detail, which is not described herein.

Optionally, step 404 may further include, in some embodiments:

step 4041, monitoring whether the previous stage function module of the function module corresponding to the power-on condition outputs a power-on completion signal.

After the power-on of each functional module in the server system is completed, the functional module outputs a power-on completion signal to indicate that the functional module reaches a normal output state, and sends the power-on completion signal to the processing equipment. The processing device monitors the upper-level functional module of the functional module to output the power-on completion signal after receiving the power-on completion signal sent by the functional module.

Step 4042, monitoring whether the boot self-test information corresponding to the initialization node is the target information.

The target information is preset information for indicating the functional module to reach the power-on time node. The startup self-checking information comprises fixed characters, and the processing equipment determines whether the startup self-checking information corresponding to the currently monitored initialization node is target information according to whether preset fixed characters exist in the startup self-checking information. It can be understood that the preset fixed character corresponding to the target information can be set according to the requirement by itself, so long as the time span of powering on each functional module in the server system can be prolonged. The embodiment of the application is not particularly limited. The embodiment of the application presets the startup self-checking information with the fixed character iSTEP4 for indicating the power-on time node of the fan module in the server system; the startup self-checking information with the fixed character iSTEP9 is used for indicating that a memory module in the server system reaches a power-on time node; and the boot self-test information with the fixed character iSTEP 20 is used for indicating that the PCIe IO module and the hard disk module in the server system reach the power-on time node for example.

Step 4043, when the previous functional module of the functional module outputs the power-on completion signal and the power-on self-checking information corresponding to the initialization node is the target information, determining that the initialization node meets the power-on condition.

After the processing equipment determines that the startup self-checking information corresponding to the initialization node is the target information and the upper-level functional module of the functional module outputs a power-on completion signal, the initialization node where the server system is currently located is determined to meet the power-on condition.

Step 4044, when the initialization node meets the power-on condition, turning on the load switch function in the hot plug chip corresponding to the power-on condition, so as to perform the power-on operation on the functional module.

When the processing equipment determines that the initialization node meets the power-on condition, the processing equipment sends a power-on enabling signal to a hot plug interface between the functional module indicated by the target information and the system main power module so as to start a load switch function of a hot plug chip corresponding to the functional module, and therefore the functional module is powered on.

It can be understood that thousands of server systems are often deployed in the existing machine room, so that surge damage caused by centralized power-up of each functional module in the server systems is huge, and normal operation of other devices in a power grid can be seriously affected. The power-on completion signal is output by the upper-level functional module of the functional module, and the power-on self-checking information corresponding to the initialization node is used as the target information to determine that the initialization node meets the power-on condition, so that whether the functional module indicated by the target information reaches the power-on node or not is accurately determined, and when the initialization node does not meet the power-on condition, the current functional module is not powered on, and the power consumption of the functional module in a waiting period before initialization is avoided, thereby saving power. When the initialization node meets the power-on condition, a load switch function in a hot plug chip corresponding to the functional module is started to power-on the functional module, so that step-by-step peak-shifting power-on of different functional modules based on different initialization nodes in a server is realized, instantaneous power consumption top flushing caused by centralized power-on of all the functional modules in the server system is avoided, and a surge phenomenon is avoided.

Optionally, in order to centralize and power up all the functional modules in the server system to cause instant power consumption and top, a surge phenomenon is avoided, and the server system is ensured to smoothly perform an initialization process and ensure the performance of the server system, and in some embodiments, the server system comprises a CPU module and a fan module; the fan module is the next-stage functional module of the CPU module;

After the CPU module is powered on, the processing equipment receives an output signal sent by the CPU module, and when the output signal is logic level 1, the processing equipment monitors that the CPU module outputs a power-on completion signal. Meanwhile, whether the current startup self-checking information is the information with the fixed character iSTEP 4 is judged, and if so, a load switch function in a hot plug chip corresponding to the fan module is started so as to perform power-on operation on the fan module.

Optionally, in some embodiments, the server system further comprises a baseboard management controller; the method may further comprise:

When the initialization process of the server system is started, the BMC monitors the temperature in the server system in real time, and when the temperature in the server system reaches or exceeds a preset temperature threshold value, an overheat signal with the logic level of 1 is sent to the processing equipment. At this time, the processing device determines that the temperature of the server system reaches or exceeds a preset temperature threshold value, and needs to be reduced in temperature to power up the fan module, so as to send a power-up enabling signal to the hot plug interface corresponding to the fan module, so as to start the hot plug service to power up the fan module. The fan module is directly electrified to cool the server system when the temperature of the server system reaches or exceeds the preset temperature threshold, so that the server system can be ensured to smoothly perform an initialization process and the performance of the server system is ensured.

Optionally, in order to centralize and electrify all the functional modules in the server system to cause instant power consumption and top, so as to avoid the surge phenomenon, in some embodiments, the server system further includes a memory module, where the memory module is a next-stage functional module of the fan module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

When the fan module outputs a power-on completion signal and the target information indicates that the memory module reaches a power-on time node, a load switch function in a hot plug chip corresponding to the memory module is started so as to perform power-on operation on the memory module. The specific implementation process is substantially similar to the power-on process of the fan module, and will not be described herein.

Optionally, in order to centralize and electrify all the functional modules in the server system to cause instant power consumption and top, so as to avoid the surge phenomenon, in some embodiments, the server system further includes a PCIe IO module, and the memory module is a next-stage functional module of the PCIe IO module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

when the memory module outputs a power-on completion signal and the target information indicates that the PCIe IO module reaches a power-on time node, a load switch function in a hot plug chip corresponding to the PCIe IO module is started so as to perform power-on operation on the PCIe IO module. The specific implementation process is substantially similar to the power-on process of the fan module, and will not be described herein.

Optionally, in order to centralize and electrify all the functional modules in the server system to cause instant power consumption and top, so as to avoid the surge phenomenon, in some embodiments, the server system further comprises a hard disk module, wherein the hard disk module is the next-stage functional module of the PCIe IO module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

when the PCIe IO module outputs a power-on completion signal and the target information indicates whether the hard disk module reaches a power-on time node, a load switch function in a hot plug chip corresponding to the hard disk module is started so as to perform power-on operation on the hard disk module. The specific implementation process is substantially similar to the power-on process of the fan module, and will not be described herein.

Alternatively, in order to power up all functional modules in the server system together, causing instantaneous power consumption to rush to the top, the surge phenomenon is avoided, and in some embodiments,

optionally, for example, the method further avoids a transient power consumption top-punching caused by centralized power-up of each power rail in the functional module, and avoids a surge phenomenon, in some embodiments, the functional module includes at least one power rail, and when the initialization node meets a power-up condition, turning on a load switch function in a hot plug chip corresponding to the functional module, so as to perform a power-up operation on the functional module includes:

When a load switch function in a hot plug chip corresponding to a functional module is started, according to a preset power-on time sequence, monitoring whether a power-on completion signal is output by a power rail of a previous stage of the power rail to be powered on by the functional module in sequence;

when the upper stage power rail of the power rail to be powered on outputs a power-on completion signal, the power-on enabling signal is sent to the power rail to be powered on so that the power rail to be powered on is powered on, and the power-on operation of the functional module is completed.

The functional modules in the server system may further comprise sub-modules, and normal operation of each sub-module depends on the power rail at the rear end of the sub-module, so that power-up of the functional modules is performed by powering up the power rails in the functional modules. After the processing device starts the load switch function in the hot plug chip corresponding to the functional module, whether to send a power-on enabling signal to the current power rail to be powered on in the functional module is determined according to the sequence of the preset power-on time sequence indication. When the current upper-level power rail of the power rail to be powered on sends a power-on completion signal to the processing equipment, the processing equipment sends a power-on enabling signal to the current power rail to be powered on so as to complete the power-on operation of the functional module. The power supply rails are powered on step by step when the functional module is powered on, so that instant power consumption and top flushing caused by centralized power on each power supply rail in the functional module are further avoided, and the surge phenomenon is avoided.

Based on the above application scenario, in conjunction with fig. 5 and fig. 1, before the CPLD receives POST information, power-up needs to be performed on the CPU module and the whole server system.

Before the CPLD receives the POST information with the fixed character of the iSTEP5, CPU power consumption is lower, the heat productivity of the server system is smaller, and a fan does not need to be intervened before the CPU power consumption is lower. After iSTEP5, CPU power consumption becomes high, the server system heat generation becomes large, and the fan module is required to operate before this POST information. Therefore, when the CPLD receives POST information with the fixed character of iSTEP4, the power supply of the FAN module is turned on, that is, the hot plug service corresponding to p12v_fan is turned on, and then the power supply rail in the p12v_fan module is powered on, where p12v_fan in fig. 5 represents the FAN module and also represents the power supply rail of the FAN module. In order to ensure that the server system is effective, it is also necessary to determine whether to turn on the fan by the BMC according to the temperature condition monitored by the BMC.

When the CPLD receives POST information with fixed characters of the iSTEP10, the initialization process of the server system reaches the initialization of the memory buffer; specifically, when the CPLD receives POST information with a fixed character of iSTEP9, power is supplied to p12_mem, that is, hot plug service corresponding to p12_mem is started, and then Power Rail related to the memory buffer is powered on to start memory buffer initialization.

When the CPLD receives POST information with fixed characters of the iSTEP12, the initialization process of the server system reaches the memory bank initialization; specifically, when the CPLD receives POST information with a fixed character of iSTEP11, power Rail related to the memory bank is turned on to start initializing related to the memory bank.

When the CPLD receives POST information with fixed characters of the iSTEP21, the initialization process of the server system reaches the initialization of the PCIe IO module; specifically, before the POST signal with the fixed character of the iSTEP21 is received, power supply of P12V_IO is started, namely hot plug service corresponding to the P12V_IO is started, and initialization of PCIe equipment is carried out; when the initialization process of the server system indicated by the POST information reaches the hard disk to start initialization, the CPLD specifically starts power supply of the P12V_HDD in advance for a certain time, namely starts hot plug service corresponding to the P12V_HDD, and further powers on the power rails P5V_HDD and the P3V3_HDD at the rear end of the power rails.

The step of powering up the CPLD in the initialization process of the server system further includes, after step 10:

step11, after the CPLD receives the cpu_vpciepgd signal, it needs to determine whether the POST information reaches iSTEP4 or whether the BMC sends a logic level 1; when the POST information is iSTEP4 or the BMC sends any one of the logic 1 levels, the CPLD sends p12v_fan EN. And after receiving the enabling signal, the P12V_FAN Hot Plug corresponding to the P12V_FAN starts to work, and when the output reaches a normal output state, the PGD becomes 1. The basis for this is that the power consumption of the system is about to increase, the temperature is increased, and the fan needs to be started for heat dissipation. The BMC sends a logic 1 level if it monitors the system internal module temperature to reach the threshold. Step11 is a flow shown between (2) to (3) in fig. 5.

Step 12, after the CPLD receives the P12V_FAN PGD signal, judging whether the POST information reaches the iSTEP9 at the moment; when the POST information is iSTEP9, p12v_mem EN is issued. The P12V_MEM Hot Plug corresponding to the P12V_MEM starts to work after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state. The iSTEP 10 initializes the memory buffer, and needs to power up the memory buffer related module before this.

And step 13, after the CPLD receives the P12V_MEM PGD signal, the CPLD delays for a certain time and then sends out P0V9_CT EN, the P0V9_CT VR starts working after receiving the enabling signal, and the PGD becomes 1 after the output reaches a normal output state.

Step 14, after the CPLD receives the p0v9_ct PGD signal, the CPLD delays for a certain time and then sends out p1v035_ct EN, the p1v035_ct VR starts working after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state. Steps 12 to 14 are the flows shown between (3) to (4) in fig. 5.

Step 15, after the CPLD receives the P1V035_CT PGD signal, judging whether the POST information reaches the iSTEP11 at the moment; when the POST information is iSTEP11, dimm_vpp EN is issued. The DIMM_VPP VR starts to work after receiving the enabling signal, and the PGD becomes 1 after the output reaches the normal output state. The iSTEP 12 initializes the memory bank, and needs to power up the memory related module before this.

And step 16, after receiving the DIMM_VPP PGD signal, the CPLD delays for a certain time and then sends out DIMM_VDD EN, the DIMM_VDD starts to work after receiving the enabling signal, and the PGD becomes 1 after the output reaches a normal output state.

And step 17, after receiving the DIMM_VDD PGD signal, the CPLD delays for a certain time and then sends out DIMM_VTT EN, the DIMM_VTT starts to work after receiving the enabling signal, and the PGD becomes 1 after the output reaches a normal output state. Steps 15 to 16 are the flows shown between (4) to (5) in fig. 5.

Step 18, after the CPLD receives the DIMM_VTT signal, judging whether the POST information reaches the iSTEP21 at the moment; when the POST information is iSTEP21, p12v_io EN is issued. And after receiving the enabling signal, the P12V_IO Hot Plug corresponding to the P12V_IO starts working, and when the output reaches a normal output state, the PGD becomes 1. The iSTEP21 initializes the PCIE IO module, and needs to power up the PCIE related module before this.

And step 19, after the CPLD receives the P12V_IO PGD signal, the CPLD delays for a certain time and then sends out the P12V_HDD EN, the P12V_HDD Hot Plug corresponding to the P12V_HDD starts working after receiving the enabling signal, and the PGD becomes 1 after the output reaches a normal output state.

And step 20, after the CPLD receives the P12V_HDD PGD signal, the CPLD delays for a certain time and then sends out a P5V_HDD EN and a P3V_HDD EN, and the P5V_HD VR and the P3V_HDD VR start to work after receiving the enabling signals, and the PGD becomes 1 after the output reaches a normal output state. So far, all power supplies are powered up. Steps 18 to 20 are the flows shown between (5) to (6) in fig. 5.

With reference to fig. 6a and fig. 6b, fig. 6a is a power-up timing diagram of a conventional server system, and fig. 6b is a power-up timing diagram corresponding to a step-by-step power-up method of the server system according to the present application. The power-on time sequence of the traditional server system finishes power-on within 1 second after receiving a start-up command; the power-on time sequence corresponding to the step-by-step power-on method of the server system provided by the application is completed after 40-140 seconds after receiving a power-on command. By comparing the two Power-up processes, when the Power Rail is powered up by the step-by-step Power-up method of the server system provided by the application, the initialization process of the server system can be determined according to POST information, and then the step-by-step Power-up is started, so that the aim of saving energy and starting peak staggering is fulfilled.

In conclusion, when a starting-up instruction is received, the system main power module, the system power supply module and the CPU module in the server system are powered on in sequence, so that the normal starting of the server system is ensured. And further, whether the last-stage functional module of the functional module outputs a power-on completion signal or not and whether the starting-up self-checking information is target information or not are monitored, so that the current functional module reaches a node which is required to be powered on. And starting a load switch function in the hot plug chip corresponding to the current functional module to perform power-on operation on the current functional module. And determining whether to start the hot plug service corresponding to the current functional module according to the power-on completion signal and the target information output by the upper functional module of the current functional module, so that the hot plug protection mechanism in the server system is satisfied while the step-by-step peak-shifting power-on of each functional module in the server system is realized.

As shown in fig. 7, an embodiment of the present application further provides a step-wise power-up device of a server system, where the step-wise power-up device is used to implement the foregoing embodiments and preferred embodiments, and the description is omitted. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated. The step-by-step power-up device comprises:

the starting module 701 is configured to start a server system initialization process when a startup instruction is received;

the monitoring module 702 is configured to monitor boot self-checking information generated in an initialization process of the server system;

the determining and analyzing judging module 703 is configured to determine an initialization node where the server system is located according to the startup self-checking information;

and the power-on execution module 704 is configured to perform power-on operation on a functional module corresponding to the power-on condition in the server system when the initialization node meets the power-on condition, so as to implement step-by-step power-on of the server system.

In some alternative embodiments, the power-on execution module 704 includes:

The first monitoring unit is used for monitoring whether a previous-stage functional module of the functional module corresponding to the power-on condition outputs a power-on completion signal or not;

the second monitoring unit is used for monitoring whether the startup self-checking information corresponding to the initialization node is target information or not; the target information is used for indicating the information that the functional module corresponding to the power-on condition reaches the power-on time node;

the determining and analyzing judging unit is further used for determining that the initialization node meets the power-on condition when the upper-level functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information;

and the starting unit is used for starting the load switch function in the hot plug chip corresponding to the power-on condition when the initialization node meets the power-on condition so as to perform power-on operation on the functional module.

In some alternative embodiments, a server system includes a CPU module and a fan module; the fan module is the next-stage functional module of the CPU module; the determining and analyzing judging unit is further used for:

In some alternative embodiments, the server system further comprises a baseboard management controller; the apparatus further comprises:

and the power-on execution module is also used for starting a load switch function in the hot plug chip corresponding to the fan module when receiving the overheat signal sent by the baseboard management controller so as to perform power-on operation on the fan module.

In some optional embodiments, the server system further includes a memory module, where the memory module is a next-stage functional module of the fan module; the determining and analyzing judging unit is further used for:

In some optional embodiments, the server system further includes a PCIe IO module, and the memory module is a next-stage functional module of the PCIe IO module; the determining and analyzing judging unit is further used for:

In some optional embodiments, the server system further includes a hard disk module, where the hard disk module is a next-level functional module of the PCIe IO module; the determining and analyzing judging unit is further used for:

when the PCIe IO module outputs a power-on completion signal and the target information indicates whether the hard disk module reaches a power-on time node, a load switch function in a hot plug chip corresponding to the hard disk module is started so as to perform power-on operation on the hard disk module.

The step-up means of the server system in this embodiment are presented in the form of functional units, where the units refer to ASIC circuits, processors and memories executing one or more software or fixed programs, and/or other devices that can provide the above described functionality.

Further functional descriptions of the above respective modules and units are the same as those of the above corresponding embodiments, and are not repeated here.

The embodiment of the application also provides computer equipment, which is provided with the step-by-step power-up device of the server system shown in the figure 7.

Referring to fig. 8, fig. 8 is a schematic structural diagram of a computer device according to an alternative embodiment of the present application, as shown in fig. 8, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting the various components, including high-speed interfaces and low-speed interfaces. The various components are communicatively coupled to each other using different buses and may be mounted on a common motherboard or in other manners as desired. The processor may process instructions executing within the computer device, including instructions stored in or on memory to display graphical information of the GUI on an external input/output device, such as a display device coupled to the interface. In some alternative embodiments, multiple processors and/or multiple buses may be used, if desired, along with multiple memories and multiple memories. Also, multiple computer devices may be connected, each providing a portion of the necessary operations (e.g., as a server array, a set of blade servers, or a multiprocessor system). One processor 10 is illustrated in fig. 8.

The processor 10 may be a central processor, a network processor, or a combination thereof. The processor 10 may further include a hardware chip, among others. The hardware chip may be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general-purpose array logic, or any combination thereof.

Wherein the memory 20 stores instructions executable by the at least one processor 10 to cause the at least one processor 10 to perform a method for implementing the embodiments described above.

The memory 20 may include a storage program area that may store an operating system, at least one application program required for functions, and a storage data area; the storage data area may store data created from the use of the computer device of the presentation of a sort of applet landing page, and the like. In addition, the memory 20 may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, memory 20 may optionally include memory located remotely from processor 10, which may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

Memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk, or solid state disk; the memory 20 may also comprise a combination of the above types of memories.

The computer device also includes a communication interface 30 for the computer device to communicate with other devices or communication networks.

The embodiments of the present application also provide a computer readable storage medium, and the method according to the embodiments of the present application described above may be implemented in hardware, firmware, or as a computer code which may be recorded on a storage medium, or as original stored in a remote storage medium or a non-transitory machine readable storage medium downloaded through a network and to be stored in a local storage medium, so that the method described herein may be stored on such software process on a storage medium using a general purpose computer, a special purpose processor, or programmable or special purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, a solid state disk or the like; further, the storage medium may also comprise a combination of memories of the kind described above. It will be appreciated that a computer, processor, microprocessor controller or programmable hardware includes a storage element that can store or receive software or computer code that, when accessed and executed by the computer, processor or hardware, implements the methods illustrated by the above embodiments.

Although embodiments of the present application have been described in connection with the accompanying drawings, various modifications and variations may be made by those skilled in the art without departing from the spirit and scope of the application, and such modifications and variations fall within the scope of the application as defined by the appended claims.

Claims

1. A method for step-wise powering up of a server system, the method comprising:

monitoring startup self-checking information generated by the server system in an initialization process;

determining an initialization node where the server system is located according to the starting-up self-checking information;

and when the initialization node meets a power-on condition, performing power-on operation on a functional module corresponding to the power-on condition in the server system so as to realize step-by-step power-on of the server system.

2. The method according to claim 1, wherein when the initialization node satisfies a power-on condition, the performing a power-on operation on a functional module in the server system corresponding to the power-on condition includes:

monitoring whether a previous-stage functional module of the functional module corresponding to the power-on condition outputs a power-on completion signal;

Monitoring whether the startup self-checking information corresponding to the initialization node is target information; the target information is used for indicating the functional module corresponding to the power-on condition to reach a power-on time node;

when a power-on completion signal is output by a previous-stage functional module of the functional module and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition;

and when the initialization node meets a power-on condition, starting a load switch function in the hot plug chip corresponding to the power-on condition so as to perform power-on operation on the functional module corresponding to the power-on condition.

3. The method of claim 2, wherein the server system comprises a CPU module and a fan module; the fan module is a next-stage functional module of the CPU module;

and when the CPU module outputs a power-on completion signal and the target information indicates that the fan module reaches a power-on time node, determining that the initialization node meets the power-on condition of the fan module.

4. A method according to claim 3, wherein the server system further comprises a baseboard management controller;

the method further comprises the steps of:

and when receiving the overheat signal sent by the baseboard management controller, starting a load switch function in the hot plug chip corresponding to the fan module so as to perform power-on operation on the fan module.

5. The method of claim 3, wherein the server system further comprises a memory module, the memory module being a next level functional module of the fan module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

and when the fan module outputs a power-on completion signal and the target information indicates that the memory module reaches a power-on time node, starting a load switch function in a hot plug chip corresponding to the memory module so as to perform power-on operation on the memory module.

6. The method of claim 5, wherein the server system further comprises a PCIe IO module, and the memory module is a next-level functional module of the PCIe IO module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

And when the memory module outputs a power-on completion signal and the target information indicates that the PCIe IO module reaches a power-on time node, starting a load switch function in a hot plug chip corresponding to the PCIe IO module so as to perform power-on operation on the PCIEIO module.

7. The method of claim 6, wherein the server system further comprises a hard disk module, the hard disk module being a next level functional module of the PCIe IO module; when the last functional module of the functional module outputs a power-on completion signal and the power-on self-checking information corresponding to the initialization node is target information, determining that the initialization node meets a power-on condition includes:

8. A step-up device for a server system, the device comprising:

the determining, analyzing and judging module is used for determining, analyzing and judging an initialization node where the server system is located according to the starting-up self-checking information;

and the power-on execution module is used for carrying out power-on operation on the functional module corresponding to the power-on condition in the server system when the initialization node meets the power-on condition so as to realize step-by-step power-on of the server system.

9. A computer device, comprising: a memory and a processor in communication with each other, the memory having stored therein computer instructions that, when executed, perform the distributed power-up method of the server system of any of claims 1 to 7.

10. A computer readable storage medium having stored thereon computer instructions for causing a computer to perform the distributed power-up method of the server system of any of claims 1 to 7.