CN116632127A - LED epitaxial structure - Google Patents

LED epitaxial structure Download PDF

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Publication number
CN116632127A
CN116632127A CN202310538780.4A CN202310538780A CN116632127A CN 116632127 A CN116632127 A CN 116632127A CN 202310538780 A CN202310538780 A CN 202310538780A CN 116632127 A CN116632127 A CN 116632127A
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layer
type semiconductor
type
epitaxial structure
led epitaxial
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林志伟
陈凯轩
蔡建九
何剑
李敏华
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Xiamen Changelight Co Ltd
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Xiamen Changelight Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure

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  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

The application provides an LED epitaxial structure, wherein an N-type semiconductor layer at least comprises three N-type semiconductor sublayers, and N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent. Further, in the N-type semiconductor layer, an N-type semiconductor sub-layer close to one side of the substrate is an N-type semiconductor bottom layer, an N-type semiconductor sub-layer close to one side of the active layer is an N-type semiconductor top layer, and the rest N-type semiconductor sub-layers are N-type semiconductor intermediate layers; and the N-type doping concentration of the at least one N-type semiconductor middle layer is lower than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer. The N-type doping concentration of the N-type semiconductor layer is in a stepped distribution structure with high and low levels, the structure can buffer high-voltage static electricity, the destructive power of the high-voltage static electricity is reduced, the ESD performance is improved, and meanwhile the ESD performance is prevented from being influenced due to the reduction of the N-type doping of the active layer.

Description

LED epitaxial structure
Technical Field
The application relates to the field of light emitting diodes, in particular to an LED epitaxial structure.
Background
A light emitting diode (english: light Emitting Diode, abbreviated as LED) is a semiconductor electronic element capable of emitting light. The LED has the advantages of high efficiency, long service life, small volume, low power consumption and the like, and can be applied to the fields of indoor and outdoor white light illumination, screen display, backlight sources and the like.
Group III-V nitrides have received wide attention and application in the electrical and optical fields due to their excellent physical and chemical properties (large forbidden bandwidth, high breakdown field, high electron saturation mobility, etc.). However, in practical applications, because of limitations of materials, structures and processes, such as large lattice mismatch and thermal expansion coefficient mismatch between the sapphire substrate and the GaN material, the commercial sapphire substrate-based blue LED has some inherent defects, such as heat dissipation problem, electric leakage problem and efficiency degradation effect under high current. Although a buffer layer is interposed between the substrate and the light-emitting epitaxy, there are problems in that the crystal quality is low and the ESD antistatic property of the device is deteriorated at the time of epitaxial growth.
In view of this, the present inventors have specifically devised an LED epitaxial structure, which results therefrom.
Disclosure of Invention
The application aims to provide an LED epitaxial structure to solve the problems of poor crystal quality and poor ESD antistatic performance during epitaxial growth.
In order to achieve the above purpose, the technical scheme adopted by the application is as follows:
an LED epitaxial structure comprising:
a substrate, and an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially laminated on the surface of the substrate; the N-type semiconductor layer at least comprises three N-type semiconductor sublayers, and N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent.
Preferably, in the N-type semiconductor layer, an N-type semiconductor sub-layer near one side of the substrate is an N-type semiconductor bottom layer, an N-type semiconductor sub-layer near one side of the active layer is an N-type semiconductor top layer, and the rest N-type semiconductor sub-layers are N-type semiconductor intermediate layers; and the N-type doping concentration of the at least one N-type semiconductor middle layer is lower than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer.
Preferably, the N-type semiconductor layer has at least four N-type semiconductor sublayers, and the N-type doping concentration of an N-type semiconductor intermediate layer is higher than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer.
Preferably, a current blocking interface layer is arranged at the juncture of at least two adjacent N-type semiconductor sublayers.
Preferably, a current blocking interface layer is arranged at the juncture of at least two adjacent N-type semiconductor intermediate layers.
Preferably, the current blocking interface layer is arranged at the junction of two adjacent N-type semiconductor intermediate layers near one side of the N-type semiconductor top layer.
Preferably, a stress release layer is further provided between the N-type semiconductor layer and the active layer.
Preferably, an electron supplementing layer is further provided between the stress releasing layer and the active layer.
Preferably, an undoped composite layer is disposed between the active layer and the P-type semiconductor layer, and the undoped composite layer is used for limiting electron leakage to the P-type semiconductor layer.
Preferably, the LED epitaxial structure includes a gallium nitride-based LED epitaxial structure, the N-type semiconductor layer is an N-type GaN layer, the P-type semiconductor layer is a P-type GaN layer, and the current blocking interface layer includes an AlGaN current blocking interface layer.
Further, the stress relief layer comprises at least an AlInGaN layer.
Further, the electron supplementing layer comprises an N-type GaN layer.
Further, the undoped composite layer includes an AlGaN material layer.
Further, the N-type semiconductor layer is provided with 6N-type GaN layers, the N-type GaN layer close to one side of the substrate is an N-type GaN bottom layer, the N-type GaN layer close to one side of the active layer is an N-type GaN top layer, and the rest N-type GaN layers are respectively a first N-type GaN intermediate layer, a second N-type GaN intermediate layer, a third N-type GaN intermediate layer and a fourth N-type GaN intermediate layer along a first direction; wherein the first direction is perpendicular to the substrate and directed from the substrate to the active layer.
Further, the N-type doping concentration of the first N-type GaN intermediate layer is lower than the N-type doping concentration of the N-type GaN bottom layer and/or the N-type GaN top layer.
Further, the N-type doping concentration of the third N-type GaN intermediate layer is higher than the N-type doping concentration of the N-type GaN bottom layer and/or the N-type GaN top layer.
Further, the AlGaN current blocking interface layer is arranged at the junction of the third N-type GaN intermediate layer and the fourth N-type GaN intermediate layer.
According to the technical scheme, the LED epitaxial structure comprises a substrate, and an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially laminated on the surface of the substrate; the N-type semiconductor layer at least comprises three N-type semiconductor sublayers, and N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent. Further, in the N-type semiconductor layer, an N-type semiconductor sub-layer close to one side of the substrate is an N-type semiconductor bottom layer, an N-type semiconductor sub-layer close to one side of the active layer is an N-type semiconductor top layer, and the rest N-type semiconductor sub-layers are N-type semiconductor intermediate layers; and the N-type doping concentration of the at least one N-type semiconductor middle layer is lower than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer. The N-type doping concentration of the N-type semiconductor layer is in a stepped distribution structure with high and low levels, the structure can buffer high-voltage static electricity, the destructive power of the high-voltage static electricity is reduced, the ESD performance is improved, and meanwhile the ESD performance is prevented from being influenced due to the reduction of the N-type doping of the active layer.
And a current blocking interface layer is arranged at the juncture of at least two adjacent N-type semiconductor sublayers. Further, the current blocking interface layer is arranged at the junction of two adjacent N-type semiconductor intermediate layers close to one side of the N-type semiconductor top layer, so that the transmission distance of strong current caused by high-voltage static electricity can be reduced, the current blocking effect of the N-type semiconductor layer is effectively improved, dislocation penetration of materials is reduced, and the luminous efficiency of the LED is effectively improved.
Then, a stress release layer is further arranged between the N-type semiconductor layer and the active layer, so that electric leakage can be further reduced, and the reliability of the LED device is improved.
Finally, by setting up: an electron supplementing layer is arranged between the stress releasing layer and the active layer; further, an undoped composite layer is disposed between the active layer and the P-type semiconductor layer. Therefore, the carrier concentration of the active layer is improved, and the leakage of electrons to the P-type semiconductor layer is effectively limited, so that non-radiative recombination is reduced, the working voltage is effectively reduced, and the luminous efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an LED epitaxial structure provided in embodiments 1 and 2 of the present application;
fig. 2 is a schematic diagram of an N-type semiconductor layer according to embodiment 1 of the present application;
fig. 3 is a schematic diagram of an N-type semiconductor layer according to embodiment 2 of the present application;
the symbols in the drawings illustrate:
1. a substrate;
2. a buffer layer;
3. a U-GaN layer;
4. n-type semiconductor layer, 4.1 … …. N: an N-type semiconductor sub-layer,
4.1', an N-type semiconductor bottom layer, 4.2', a first N-type GaN intermediate layer, 4.3', a second N-type GaN intermediate layer, 4.4', a third N-type GaN intermediate layer, 4.5', a fourth N-type GaN intermediate layer, and a 4.6', N-type semiconductor top layer;
5. a stress release layer;
6. an electron supplementing layer;
7. an active layer;
8. an undoped composite layer;
9. an electron blocking layer;
10. a P-type semiconductor layer;
11. AlGaN current blocking interface layer.
Detailed Description
In order to make the contents of the present application more clear, the contents of the present application will be further described with reference to the accompanying drawings. The present application is not limited to this specific embodiment. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Example 1
As shown in fig. 1 and 2, an LED epitaxial structure includes:
a substrate 1, and an N-type semiconductor layer 4, an active layer 7 and a P-type semiconductor layer 10 sequentially laminated on the surface of the substrate 1; the N-type semiconductor layer at least comprises three N-type semiconductor sublayers (4.1 … …,4. N), and the N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent.
Further, in the N-type semiconductor layer 4, the N-type semiconductor sub-layer 4.1 near the substrate 1 is an N-type semiconductor bottom layer, the N-type semiconductor sub-layer 4.N near the active layer 7 is an N-type semiconductor top layer, and the rest N-type semiconductor sub-layers are N-type semiconductor intermediate layers; and the N-type doping concentration of the at least one N-type semiconductor middle layer is lower than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer.
In one embodiment of the present application, the active layer adopts a periodic mode in which quantum wells and quantum barriers alternately grow, and the quantum barriers have N-type doping, which is not limited by the present application.
Further, the N-type semiconductor layer 4 has at least four N-type semiconductor sublayers, and the N-type doping concentration of an N-type semiconductor intermediate layer is higher than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer.
Further, a current blocking interface layer (not shown) is disposed at least at the junction of two adjacent N-type semiconductor sublayers.
Further, the current blocking interface layer (not shown) is disposed at the junction between two adjacent N-type semiconductor intermediate layers. Preferably, the current blocking boundary (not shown) surface layer is disposed at the boundary of two adjacent N-type semiconductor intermediate layers near one side of the N-type semiconductor top layer.
Further, a stress release layer 5 is further provided between the N-type semiconductor layer 4 and the active layer 7.
Further, an electron supplementing layer 6 is provided between the stress releasing layer 5 and the active layer 7.
Further, an undoped composite layer 8 is disposed between the active layer 7 and the P-type semiconductor layer 10, and the undoped composite layer 8 is used for limiting the leakage of electrons to the P-type semiconductor layer 10.
As can be seen from the above technical solution, the LED epitaxial structure provided by the present application includes a substrate 1, and an N-type semiconductor layer 4, an active layer 7 and a P-type semiconductor layer 10 sequentially stacked on the surface of the substrate 1; the N-type semiconductor layer at least comprises three N-type semiconductor sublayers, and N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent. Further, in the N-type semiconductor layer 4, the N-type semiconductor sub-layer 4.1 near the substrate 1 is an N-type semiconductor bottom layer, the N-type semiconductor sub-layer 4.N near the active layer 7 is an N-type semiconductor top layer, and the rest N-type semiconductor sub-layers are N-type semiconductor intermediate layers; and the N-type doping concentration of the at least one N-type semiconductor middle layer is lower than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer. The N-type doping concentration of the N-type semiconductor layer 4 is in a stepped distribution structure with high and low levels, the structure can buffer high-voltage static electricity, the destructive power of the high-voltage static electricity is reduced, the ESD performance is improved, and meanwhile the ESD performance is prevented from being influenced due to the reduction of the N-type doping of the active layer 7.
And a current blocking interface layer is arranged at the juncture of at least two adjacent N-type semiconductor sublayers. Further, the current blocking interface layer is arranged at the junction of two adjacent N-type semiconductor intermediate layers close to one side of the N-type semiconductor top layer, so that the transmission distance of strong current caused by high-voltage static electricity can be reduced, the current blocking effect of the N-type semiconductor layer is effectively improved, dislocation penetration of materials is reduced, and the luminous efficiency of the LED is effectively improved.
Then, a stress release layer 5 is further disposed between the N-type semiconductor layer 4 and the active layer 7, so that leakage current can be further reduced, and the reliability of the LED device can be improved.
Finally, by setting up: an electron supplementing layer 6 is arranged between the stress releasing layer 5 and the active layer 7; further, an undoped composite layer 8 is provided between the active layer 7 and the P-type semiconductor layer 10. Therefore, the carrier concentration of the active layer 7 is improved, and the leakage of electrons to the P-type semiconductor layer 10 is effectively limited, so that the non-radiative recombination is reduced, the working voltage is effectively reduced, and the luminous efficiency is improved.
Example 2
As shown in fig. 1 and 2, in the embodiment of the present application, the technical solution described in embodiment 1 is applied to a gallium nitride system, and the LED epitaxial structure includes:
a substrate 1, and an N-type semiconductor layer 4, an active layer 7 and a P-type semiconductor layer 10 sequentially laminated on the surface of the substrate 1; the N-type semiconductor layer at least comprises three N-type semiconductor sublayers (4.1 … …,4. N), and the N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent.
The substrate 1 may include any one of sapphire, silicon carbide, silicon, gallium nitride, and aluminum nitride. The N-type semiconductor layer 4 is an N-type GaN layer, the P-type semiconductor layer 10 is a P-type GaN layer, and the P-type dopant may be, but not limited to Mg doping, and the N-type dopant may be, but not limited to Si.
A buffer layer 2 and a U-GaN layer 2 may be further disposed between the substrate 1 and the N-type semiconductor layer 4, so as to improve dislocation generated by mismatch between the substrate 1 and the semiconductor material, thereby improving crystal quality.
It should be noted that, in one embodiment of the present application, the active layer adopts a periodic mode in which quantum wells and quantum barriers alternately grow, and the number of growth cycles is 6-12; and the quantum well material adopts Al Z Ga 1-z InN and Al are adopted as quantum barrier materials z Ga 1-z N; the quantum barrier adopts N-type doping, and the N-type doping concentration is 1 x 10 17 cm -3 ～1*10 18 cm -3 The scope of the application is not limited in this respect.
Based on the above embodiment, in one embodiment of the present application, in the N-type semiconductor layer 4, the N-type semiconductor sub-layer 4.1 on the side close to the substrate 1 is an N-type GaN bottom layer, the N-type semiconductor sub-layer 4.N on the side close to the active layer 7 is an N-type GaN top layer, and the rest of N-type semiconductor sub-layers are N-type GaN intermediate layers; and the N-type doping concentration of the at least one N-type GaN middle layer is lower than that of the N-type GaN bottom layer and/or the N-type GaN top layer. Based on the above embodiments, in one embodiment of the present application, a current blocking interface layer is disposed at least at the junction of two adjacent N-type GaN sublayers. Preferably, the current blocking interface layer comprises an AlGaN current blocking interface layer, wherein the Al component accounts for 3% -15%.
As shown in fig. 3: on the basis of the above-described embodiments, in one embodiment of the present application, there are 6N-type GaN layers in the N-type semiconductor layer 4; the N-type GaN layer close to one side of the substrate 1 is an N-type GaN bottom layer 4.1', the N-type GaN layer close to one side of the active layer 7 is an N-type GaN top layer 4.6', and the rest N-type GaN layers are respectively a first N-type GaN intermediate layer 4.2', a second N-type GaN intermediate layer 4.3', a third N-type GaN intermediate layer 4.4 'and a fourth N-type GaN intermediate layer 4.5' along a first direction; wherein the first direction is perpendicular to said substrate 1 and said substrate 1 is directed towards said active layer 7.
And the N-type doping concentration of the first N-type GaN intermediate layer 4.2' is lower than the N-type doping concentration of the N-type GaN bottom layer 4.1' and/or the N-type GaN top layer 4.6 '.
The N-type doping concentration of the third N-type GaN intermediate layer 4.4' is higher than the N-type doping concentration of the N-type GaN bottom layer 4.1' and/or the N-type GaN top layer 4.6 '.
Specifically, the N-type doping concentration of the N-type GaN underlying layer 4.1' is greater than 1×10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The N-type doping concentration of the first N-type GaN intermediate layer 4.2' is 1 x 10 17 cm -3 ～9*10 17 cm -3 Including endpoint values; the N-type doping concentration of the second N-type GaN intermediate layer 4.3' is more than 1 x 10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The N-type doping concentration of the third N-type GaN intermediate layer 4.4' is more than 1 x 10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The N-type doping concentration of the fourth N-type GaN intermediate layer 4.5' is 1 x 10 17 cm -3 ～8*10 17 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The N-type doping concentration of the N-type GaN top layer 4.6' is more than 1 x 10 18 cm -3 。
The current blocking interface layer is an AlGaN current blocking interface layer, and the AlGaN current blocking interface layer 11 is arranged at the junction of the third N-type GaN intermediate layer 4.4 'and the fourth N-type GaN intermediate layer 4.5'.
On the basis of the above-described embodiments, in one embodiment of the present application, a stress release layer 5 is further provided between the N-type semiconductor layer 4 and the active layer 7. Based on the above embodiments, in one embodiment of the present application, the stress release layer 5 includes at least an AlInGaN layer.
In particular, the stress relief layer 5 may comprise Al with a gradual change in Al composition x Ga 1-x An InN layer, wherein x is more than or equal to 0 and less than or equal to 0.4; alternatively, the stress relief layer 5 may be of a periodic composite structure, such as Al y Ga 1-y InN/Al y Ga 1-y N, wherein y is more than or equal to 0 and less than or equal to 0.4; the application is not limited in this regard.
On the basis of the above-described embodiments, in one embodiment of the present application, an electron supplement layer 6 is further provided between the stress release layer 5 and the active layer 7. On the basis of the above embodiments, in one embodiment of the present application, the electron supplement layer 6 includes an N-type GaN layer; preferably, the N-type doping concentration thereofGreater than 1 x 10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The application is not limited in this regard.
On the basis of the above embodiment, in one embodiment of the present application, an undoped composite layer 8 is disposed between the active layer 7 and the P-type semiconductor layer 10, and the undoped composite layer 8 is used to limit the leakage of electrons to the P-type semiconductor layer 10. On the basis of the above embodiment, in one embodiment of the present application, the undoped composite layer 8 includes an AlGaN material layer. Preferably, the undoped composite layer 8 is formed into a composite structure by using two AlGaN material layers having different Al compositions, such as Al j Ga 1-j N/Al k Ga 1-k N composite structure, wherein j is more than or equal to 0 and less than or equal to 0.2,0.7, k is more than or equal to 1, the total thickness of the composite structure is not more than 30nm, and Al j Ga 1-j N has a thickness greater than Al k Ga 1-k The thickness of N; the application is not limited in this regard.
On the basis of the above embodiment, in one embodiment of the present application, an electron blocking layer 9 is further provided between the undoped composite layer 8 and the P-type semiconductor layer 10. Further, the AlGaN layer or AlGaInN layer is included; the application is not limited in this regard.
As can be seen from the above technical solution, the LED epitaxial structure provided by the present application includes a substrate 1, and an N-type semiconductor layer 4, an active layer 7 and a P-type semiconductor layer 10 sequentially stacked on the surface of the substrate 1; the N-type semiconductor layer 4 includes 6N-type GaN layers with non-uniform N-type doping concentrations. The N-type GaN layer close to one side of the substrate 1 is an N-type GaN bottom layer 4.1', the N-type GaN layer close to one side of the active layer 7 is an N-type GaN top layer 4.6', and the rest N-type GaN layers are respectively a first N-type GaN intermediate layer 4.2', a second N-type GaN intermediate layer 4.3', a third N-type GaN intermediate layer 4.4 'and a fourth N-type GaN intermediate layer 4.5' along a first direction; wherein the first direction is perpendicular to said substrate 1 and said substrate 1 is directed towards said active layer 7. The N-type doping concentration of the first N-type GaN intermediate layer 4.2' is lower than the N-type doping concentration of the N-type GaN bottom layer 4.1' and/or the N-type GaN top layer 4.6', so that the N-type doping concentration of the N-type semiconductor layer 4 is in a high-low stepped distribution structure; based on this, this structure can play the cushioning effect to high-voltage static, has reduced the destructive power of high-voltage static, promotes the ESD performance, avoids influencing the ESD performance because of the N type doping of active layer 7 reduces simultaneously.
And then, the N-type doping concentration of the third N-type GaN middle layer 4.4' is higher than that of the N-type GaN bottom layer 4.1' and/or the N-type GaN top layer 4.6', so that the N-type GaN middle layer has peak N-type doping concentration, the middle strength of the N-type GaN middle layer is further consolidated, the destructive power of high-voltage static electricity is better prevented, and the ESD performance is improved.
Next, a current blocking interface layer 11 is provided at the junction between the third N-type GaN intermediate layer 4.4 'and the fourth N-type GaN intermediate layer 4.5'. The transmission distance of strong current caused by high-voltage static electricity can be reduced to the greatest extent, so that the current blocking effect of the N-type semiconductor layer is effectively improved, dislocation penetration of materials is reduced, and the luminous efficiency of the LED is effectively improved.
Then, a stress release layer 5 is further disposed between the N-type semiconductor layer 4 and the active layer 7, so that leakage current can be further reduced, and the reliability of the LED device can be improved.
Finally, by setting up: an electron supplementing layer 6 is arranged between the stress releasing layer 5 and the active layer 7; further, an undoped composite layer 8 is provided between the active layer 7 and the P-type semiconductor layer 10. Therefore, the carrier concentration of the active layer 7 is improved, and the leakage of electrons to the P-type semiconductor layer 10 is effectively limited, so that the non-radiative recombination is reduced, the working voltage is effectively reduced, and the luminous efficiency is improved.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises such element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (17)

1. An LED epitaxial structure, comprising:
a substrate, and an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially laminated on the surface of the substrate; the N-type semiconductor layer at least comprises three N-type semiconductor sublayers, and N-type doping concentrations of at least two N-type semiconductor sublayers are inconsistent.
2. The LED epitaxial structure of claim 1, wherein in the N-type semiconductor layer, the N-type semiconductor sub-layer on the side near the substrate is an N-type semiconductor bottom layer, the N-type semiconductor sub-layer on the side near the active layer is an N-type semiconductor top layer, and the remaining N-type semiconductor sub-layers are N-type semiconductor middle layers; and the N-type doping concentration of the at least one N-type semiconductor middle layer is lower than that of the N-type semiconductor bottom layer and/or the N-type semiconductor top layer.
3. The LED epitaxial structure of claim 2, wherein the N-type semiconductor layer has at least four N-type semiconductor sublayers and an N-type semiconductor intermediate layer has a higher N-type doping concentration than the N-type semiconductor bottom layer and/or N-type semiconductor top layer.
4. The LED epitaxial structure of claim 1, wherein a current blocking interfacial layer is provided at least at the juncture of two adjacent N-type semiconductor sublayers.
5. The LED epitaxial structure of claim 2, wherein a current blocking interface layer is provided at least at the interface of an adjacent two N-type semiconductor interlayers.
6. The LED epitaxial structure of claim 5, wherein the current blocking interface layer is disposed at the interface of two adjacent N-type semiconductor intermediate layers adjacent to one side of the N-type semiconductor top layer.
7. The LED epitaxial structure of claim 1, further comprising a stress relief layer between the N-type semiconductor layer and the active layer.
8. The LED epitaxial structure of claim 7, further comprising an electron supplement layer between the stress relief layer and the active layer.
9. The LED epitaxial structure of claim 8, wherein an undoped composite layer is disposed between the active layer and the P-type semiconductor layer, the undoped composite layer being configured to limit leakage of electrons to the P-type semiconductor layer.
10. The LED epitaxial structure of any one of claims 1 to 9, wherein the LED epitaxial structure comprises a gallium nitride based LED epitaxial structure, the N-type semiconductor layer is an N-type GaN layer, the P-type semiconductor layer is a P-type GaN layer, and the current blocking interface layer comprises an AlGaN current blocking interface layer.
11. The LED epitaxial structure of claim 10, wherein the stress relief layer comprises at least an AlInGaN layer.
12. The LED epitaxial structure of claim 10, wherein the electron supplementing layer comprises an N-type GaN layer.
13. The LED epitaxial structure of claim 10, wherein the undoped composite layer comprises a layer of AlGaN material.
14. The LED epitaxial structure of claim 10, wherein the N-type semiconductor layer has 6N-type GaN layers, the N-type GaN layer on the side near the substrate is an N-type GaN bottom layer, the N-type GaN layer on the side near the active layer is an N-type GaN top layer, and the remaining N-type GaN layers are respectively a first N-type GaN intermediate layer, a second N-type GaN intermediate layer, a third N-type GaN intermediate layer, and a fourth N-type GaN intermediate layer along a first direction; wherein the first direction is perpendicular to the substrate and directed from the substrate to the active layer.
15. The LED epitaxial structure of claim 14, wherein the first N-type GaN intermediate layer has a lower N-type doping concentration than the N-type GaN bottom layer and/or the N-type GaN top layer.
16. The LED epitaxial structure of claim 15, wherein the third N-type GaN intermediate layer has a higher N-type doping concentration than the N-type GaN bottom layer and/or the N-type GaN top layer.
17. The LED epitaxial structure of claim 16, wherein the AlGaN current blocking interface layer is disposed at the interface of the third N-type GaN intermediate layer and the fourth N-type GaN intermediate layer.
CN202310538780.4A 2023-05-15 2023-05-15 LED epitaxial structure Pending CN116632127A (en)

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