CN116613122A - Heat sink compatible with micro-channel embedded in liquid silicon through hole communication hole and manufacturing method thereof - Google Patents
Heat sink compatible with micro-channel embedded in liquid silicon through hole communication hole and manufacturing method thereof Download PDFInfo
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 136
- 239000010703 silicon Substances 0.000 title claims abstract description 136
- 239000007788 liquid Substances 0.000 title claims abstract description 124
- 238000004891 communication Methods 0.000 title claims abstract description 53
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 110
- 239000000110 cooling liquid Substances 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims abstract description 31
- 239000010410 layer Substances 0.000 claims description 220
- 238000003466 welding Methods 0.000 claims description 34
- 238000001816 cooling Methods 0.000 claims description 16
- 230000008569 process Effects 0.000 claims description 16
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 claims description 12
- DNIAPMSPPWPWGF-UHFFFAOYSA-N Propylene glycol Chemical compound CC(O)CO DNIAPMSPPWPWGF-UHFFFAOYSA-N 0.000 claims description 12
- 238000004544 sputter deposition Methods 0.000 claims description 10
- 229910003460 diamond Inorganic materials 0.000 claims description 9
- 239000010432 diamond Substances 0.000 claims description 9
- 239000007864 aqueous solution Substances 0.000 claims description 8
- 229910052723 transition metal Inorganic materials 0.000 claims description 8
- 150000003624 transition metals Chemical class 0.000 claims description 8
- 238000009713 electroplating Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 239000011241 protective layer Substances 0.000 claims description 5
- 239000008367 deionised water Substances 0.000 claims description 4
- 229910021641 deionized water Inorganic materials 0.000 claims description 4
- 238000005476 soldering Methods 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 239000011148 porous material Substances 0.000 claims description 3
- 238000000992 sputter etching Methods 0.000 claims description 3
- 230000017525 heat dissipation Effects 0.000 abstract description 49
- 238000005516 engineering process Methods 0.000 abstract description 23
- 238000009826 distribution Methods 0.000 abstract description 14
- 239000000463 material Substances 0.000 description 17
- 235000012431 wafers Nutrition 0.000 description 14
- 230000010354 integration Effects 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000001465 metallisation Methods 0.000 description 5
- 238000003491 array Methods 0.000 description 4
- -1 for example Substances 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 238000009736 wetting Methods 0.000 description 4
- 239000010949 copper Substances 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000000708 deep reactive-ion etching Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910052720 vanadium Inorganic materials 0.000 description 2
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 229920002521 macromolecule Polymers 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001131 transforming effect Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention relates to the field of heat dissipation. The invention provides a heat sink compatible with a micro-channel embedded in a liquid silicon through hole communication hole and a method for manufacturing the heat sink, wherein the heat sink compatible with the micro-channel embedded in the liquid silicon through hole communication hole comprises: a cover sheet layer; and the micro-flow channel layer is internally etched with a turbulent flow column array and a liquid silicon through hole communication hole, the turbulent flow column array comprises a tall column and a short column, the tall column is used for supporting the cover plate layer, the short column is used for disturbing the flow speed and the direction of cooling liquid, one or two ends of a diagonal line of the micro-flow channel layer are provided with cooling liquid inlets, and the cover plate layer and the micro-flow channel layer form a sealed cooling liquid loop. The invention can effectively solve the problems of uneven vertical heat distribution, low passive heat dissipation efficiency, large heat sink size and large influence of micro-channel technology on the layout of signal through silicon vias in the traditional heat sink heat dissipation mode.
Description
Technical Field
The invention relates to the field of heat dissipation, in particular to a heat sink compatible with a micro-channel embedded in a liquid through silicon via communication hole and a method for manufacturing the heat sink.
Background
The vertical stacking of chips, i.e., 3D integrated circuits (integrated circuits), is an important direction of integration technology development. However, the chip density of 3D integrated circuits is high, with the power consumption and heat density increasing accordingly. In order to enhance heat dissipation of the chip, a heat sink is generally added to the top of the chip, and the heat of the chip is transferred to the fins and is dissipated through gas convection through the heat sink or excessive heat sink connected with the chip. The micro-channel technology adopts a liquid cooling active heat dissipation mode, a liquid channel is etched in a chip layer, and the flowing liquid directly takes away the heat of the chip layer, so that active heat dissipation is realized.
In the prior art, the heat transfer efficiency inside the chip is limited, heat is accumulated, and hot spots are easy to form. In addition, the heat dissipation of the top heat sink is passive heat dissipation, heat is taken away by means of surrounding gas convection, and efficiency is required to be improved. The heat dissipation fins of the top heat sink have a certain height, so that the packaging height becomes high. The existing micro-flow channel has a complex structure, and space competition exists in the mixed layout of the micro-flow channel and a signal TSV (Through Si Via), so that precise chip layout and planning are needed. The size of the micro-flow channel and the size of the chip need to be balanced, the heat dissipation efficiency of the micro-flow channel depends on the size, the larger the size is, the higher the height is, the better the heat dissipation performance is, but the heat accumulation is aggravated by increasing the thickness of the chip and other dimensions. In addition, the heat of the signal through silicon vias is distributed along the vertical direction, and insulating layers exist among the micro-channels of the chips in different layers, so that the heat distribution in the vertical direction is uneven, even hot spots are likely to occur, and the thermal stability of the chips is influenced.
Disclosure of Invention
In view of this, an object of the embodiment of the present invention is to provide a heat sink compatible with a micro-channel embedded in a through-hole via liquid and a method for manufacturing the same, wherein the heat sink compatible with a through-hole via liquid combines the micro-channel with the heat sink to form a 3D integrated circuit liquid cooling channel, so that not only can efficient vertical heat transfer be realized, but also heat dissipation of a top heat sink can be realized, heat in a vertical direction of the 3D integrated circuit is uniformly distributed, active heat dissipation is realized by the 3D integrated circuit through circulation flow of an internal cooling liquid, heat dissipation efficiency is improved, and compared with a horizontal micro-channel, the influence of the through-hole via liquid on the layout of a signal through-hole is small.
Based on the above object, an aspect of the embodiments of the present invention provides a heat sink compatible with a micro flow channel embedded in a through-silicon via, which includes the following components: a cover sheet layer; and the micro-flow channel layer is internally etched with a turbulent flow column array and a liquid silicon through hole communication hole, the turbulent flow column array comprises a tall column and a short column, the tall column is used for supporting the cover plate layer, the short column is used for disturbing the flow speed and the direction of cooling liquid, one or two ends of a diagonal line of the micro-flow channel layer are provided with cooling liquid inlets, and the cover plate layer and the micro-flow channel layer form a sealed cooling liquid loop.
In some embodiments, the liquid through silicon via communication holes are uniformly distributed in a triangle shape, and the high pillars are uniformly distributed around the liquid through silicon via communication holes.
In some embodiments, the tall and short columns of the array of spoiler columns are cylindrical or drop-shaped in shape.
In some embodiments, the cover plate layer and the micro flow channel layer are both made of silicon.
In some embodiments, the material of the cover plate layer is silicon, and the material of the micro-channel layer is a diamond wafer.
In some embodiments, the liquid through silicon via is connected to the 3D integrated circuit chip layer through a liquid micro bump to form a liquid cooling path.
In some embodiments, the cooling liquid comprises: deionized water, ethylene glycol and an aqueous solution, and propylene glycol and an aqueous solution.
In yet another aspect of the embodiment of the present invention, a method for manufacturing a heat sink compatible with a micro-channel embedded in a through-silicon via hole is provided, including the following steps: photoetching the micro-channel layer to form a liquid silicon through hole communication hole and a turbulent flow column array; manufacturing a micro-channel layer frame welding layer and a high column welding point by adopting sputtering and electroplating processes, depositing an insulating layer and a protective layer on a liquid silicon through hole communication hole, and thinning and scribing the micro-channel layer; etching a liquid outlet/inlet on the cover plate layer, manufacturing a welding layer on a frame corresponding to the micro-channel layer by adopting a sputtering process, manufacturing welding spots at positions corresponding to high columns, and thinning and scribing the cover plate layer; and aligning, welding and bonding the micro-channel layer and the cover plate layer to seal the micro-channel.
In some embodiments, the etching liquid outlet/inlet at the cap layer includes: and carrying out deep reaction ion etching on the cover plate layer once to obtain a liquid inlet.
In some embodiments, aligning, welding, bonding the fluidic channel layer and the cover plate layer to seal the fluidic channel comprises: and aligning the micro-channel layer with the cover plate layer, and carrying out reflow soldering by adopting a transition metal layer hot-press bonding process.
The invention has the following beneficial technical effects: the heat sink with the embedded micro-channels and the liquid cooling heat dissipation mode compatible with the vertical liquid silicon through holes have higher heat dissipation efficiency than the traditional top heat dissipation mode, and have simpler structure and more direct thermal contact than the heat dissipation mode with the embedded micro-channels and the silicon-based adapter plate.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an embodiment of a heat sink compatible with a micro-channel embedded in a through-silicon via hole according to the present invention;
FIG. 2 is a schematic diagram of another embodiment of a heat sink compatible with a micro-channel embedded in a through-silicon via hole according to the present invention;
FIG. 3 is a cross-sectional view of different positions of a heat sink compatible with a micro-channel embedded in a through-silicon via communication hole provided by the invention;
FIG. 4 is a perspective view of a micro-fluidic channel layer liquid through silicon via hole communication hole and a high column in a turbulent column array according to an embodiment of the present invention;
FIG. 5 is a top view of a micro-fluidic channel layer through-silicon via hole and a high column in a turbulent column array according to an embodiment of the present invention;
fig. 6 is a schematic diagram of an embodiment of a method for manufacturing a heat sink compatible with a micro-channel embedded in a through-silicon via hole according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
It should be noted that, in the embodiments of the present invention, all the expressions "first" and "second" are used to distinguish two entities with the same name but different entities or different parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present invention, and the following embodiments are not described one by one.
In a first aspect of the embodiment of the invention, an embodiment of a heat sink compatible with a micro-channel embedded in a communication hole of a liquid silicon through hole is provided. Fig. 1 is a schematic diagram of an embodiment of a heat sink compatible with a micro flow channel embedded in a through-silicon via hole according to the present invention. As shown in fig. 1, an embodiment of the present invention includes the following components:
a cover sheet layer 1; and
the micro-channel layer 2, the inside sculpture of micro-channel layer 2 has vortex post array and liquid through silicon hole intercommunicating pore 22, vortex post array includes high post 21 and short post 23, high post 21 is used for supporting cover plate layer 1, short post 23 is used for disturbing the velocity of flow and the direction of cooling liquid the diagonal one end or both ends of micro-channel layer 2 are provided with cooling liquid entry (not shown in fig. 1), cover plate layer 1 with micro-channel layer 2 forms sealed cooling liquid return circuit.
Fig. 2 is a schematic diagram of another embodiment of a heat sink compatible with a micro-channel embedded in a through-silicon via hole, which is provided in the present invention, as shown in fig. 2, the heat sink includes a cover plate layer 1; and a micro flow channel layer 2, wherein a turbulence column array and a liquid silicon through hole communication hole 22 are etched in the micro flow channel layer 2, the turbulence column array comprises a tall column 21 and a short column 23, the tall column 21 is used for supporting the cover plate layer 1, the short column 23 is used for disturbing the flow speed and direction of cooling liquid, cooling liquid inlets are formed in one or two ends of a diagonal line of the micro flow channel layer 2, and the cover plate layer 1 and the micro flow channel layer 2 form a sealed cooling liquid loop. The difference between the embodiment of the present invention and the previous embodiment is that the cover plate layer in the embodiment of the present invention has protruding portions on both sides.
Fig. 3 is a cross-sectional view of different positions of a heat sink compatible with a micro-channel embedded in a through-silicon via hole. As shown in fig. 3, the upper half is a sectional view of a combination of the cap plate layer 1 and the micro flow channel layer 2 provided with the liquid through silicon via hole communication holes 22, and the lower half is a sectional view of a combination of the cap plate layer 1 and the high column 21 provided with the spoiler column array. However, these are merely exemplary and are not limiting of the embodiments of the present invention, and other combinations of the liquid through silicon via 22, the tall pillars 21 of the spoiler pillar array, the short pillars 23, and the cap layer 1 are possible in other embodiments.
With the continuous improvement of the integration level of integrated circuits, the length of the interconnection lines is continuously increased, the interconnection delay and the power consumption of chips are increased, and in order to further improve the integration level and reduce the power consumption, 3D integration based on TSVs (through silicon vias) is receiving a great deal of attention. On a limited chip area, 3D integration increases integration density, vertical interconnects of through silicon vias reduce interconnect length, but at the same time 3D stacking results in higher thermal density, which presents challenges for heat dissipation performance of the chip.
The micro-channel heat dissipation is one of the heat dissipation modes of the chip with higher efficiency. Generally, a micro-channel with a width of hundred micrometers is etched on a chip substrate, cooling liquid is introduced, and heat of a chip is taken away along with circulation of the cooling liquid in the micro-channel, so that cooling is realized. The embodiment of the invention aims to design a novel embedded micro-channel heat sink, is compatible with a related heat dissipation technology of a liquid TSV (through silicon via) communication hole, constructs a liquid cooling channel of a 3DIC (integrated circuit), and solves the heat dissipation problem of the 3D integrated circuit. The embodiment of the invention can solve the problems of uneven vertical heat distribution, low passive heat dissipation efficiency, large heat sink size and large influence of micro-channel technology on the layout of signal silicon through holes in the traditional heat sink heat dissipation mode. The embodiment of the invention is compatible with the communication holes of the liquid silicon through holes, combines the micro flow channels with the heat sink to form the liquid cooling channel of the 3D integrated circuit, and can realize high-efficiency vertical heat transfer and heat dissipation of the heat sink at the top, so that the heat in the vertical direction of the 3D integrated circuit is uniformly distributed. The 3D integrated circuit realizes active heat dissipation through the circulation flow of the internal cooling liquid, and improves the heat dissipation efficiency. Compared with the horizontal micro-channel, the liquid through silicon vias have little influence on the layout of the signal through silicon vias. The heat sink in the embodiment of the invention does not need higher fins, and can reduce the packaging thickness.
The through silicon via technology is to make vertical conduction between chips and between wafers; the through silicon via technology realizes vertical electrical interconnection of through silicon vias by filling conductive substances such as copper, tungsten, polysilicon and the like, and is the latest technology for realizing interconnection between chips. The through silicon via technology can reduce interconnection length, signal delay, capacitance/inductance, low power consumption and high-speed communication between chips, increase broadband and realize miniaturization of device integration through vertical interconnection.
The heat sink in the embodiment of the invention is characterized in that: a cooling liquid can be contained in the heat sink to form a sealed liquid loop; the heat sink is composed of a micro-channel layer 2 and a cover plate layer 1; the micro flow channel layer 1 distributes an array of liquid TSV (through silicon vias) communication holes 22; the upper surface of the micro-channel layer 2 is etched with a turbulent flow column array, which is divided into two types of turbulent flow columns, namely a tall column 21 for supporting the cover plate layer 1 and a short column 23 for disturbing the flow speed and direction of cooling liquid; the cover plate layer 1 is etched with a liquid silicon through hole communication hole array through which cooling liquid can flow into the liquid silicon through hole channel; the cover plate layer 1 is used for sealing the heat sink and preventing cooling liquid from leaking; a liquid inlet is left at one or both ends of the diagonal line of the micro flow channel layer 2.
In some embodiments, the liquid through silicon via communication holes are uniformly distributed in a triangle shape, and the high pillars are uniformly distributed around the liquid through silicon via communication holes.
FIG. 4 is a perspective view of a micro-fluidic channel layer liquid through silicon via hole communication hole and a high column in a turbulent column array according to an embodiment of the present invention; fig. 5 is a top view of a micro-channel layer liquid through silicon via hole and a high column in a turbulent column array according to an embodiment of the present invention. As shown in fig. 4 and 5, the liquid through-silicon via holes 22 of the micro flow channel layer are in a triangular array, and the high columns 21 of the turbulent column array are uniformly distributed around the liquid through-silicon via holes 22 to support the cover plate layer 1. The liquid silicon through hole communication holes 22 of the micro-channel layer 1 are triangular arrays, and the surrounding high columns 21 of the turbulent column arrays have various distribution modes so as to ensure the supportability.
In some embodiments, the tall and short columns of the array of spoiler columns are cylindrical or drop-shaped in shape. The tall and short columns 21, 23 of the array of turbulence columns are cylindrical or drop-shaped in shape, and the shape can be suitably adjusted in order to regulate the flow direction of the liquid.
In some embodiments, the cover plate layer and the micro flow channel layer are both made of silicon. The cover plate layer 1 and the micro flow channel layer 2 may be made of the same material, for example, silicon.
In some embodiments, the material of the cover plate layer is silicon, and the material of the micro-channel layer is a diamond wafer. The materials of the cover plate layer 1 and the micro-channel layer 2 may be different, for example, the cover plate layer 1 is made of silicon, the micro-channel layer 2 is made of diamond, and in other embodiments, the heat sink material may be diamond, heat conducting ceramic, organic resin, or other materials.
In some embodiments, the liquid through silicon via is connected to the 3D integrated circuit chip layer through a liquid micro bump to form a liquid cooling path. The liquid through silicon via hole of the heat sink is connected with the 3D integrated circuit chip layer through the liquid micro-convex points to form a liquid cooling passage.
In some embodiments, the cooling liquid comprises: deionized water, ethylene glycol and an aqueous solution, and propylene glycol and an aqueous solution.
The embodiment of the invention adopts a liquid cooling heat dissipation mode of embedding micro-channels and compatible vertical liquid silicon through holes, has higher heat dissipation efficiency than the traditional top heat dissipation mode, has a simpler structure and more direct thermal contact than the heat dissipation of the embedded micro-channel silicon-based adapter plate, can solve the problems of uneven vertical heat distribution, low passive heat dissipation efficiency, large heat sink size and large influence of micro-channel technology on the layout of signal silicon through holes in the traditional heat dissipation mode, and meanwhile, adopts the distribution of a triangular liquid silicon through hole array, compared with the distribution of a rectangular array, the number of liquid silicon through holes in the same area is smaller, namely the area occupation rate is low, and the layout and wiring in layers of a 3D integrated circuit are more convenient.
The embodiment of the invention can be used for radiating laser chips, internal circuits of automobiles, liquid cooling of servers and the like.
Based on the above object, a second aspect of the embodiment of the present invention provides a heat dissipation structure, where the heat dissipation structure includes a heat sink compatible with a micro-channel embedded in a through-silicon via hole, and the heat sink includes the following components:
a cover sheet layer 1; and
the micro-channel layer 2, the inside sculpture of micro-channel layer 2 has vortex post array and liquid through silicon hole intercommunicating pore 22, vortex post array includes high post 21 and short post 23, high post 21 is used for supporting cover plate layer 1, short post 233 is used for disturbing the velocity of flow and the direction of cooling liquid be provided with cooling liquid entry (not shown in fig. 1) in micro-channel layer 2's diagonal one end or both ends, cover plate layer 1 with micro-channel layer 2 forms sealed cooling liquid return circuit.
In some embodiments, the liquid through silicon via communication holes are uniformly distributed in a triangle shape, and the high pillars are uniformly distributed around the liquid through silicon via communication holes.
In some embodiments, the tall and short columns of the array of spoiler columns are cylindrical or drop-shaped in shape. The tall and short columns 21, 23 of the array of turbulence columns are cylindrical or drop-shaped in shape, and the shape can be suitably adjusted in order to regulate the flow direction of the liquid.
In some embodiments, the cover plate layer and the micro flow channel layer are both made of silicon. The cover plate layer 1 and the micro flow channel layer 2 may be made of the same material, for example, silicon.
In some embodiments, the material of the cover plate layer is silicon, and the material of the micro-channel layer is a diamond wafer. The materials of the cover plate layer 1 and the micro-channel layer 2 may be different, for example, the cover plate layer 1 is made of silicon, the micro-channel layer 2 is made of diamond, and in other embodiments, the heat sink material may be diamond, heat conducting ceramic, organic resin, or other materials.
In some embodiments, the liquid through silicon via is connected to the 3D integrated circuit chip layer through a liquid micro bump to form a liquid cooling path. The liquid through silicon via hole of the heat sink is connected with the 3D integrated circuit chip layer through the liquid micro-convex points to form a liquid cooling passage.
In some embodiments, the cooling liquid comprises: deionized water, ethylene glycol and an aqueous solution, and propylene glycol and an aqueous solution.
The heat sink in the embodiment of the invention is characterized in that: a cooling liquid can be contained in the heat sink to form a sealed liquid loop; the heat sink is composed of a micro-channel layer 2 and a cover plate layer 1; the micro-channel layer 1 is provided with an array of liquid silicon through hole communication holes 22; the upper surface of the micro-channel layer 2 is etched with a turbulent flow column array, which is divided into two types of turbulent flow columns, namely a tall column 21 for supporting the cover plate layer 1 and a short column 23 for disturbing the flow speed and direction of cooling liquid; the cover plate layer 1 is etched with a liquid silicon through hole communication hole array through which cooling liquid can flow into the liquid silicon through hole channel; the cover plate layer 1 is used for sealing the heat sink and preventing cooling liquid from leaking; a liquid inlet is left at one or both ends of the diagonal line of the micro flow channel layer 2.
As shown in fig. 4 and 5, the liquid through-silicon via holes 22 of the micro flow channel layer are in a triangular array, and the high columns 21 of the turbulent column array are uniformly distributed around the liquid through-silicon via holes 22 to support the cover plate layer 1. The liquid silicon through hole communication holes 22 of the micro-channel layer 1 are triangular arrays, and the surrounding high columns 21 of the turbulent column arrays have various distribution modes so as to ensure the supportability.
The embodiment of the invention adopts a liquid cooling heat dissipation mode of embedding micro-channels and compatible vertical liquid silicon through holes, has higher heat dissipation efficiency than the traditional top heat dissipation mode, has a simpler structure and more direct thermal contact than the heat dissipation of the embedded micro-channel silicon-based adapter plate, can solve the problems of uneven vertical heat distribution, low passive heat dissipation efficiency, large heat sink size and large influence of micro-channel technology on the layout of signal silicon through holes in the traditional heat dissipation mode, and meanwhile, adopts the distribution of a triangular liquid silicon through hole array, compared with the distribution of a rectangular array, the number of liquid silicon through holes in the same area is smaller, namely the area occupation rate is low, and the layout and wiring in layers of a 3D integrated circuit are more convenient.
Based on the above objective, a third aspect of the embodiments of the present invention provides a method for manufacturing a heat sink compatible with a micro-channel embedded in a through-silicon via hole. Fig. 6 is a schematic diagram of an embodiment of a method for manufacturing a heat sink compatible with a micro-channel embedded in a through-silicon via hole, as shown in fig. 6, the method in the embodiment of the invention includes the following steps:
s1, photoetching a micro-channel layer to form a liquid silicon through hole communication hole and a turbulent flow column array;
s2, manufacturing a micro-channel layer frame welding layer and a high column welding point by adopting sputtering and electroplating processes, depositing an insulating layer and a protective layer on a liquid silicon through hole communication hole, and thinning and scribing the micro-channel layer;
s3, etching a liquid outlet/inlet in the cover plate layer, manufacturing a welding layer on a frame corresponding to the micro-channel layer by adopting a sputtering process, manufacturing welding spots at positions corresponding to high columns, and thinning and scribing the cover plate layer; and
s4, aligning, welding and bonding the micro-channel layer and the cover plate layer to seal the micro-channel.
The manufacturing process of the heat sink compatible with the micro-channel embedded in the liquid silicon through hole communication hole comprises the following steps:
photoetching the micro-channel layer to form a liquid silicon through hole communication hole and a turbulent flow column; manufacturing a micro-channel layer frame welding layer and a high-column welding point by adopting a sputtering and electroplating process, and carrying out SiO (silicon dioxide) on a liquid silicon through hole communication hole 2 Depositing an insulating layer and other protective layers; thinning and scribing the micro-channel layer; etching a liquid outlet/inlet in the cover plate layer; manufacturing a welding layer on the frame of the corresponding micro-channel layer by adopting a sputtering process, and manufacturing welding spots on the positions corresponding to the high columns; thinning and scribing the cover plate layer; and aligning, welding and bonding the micro-channel layer and the cover plate layer, and sealing the micro-channel.
In some embodiments, the etching liquid outlet/inlet at the cap layer includes: and carrying out deep reaction ion etching on the cover plate layer once to obtain a liquid inlet.
In some embodiments, aligning, welding, bonding the fluidic channel layer and the cover plate layer to seal the fluidic channel comprises: and aligning the micro-channel layer with the cover plate layer, and carrying out reflow soldering by adopting a transition metal layer hot-press bonding process.
In some embodiments, the materials of the micro-channel layer 2 and the cover plate layer 1 compatible with the heat sink with the micro-channel embedded in the liquid through silicon via hole are silicon, and the high columns 21 of the turbulent column array, the liquid through silicon via hole 22 and the short columns 23 of the turbulent column array are etched in the lower bottom plate. The liquid through silicon via holes 22 of the micro flow channel layer 2 are in a triangular array, and the high columns 21 of the turbulent column array are uniformly distributed around the liquid through silicon via holes to support the cover plate layer 1, wherein the cover plate layer 1 is provided with a liquid inlet, which is not shown in the drawing. And the upper bottom plate and the lower bottom plate are bonded to form a heat sink embedded with the micro-channels.
The step of manufacturing the heat sink compatible with the micro-channel embedded in the through-silicon-via communication hole in the embodiment comprises the following steps:
step one: performing secondary deep reactive ion etching on the micro-channel layer to obtain a liquid silicon through hole communication hole 22 array with the diameter of 200 mu mAn array of tall pillars 21 and short pillars 23 arranged in rows and a spoiler pillar array having a diameter of 60 to 80 μm; a welding layer is manufactured on the frame of the micro-channel layer by adopting a sputtering and electroplating process, and welding spots are manufactured at the tops of the high columns 21; the welding layer comprises: the transition metal layer adhesion layer is a metal with a thermal expansion coefficient close to that of silicon, such as Ti (titanium), V (vanadium) and the like, the barrier layer is a metal such as Ni (nickel) and the like, the diffusion of the wetting layer is prevented, the wetting layer is Au (gold), pt (platinum) and the like, and the wettability of the surface of the transition metal layer is improved. SiO is performed on the through-silicon-via hole 22 2 Depositing an insulating layer and other protective layers; thinning and scribing the micro-channel layer;
step two: carrying out deep reactive ion etching on the cover plate layer for one time to obtain a liquid inlet; manufacturing a welding layer and welding spots at the corresponding positions of the frame of the cover plate layer and the high column, thinning and scribing;
step three: and aligning the micro-channel layer with the cover plate layer, and adopting a transition metal layer hot-pressing bonding process to carry out reflow soldering so as to realize silicon-silicon low-temperature bonding and seal the micro-channel.
In some embodiments, the material of the cover plate layer 1 compatible with the heat sink with the micro flow channel embedded in the liquid through silicon via hole communication hole is silicon, the material of the micro flow channel layer 2 is a diamond wafer, and the micro flow channel layer 2 is internally etched with a tall column 21 of a turbulence column array, a liquid through silicon via hole communication hole 22 and a short column 23 of the turbulence column array. The liquid through silicon via holes 22 of the micro flow channel layer are in a triangular array, and the high columns 21 of the turbulent column array are uniformly distributed around the liquid through silicon via holes so as to support the cover plate layer. The cover plate layer is provided with a liquid inlet, which is not shown in the figure. And the upper bottom plate and the lower bottom plate are bonded to form a heat sink embedded with the micro-channels.
The step of manufacturing the heat sink compatible with the micro-channel embedded in the through-silicon-via communication hole in the embodiment comprises the following steps:
step one: photoetching on the micro-channel layer to obtain a high column 21 and a low column 23 array of a liquid silicon through hole communication hole 22 array with the diameter of 200 mu m and a turbulent column array with the diameter of 60-80 mu m; manufacturing a welding layer on the side frame and the side wall of the micro-channel layer by adopting sputtering and electroplating processes, and manufacturing welding spots on the top of the high column; the welding layer comprises: the transition metal layer adhesion layer is a metal with a thermal expansion coefficient close to that of silicon, such as Ti (titanium), V (vanadium) and the like, the barrier layer is a metal such as Ni (nickel) and the like, the diffusion of the wetting layer is prevented, the wetting layer is Au (gold), pt (platinum) and the like, and the wettability of the surface of the transition metal layer is improved. Thinning and scribing the micro-channel layer;
step two: photoetching is carried out on the cover plate layer to obtain a groove and a liquid inlet; manufacturing a welding layer and welding spots on the inner wall of the frame of the cover plate layer, the edges of the grooves and the corresponding positions of the high columns, thinning and scribing;
step three: and aligning the micro-channel layer with the cover plate layer, embedding the lower bottom plate into the groove of the upper bottom plate, and welding by adopting a hot-press bonding process to realize diamond-silicon bonding and seal the micro-channel.
The time of manufacture of the structures of the participating devices (such as MOSFET devices) can be roughly divided into four types: via-first), via-middle (via-middle), via-last (via-last), and via-last from behind the wafer. The processing of through holes on a wafer is the core of the through silicon via technology, and at present, the technology of the through hole processing mainly comprises three technologies, namely dry etching, wet etching and laser drilling. (wherein, the dry etching has the advantages of high speed, good directivity, strong operability and the like, and becomes the most common method for manufacturing the through holes). Photolithography is used in the embodiments of the present invention.
The current wafer thickness of 0.3-0.4 mm is not problematic if not used for 3D packaging. But would need to be thinned if the wafer were used for 3D packaging to ensure that the ratio of aperture to thickness forming the vias is within a reasonable range and that the thickness of the final package is acceptable. Even though the requirement of layer stacking is not considered, the through hole interconnection technology between chips only requires that the thickness of the upper layer chip is 20-30 mu m, which is a thickness suitable for the existing plasma hole opening and metal deposition technology. In the wafer thinning technology, the problems that the wafer always keeps a flat state in the grinding process, and after thinning, the wafer does not warp, sag, surface damage and expansion, wafer breakage and the like are solved.
Currently, the main use of through-silicon via hole metallization is Cu (copper). In typical chip fabrication, the metal conductor layer is typically prepared using Physical Vapor Deposition (PVD). If the through silicon via holes are also prepared using PVD, it takes a lot of time compared to a wire of several tens of nanometers. Thus, the through-hole metallization of the through-silicon vias is typically performed by electroplating. However, since the Si (silicon) substrate itself has poor conductivity of the matrix, it is impossible to directly perform electrodeposition; therefore, the metallization will be performed after the electronic layer with a thickness of several nanometers is first deposited using PVD, making the Si substrate conductive.
Interconnections between wafers that complete via metallization and connection terminals are commonly referred to as through-silicon via bonding techniques. The technology adopts metal-metal bonding technology, macromolecule adhesive bonding technology and the like, and the metal-metal bonding technology is used as a main mode at present, because the technology can realize a mechanical contact interface and an electrical contact interface at the same time. For example, copper-copper bonding is performed by applying a certain pressure at a temperature of 350-4000 degrees celsius for a certain period of time, and then annealing in a nitrogen annealing furnace for a certain period of time to complete the through silicon via bonding.
The embodiment of the invention adopts a liquid cooling heat dissipation mode of embedding micro-channels and compatible vertical liquid silicon through holes, has higher heat dissipation efficiency than the traditional top heat dissipation mode, has a simpler structure and more direct thermal contact than the heat dissipation of the embedded micro-channel silicon-based adapter plate, can solve the problems of uneven vertical heat distribution, low passive heat dissipation efficiency, large heat sink size and large influence of micro-channel technology on the layout of signal silicon through holes in the traditional heat dissipation mode, and meanwhile, adopts the distribution of a triangular liquid silicon through hole array, compared with the distribution of a rectangular array, the number of liquid silicon through holes in the same area is smaller, namely the area occupation rate is low, and the layout and wiring in layers of a 3D integrated circuit are more convenient.
It should be noted that, in the above-mentioned method for manufacturing a heat sink compatible with the micro-fluidic channel embedded in the through-silicon via hole, the steps may be crossed, replaced, added, and deleted, so that the method for manufacturing a heat sink compatible with the micro-fluidic channel embedded in the through-silicon via hole by reasonably arranging, combining and transforming the heat sinks should also belong to the protection scope of the present invention, and the protection scope of the present invention should not be limited to the embodiments.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The foregoing embodiment of the present invention has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the invention, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the invention, and many other variations of the different aspects of the embodiments of the invention as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present invention.
Claims (10)
1. A heat sink compatible with a micro-channel embedded in a liquid silicon through hole communication hole is characterized by comprising the following components:
a cover sheet layer; and
the micro-channel layer, the inside sculpture of micro-channel layer has vortex post array and liquid through silicon hole intercommunicating pore, vortex post array includes tall post and short post, tall post is used for supporting the apron layer, short post is used for disturbing the velocity of flow and the direction of cooling liquid diagonal one end or both ends on micro-channel layer are provided with the cooling liquid entry, the apron layer with the micro-channel layer forms sealed cooling liquid return circuit.
2. The heat sink compatible with the micro flow channels embedded in the liquid silicon through hole communication holes according to claim 1, wherein the liquid silicon through hole communication holes are uniformly distributed in a triangular shape, and the high columns are uniformly distributed around the liquid silicon through hole communication holes.
3. The heat sink compatible with micro flow channels embedded in through-silicon-via communication holes according to claim 1, wherein the tall and short columns of the turbulent column array are cylindrical or drop-shaped.
4. The heat sink compatible with micro-channels embedded in through-silicon-via communication holes according to claim 1, wherein the cover plate layer and the micro-channel layer are both made of silicon.
5. The heat sink compatible with micro-channels embedded in through-silicon-via communication holes according to claim 1, wherein the cover plate layer is made of silicon, and the micro-channel layer is made of a diamond wafer.
6. The heat sink compatible with the micro flow channel embedded in the liquid through silicon via communication hole according to claim 1, wherein the liquid through silicon via communication hole is connected with the 3D integrated circuit chip layer through the liquid micro bump to form a liquid cooling passage.
7. The heat sink compatible with the micro flow channels embedded in the through-silicon via communication holes of claim 1, wherein the cooling liquid comprises: deionized water, ethylene glycol and an aqueous solution, and propylene glycol and an aqueous solution.
8. A method of making a heat sink compatible with a micro flow channel embedded in a through-silicon via hole according to any one of claims 1 to 7, comprising:
photoetching the micro-channel layer to form a liquid silicon through hole communication hole and a turbulent flow column array;
manufacturing a micro-channel layer frame welding layer and a high column welding point by adopting sputtering and electroplating processes, depositing an insulating layer and a protective layer on a liquid silicon through hole communication hole, and thinning and scribing the micro-channel layer;
etching a liquid outlet/inlet on the cover plate layer, manufacturing a welding layer on a frame corresponding to the micro-channel layer by adopting a sputtering process, manufacturing welding spots at positions corresponding to high columns, and thinning and scribing the cover plate layer; and
and aligning, welding and bonding the micro-channel layer and the cover plate layer to seal the micro-channel.
9. The method of claim 8, wherein etching the liquid outlet/inlet at the cap layer comprises:
and carrying out deep reaction ion etching on the cover plate layer once to obtain a liquid inlet.
10. The method of claim 8, wherein aligning, welding, bonding the fluidic channel layer and the cover layer to seal the fluidic channel comprises:
and aligning the micro-channel layer with the cover plate layer, and carrying out reflow soldering by adopting a transition metal layer hot-press bonding process.
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