CN116613115A - Integrated fan-out packaging structure containing cavity radio frequency module and preparation method thereof - Google Patents

Integrated fan-out packaging structure containing cavity radio frequency module and preparation method thereof Download PDF

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Publication number
CN116613115A
CN116613115A CN202310706526.0A CN202310706526A CN116613115A CN 116613115 A CN116613115 A CN 116613115A CN 202310706526 A CN202310706526 A CN 202310706526A CN 116613115 A CN116613115 A CN 116613115A
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layer
fan
cavity
radio frequency
frequency module
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CN202310706526.0A
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黄剑洪
姜峰
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Xiamen Yun Tian Semiconductor Technology Co ltd
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Xiamen Yun Tian Semiconductor Technology Co ltd
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Priority to CN202310706526.0A priority Critical patent/CN116613115A/en
Publication of CN116613115A publication Critical patent/CN116613115A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures

Abstract

The application relates to the technical field of semiconductor processing, and provides a preparation method of an integrated fan-out packaging structure of a cavity-containing radio frequency module, which comprises the following steps: forming a fan-out interconnection packaging structure integrated with the cavity filter; forming a rewiring structure; and then the fan-out interconnection packaging structure is connected to the rewiring structure through the interconnection structure. Through adopting to independently form fan-out interconnect packaging structure and rewiring structure earlier, wherein fan-out interconnect packaging structure is a plurality of fan-out module interconnection formation, combines fan-out interconnect packaging structure and the rewiring structure that the fan-out module formed after the interconnection again, and then can reduce radio frequency module's whole encapsulation area and thickness, satisfies miniaturized demand.

Description

Integrated fan-out packaging structure containing cavity radio frequency module and preparation method thereof
Technical Field
The application relates to the technical field of semiconductor processing, in particular to an integrated fan-out packaging structure of a cavity-containing radio frequency module and a preparation method thereof.
Background
With the development of communication technology, radio frequency circuits are widely used in communication systems, and almost all electronic devices with radio frequency functions are used, for example: a radio frequency module for mobile phone communication, a radio frequency module for a GPS receiver for navigation, and the like.
The radio frequency module is a radio frequency chip which simultaneously comprises one or more radio frequency devices, wherein the radio frequency devices comprise a filter, a low noise amplifier, a radio frequency switch, an amplifier and the like, and the radio frequency devices are connected with a certain radio frequency microstrip line through a substrate and packaged to form the radio frequency module chip. The current rf module is increasingly developed to be highly integrated and low-cost, and thus, a bare chip module package (bare die module package, abbreviated as bdmp) that does not need to package the filter in advance is developed and applied. The packaging technology comprises the steps of directly mounting unpackaged bare chips of a filter on a substrate together with devices such as a switch and the like after ball mounting, then sealing and attaching a layer of organic adhesive film (such as toray semiconductor adhesive, tsa for short) with the thickness of ten micrometers on the whole module to serve as a substrate protection layer so as to protect an interdigital structure of the filter to form a cavity, and finally completing packaging of the whole chip through plastic packaging.
However, in the conventional bdmp packaging process, the conditions of softening and short-circuiting of closely spaced solder balls easily occur in the processes of reflow soldering and organic adhesive film heating and curing; or, some components are smaller, resulting in reduced quality of the organic film. The device selection in the bdmp package is limited, namely, the passive capacitive inductor component frequently applied in the traditional module cannot appear, so that the debugging difficulty and cost of the bdmp module are greatly increased, and the overall size and thickness of the prepared radio frequency module are larger. At present, bdmp can only be used on a receiving module with relatively low matching difficulty, so that the low-cost packaging form is limited in application scenes.
In addition, if the radio frequency chip module is packaged by adopting a flip-chip (FC) welding process, that is, FC packaging is performed on the packaged devices such as the filter. The method of the system-in-package comprises the following steps: providing a pcb, wherein solder balls arranged according to certain requirements are formed on the pcb (formed by using a ball-implanting process); dipping soldering flux on the circuit board, and then flip-mounting the chip on the circuit board; a solder pad (pad) on the chip is electrically connected with a solder ball on the circuit board after being welded by a reflow soldering process; and then filling glue between the bottom of the chip and the circuit board so as to increase the mechanical strength of the whole structure. This approach to system in package suffers from the following drawbacks: 1. the process is complex, and the packaging efficiency is low; 2. each chip needs to be welded on the solder balls in sequence, and the packaging efficiency is low; 3. the electric connection between the chip and the pcb is realized by a welding process, and the chip and the pcb cannot be compatible with the process of the front section of the package; 4. the circuit board is easy to be broken when a large pressure is applied by a little careless in the process of dipping the soldering flux. The method is applied to system integration of the radio frequency module, and can cause the problems of low packaging efficiency, low yield and larger overall size and thickness.
The radio frequency module packaging structure prepared by the traditional packaging technology has larger overall size and thickness, so that the occupied area is overlarge, and the current trend of the demand for increasingly miniaturizing a packaging system cannot be met.
It should be noted that the information disclosed in this background section is only for the purpose of increasing the understanding of the general background of the application and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person of ordinary skill in the art.
Disclosure of Invention
The application provides an integrated fan-out packaging structure of a cavity-containing radio frequency module and a preparation method thereof, aiming at the problems in the prior art, and the integrated fan-out packaging structure of the cavity-containing radio frequency module can reduce the overall packaging area and thickness of the integrated fan-out packaging structure of the cavity-containing radio frequency module compared with the traditional packaging technology by adopting a mode of firstly forming interconnection of the fan-out modules and then combining the interconnected fan-out modules with a rewiring structure, thereby meeting the miniaturization requirement.
An embodiment of the present application provides a method for manufacturing an integrated fan-out package structure of a radio frequency module with a cavity, the fan-out integrated package structure having a cavity filter, the method comprising the steps of: forming a fan-out interconnection packaging structure; forming a rewiring structure; connecting the fan-out interconnection packaging structure to the rewiring structure through the interconnection structure; the fan-out interconnect package structure comprises a filter device provided with a cavity structure at a side facing the rewiring structure.
In some embodiments, forming the fan-out interconnect package structure includes: forming a device integrated structure; forming a packaging layer in which a first metal circuit layer is formed; and connecting the device integrated structure to the packaging layer to form a fan-out interconnection packaging structure, wherein the first metal line layer is connected with the device integrated structure.
In some embodiments, a device integrated structure includes a plurality of devices, a reconstruction layer, and an insulating bonding layer. The insulating bonding layer has an opening through which a plurality of devices are connected to the insulating bonding layer. The reconstruction layer encapsulates the plurality of devices to bond the plurality of devices together. The first metal line layer is connected with a plurality of devices through the opening. The encapsulation layer may be a connection reconstruction layer and an insulating bonding layer.
In some embodiments, at least one of the plurality of devices is a filter device, and the filter device, the insulating bonding layer, and the encapsulation layer collectively form a cavity structure.
In some embodiments, the material of the reconstruction layer is glass, and the reconstruction layer is provided with a plurality of blind grooves, and a plurality of devices are correspondingly arranged in the blind grooves.
In some embodiments, the rerouting structure includes a passivation layer and a second metal line layer disposed within the passivation layer, the passivation layer exposing a portion of the second metal line layer.
In some embodiments, after completing the step of connecting the fan-out interconnect package structure to the rewiring structure, further comprises: forming a protective layer between the fan-out interconnect package structure and the rerouting structure; and forming a welding spot structure on one side of the rewiring structure, which is away from the fan-out interconnection packaging structure.
An embodiment of the application also provides an integrated fan-out package structure of a cavity-containing radio frequency module, which comprises an insulating bonding layer, a plurality of devices, a reconstruction layer, a first metal circuit layer, a package layer, a second metal circuit layer and a passivation layer.
The insulating bonding layer has an opening. A plurality of devices are disposed on the upper surface of the insulating bonding layer through the openings. The reconstituted layer encapsulates the plurality of devices and the insulating bonding layer. The first metal line layer is connected with a plurality of devices through the opening. The packaging layer is connected with the insulating bonding layer, and the first metal circuit layer is located in the packaging layer. The second metal line layer is connected with the first metal line layer through an interconnection structure. The passivation layer is connected with the second metal circuit layer. At least one of the plurality of devices is a filter device, and the filter device, the insulating bonding layer, and the encapsulation layer collectively form a cavity structure. The size of the opening is smaller than or equal to the size of the bonding pad of each device.
The integrated fan-out packaging structure of the cavity-containing radio frequency module further comprises a protection layer and a welding spot structure, wherein the protection layer is arranged between the packaging layer and the passivation layer, the welding pad structure is connected with the second metal circuit layer, and the welding spot structure is located at one side, deviating from the first metal circuit layer, of the second metal circuit layer.
In some embodiments, the number of circuit layers of the second metal circuit layer is greater than the number of circuit layers of the first metal circuit layer, and the number of circuit layers of the first metal circuit layer is less than or equal to 3.
In some embodiments, at least one device of the plurality of devices is a discrete passive device, a pad of the discrete passive device being located within an opening of the insulating bonding layer.
Compared with the prior art, the application has the following beneficial effects:
1. according to the radio frequency integrated fan-out packaging structure, the fan-out interconnection packaging structure and the rewiring structure with the cavity filter are integrated by adopting the method that the fan-out interconnection packaging structure and the rewiring structure are formed by independently forming the fan-out interconnection packaging structure with the cavity filter, the fan-out interconnection packaging structure formed by the interconnected fan-out modules is combined with the rewiring structure through the interconnection structure, the overall packaging area and thickness of the integrated fan-out packaging structure can be reduced, the miniaturization requirement is met, and the integration performance is high. And, the performance of the filter device can be protected from interference by means of the cavity. Considering that the filter device is provided with an IDT structure (Inter Digital Transducer ), if the IDT structure is covered with a film layer or dirt and other foreign matters, the self performance can be affected, and frequency deviation is caused, so that the attachment of the foreign matters can be avoided by arranging a cavity structure, and the performance of the filter device can be ensured.
2. The traditional packaging needs to use a substrate as a bearing plate, the thickness of the substrate is larger, a chip is mounted on the substrate, the distance between solder balls on the substrate is controlled to avoid short circuit, and the chip is mounted on the solder balls fixed on the substrate; in contrast, the fan-out packaging structure is formed by integrating a plurality of devices including the filter by adopting the fan-out packaging, so that the space control of the devices is smaller, the whole area is shortened, the first metal circuit layer and the second metal circuit layer are respectively prepared, and the traditional substrate can be omitted, so that the prepared integrated fan-out packaging structure of the cavity-containing radio frequency module has better electrical performance and heat dissipation, and the whole packaging area and thickness are smaller.
3. The integrated fan-out packaging structure of the cavity-containing radio frequency module has higher design freedom, and can be adjusted according to the number of devices and the layer number of the rewiring structure, for example, the integrated fan-out packaging structure can be adjusted into a plurality of fan-out modules or a multilayer rewiring structure.
4. The integrated fan-out packaging structure containing the cavity radio frequency module is characterized in that the fan-out interconnection packaging structure formed by interconnecting the integrated fan-out modules and the rewiring structure are separately manufactured and then combined, so that the problem that the warpage after reconstruction causes a plurality of rewiring layers to be directly manufactured on the fan-out structure can be effectively solved, and the yield loss caused by the warpage is avoided.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. The objects and other advantages of the application may be realized and obtained by means of the instrumentalities particularly pointed out in the specification and the like.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief description will be given below of the drawings required for the embodiments or the prior art descriptions, and it is obvious that some of the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for manufacturing an integrated fan-out package structure of a radio frequency module with a cavity according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an integrated fan-out package structure for a cavity-containing radio frequency module according to an embodiment;
fig. 3 to 12 are schematic structural diagrams of an integrated fan-out package structure of a radio frequency module with a cavity according to an embodiment of the present application at various stages in a manufacturing process;
fig. 13 to 15 are schematic structural diagrams of a device integrated structure at various stages in a manufacturing process according to another embodiment of the present application.
Reference numerals:
1-a fan-out interconnect package structure; 2-rewiring structure; 3-device integrated structure; a 4-interconnect structure; 11-a first carrier plate; 12-a temporary bonding layer; 13-an insulating bonding layer; 131-opening; 14-devices; 15-cavity structure; 16-a reconstruction layer; 17-an encapsulation layer; 18-a first metal line layer; 21-a second carrier plate; 22-passivation layer; 23-a second metal wiring layer; 31-a protective layer; a 32-solder joint structure; 40-bonding glue.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application; the technical features designed in the different embodiments of the application described below can be combined with each other as long as they do not conflict with each other; all other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present application and simplify the description, and do not indicate or imply that the devices or components referred to must have a specific orientation or be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more. In addition, the term "comprising" and any variations thereof are meant to be "at least inclusive".
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between the two components. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Referring to fig. 1 and fig. 2, fig. 1 is a flow chart illustrating a method for manufacturing an integrated fan-out package structure with a cavity rf module according to an embodiment of the application, and fig. 2 is a structural diagram illustrating an integrated fan-out package structure with a cavity rf module according to an embodiment of the application. To achieve at least one of the advantages and other advantages, an embodiment of the application provides a method for manufacturing an integrated fan-out package structure of a radio frequency module with a cavity. As shown in the figure, the preparation method of the integrated fan-out packaging structure of the cavity-containing radio frequency module comprises the following steps:
s10: a fan-out interconnect package structure 1 is formed. The specific steps of forming the fan-out interconnect package structure 1 include: forming a device 14 integrated structure 3; forming an encapsulation layer 17, and forming a first metal wiring layer 18 within the encapsulation layer 17; the device 14 integrated structure 3 is connected to the encapsulation layer 17 to form a fan-out interconnect encapsulation structure 1. Wherein the first metal wiring layer 18 connects the device 14 to the integrated structure 3. The device 14 integrated structure 3 is formed to include a plurality of devices 14, a reconstruction layer 16, and an insulating bonding layer 13. The insulating bonding layer 13 has an opening 131, and the plurality of devices 14 are connected to the insulating bonding layer 13 through the opening 131. The reconstitution layer 16 encapsulates the plurality of devices 14 to bond the plurality of devices 14 together. The first metal wiring layer 18 connects the plurality of devices 14 through the opening 131. The encapsulation layer 17 may be the connection reconstruction layer 16 and the insulating bonding layer 13.
At least one of the plurality of devices 14 is a filter device. Below the filter device (i.e. on the side of the filter device facing the rewiring structure 2) there is a cavity structure 15, which cavity structure 15 may be formed by the filter device, the insulating bond layer 13 and the encapsulation layer 17 together, and the cavity structure 15 is also an opening 131 formed by the insulating bond layer 13, which protects the internal structural properties from disturbances. Considering that the filter device is provided with an IDT structure (Inter Digital Transducer ), if the IDT structure is covered with a film layer or dirt and other foreign matters, the performance of the IDT structure will be affected, and frequency offset is caused, so that the performance of the filter device can be ensured by arranging the cavity structure 15 to avoid the attachment of the foreign matters.
S20: the rewiring structure 2 is formed. The formed rerouting structure 2 comprises a passivation layer 22 and a second metal line layer 23. The second metal line layer 23 is disposed in the passivation layer 22, and a portion of the second metal line layer 23 is exposed from the passivation layer 22, so that the second metal line layer 23 is connected to the first metal line layer 18.
S30: the fan-out interconnection packaging structure 1 is connected to the rewiring structure 2 through the interconnection structure 4 to form an integrated fan-out packaging structure of the cavity-containing radio frequency module. The interconnection structure 4 may be a structure having connection performance such as a solder ball structure.
After completing the step of connecting the fan-out interconnect package structure 1 to the rewiring structure 2, the following steps may be included: s40: a protective layer 31 is formed between the fan-out interconnect package structure 1 and the re-wiring structure 2. The protective layer 31 may be formed by a dispensing process. The protective layer 31 connects the interconnect structure 4.
S50: a solder joint structure 32 is formed on a side of the rewiring structure 2 facing away from the fan-out interconnect package structure 1 (i.e., a lower surface of the rewiring structure 2 in the figure) for subsequent soldering to a PCB circuit board for electrical conduction.
Taking the integrated fan-out package structure of the cavity-containing radio frequency module of the present embodiment as an example of the radio frequency module, the plurality of devices 14 are sequentially a filter device, a discrete passive device, and a power amplifier device from left to right in the drawing. Under the filter device there is a cavity structure 15, which cavity structure 15 is formed by the filter device, the insulating bonding layer 13 and the encapsulation layer 17 together, and the cavity structure 15 is also an opening 131 formed by the insulating bonding layer 13, which protects the internal structural properties from interference. Considering that the discrete passive device has the problem of pad bulge, the pad of the discrete passive device is just embedded in the opening 131 of the insulating bonding layer 13, so that the discrete passive device is prevented from drifting due to poor bonding force of the pad bulge in the plastic packaging process. The discrete passive component may be a choke element 14. The filter device and the power amplifier device would normally have respective pads bonded to corresponding openings 131 of the insulating bonding layer 13. The opening 131 can be used as an alignment mark of the patch, and the bonding pad of the device 14 is aligned and attached to the opening 131, so that the offset caused by no alignment can be avoided.
However, the present application is not limited thereto, and when the integrated fan-out package structure of the cavity-containing rf module is a module with other functions, the plurality of devices 14 may be replaced with corresponding desired devices 14. In other words, the plurality of devices 14 may be the same type of plurality of devices 14 or different types of plurality of devices 14, which may be selectively applied according to specific practical situations. In particular, the preparation method of the present application is more effective in the case of using 3 or more devices 14. In addition, if the number of the devices 14 is large (e.g. greater than 20, 30, 50, etc.), the devices may be divided into several fan-out units and then mounted on the second metal circuit layer 23 of the passivation layer 22, so as to facilitate production and manufacture.
A method for fabricating the integrated fan-out package structure of the cavity-containing radio frequency module shown in fig. 2 is disclosed below. Referring to fig. 3 to 12, fig. 3 to 12 are schematic structural diagrams of an integrated fan-out package structure of a cavity-containing rf module according to an embodiment of the application at various stages in a manufacturing process.
First, as shown in fig. 3, a temporary bonding layer 12 is formed on a first carrier plate 11, and the temporary bonding layer 12 may be formed by using a laser-detached bonding or thermal-detached bonding material, so as to facilitate subsequent removal of the temporary bonding layer 12. Next, an insulating bonding layer 13 is formed on the temporary bonding layer 12, and the insulating bonding layer 13 may be formed using a lithographically applicable bonding adhesive layer or a dry bonding film preparation so as to form the opening 131. I.e. the insulating bonding layer 13 has openings 131, the positions of the openings 131 of the insulating bonding layer 13 corresponding to the positions of pads (Pad) of the subsequently arranged device 14. If the temporary bonding layer 12 is not provided, a certain damage is caused to the insulating bonding layer 13 in the subsequent stage of removing the first carrier 11, which affects the overall performance.
Next, as shown in fig. 4, a plurality of devices 14 are bonded on the insulating bonding layer 13 through the openings 131. The filter device, the discrete passive device and the power amplifier device are sequentially arranged from left to right. Considering that the discrete passive device has the problem of pad bulge, the pad of the discrete passive device is arranged in the opening 131 of the insulating bonding layer 13, so that the discrete passive device is prevented from drifting due to poor bonding force of the pad bulge in the plastic packaging process. The filter device and the power amplifier device may then be normally bonded with respective pads (pads are shown filled with solid black hatching) on corresponding openings 131 of the insulating bonding layer 13. The size of the opening 131 is equal to or smaller than the size of the pad of each device 14. The opening 131 can be used as an alignment mark of the patch, and the bonding pad of the device 14 is aligned and attached to the opening 131, so that the offset caused by no alignment can be avoided.
Then, as shown in fig. 5, a plastic packaging process is performed on the back surface of the chip to achieve a protective sealing effect. Specifically, the surface of the device 14 is covered with the reconstruction layer 16, and the reconstruction layer 16 extends from the surface of the chip to the side of the insulating bonding layer 13 and connects the temporary bonding layer 12. In this embodiment, the reconstruction layer 16 is a plastic layer, which may be a plastic molding compound or a dry film material, for example, polyimide or epoxy. Optionally, the reconstruction layer 16 may also include other insulating materials, sealing materials, and glass materials. The process employed to reconstruct the encapsulation of layer 16 may include: at least one of injection molding process, compression molding process, printing process, transfer molding process, liquid sealant curing molding process, vacuum lamination process. By forming the opening 131 of the insulating bonding layer 13, attaching the plurality of devices 14 to the opening 131, and then performing plastic packaging, the loss of the photoetching yield caused by the offset of the plastic packaged devices 14 can be effectively improved.
Again, as shown in fig. 6, the first carrier 11 and the temporary bonding layer 12 are removed to obtain the device 14 integrated structure 3. Specifically, the temporary bonding layer 12 may be degraded by thermal pyrolysis or laser pyrolysis, so that the first carrier plate 11 and the temporary bonding layer 12 are removed together, and the insulating bonding layer 13 is not damaged.
Then, as shown in fig. 7, a packaging process (e.g., wafer level packaging process) is performed on the surface of the integrated structure 3 of the device 14 to obtain the fan-out interconnection packaging structure 1. Specifically, the encapsulation layer 17 is used to cover the reconstruction layer 16, the insulating bonding layer 13, and a first metal wiring layer 18 is prepared to be formed within the encapsulation layer 17 so that the first metal wiring layer 18 can be connected to the pads of the device 14 through the openings 131 of the insulating bonding layer 13. The surface of the first metal line layer 18 on the side facing away from the device 14 is formed with solder balls (i.e. interconnect structures 4) to facilitate connection to other metal line layers. The first metal circuit layer 18 may be formed by photolithography to form the circuit pattern layer, and then electroplating metal to form the first metal circuit layer 18. Optionally, the number of circuit layers of the first metal circuit layer 18 is smaller, for example, 3 layers or less, so as to avoid the problem of warpage caused by preparing excessive circuit layers on the surface of the integrated structure 3 of the device 14, which results in yield loss. Considering that the fan-out packaging technology is one of the current solutions, although the advantage of simply directly using the fan-out packaging technology can solve the requirement of partial miniaturization, there are problems such as warpage, wherein warpage affects the preparation of the subsequent RDL layers, resulting in low yield in the preparation of multiple (5) RDL layers, so that the first metal line layer 18 and the second metal line layer 23 are separately prepared to avoid the problem. In some embodiments, the encapsulation layer 17 may be a double layer structure composed of an insulating layer and a solder resist layer.
The preparation of the rewiring structure 2 is then started. It should be noted that, the fan-out interconnection package structure 1 and the rerouting structure 2 are not specifically prepared in sequence, that is, the fan-out interconnection package structure 1 may be prepared first and then the rerouting structure 2 may be prepared, or the fan-out interconnection package structure 1 may be prepared first and then the rerouting structure 2 may be prepared.
Next, as shown in fig. 8, a second carrier 21 is provided, and a temporary bonding layer 12 is formed on the second carrier 21, where the temporary bonding layer 12 may be formed by using a material that is bonded by laser or thermally bonding, so as to facilitate the subsequent removal of the temporary bonding layer 12. The rerouting structure 2 is prepared on the temporary bonding layer 12. The re-wiring structure 2 includes a passivation layer 22 and a second metal wiring layer 23, the second metal wiring layer 23 being disposed within the passivation layer 22, and the passivation layer 22 exposing a portion of the second metal wiring layer 23 so as to connect the second metal wiring layer 23 to the first metal wiring layer 18 through the interconnect structure 4. The second metal circuit layer 23 may be formed by photolithography to form the circuit pattern layer, and then electroplating metal to form the second metal circuit layer 23; the passivation layer 22 is then formed by a spin coating or film pressing process through photolithography development to protect the inner second metal wiring layer 23. Alternatively, the number of circuit layers of the second metal circuit layer 23 is larger (the number of circuit layers of the second metal circuit layer 23 is larger than that of circuit layers of the first metal circuit layer 18), the number of circuit layers of the second metal circuit layer 23 can be prepared according to specific requirements, such as more than 5 layers, 6 layers, 7 layers, and the like, and the second metal circuit layer 23 manufactured independently can not cause warping problem, and has higher design freedom. The material of the passivation layer 22 may be polyimide, epoxy, acrylic, phenolic, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable organic material, and may be an inorganic material such as silicon oxide, silicon nitride, etc. Passivation layer 22 may be formed by suitable fabrication techniques such as spin-on coating (spin-on coating), chemical vapor deposition (chemical vapor deposition, CVD), plasma-enhanced chemical vapor deposition (PECVD), and the like. The thickness of passivation layer 22 is determined by the thickness required for the fan-out package structure.
Then, as shown in fig. 9, the fan-out interconnection package structure 1 in fig. 7 is attached to the rerouting structure 2 in fig. 8, and reflow processing is performed to fixedly connect the two together. Specifically, the first metal line layer 18 and the second metal line layer 23 are soldered to each other by solder balls.
Then, as shown in fig. 10, the second carrier plate 21 and the temporary bonding layer 12 are removed. Specifically, the temporary bonding layer 12 may be degraded by thermal pyrolysis or laser pyrolysis, so that the second carrier plate 21 and the temporary bonding layer 12 are removed together, and the rerouting structure 2 is not damaged. And the rewiring structure 2 is used as a bearing plate to omit a traditional substrate, so that the area and thickness of the integrated fan-out packaging structure of the prepared cavity-containing radio frequency module are smaller, and the integrated fan-out packaging structure has better electrical performance and heat dissipation.
Then, as shown in fig. 11, a protective layer 31 is formed between the substrate and the chip by way of a dispensing process operation.
Finally, as shown in fig. 12, a pad structure 32 is formed on the front surface of the substrate, and the pad structure 32 is connected to the rewiring structure 2. The solder joint structures 32 may be, for example, solder balls or metal posts. The solder joint structure 32 may comprise at least one of tin, silver, copper, and the solder joint structure 32 may be formed by electroplating, printing, or ball-plating.
The foregoing is merely a method for manufacturing the integrated fan-out package structure of the cavity-containing radio frequency module shown in fig. 2, which is not limited thereto, and is mainly used for illustrating a preparation implementation manner of the integrated fan-out package structure of the cavity-containing radio frequency module.
Referring to fig. 13 to 15, fig. 13 to 15 are schematic views of a device integrated structure at various stages in a manufacturing process according to another embodiment of the application. In this embodiment, the material of the reconstruction layer 16 may be a glass material. The steps for disposing the plurality of devices 14 in the glass reconstruction layer 16 are as follows:
first, as shown in fig. 13, a plurality of blind trenches are formed on the reconstruction layer 16, and the position and size of each blind trench are set according to the number and size of the preset plurality of devices 14. Blind trenches may be formed by a laser drilling process.
Then, as shown in fig. 14, the plurality of devices 14 are respectively disposed in the plurality of blind grooves of the reconstruction layer 16, thereby completing the patch. The device 14 may be adhered to the blind via glue 40 and the device 14 may be embedded in a positive fit with a gap between the sides of the device 14 and the reconstituted layer 16 of glass material to avoid damaging the device 14.
Next, as shown in fig. 15, at the gap between the device 14 and the reconstruction layer 16, a filling paste may be used to fill to form the insulating bonding layer 13, where the insulating bonding layer 13 has an opening 131 to expose a pad of the device 14, so as to facilitate subsequent connection of the first metal line layer 18 and formation of the cavity structure 15. The insulating bonding layer 13 can ensure the close fitting of the structure and has high stability. Since glass has excellent characteristics, the loss in forming the device integrated structure 3 is small on the basis that the reconstruction layer 16 is glass.
Subsequently, the step of fig. 7 may be followed, and a packaging process (e.g. wafer level packaging process) may be performed on the surface of the device integrated structure 3, so as to obtain the fan-out interconnection packaging structure 1. Specifically, the encapsulation layer 17 is used to cover the reconstruction layer 16 and the insulating bonding layer 13, and a first metal wiring layer 18 is prepared to be formed within the encapsulation layer 17 so that the first metal wiring layer 18 can be connected to the pads of the device 14 through the openings 131 of the insulating bonding layer 13. The surface of the first metal line layer 18 on the side facing away from the device 14 is formed with solder balls (i.e. interconnect structures 4) to facilitate connection to other metal line layers. The first metal circuit layer 18 may be formed by photolithography to form the circuit pattern layer, and then electroplating metal to form the first metal circuit layer 18. In some embodiments, the insulating bonding layer 13 is formed on the glass material of the reconstituted layer 16, so that glass may not be embedded.
Referring to fig. 2 again, an embodiment of the present application further provides an integrated fan-out package structure of a radio frequency module with a cavity, where the integrated fan-out package structure has at least two metal circuit layers. The integrated fan-out package structure includes an insulating bonding layer 13, a plurality of devices 14, a reconstruction layer 16, a first metal wiring layer 18, a package layer 17, a second metal wiring layer 23, and a passivation layer 22.
The insulating bonding layer 13 has an opening 131. A plurality of devices 14 are disposed on the upper surface of the insulating bonding layer 13 through openings 131. The reconstituted layer 16 encapsulates the plurality of devices 14 and the insulating bonding layer 13. The first metal wiring layer 18 connects the plurality of devices 14 through the opening 131. The encapsulation layer 17 is connected to the insulating bonding layer 13, and the first metal line layer 18 is located in the encapsulation layer 17. The second metal wiring layer 23 is connected to the first metal wiring layer 18 through the interconnect structure 4. The passivation layer 22 is connected to the second metal wiring layer 23.
The integrated fan-out package structure of the cavity-containing radio frequency module may further comprise a protective layer 31 and a solder joint structure 32. The protection layer 31 is disposed between the encapsulation layer 17 and the passivation layer 22, the pad structure is connected to the second metal line layer 23, and the pad structure 32 is located on a side of the second metal line layer 23 facing away from the first metal line layer 18.
The number of circuit layers of the second metal circuit layer 23 is greater than that of the first metal circuit layer 18, and the number of circuit layers of the first metal circuit layer 18 is less than or equal to 3.
In some embodiments, when viewed from a top view of the integrated fan-out package structure including the cavity radio frequency module, the sum of the areas of the plurality of devices 14 in the integrated fan-out package structure including the cavity radio frequency module occupies a significantly larger area of the integrated fan-out package structure including the cavity radio frequency module, the pitches of the plurality of devices 14 are smaller, and more concentrated, the sum of the areas of the plurality of devices 14 occupies 50-90% of the area of the integrated fan-out package structure including the cavity radio frequency module, i.e. the overall package area of the integrated fan-out package structure including the cavity radio frequency module is smaller, so that the current market demand for miniaturization can be satisfied.
In summary, compared with the prior art, the integrated fan-out packaging structure of the cavity-containing radio frequency module and the preparation method thereof provided by the application have at least the following advantages:
1. according to the integrated fan-out packaging structure of the cavity-containing radio frequency module, the fan-out interconnection packaging structure 1 and the rerouting structure 2 are formed independently, the fan-out interconnection packaging structure 1 is formed by interconnecting a plurality of fan-out modules, and the fan-out interconnection packaging structure 1 formed by the interconnected fan-out modules is combined with the rerouting structure 2 through the interconnection structure 4, so that the overall packaging area and thickness of the integrated fan-out packaging structure of the cavity-containing radio frequency module can be reduced, the miniaturization requirement is met, and the integration performance is high.
2. The traditional packaging needs to use a substrate as a bearing plate, the thickness of the substrate is larger, a chip is mounted on the substrate, the distance between solder balls on the substrate is controlled to avoid short circuit, and the chip is mounted on the solder balls fixed on the substrate; in contrast, the fan-out package structure 1 is formed by integrating a plurality of devices 14 by adopting the fan-out package, so that the space control of the devices 14 is smaller, the whole area is shortened, and the first metal circuit layer 18 and the second metal circuit layer 23 are respectively prepared.
3. The integrated fan-out package structure of the cavity-containing radio frequency module of the present application has a higher degree of freedom in design, and the fan-out structure can be adjusted according to the number of devices 14 and the number of layers of the rerouting structure 2, for example, can be adjusted into a plurality of fan-out modules or a multilayer rerouting structure 2.
4. The integrated fan-out packaging structure containing the cavity radio frequency module is characterized in that the fan-out interconnection packaging structure 1 formed by interconnecting a plurality of integrated fan-out modules and the rewiring structure 2 are separately manufactured and then combined, so that the problem that the warpage after reconstruction causes a plurality of rewiring layers to be directly manufactured on the fan-out structure can be effectively solved, and the yield loss caused by the warpage is avoided.
In addition, it should be understood by those skilled in the art that although many problems exist in the prior art, each embodiment or technical solution of the present application may be modified in only one or several respects, without having to solve all technical problems listed in the prior art or the background art at the same time. Those skilled in the art will understand that nothing in one claim should be taken as a limitation on that claim.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.

Claims (10)

1. An integrated fan-out packaging structure containing a cavity radio frequency module, which is characterized in that: the integrated fan-out packaging structure of the cavity-containing radio frequency module comprises:
an insulating bonding layer having an opening;
a plurality of devices disposed on an upper surface of the insulating bonding layer through the openings;
a reconstituted layer encapsulating the plurality of devices and the insulating bonding layer;
the first metal circuit layer is connected with the devices through the openings;
the packaging layer is connected with the insulating bonding layer, and the first metal circuit layer is positioned in the packaging layer;
the second metal circuit layer is connected with the first metal circuit layer through an interconnection structure;
a passivation layer connected with the second metal circuit layer;
a protective layer disposed between the encapsulation layer and the passivation layer;
at least one of the plurality of devices is a filter device, and a cavity structure is formed among the filter device, the insulating bonding layer and the packaging layer; the size of the opening is smaller than or equal to the size of the bonding pad of the device.
2. The integrated fan-out package structure of a cavity-containing radio frequency module of claim 1, wherein: the number of circuit layers of the second metal circuit layer is larger than that of the first metal circuit layer, and the number of circuit layers of the first metal circuit layer is smaller than or equal to 3.
3. The integrated fan-out package structure of a cavity-containing radio frequency module of claim 1, wherein: the integrated fan-out packaging structure of the cavity-containing radio frequency module further comprises a welding spot structure, wherein the welding pad structure is connected with the second metal circuit layer, and the welding spot structure is positioned on one side, away from the first metal circuit layer, of the second metal circuit layer.
4. The integrated fan-out package structure of a cavity-containing radio frequency module of claim 1, wherein: at least one of the plurality of devices is a discrete passive device, a pad of the discrete passive device being located within the opening of the insulating bonding layer.
5. A preparation method of an integrated fan-out packaging structure containing a cavity radio frequency module is characterized by comprising the following steps: the preparation method of the integrated fan-out packaging structure of the cavity-containing radio frequency module comprises the following steps:
forming a fan-out interconnection packaging structure;
forming a rewiring structure;
connecting the fan-out interconnection packaging structure to the rewiring structure through an interconnection structure;
wherein the fan-out interconnect package structure comprises a filter device provided with a cavity structure at a side facing the rewiring structure.
6. The method for manufacturing the integrated fan-out package structure of the cavity-containing radio frequency module of claim 5, wherein: the forming a fan-out interconnect package structure includes:
forming a device integrated structure;
forming a packaging layer, wherein a first metal circuit layer is formed in the packaging layer;
and connecting the device integrated structure to the packaging layer to form the fan-out interconnection packaging structure, wherein the first metal circuit layer is connected with the device integrated structure.
7. The method for manufacturing the integrated fan-out package structure of the cavity-containing radio frequency module of claim 6, wherein: the device integrated structure comprises a plurality of devices, a reconstruction layer and an insulating bonding layer, wherein the insulating bonding layer is provided with an opening, the devices are connected with the insulating bonding layer through the opening, the reconstruction layer coats the devices, and the first metal circuit layer is connected with the devices through the opening.
8. The method for manufacturing the integrated fan-out package structure of the cavity-containing radio frequency module of claim 7, wherein: at least one of the plurality of devices is the filter device, and the filter device, the insulating bonding layer, and the encapsulation layer collectively form the cavity structure.
9. The method for manufacturing the integrated fan-out package structure of the cavity-containing radio frequency module of claim 7, wherein: the material of the reconstruction layer is glass, a plurality of blind grooves are formed in the reconstruction layer, and a plurality of devices are correspondingly arranged in the blind grooves.
10. The method for manufacturing the integrated fan-out package structure of the cavity-containing radio frequency module of claim 5, wherein: the rewiring structure comprises a passivation layer and a second metal circuit layer, wherein the second metal circuit layer is arranged in the passivation layer, and part of the second metal circuit layer is exposed out of the passivation layer.
CN202310706526.0A 2023-06-15 2023-06-15 Integrated fan-out packaging structure containing cavity radio frequency module and preparation method thereof Pending CN116613115A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117334639A (en) * 2023-12-01 2024-01-02 长电集成电路(绍兴)有限公司 Chip packaging structure and chip packaging method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117334639A (en) * 2023-12-01 2024-01-02 长电集成电路(绍兴)有限公司 Chip packaging structure and chip packaging method

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