CN1166014C - Structure and fabrication process of inductors on semiconductor chip - Google Patents
Structure and fabrication process of inductors on semiconductor chip Download PDFInfo
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- CN1166014C CN1166014C CNB96121645XA CN96121645A CN1166014C CN 1166014 C CN1166014 C CN 1166014C CN B96121645X A CNB96121645X A CN B96121645XA CN 96121645 A CN96121645 A CN 96121645A CN 1166014 C CN1166014 C CN 1166014C
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Abstract
The present invention discloses an inductive circuit which is produced on a semiconductor chip comprising a substrate layer and a dielectric layer. The inductive circuit comprises an inductive iron core which is encircled by the dielectric layer and is made of high-magnetic sensitive material (HMSM), wherein the dielectric layer encircling the inductive iron core is surrounded by an electricity conducting wire which comprises a lower electricity conducting wire, an electricity conducting wire penetrating through a passage encircling the dielectric layer, and an upper electricity conducting wire; the electricity conducting wire is picturized by an IC process; thus, the inductive iron core, the dielectric layer encircling the inductive iron core and the surrounding electricity conducting wire are formed into the inductive circuit; the inductive circuit is formed on the semiconductor chip comprising the substrate layer and the dielectric layer.
Description
Technical field
The present invention relates generally to the structure and the manufacture method thereof of integrated circuit (IC).The present invention be more particularly directed to realize as integrated circuit (IC) a part of inductive circuit structure and manufacture method thereof, wherein the live width of said integrated circuit is in micron or sub-micrometer scale, can fully-integrated this inductive circuit, and with it regularly as the IC circuit element.
Background technology
Although along with the development of the manufacturing technology of very lagre scale integrated circuit (VLSIC) (VLSI) and very large scale integration (ULSI), electronic circuit is miniaturization more and more, still has inductive circuit to be unsuitable for IC and realizes that so great difficult point is limiting integrated circuit technique.This problem is because the IC manufacturing technology is most to be ' layer orientation ', generally comprises the technology of continuous formation multilayer horizontal surface.Yet inductive circuit is ' on-plane surface ' configuration, is generally continuous spirality.This special on-plane surface helical structure has hindered the IC manufacturing process that realizes inductive circuit is integrated into the part of IC device.
A this technical difficult problem has seriously limited IC The Application of Technology scope.Inductive circuit is widely used in various filters, oscillator, resonator, transformer and many other control circuits that is used for signal of communication generation and processing, energy storage, Electrostatic Discharge or electrical over-stress (EOS) protection.This can not be on the IC chip restriction of integrated inductor circuit greatly hindered the technological progress in these fields.As hereinafter will discussing, still using traditional design and fabrication technology for the device that relates to inductive circuit, recent decades are progress not.This problem has also hindered all devices that include inductive circuit and has had benefited from the IC manufacturing technology.Like this, owing to can not adopt high accuracy and effective I C manufacturing technology, make the miniaturization of the device that needs to use inductive circuit and produce in batches, so, to compare with the device of IC manufacturing, these device volumes are huge, and cost is higher.
Be called in the United States Patent (USP) 4783646 of " stolen article tags detected sheet and manufacture method thereof " in mandate on November 8th, 1988, name, Matsuzaki discloses a kind of stolen article tags detected sheet (a stolen article detection tag sheet).This labei sheet comprise transmitting antenna part, reception antenna part and be series at receive and the transmitting antenna part between inductor portion portions.This labei sheet comprises the semiconductor diode chip, and this semiconductor diode chip has Semiconductor substrate that is installed on inductor first and is electrically connected with it and the Schottky barrier electrode that is formed at substrate top.This labei sheet also comprises second conductive pattern that contacts and form with the conductive component of Schottky barrier electrode.Semiconductor chip diode and inductor portion portions are connected in parallel to each other, and constitute a LC resonator, and the frequency of resonator is by the inductance decision of 2.4nH in the parasitic capacitance of diode and this specific label sheet.
Matzusaki discloses a kind of method that realizes the LC resonant circuit on printed circuit (PC) plate.Yet,, wherein, be not given in the method for making inductance on integrated circuit (IC) chip separately because conductor wire is in parallel with diode electrode, and inductance produces with parasitic capacitance though the technology of Matzusaki discloses a kind of structure of making lc circuit.And, owing to be of a size of hundreds of micron (μ m) by the disclosed resonator of Matzusaki, so, can't be applied to live width in the manufacturing of the IC device of several microns or sub-micrometer scale by disclosed technology of Matzusaki and device architecture.
The United States Patent (USP) 4841253 that is called " the many spiral inductors that are used for the Dc bias of amplifier " in another piece of writing mandate on June 20th, 1989, name, Crabill discloses a kind of monolithic semiconductor that the DC bias voltage is arranged on chip, comprise a plurality of spiral in ductors that are connected in series that are connected between corresponding biasing and the semiconductor circuit.Shown in Fig. 1,2 and 3, the described inductance device of these spiral in ductors that comprises of these patent claims is all the chip external component.Because the special construction that extends as spirality on horizontal plane makes these inductive circuits occupy very big IC chip area, therefore, it is integrated to be unsuitable for intensive IC, is unsuitable for ultra-large integrated (VLSI) especially.And, owing to be planar structure, very limited by the inductance that this planar spiral inductor provides.So the application open and inductance that uses is very limited in the invention of Crabill.
Except above-mentioned spiral in ductor, below with reference to the United States Patent (USP) 480032 of authorizing Sikora on January 24th, 1989 " Single Ended Self-Oscillating DC-DCConverter for Intermittently Energized Load Having VBE ResponsiveCurrent Limit Circuit ", perhaps another piece authorized the United States Patent (USP) 4845580 " AC DC Spike Eliminating Bandpass Filter " of Kitchen on July 4th, 1989, and the situation of using inductive circuit in different components is described.Disclosed inductive circuit is still introduced as the coiling circuit element in these patents.Obviously these inductive circuits can not be realized on the IC chip as the part of IC device.
Therefore,, particularly need to adopt in the manufacturing technology of electronic device of inductive circuit, still need to provide a kind of structure and manufacture method that can overcome these restrictions at the IC device.
Summary of the invention
Therefore, the purpose of this invention is to provide a kind of structure and manufacture method thereof of the inductive circuit on the IC chip, to solve above-mentioned the problems of the prior art.
Particularly, an object of the present invention is to provide a kind of can be integrated IC structure and the manufacture method thereon of inductive circuit.
Another object of the present invention provides IC structure and the manufacture method thereof that a kind of integrated inductor circuit makes it to become an IC device part, so that can reduce to the scope that can compare with VLSI or ULSI live width to the size of inductance component.
A further object of the present invention provides IC structure and the manufacture method thereof that a kind of integrated inductor circuit makes it to become an IC device part, so that utilize the IC manufacture method, makes the electronic device of having introduced inductive circuit minimize and produce in batches this device.
Another purpose of the present invention provides IC structure and the manufacture method thereof that a kind of integrated inductor circuit makes it to become an IC device part, so that utilize the IC manufacture method, improves the workmanship of the electronic device of having introduced inductive circuit.
Another purpose of the present invention provides IC structure and the manufacture method thereof that a kind of integrated inductor circuit makes it to become an IC device part, because design preferably and the higher workmanship that is provided by the IC technology, thus can improve the electronic device of having introduced inductive circuit such as performance levels such as speed, control precision or other operating characteristic.
In brief, in a preferred embodiment, the integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip of the present invention comprises: the inductive circuit with inductance line, the many path lines that photoetching forms that pass through of multilayer material are passed in utilization in described semiconductor chip, connect and to be positioned at that many conductor wires on the multilayer form described inductance line described in the described semiconductor chip, so in described semiconductor chip, form the integrated circuit inductance coil; The described inductance line and the described many path lines that are positioned on the multilayer are produced on the described semiconductor chip with photoetching process, live width between wherein said inductance line and the described path line is positioned at sub-micrometer range substantially, thereby described integrated circuit inductive circuit can be integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with described a plurality of integrated circuits of described integrated circuit (IC)-components.
The present invention makes inductive circuit on the semiconductor chip that comprises substrate layer and dielectric layer.Inductive circuit comprises the inductor core that is surrounded by dielectric layer and be made of high magnetosensitive sense material (HMSM).The dielectric layer that surrounds inductor core again by conductor wire around, conductor wire comprises: following conductor wire, the conductor wire in passing the path (vias) that surrounds dielectric layer, and go up conductor wire.Make these conductor wire compositions with the IC manufacturing process.So, inductor core, surrounding the dielectric layer of inductor core and constitute inductive circuit around conductor wire, inductive circuit is formed on the semiconductor chip that comprises substrate layer and dielectric layer.
Of the present invention by described integrated circuit inductance coil around inductor core can constitute by non-conductive high magnetosensitive sense material.
Of the present invention by described integrated circuit inductance coil around described inductor core also can by the conduction high magnetosensitive sense material constitute.
Undoubtedly, reading below with reference to after each accompanying drawing description of a preferred embodiment, those skilled in the art can very clear these and other objects of the present invention and advantage.
Description of drawings
Figure 1A-1K is profile, top view and the fragmentary, perspective view of the processing step of manufacturing inductive circuit of the present invention.
Fig. 2 A-2E is by the profile of the processing step of another inductive circuit of manufacturing of the present invention or top view.
Fig. 3 A-3D represents to be formed at the combination of the different induction circuit on the multilayer horizontal plane on the IC chip; And
Fig. 4 A-4C is a kind of fragmentary, perspective view of inductive circuit, or utilize the path line that passes several horizontal planes, or utilize horizontal line between several vertical planes, and be connected a plurality of horizontal coils or vertical coil on several horizontal planes or the vertical plane, can constitute said inductive circuit.
Embodiment
Figure 1A-1G shows the processing step of making IC inductive circuit 100.Figure 1A shows the substrate 105 of its upper surface supporting medium layer 110.Deposit conductive layer 115 on dielectric layer 110.Then, utilize etching technics or other IC treatment step, for example utilize photoetching technique, make conductive layer 115 compositions, form conductor wire 115-1 down.Figure 1B is the top view of the following conductor wire 115-1 of the composition on dielectric layer 110.Fig. 1 C shows second dielectric layer 120 that forms on following conductor wire 115-1.Then, the high magnetosensitive sense of deposit material (HMSM) layer 125 on dielectric layer 120.Etching HMSM layer 125 forms inductor core 125-1 then.Fig. 1 D shows the next step of another dielectric layer 130 of deposit on inductor core 125-1.Shown in Fig. 1 E, passing dielectric layer formation ' path ' 135 is little pin hole 135, wherein all is filled with electric conducting material in each ' path ', so that electrically contact with following conductor wire 115-1.Fig. 1 F shows another conductive layer 140 that is formed on the dielectric layer 130, then, and shown in Fig. 1 G, etching conductive layer 140 makes it composition, conductor wire 140-1 in the formation, wherein go up two paths of conductor wire connection for every, so constitute circuit around HMSM inductor core 125-1.Then, on conductor wire 140-1, form another dielectric layer 150, to constitute the passivation and the insulating barrier 150 of the whole inductive circuit 100 of protection.
In order more clearly to represent the formation of inductive circuit 100, Fig. 1 I, 1I ' are by utilizing path line 135 to be connected the top view and the side perspective view of the inductance line of following inductance line 115-1 and last inductance line 140-1 formation with 1J.Fig. 1 I ' shows the inductive circuit that comprises inductor core 125-1, and Fig. 1 I shows the inductive circuit 100 that does not have inductor core.The conductor wire of the many plane configurations of this three-dimensional that the inductive circuit that forms like this 100 is used provides a kind of technology of avoiding the restriction of tradition stratum orientation IC design philosophy for the designer of IC circuit.
Fig. 1 K is the perspective view that is used for the inductive circuit 100 of esd protection, and wherein an end of conductor wire is connected with internal circuit 155, and the other end is connected with bonding welding pad 160, so that discharge because the overcurrent that static discharge produces.Inductive circuit 100, promptly the inductance line 115-1 of Lian Jieing, 135 and 140-1 response static discharge produce inductive drop and electric current, this can prevent the constant high voltage and the electric current of discharge in internal circuit 155, thereby the infringement that is produced by ESD or EOS is minimized.
The invention discloses a kind of integrated circuit (IC) inductive circuit of on semiconductor chip 105, making 100.This IC inductive circuit 100 comprises the inductance line, many path lines 135 of each interlayer in the semiconductor chip 105 are passed in utilization, connect and be positioned at as many conductor wires on each layer of semiconductor chips such as upper surface layer and bottom surface layer, for example conductor wire 115-1 and 140-1, in semiconductor chip, form this inductance line, so in semiconductor chip 105, form the IC inductance coil.The inductance line and the Duo Gen path line that are positioned on each layer utilize IC technology to make on semiconductor chip 105.
Fig. 1 H shows a preferred embodiment of the present invention that comprises inductive circuit 100.On the semiconductor chip that comprises substrate layer 105 and dielectric layer 110, make inductive circuit 100.Inductive circuit 100 comprises the inductor core 125-1 that is made of high magnetosensitive sense material, and this iron core is comprised that the dielectric layer of dielectric layer 120 and 130 surrounds.The dielectric layer that holds inductor core 125-1 be dielectric layer 120 and 130 conductor wire that comprised conductor wire in down conductor wire 115-1, ' path ' 135 and last conductor wire 140-1 again around.Utilize the IC manufacturing process, make the conductor wire composition.So inductor core 125-1, constitute inductive circuit 100 around the dielectric layer of inductor core 125-1 (layer 120 and 130) with around conductor wire (line 115-1,135 and 140).Inductive circuit 100 is formed on the semiconductor chip that comprises substrate 105 and dielectric layer 110.
Fig. 1 K also shows a preferred embodiment of the present invention; wherein; the inductance coil of integrated inductor circuit 100 also be positioned at semiconductor chip 105 on internal circuit 155 and bonding welding pad 160 be connected, be not subjected to the infringement of Electrostatic Discharge or electrical over-stress (EOS) with the protection internal circuit.
Figure 1A-1K also discloses a kind of IC of utilization manufacturing process is made integrated inductor circuit 100 on substrate 105 method, this method comprises the following steps: that (a) forms three-decker on substrate 105, and make this three-decker composition, three-decker comprises many following inductance line 115-1, the many inductor core 125-1 that go up inductance line 140-1 and be made of high magnetosensitive sense material (HMSM), is formed to inductor core 125-1 insulation to power between sense line 140-1 and the following inductance line 115-1; And (b) pass inductor core and form a plurality of jockeys 135, with sense line 140-1 and the corresponding inductance line 115-1 down of Connecting Power, form the inductance line of combination, make it around inductor core 125-1, so that inductive current is in wherein conducting, thereby in inductor core 125-1, produce induced field.In a preferred embodiment, in the method for above-mentioned manufacturing integrated inductor circuit 100, comprise the step (b) that forms three-decker and step (a) that makes the three-decker composition and formation jockey, step (a) and (b) all utilize the IC manufacturing process, thereby can make live width near one micron or following integrated inductor circuit 100.
Fig. 2 A-2E shows another processing step of making inductive circuit 200 on the IC chip.Fig. 2 A shows and comprises and can be as the Semiconductor substrate 205 of silicon substrate and at first be deposited on 210 layers of high magnetosensitive sense materials on substrate 205 upper surfaces.Then, deposit conductive layer 215 on this HMSM layer 210 utilizes as IC treatment steps such as etchings, makes this conductive layer 215 compositions, to form down inductance line 215-1.Fig. 2 B is the top view of following inductance line 215-1.Fig. 2 C shows another the high magnetosensitive sense material layer 220 that is deposited on down on the inductance line 215-1.Pass HMSM layer 220, form a plurality of ' paths ' 225, then, fill each path, so that contact with following inductance line 215-1 with electric conducting material.Form another conductive layer 230 on HMSM layer 220, then, composition is so that form many last inductance line 230-1 that electrically contact with path, shown in Fig. 2 D.Then, shown in Fig. 2 E, another HMSM layer 235 of deposit on last inductance line 230-1, to finish the structure of inductor 200, this inductor 200 has the inductance line that is surrounded and comprise following inductance line 215-1, path inductance line 225 and last inductance line 230-1 by the HMSM layer, and described HMSM layer comprises HMSM layer 210,220 and 235.These treatment steps and this induction structure are particularly suitable for adopting the inductor core of non-conductive high magnetosensitive sense material, and concerning on the IC chip, make inductive circuit with the IC technology, can be very effectively at very little volume generation high inductance.
Fig. 2 E also discloses a kind of IC inductive circuit of making on semiconductor chip.This inductive circuit comprises the inductor core that is made of high magnetosensitive sense material (HMSM), comprises layer 210,220 and 235.Inductive circuit also has an inductance line at least, and the inductance line is by inductance line 215-1 and last inductance line 230-1 combine down.The inductance line is positioned near the inductor core, is used for conducting inductive current wherein, to produce induced field in inductor core.Inductor core and inductance line all are to be what make on the substrate 205 with IC technology at the IC chip.Utilize the IC manufacturing process, the live width that can make inductor core shown in Fig. 2 E and inductance line about 1 micron or below, this live width is suitable for the integrated of the IC device made with the VLSI technology.
Fig. 2 A-2E also discloses a kind of method of making integrated inductor circuit 200 with the IC manufacturing process on substrate 205, this method comprises the following steps: that (a) forms five-layer structure on substrate 205, and composition, this five-layer structure comprises the following inductor core layer 210 that (i) is made of high magnetosensitive sense material (HMSM), (ii) descend many following inductance line 215-1 on the HMSM layer 210, (iii) in the intermediate layer of descending on the inductance line 215-1 220, (iv) inductance line 230-1 on many on the intermediate layer 220, (the v) inductor core layer 235 that constitutes by high magnetosensitive sense material (HMSM), upper and lower inductor core layer 210 and 235 and intermediate layer 220 and last inductance line and following inductance line 215-1 and 230-1 insulate; (b) pass intermediate layer 220 and form a plurality of jockeys 225, to connect inductance line 230-1 and corresponding inductance line 215-1 down on each, in the volume that is contained in upper and lower inductor core layer 210 and 235, form combination inductance line, be used for conducting inductive current wherein, thereby in inductor core layer 210 and 235, produce induced field.In preference, form the step (a) of five-layer structure and composition and the step (b) of formation jockey 225 and utilized the IC manufacturing process, thereby, can make live width about 1 micron or following integrated inductor circuit 200.In a further advantageous embodiment, the step (a) in formation intermediate layer is to utilize high magnetosensitive sense material (HMSM) to form the intermediate layer to make the step of integrated inductor circuit 200.In another preferred embodiment, the step that forms upper and lower inductor core layer and intermediate layer is to utilize the material that is made of non-conductive high magnetosensitive sense material to form each layer to make the step of integrated inductor circuit 200.
Fig. 3 A shows another preferred embodiment of the present invention, wherein utilizes technology disclosed in this invention to be formed with two inductive circuits, i.e. external inductance circuit 310 and internal inductance circuit 360.External inductance circuit 310 comprises one group of last inductance line 315 and one group of following inductance line 325 that is formed on the bottom of being formed on the upper strata.Path line 320 interconnection of last inductance line 315 and following inductance line 325 by passing the material between upper strata and bottom.Equally, internal inductance circuit 360 also comprises one group of last inductance line 365 and one group of following inductance line 375 that is formed on the inner bottom that is formed on the inner upper strata.One group of corresponding internal path line 370 connects inner inductance line 365 and the following inductance line 375 gone up.According to used IC technology is three layers or four layers of technology, inner lower floor can with outside lower floor on same or different level.Fig. 3 B is the side sectional view of inside and outside inductive circuit 360 and 310, wherein utilizes three-layer technology that the lower floor of these two inductive circuits is overlapped on the same horizontal plane.Fig. 3 C also is the side sectional view of inside and outside inductive circuit 360 and 310, wherein utilizes four layers of technology that the lower floor of this two inductive circuit is positioned on two different horizontal planes.Fig. 3 D is the side profile of another preferred embodiment of the present invention, wherein utilizes the technology be disclosed in the present invention and use four layers of IC manufacturing technology, is formed with three inductive circuits, that is, and and external inductance circuit 310 and two internal inductance circuit 360 and 380.External inductance circuit 310 shown in Fig. 3 A-3C and internal inductance circuit 360 and 380 can be used to comprise and form voltage transformer, the antenna on the IC chip and different filter or the like various IC devices.
Fig. 4 A and 4B show another preferred embodiment of the present invention, wherein, utilizing the many path lines that pass the material between different level is 440-1,440-2 etc., the a plurality of inductance coils that are connected to form on the different level of IC chip are 410,420 and 430, constituting vertical inductance coil 400, thereby form inductive circuit 400.Shown in Fig. 4 A and 4B, each inductance coil on different level 410,420 and 430 can be the coil of difformity and structure promptly, should be used for producing the induced field that varies in size according to it.According to the size of using and require the inductance value that this circuit produces, decision with or form vertical inductance coil 400 without HMSM as inductor core.
Therefore, Fig. 4 A and 4B show another preferred embodiment of the present invention of making integrated circuit (IC) inductive circuit 400 on semiconductor chip.This IC inductive circuit 400 comprises a plurality of inductance coils, and promptly coil 410,420 and 430, and each all is formed on the horizontal plane that separates on the semiconductor chip.Inductive circuit 400 also comprises a plurality of path lines, line 440-1 and 440-2, and each all passes between two planes, to connect two inductance coils, so form combination IC inductance coil on semiconductor chip.Utilize IC technology, in semiconductor chip, make inductance coil 410,420,430 and Duo Gen path line 440-1, the 440-2 that is positioned on several horizontal planes.Inductive circuit 400 shown in Fig. 4 A and 4B is vertical inductance coils.Equally, shown in Fig. 4 C, also can form inductive circuit in the horizontal direction, wherein inductance coil promptly 410 ', 420 ', 430 ' is formed in several vertical planes.Each coil all is to pass several conductor wires that the path line of these vertical planes connects in the different vertical face by utilization to form.For example, connect horizontal conductor wire 410-H-1 and 410-H-2 with path line 410-V-2, connect horizontal conductor wire 410-H-2 and 410-H-3 with path line 410-V-1, connect horizontal conductor wire 410-H-1 and 410-H-4, can form vertical inductance coil 410 ' with path line 410-V-3.Then, utilize horizontal conductor wire 440-1 ' and 440-2 ', connect every vertical inductance coil 410 ', 420 ' and 430 ', form combined electrical inductive circuit 400 '.Different with vertical inductive circuit 400 of Fig. 4 B is, this combined horizontal inductive circuit 400 ' can extend on two directions more pliable and toughlyer, and is not subjected to the restriction of the problem that often runs in the multilayer IC treatment technology.
Therefore, the invention provides a kind of inductive circuit structure and manufacture method thereof on the IC chip, can overcome the problem in the prior art.Particularly, a kind of integrated inductor circuit and manufacture method thereof have been proposed, owing to can be reduced to the size of inductive circuit can compare with nearly 1 micron or following VLSI or ULSI live width now, so, can be integrated into the IC device to inductive circuit.Therefore, can inductive circuit be minimized with the IC manufacturing process, and can produce in batches,, can improve the quality of production of the electronic device that includes inductive circuit because utilized the IC manufacturing process.And, the present invention also provides a kind of IC structure and manufacture method thereof, inductive circuit is integrated in the IC device as the part of IC device, thereby, because IC the technology better design and the higher quality of production that are provided, can improve the electronic device that includes inductive circuit as performance index such as speed, control precision or other operating characteristic.
Although the invention has been described according to preferred embodiment, should be understood that these openly be not be used for limiting of the present invention.Undoubtedly, after having read above-mentioned disclosing, those skilled in the art can make various replacements and remodeling.Therefore, they are all in appended claims of the present invention illustrated spirit and scope.
Claims (23)
1. integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip comprises:
Inductive circuit with inductance line, the many path lines that photoetching forms that pass through of multilayer material are passed in utilization in described semiconductor chip, connect and to be positioned at that many conductor wires on the multilayer form described inductance line described in the described semiconductor chip, so in described semiconductor chip, form the integrated circuit inductance coil;
The described inductance line and the described many path lines that are positioned on the multilayer are produced on the described semiconductor chip with photoetching process, live width between wherein said inductance line and the described path line is positioned at sub-micrometer range substantially, thereby described integrated circuit inductive circuit can be integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with described a plurality of integrated circuits of described integrated circuit (IC)-components.
2. integrated circuit inductive circuit as claimed in claim 1 also comprises:
The inductor core that constitutes by high magnetosensitive sense material; And
Described integrated circuit inductance coil is positioned near the described inductor core, with conducting inductive current wherein, so that produce induced field in described inductor core.
3. integrated inductor circuit as claimed in claim 2 is characterized in that: be positioned at the inside that near the described integrated circuit inductance coil of described inductor iron core is positioned at described inductor iron core.
4. integrated inductor circuit as claimed in claim 2 is characterized in that: be positioned at the outside that near the described integrated circuit inductance coil of described inductor core is positioned at described inductor core.
5. integrated inductor circuit as claimed in claim 3 is characterized in that:
The described integrated circuit inductance coil that is positioned at described inductor core inside comprises that many following inductance lines on the intermediate layer lower surface that is positioned at described inductor core and many of being positioned on the upper surface of described intermediate layer go up the inductance lines; And
Described a plurality of path line also passes described intermediate layer, to connect described inductance line down and the described inductance line of going up, forms the described inductance line around described intermediate layer.
6. integrated inductor circuit as claimed in claim 5 is characterized in that: the described intermediate layer in the described inductor core that is centered on by described inductance line is high magnetosensitive sense material layer.
7. integrated inductor circuit as claimed in claim 5 is characterized in that: the described inductor core and the described intermediate layer that are centered on by described integrated circuit inductance coil all are made of non-conductive high magnetosensitive sense material.
8. the integrated inductor circuit stated of claim 6 is characterized in that:
The described inductor core and the described intermediate layer that are centered on by described integrated circuit inductance coil all are made of non-conductive high magnetosensitive sense material; And
All insulate with described integrated circuit inductance coil in described inductor core and described intermediate layer.
9. integrated inductor circuit as claimed in claim 4 is characterized in that:
The described integrated circuit inductance coil that is positioned at described inductor core outside comprises many following inductance lines on the lower surface that is positioned at the high magnetosensitive sense material layer that forms described inductor core and many of being positioned on the upper surface of described high magnetosensitive sense material layer go up the inductance lines; And
Described many path lines also pass described high magnetosensitive sense material layer, are used for connecting described down inductance line and the described inductance line of going up, forming described integrated circuit inductance coil, thereby around the described high magnetosensitive sense material layer that forms described inductor core.
10. integrated inductor circuit as claimed in claim 9 is characterized in that: by described integrated circuit inductance coil around described inductor core constitute by non-conductive high magnetosensitive sense material.
11. integrated inductor circuit as claimed in claim 9 is characterized in that:
By described integrated circuit inductance coil around described inductor core by the conduction high magnetosensitive sense material constitute; And
Described inductor core and the insulation of described integrated circuit inductance coil.
12. integrated inductor circuit as claimed in claim 11 is characterized in that: described inductor core also comprises the insulating barrier that is positioned on described upper surface and the described lower surface, is used to make described iron core and described inductance line down and the described inductance line of going up to insulate.
13. an integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip comprises:
Inductive circuit has the inductor core that is made of high magnetosensitive sense material;
Described inductive circuit has at least one the integrated circuit inductance coil that is positioned at described inductor core inside, is used for conducting inductive current wherein, to produce induced field in described inductor core;
Described integrated circuit inductance coil also comprises many following inductance lines on the lower surface in the intermediate layer that is positioned at described inductor core and many of being positioned on the upper surface in described intermediate layer go up the inductance lines;
Described integrated circuit inductance coil also comprises many path lines that form by photoetching, and this line passes described intermediate layer in order to connect described inductance line down and the described inductance line of going up, and forms the described inductance line around described intermediate layer;
With described inductor core, by described integrated circuit inductance coil around described inductor core in described intermediate layer and described integrated circuit inductance coil be arranged to prevent that electric current from transmitting in described inductor core and described intermediate layer; And
Described inductor core and described integrated circuit inductance coil are produced on the described integrated circuit (IC) chip by integrated circuit technology, the described inductance line and the described many path lines that are positioned on the multilayer are produced on the described semiconductor chip with photoetching process, live width between wherein said inductance line and the described path line is positioned at sub-micrometer range substantially, thereby described integrated circuit inductive circuit can be integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with described a plurality of integrated circuits of described integrated circuit (IC)-components.
14. an integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip comprises:
Inductive circuit has the inductor core that is made of high magnetosensitive sense material;
Described inductive circuit has at least one the integrated circuit inductance coil that is positioned at described inductor core outside, is used for conducting inductive current wherein, to produce induced field in described inductor core;
Described integrated circuit inductance coil also comprises many following inductance lines on the lower surface that is positioned at the high magnetosensitive sense material layer that forms described inductor core and many of being positioned on the upper surface of described high magnetosensitive sense material layer go up the inductance lines;
Described integrated circuit inductance coil also comprises many path lines that form by photoetching, this line passes described high magnetosensitive sense material layer in order to connecting described down inductance line and the described inductance line of going up, thereby forms the described integrated circuit inductance coil around the described high magnetosensitive sense material layer that forms described inductor iron core;
Will by described integrated circuit inductance coil around described inductor core and described integrated circuit inductance coil be arranged to prevent that electric current from transmitting in described inductor core; And
Described inductor core and described integrated circuit inductance coil are produced on the described integrated circuit (IC) chip by integrated circuit technology, the described inductance line and the described many path lines that are positioned on the multilayer are produced on the described semiconductor chip with photoetching process, live width between wherein said inductance line and the described path line is positioned at sub-micrometer range substantially, thereby described integrated circuit inductive circuit can be integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with described a plurality of integrated circuits of described integrated circuit (IC)-components.
15. integrated inductor circuit as claimed in claim 14 is characterized in that:
Described inductor core also comprises the high magnetosensitive sense material of conduction, and comprises the insulating barrier that is positioned on described upper surface and the described lower surface, is used to make described iron core and described inductance line down and the described inductance line of going up to insulate.
16. integrated circuit (IC)-components as claimed in claim 1 also comprises:
Be positioned on the described semiconductor chip and the internal circuit and the bonding welding pad that are connected with described inductance coil, be not subjected to the infringement of static discharge or electrical over-stress in order to protect described inductive circuit and described a plurality of integrated circuit.
17. an integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip comprises:
Inductive circuit with a plurality of inductance coils, each described inductance coil all is formed on the horizontal plane that separates in the described semiconductor chip;
Described inductive circuit has many path lines that form by photoetching, and every path line all passes between the described horizontal plane, is used to connect two described inductance coils, so form the integrated circuit inductance coil of combination in described semiconductor chip; And
The described inductance coil and the described many through hole lines that are arranged on each horizontal plane are produced on described semiconductor chip with photoetching process, live width between wherein said inductance coil and the described path line is positioned at sub-micrometer range substantially, thereby described inductive circuit can be integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with described a plurality of integrated circuits of described integrated circuit (IC)-components.
18. on semiconductor chip, make the method for integrated inductor circuit with integrated circuit fabrication process for one kind, comprise the following steps:
(a) use photoetching process many following conductor wires of composition on described substrate, the live width of described conductor wire down is substantially in sub-micrometer range;
(b) form the dielectric layer that covers described many following conductor wires;
(c) use photoetching process conductor wire on many of described dielectric layer patterned on top, the described live width of conductor wire that goes up is substantially in described sub-micrometer range; And
(d) the application photoetching process is passed described dielectric layer and is formed the interior a plurality of paths of described sub-micrometer range, fill described path with conductive connecting device, in order to connect every described conductor wire and the corresponding conductor wire down gone up, thereby form continuous inductive circuit, make it around described dielectric layer, wherein the size of described continuous inductive circuit is manufactured and be suitable on described semiconductor chip, being integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with a plurality of integrated circuits.
19. the method for manufacturing integrated inductor circuit as claimed in claim 18 is characterized in that:
The described step (b) that forms dielectric layer comprises the following steps:
(b1) dielectric layer under forming on the top of described many following conductor wires;
(b2) on the top of described dielectric layer down, form high magnetosensitive sense material layer;
(b3) on the top of described high magnetosensitive sense material layer, form dielectric layer, thereby make described inductive circuit around with the high magnetosensitive sense material layer that contained described dielectric layer as iron core.
20. on semiconductor chip, make the method for integrated inductor circuit with integrated circuit fabrication process for one kind, comprise the following steps:
(a) on the top of described substrate, form high magnetosensitive sense material layer down with non-conductive high magnetosensitive sense material;
(b) use photoetching process many following conductor wires of composition on described high magnetosensitive sense material layer down, the live width of described conductor wire down is substantially in sub-micrometer range;
(c) form the dielectric layer that covers described many following conductor wires;
(d) use photoetching process conductor wire on many of described dielectric layer patterned on top, the described live width of conductor wire that goes up is substantially in described sub-micrometer range; And
(e) the application photoetching process is passed described dielectric layer and is formed the interior a plurality of paths of described sub-micrometer range, fill described path with conductive connecting device, in order to connect every described conductor wire and the corresponding conductor wire down gone up, thereby form continuous inductive circuit, make it around described dielectric layer, wherein the size of described continuous inductive circuit is manufactured and be suitable on described semiconductor chip, being integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration with a plurality of integrated circuits; And
(f) form high magnetosensitive sense material layer on the top with non-conductive high magnetosensitive sense material conductor wire on described, thus make described inductive circuit by described high magnetosensitive sense material layer down and described high magnetosensitive sense material layer around.
21. an integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip comprises:
Has external inductor coil circuit inductance circuit, described external inductor coil circuit have many outer subordinate's conductor wires forming in the lower floor externally and many outsides externally forming on the upper strata on conductor wire, wherein formed outer subordinate's conductor wire and the outside live width of conductor wire that goes up are substantially in sub-micrometer range;
Described inductive circuit has the internal inductance coil circuit, described internal inductance coil circuit have many that form in the inner lower floor interior subordinate's conductor wires and on many inside that form on the inner upper strata conductor wire, wherein formed in subordinate's conductor wire and the inner live width of conductor wire that goes up substantially in described sub-micrometer range;
The described inner lower floor that described inductive circuit has is identical with described outside lower floor;
Described inductive circuit has first dielectric layer that forms on the top of described inner lower floor, described first dielectric layer covers described outer subordinate's conductor wire and described interior subordinate's conductor wire and supports conductor wire on the described inside thereon;
Described inductive circuit has second dielectric layer that forms on the top of described first dielectric layer, described second dielectric layer covers on the described inside conductor wire and supports conductor wire on the described outside thereon; And
Described inductive circuit has by photoetching and is formed on a plurality of external paths and internal path in the sub-micrometer range roughly, described external path and internal path are passed described first dielectric layer and second dielectric layer, be used for conductor wire on the described outside is connected so that form external inductor coil with described outer subordinate's conductor wire, and be used for conductor wire on the described inside is connected so that form the internal inductance coil with described interior subordinate's conductor wire, wherein said internal inductance coil is formed the described a plurality of integrated circuits that are fit to described integrated circuit (IC)-components by described external inductor coil around, the size of wherein said internal inductance coil and described external inductor coil and is integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration.
22. an integrated circuit (IC)-components that is integrated with a plurality of integrated circuits on semiconductor chip comprises:
Has external inductor coil circuit inductance circuit, described external inductor coil circuit have many outer subordinate's conductor wires forming in the lower floor externally and many outsides externally forming on the upper strata on conductor wire, wherein formed outer subordinate's conductor wire and the outside live width of conductor wire that goes up are substantially in sub-micrometer range;
Described inductive circuit has the internal inductance coil circuit, described internal inductance coil circuit have many that form in the inner lower floor interior subordinate's conductor wires and on many inside that form on the inner upper strata conductor wire, wherein formed in subordinate's conductor wire and the inner live width of conductor wire that goes up substantially in sub-micrometer range;
Described inductive circuit has first dielectric layer that forms on the top of described outside lower floor, described first dielectric layer covers described outer subordinate's conductor wire and supports described outer subordinate's conductor wire thereon;
Described inductive circuit has second dielectric layer that forms on the top of described first dielectric layer, described second dielectric layer covers described interior subordinate's conductor wire and supports conductor wire on the described inside thereon;
Described inductive circuit has the 3rd dielectric layer that forms on the top of described second dielectric layer, described the 3rd dielectric layer covers on the described inside conductor wire and supports conductor wire on the described outside thereon; And
Described inductive circuit has by photoetching and is formed on a plurality of external paths and internal path in the sub-micrometer range roughly, described external path and internal path are passed described first dielectric layer, second dielectric layer and the 3rd dielectric layer, be used for conductor wire on the described outside is connected so that form external inductor coil with described outer subordinate's conductor wire, and be used for conductor wire on the described inside is connected so that form the internal inductance coil with described interior subordinate's conductor wire, wherein said internal inductance coil is formed the described a plurality of integrated circuits that are fit to described integrated circuit (IC)-components by described external inductor coil around, the size of wherein said internal inductance coil and described external inductor coil and is integrated into very lagre scale integrated circuit (VLSIC) and very large scale integration.
23. integrated circuit (IC)-components as claimed in claim 22 is characterized in that:
Described inductive circuit also comprises and near the parallel a plurality of additional internal inductance coil that is formed at the described internal inductance coil of described internal inductance coil, wherein said additional internal inductance coil and described internal inductance coil quilt described external inductor coil wherein around.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB96121645XA CN1166014C (en) | 1996-11-15 | 1996-11-15 | Structure and fabrication process of inductors on semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB96121645XA CN1166014C (en) | 1996-11-15 | 1996-11-15 | Structure and fabrication process of inductors on semiconductor chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1182964A CN1182964A (en) | 1998-05-27 |
| CN1166014C true CN1166014C (en) | 2004-09-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB96121645XA Expired - Fee Related CN1166014C (en) | 1996-11-15 | 1996-11-15 | Structure and fabrication process of inductors on semiconductor chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1166014C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101336477B (en) * | 2006-03-06 | 2010-11-17 | 英特尔公司 | Chip stage integrated radio frequency passive device, manufacturing method thereof and system comprising the same |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1542261B1 (en) * | 2003-12-10 | 2007-03-28 | Freescale Semiconductor, Inc. | Method of producing an element comprising an electrical conductor encircled by magnetic material |
| US7158005B2 (en) * | 2005-02-10 | 2007-01-02 | Harris Corporation | Embedded toroidal inductor |
| CN103516060B (en) * | 2013-09-25 | 2015-10-28 | 北京交通大学 | The flexibility being applicable to magnetic resonance energy coupling receives integrated three-dimensional MEMS harmonic oscillator more |
| CN104780719A (en) * | 2015-04-27 | 2015-07-15 | 博敏电子股份有限公司 | Method for embedding inductors in printed-circuit board and printed-circuit board adopted by method |
-
1996
- 1996-11-15 CN CNB96121645XA patent/CN1166014C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101336477B (en) * | 2006-03-06 | 2010-11-17 | 英特尔公司 | Chip stage integrated radio frequency passive device, manufacturing method thereof and system comprising the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1182964A (en) | 1998-05-27 |
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