CN116581178A - Axial nano-column array heterojunction photoelectric detector chip and preparation thereof - Google Patents

Axial nano-column array heterojunction photoelectric detector chip and preparation thereof Download PDF

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Publication number
CN116581178A
CN116581178A CN202310227346.4A CN202310227346A CN116581178A CN 116581178 A CN116581178 A CN 116581178A CN 202310227346 A CN202310227346 A CN 202310227346A CN 116581178 A CN116581178 A CN 116581178A
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nano
axial
ingan
substrate
inn
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李国强
柴吉星
王文樑
陈亮
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South China University of Technology SCUT
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South China University of Technology SCUT
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L31/03046—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
    • H01L31/03048—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP comprising a nitride compounds, e.g. InGaN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
    • H01L31/1848—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P comprising nitride compounds, e.g. InGaN, InGaAlN
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses an axial nano-pillar array heterojunction photoelectric detector chip and a preparation method thereof; the photoelectric detector chip comprises a bottom electrode, a substrate and In which are sequentially stacked and arranged and positioned on the back surface of the substrate x Ga 1‑x An N nano-pillar, an InN nano-pillar, and a top electrode; wherein x is more than or equal to 0 and less than 1. The photoelectric detector chip is an axial nano-column array heterojunction detector, wherein the axial nano-column array heterojunction structure can shorten the carrier transit distance and improve the response speed of the detector compared with a film transverse structure, a nano-column core-shell structure and the like.

Description

Axial nano-column array heterojunction photoelectric detector chip and preparation thereof
Technical Field
The invention relates to the technical field of photoelectric detectors, in particular to an axial nano-column array heterojunction photoelectric detector chip and preparation thereof.
Background
The photoelectric detector is used as a core component of a photoelectric conversion system and has wide application in the fields of optical communication, rapid imaging, missile tracking early warning and the like. Modern complex application scenarios present significant challenges to communication rate and reliability, which require the ability of photodetectors to respond quickly and to detect wavelength selectively.
III A -V A Group compound semiconductor In x Ga 1-x The N material can be matched with the working wavelength of a light source due to the characteristic of adjustable band gap (0.7-3.4 eV), can receive light signals to the greatest extent, effectively reduces noise and improves the reliability of a photoelectric conversion system. Heterojunction photodetectors based on InGaN, in particular and with ultra-high carrier mobility (4400 cm 2 V -1 s -1 ) The built-in electric field of the InN/InGaN heterojunction formed by InN can promote carrier rapid separation and transportation, and rapid photoelectric detection is realized.
The photodetector band alignment requires a wide bandgap semiconductor on top of a narrow bandgap semiconductor, but InGaN growth temperature is much higher than InN decomposition temperature and InN and InGaN lattice mismatch is large, which makes InN/InGaN heterojunction detectors difficult to implement.
Although research reports that InN nano-pillars grow on InGaN films to realize InN/InGaN mixed heterojunction detectors through growth, the InN growth of the structure depends on In component segregation of the InGaN films, so that the deviation of the working wave bands of the detectors is large, and the reliability of a photoelectric conversion system is reduced.
Disclosure of Invention
The invention aims to overcome the defects and shortcomings of the prior art and provide an axial nano-pillar array heterojunction photoelectric detector chip and a preparation method thereof.
The invention is realized by the following technical scheme:
an axial nanopillar array heterojunction photodetector chip comprising:
bottom electrode, substrate and In which are sequentially stacked and arranged and positioned on back surface of substrate x Ga 1-x An N nano-pillar layer, an InN nano-pillar layer and a top electrode; wherein x is more than or equal to 0 and less than 1.
The substrate is a low-resistance Si substrate with the thickness of 300-450 mu m.
In x Ga 1-x The heights of the N nano-pillar layer and the InN nano-pillar layer are respectively 100-200 nm.
The InN nano-pillar layer is obtained by directly growing or etching after growing an InGaN film;
the InGaN thin film is an InGaN/GaN quantum well.
The preparation method of the axial nano-pillar array heterojunction photoelectric detector chip comprises the following steps:
sequentially growing InGaN nano-pillars on the low-resistance Si substrate at high temperature, and growing InN nano-pillars on the tops of the InGaN nano-pillars at low temperature;
a bottom electrode is arranged on the back surface of the low-resistance Si substrate;
and arranging a top electrode on the surface of the InN nano-pillar layer to obtain the photoelectric detector chip.
Wherein the bottom electrode is Au metal with the thickness of 100-150 nm; the top electrode is Ti/Au, and the thickness is 100-150 nm.
The bottom electrode is prepared by adopting an electron beam evaporation system; and carrying out spin coating photoresist, exposure and development on the InN nano-pillar layer, and then preparing a top electrode by using an electron beam evaporation system.
The photoelectric detector chip prepared by the invention can be applied to visible light communication.
The method for sequentially growing the bottom InGaN nano-pillar layer on the substrate can comprise the steps of Metal Organic Chemical Vapor Deposition (MOCVD), pulse Laser Deposition (PLD) and Molecular Beam Epitaxy (MBE) which are directly grown or obtained by plasma etching (ICP) after growing a film.
The InN nano-pillar layer is grown on the top of the InGaN nano-pillar, and the method for growing the InN nano-pillar can also comprise Metal Organic Chemical Vapor Deposition (MOCVD), pulse Laser Deposition (PLD) and Molecular Beam Epitaxy (MBE).
The substrate is at least one of low-resistance silicon, low-resistance silicon carbide and Cu substrate, and the thickness is 300-450 mu m.
Compared with the prior art, the invention has the following advantages and effects:
the photoelectric detector chip is realized based on the axial InN/InGaN nano-pillar array heterojunction, so that on one hand, the limitation of the band gap of the photoelectric detector on the arrangement sequence of photoelectric materials can be broken, and on the other hand, the preparation of the high-speed and high-reliability detector can be realized.
Drawings
Fig. 1 is a schematic structural diagram of the photodetector chip described in embodiment 1.
Fig. 2 is a flow chart showing the process of epitaxial growth of the photodetector chip described in example 1.
Fig. 3 is a flow chart showing the process of epitaxial growth of the photodetector chip described in example 2.
FIG. 4 is an SEM image of an axial InN/InGaN heterojunction as described in example 1.
Fig. 5 is a response curve of the photodetector chip described in example 1.
Fig. 6 is a time response curve of the photodetector chip described in example 1.
In fig. 1: a bottom electrode 101, a substrate 102, a bottom InGaN nanopillar layer 103, a top InN nanopillar layer 104, a top electrode 105.
Detailed Description
The present invention will be described in further detail with reference to specific examples.
Example 1
In the embodiment 1, the underlayer InGaN nanopillar layer is directly grown;
the embodiment provides a photoelectric detector chip, which sequentially comprises a substrate, a bottom InGaN nano-pillar layer and a top InN nano-pillar layer from bottom to top in the epitaxial generation process. The growth process is shown in fig. 2, and is specifically as follows:
MOCVD growth was carried out on a 300 μm thick substrate using trimethylgallium (Ga (CH) 3 ) 3 TMGa), trimethylindium (In (CH) 3 ) 3 TMIn); sequentially growing an InGaN nano-pillar layer with the height of 100nm at a high temperature and an InN nano-pillar layer with the height of 100nm at a low temperature at the top end of the InGaN nano-pillar;
the device structure of the photoelectric detector chip is shown in fig. 1, and comprises a bottom electrode, a substrate, a bottom InGaN nano-pillar layer, a top InN nano-pillar layer and a top electrode from bottom to top in sequence, wherein the specific preparation process is as follows:
(1) Preparing a bottom electrode on the back of the substrate by using an electron beam evaporation system, wherein the electrode material is Au metal, and the thickness is 100nm;
(2) Spin coating photoresist, exposure and development are carried out on the surface of the InN layer again, then an electron beam evaporation system is used for preparing a top electrode, the electrode composition is Ti/Au in sequence, and the thickness is 20/80nm respectively; annealing the prepared electrode by using a rapid annealing furnace, wherein the annealing temperature is 800 ℃ and the annealing time is 30s; and obtaining the photoelectric detector chip.
Example 2
In the embodiment 2, the bottom InGaN nano-pillar layer is obtained by ICP etching after a growth film;
the embodiment provides a photoelectric detector chip, which sequentially comprises a substrate, a bottom InGaN nano-pillar layer and a top InN nano-pillar layer from bottom to top in the epitaxial generation process. The growth process is shown in fig. 3, and is specifically as follows:
MOCVD growth was carried out on a 300 μm thick substrate using trimethylgallium (Ga (CH) 3 ) 3 TMGa), trimethylindium (In (CH) 3 ) 3 TMIn); sequentially growing an InGaN film with the thickness of 100nm at high temperature, etching the InGaN film into nano-pillars by an ICP etching technology, and growing an InN nano-pillar layer with the height of 100nm at low temperature at the top ends of the InGaN nano-pillars;
the device structure of the photoelectric detector chip is shown in fig. 1, and comprises a bottom electrode, a substrate, a bottom InGaN nano-pillar layer, a top InN nano-pillar layer and a top electrode from bottom to top in sequence, wherein the specific preparation process is as follows:
(1) Preparing a bottom electrode on the back of the substrate by using an electron beam evaporation system, wherein the electrode material is Au metal, and the thickness is 150nm;
(2) Spin coating photoresist, exposure and development are carried out on the surface of the InN layer again, then an electron beam evaporation system is used for preparing a top electrode, the electrode composition is Ti/Au in sequence, and the thickness is 20/100nm respectively; annealing the prepared electrode by using a rapid annealing furnace, wherein the annealing temperature is 800 ℃ and the annealing time is 30s; and obtaining the photoelectric detector chip.
Example 3
In example 3, the underlayer InGaN nanopillar layer is directly grown;
the embodiment provides a photoelectric detector chip, which sequentially comprises a substrate, a bottom InGaN nano-pillar layer and a top InN nano-pillar layer from bottom to top in the epitaxial generation process. The growth process is shown in fig. 2, and is specifically as follows:
the method comprises the steps of growing on a substrate with the thickness of 300 mu m by adopting an MBE method, wherein the growth raw materials comprise high-purity indium (In, 99.99999 percent) and high-purity gallium (Ga, 99.99999 percent); sequentially growing InGaN nano-pillars with the thickness of 100nm at high temperature, and growing InN nano-pillar layers with the height of 100nm at low temperature at the top ends of the InGaN nano-pillars;
the device structure of the photoelectric detector chip is shown in fig. 1, and comprises a bottom electrode, a substrate, a bottom InGaN nano-pillar layer, a top InN nano-pillar layer and a top electrode from bottom to top in sequence, wherein the specific preparation process is as follows:
(1) Preparing a bottom electrode on the back of the substrate by using an electron beam evaporation system, wherein the electrode material is Au metal, and the thickness is 200nm;
(2) Spin coating photoresist, exposure and development are carried out on the surface of the InN layer again, then an electron beam evaporation system is used for preparing a top electrode, the electrode composition is Ti/Au in sequence, and the thickness is 50/100nm respectively; annealing the prepared electrode by using a rapid annealing furnace, wherein the annealing temperature is 800 ℃ and the annealing time is 30s; and obtaining the photoelectric detector chip.
Example 4
In example 4, the underlayer InGaN nanopillar layer is directly grown;
the embodiment provides a photoelectric detector chip, which sequentially comprises a substrate, a bottom InGaN nano-pillar layer and a top InN nano-pillar layer from bottom to top in the epitaxial generation process. The growth process is shown in fig. 2, and is specifically as follows:
growing on a substrate with the thickness of 300 mu m by adopting a PLD method, wherein the growth raw materials comprise high-purity indium (In, 99.99999 percent) and high-purity gallium (Ga, 99.99999 percent); sequentially growing InGaN nano-pillars with the thickness of 200nm at high temperature, and growing InN nano-pillar layers with the height of 200nm at low temperature at the top ends of the InGaN nano-pillars;
the device structure of the photoelectric detector chip is shown in fig. 1, and comprises a bottom electrode, a substrate, a bottom InGaN nano-pillar layer, a top InN nano-pillar layer and a top electrode from bottom to top in sequence, wherein the specific preparation process is as follows:
(1) Preparing a bottom electrode on the back of the substrate by using an electron beam evaporation system, wherein the electrode material is Au metal, and the thickness is 150nm;
(2) Spin coating photoresist, exposure and development are carried out on the surface of the InN layer again, then an electron beam evaporation system is used for preparing a top electrode, the electrode composition is Ti/Au in sequence, and the thickness is 100/100nm respectively; annealing the prepared electrode by using a rapid annealing furnace, wherein the annealing temperature is 800 ℃ and the annealing time is 30s; and obtaining the photoelectric detector chip.
Performance test:
fig. 4 is an SEM image of the axial heterojunction of the photodetector chip described in example 3. It is clearly observed that InN nanopillars are grown on top of InGaN nanopillars.
Fig. 5 is a photo-response curve of the photodetector chip described in example 3. Wherein, under the condition of forward bias voltage of 1V, the device response is 9.27A/W.
Fig. 6 is a time response curve of the photodetector chip described in example 3. Wherein, under the condition of forward bias voltage 1V, the rising/falling time of the device is 18.2/24.7 mu s respectively.
As described above, the present invention can be preferably realized.
The embodiments of the present invention are not limited to the above examples, and any other changes, modifications, substitutions, combinations, and simplifications that do not depart from the spirit and principles of the invention should be made and equivalents should be construed as falling within the scope of the invention.

Claims (9)

1. An axial nanopillar array heterojunction photodetector chip, characterized by comprising:
comprising sequentially stacked arrangementBottom electrode on back of substrate, in x Ga 1-x An N nano-pillar layer, an InN nano-pillar layer and a top electrode; wherein x is more than or equal to 0 and less than 1.
2. The axial nanopillar array heterojunction photodetector chip of claim 1, wherein: the substrate is a low-resistance Si substrate with the thickness of 300-450 mu m.
3. The axial nanopillar array heterojunction photodetector chip of claim 2, wherein: in (In) x Ga 1-x The heights of the N nano-pillar layer and the InN nano-pillar layer are respectively 100-200 nm.
4. The axial nanopillar array heterojunction photodetector chip of claim 3, wherein: the InN nano-pillar layer is obtained by directly growing or etching after growing an InGaN film;
the InGaN thin film is an InGaN/GaN quantum well.
5. A method of fabricating an axial nanopillar array heterojunction photodetector chip as defined in any one of claims 1-4, comprising the steps of:
sequentially growing InGaN nano-pillars on the low-resistance Si substrate at high temperature, and growing InN nano-pillars on the tops of the InGaN nano-pillars at low temperature;
a bottom electrode is arranged on the back surface of the low-resistance Si substrate;
and arranging a top electrode on the surface of the InN nano-pillar layer to obtain the photoelectric detector chip.
6. The method for manufacturing an axial nanopillar array heterojunction photodetector chip of claim 5, wherein: the bottom electrode is Au metal with the thickness of 100-150 nm.
7. The method for manufacturing an axial nanopillar array heterojunction photodetector chip of claim 5, wherein: the top electrode is Ti/Au, and the thickness is 100-150 nm.
8. The method for manufacturing the axial nano-pillar array heterojunction photoelectric detector chip according to claim 6, wherein the method comprises the following steps: the bottom electrode is prepared by adopting an electron beam evaporation system; and carrying out spin coating photoresist, exposure and development on the InN nano-pillar layer, and then preparing a top electrode by using an electron beam evaporation system.
9. The method of claim 8, wherein the resulting photodetector chip is used in visible light communications.
CN202310227346.4A 2023-03-10 2023-03-10 Axial nano-column array heterojunction photoelectric detector chip and preparation thereof Pending CN116581178A (en)

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