CN116580751B - Read-write voltage automatic calibration method and system suitable for PIM system - Google Patents
Read-write voltage automatic calibration method and system suitable for PIM system Download PDFInfo
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- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
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- G—PHYSICS
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- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
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Abstract
The invention discloses an automatic calibration method and system of read-write voltage suitable for PIM system, the method includes the steps: s1, storing a voltage correction reference value in a nonvolatile storage area in a storage array, and starting a PIM system; s2, using a set of judgment logic to read and write voltage and voltage correction reference values of the PIM system to determine whether to start the PIM data calibration system; s3, determining the changing direction of the read-write voltage of the PIM system according to the judging condition of the step S2, and calibrating the read-write voltage parameters to change the read-write voltage of the PIM system; s4, writing the calibrated read-write voltage parameters into the nonvolatile storage area on the chip, and simultaneously starting to prepare to read data stored in other storage areas. The method is based on the SONOS memory, the calibration process is set to be started automatically without manual operation of a user, the voltage calibration circuit is simple, the occupied area is extremely small, and the user experience can be greatly improved.
Description
Technical Field
The invention relates to the technical field of PIM systems, in particular to an automatic read-write voltage calibration method and system suitable for a PIM system.
Background
PIM (Process in Memory) is also called in-memory computing (Computing in Memory), which refers to the process of completing the computation in memory directly without fetching the data in memory.
The storage system of the PIM system may be built from a SONOS (Silicon-Oxide-Nitride-Silicon) array. Compared with the traditional nonvolatile Memory (Non-Volatile Memory), SONOS has the advantages of high speed, low power consumption and long service life. SONOS mainly uses floating gate transistors as memory cells to form a memory array. It changes its threshold voltage by storing or releasing charge through the silicon nitride layer in SONOS, distinguishing whether the data stored therein is a "0" or a "1". In one of the operating states, the Gate (Gate) of the SONOS device needs to be high, and electrons passing between the Drain (Drain) and the Source (Source) are attracted to tunnel into the silicon nitride layer, storing charge in the silicon nitride layer. In the usage scenario of the present invention, the PIM system needs to take several SONOS memory devices in the bit line as units, read out the data stored by several SONOS memory devices (these several memory devices are used as a memory block) at a time and transfer it into the subsequent analog circuit, and the sum of the current of each branch is used as the operation result of the PIM system. When the data stored in the SONOS memory device is "0", the read output current is low current ILOW, and when the data stored in the SONOS memory device is "1", the read output current is low current IHIGH. The current read out by each memory block is aILOW and baihigh, wherein a and b are integers, the sum of a and b is the number of the calculation units, and the sum of the output currents aILOW and baihigh is the calculation result at the moment. To ensure accuracy of the calculation results, it is necessary to ensure that the current results of various combinations of a and ILOW, b and IHIGH are all unique. However, in this process, electrons frequently pass through the oxide layer between the silicon nitride layer and the conductive channel, which may cause oxide layer defects of different degrees, and the threshold voltage of the SONOS device may be changed accordingly, and then the original read-write voltage may be used to make errors, thereby affecting the reliability of the PIM system.
Chinese invention patent application No. 202010831332. X: the technical scheme adopted by the read reference current automatic regulating circuit of the nonvolatile memory is as follows: when an external enabling signal is received, the central value of the digital regulating signal of the read reference current is used as a current regulating value to be sent to the digital-to-analog conversion module, meanwhile, the read checking control module is driven to initiate read operation on the memory, the memory is controlled to be switched to the grid voltage of the storage unit row by row to be the bias grid voltage, row read operation is carried out, the comparison result of the read value of the storage unit of the read result processing module and the expected value is received, the read checking control module determines whether the read check is passed or not according to the comparison result, and the read reference current control module adjusts the read reference current through the digital-to-analog conversion module according to whether the read check is passed or not. The technical scheme aims to provide the read reference current automatic regulating circuit of the nonvolatile memory, which can adaptively regulate the internal read reference current according to the process threshold value electricity and the voltage deviation in the test. The read-write voltage automatic calibration method and system suitable for the PIM system are different from the technical scheme provided by the read-reference current automatic regulation circuit of the nonvolatile memory because the reliability of a storage device is improved by calibrating the read-write voltage of the PIM system.
Disclosure of Invention
Aiming at the problems that in the prior art, electrons frequently penetrate through an oxide layer between a silicon nitride layer and a conducting channel to cause oxide layer defects of different degrees in the process of reading and writing data of a storage device, so that the threshold voltage of a SONOS device is changed to influence the reliability of a PIM system, the invention provides a read-write voltage automatic calibration method and a read-write voltage automatic calibration system suitable for the PIM system, and the technical scheme adopted by the invention is as follows:
the invention provides a read-write voltage automatic calibration method suitable for a PIM system, which comprises the following steps:
s1, storing a voltage correction reference value in a nonvolatile storage area in a storage array, and starting a PIM system;
s2, using a set of judgment logic to read and write voltage and voltage correction reference values of the PIM system to determine whether to start the PIM data calibration system;
s3, determining the changing direction of the read-write voltage of the PIM system according to the judging condition of the step S2, and calibrating the read-write voltage parameters to change the read-write voltage of the PIM system;
s4, writing the calibrated read-write voltage parameters into the nonvolatile storage area on the chip, and simultaneously starting to prepare to read data stored in other storage areas.
Compared with the prior art, the method of the invention solves the problem that the reliability of the PIM system with the intelligent acceleration function is reduced due to the change of the read-write voltage in the prior art by calibrating the read-write voltage of the PIM system. The method is based on the SONOS memory, the calibration process is set to be started automatically without manual operation of a user, the voltage calibration circuit is simple, the occupied area is extremely small, and the user experience can be greatly improved.
As a preferred solution, in the step S1, the memory array includes a SONOS device, and the nonvolatile memory area of the memory array includes a voltage correction flag area and a voltage correction memory area.
As a preferred solution, the voltage correction memory area has a readable and writable function, and the voltage correction memory area is used for storing calibrated read-write voltage parameters.
In a preferred embodiment, in the step S1, the voltage correction flag field stores the voltage correction reference value, and the PIM system is started with the intermediate voltage data.
As a preferable scheme, the selecting method of the voltage correction reference value comprises the following steps: and randomly selecting one group of data with half of high level and low level as one group of voltage correction reference values, and taking the data as the other group of voltage correction reference values after inverting the data according to the bits.
As a preferred solution, the judging logic in the step S2 specifically includes the following steps:
s21, reading two groups of voltage correction reference values stored in a voltage correction marking area in a nonvolatile storage area, respectively marking the two groups of voltage correction reference values as X1 and X2, and performing first logic operation on the X1 and the X2 to obtain reference operation results L1 and L2; the read-write voltage of the PIM system is respectively marked as X '1 and X'2, and the X '1 and the X'2 are subjected to second logic operation to obtain actual operation results L '1 and L'2;
s22, comparing L1 and L2 with L '1 and L'2, and starting the PIM data calibration system when L '1 is not equal to L1 and L'2 is not equal to L2.
As a preferred embodiment, the expression of the first logic operation is: l1= & (x1≡x2), l2= | (X1 & X2); the expression of the second logic operation is: l '1 = & (X' 1X '2), L'2 = | (X '1& X' 2).
As a preferable solution, in the step S3, if L'1 is at a high level, which indicates that the current PIM system read-write voltage is larger, the read-write voltage parameter needs to be reduced to reduce the PIM system read-write voltage; if L'2 is high, indicating that the read-write voltage of the current PIM system is smaller, the read-write voltage parameter needs to be increased to increase the read-write voltage of the PIM system; the steps S2 to S3 are repeated until L '1 changes from high level to low level or L'2 changes from high level to low level.
The second aspect of the invention also provides a read-write voltage automatic calibration system suitable for the PIM system, which comprises a system initialization module, a logic judgment module, a read-write voltage parameter calibration module and a calibration voltage parameter storage module which are connected in sequence;
the system initialization module is used for storing the voltage correction reference value in a nonvolatile storage area in a storage array and starting a PIM system;
the logic judgment module is used for using a set of judgment logic for the read-write voltage and the voltage correction reference value of the PIM system to determine whether to start the PIM data calibration system;
the read-write voltage parameter calibration module is used for calibrating the read-write voltage parameters so as to change the read-write voltage of the PIM system;
the calibrated voltage parameter storage module is used for writing the calibrated read-write voltage parameters into the nonvolatile storage area on the chip.
The third aspect of the present invention also provides a storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of a read-write voltage auto-calibration method as described above for a PIM system.
The invention has the beneficial effects that:
the method of the invention aims to solve the problem of the prior art that the reliability of the PIM system with intelligent acceleration function is reduced after the read-write voltage is changed by calibrating the read-write voltage of the PIM system. The method is based on the SONOS memory, the calibration process is set to be started automatically without manual operation of a user, the voltage calibration circuit is simple, the occupied area is extremely small, and the user experience can be greatly improved.
Drawings
FIG. 1 is a flow chart of a method for calibrating read-write voltage automatically, which is suitable for a PIM system and provided by an embodiment of the invention;
FIG. 2 is a schematic diagram of a read-write voltage adjusting circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a SONOS memory array according to an embodiment of the present invention;
fig. 4 is a block diagram of an automatic calibration system for read-write voltage applicable to a PIM system according to an embodiment of the present invention.
Detailed Description
The drawings are for illustrative purposes only and are not to be construed as limiting the present patent;
it should be understood that the described embodiments are merely some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the embodiments of the present application, are within the scope of the embodiments of the present application.
The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims. In the description of this application, it should be understood that the terms "first," "second," "third," and the like are used merely to distinguish between similar objects and are not necessarily used to describe a particular order or sequence, nor should they be construed to indicate or imply relative importance. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
Furthermore, in the description of the present application, unless otherwise indicated, "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship. The invention is further illustrated in the following figures and examples.
The invention is further illustrated in the following figures and examples.
Example 1
Referring to fig. 1 to 3, a method for automatically calibrating a read-write voltage applicable to a PIM system includes the following steps:
s1, storing the voltage correction reference value in a nonvolatile storage area in a storage array, and starting the PIM system.
In a specific embodiment, in the step S1, the memory array includes a SONOS device, and the memory array nonvolatile memory area includes a voltage correction flag area and a voltage correction memory area.
The voltage correction storage area has a readable and writable function, and is used for storing calibrated read-write voltage parameters.
In a specific embodiment, in said step S1, said voltage correction flag field stores said voltage correction reference value and starts the PIM system with intermediate voltage data.
In a specific embodiment, the voltage correction flag field stores the voltage correction reference value.
In a specific embodiment, the voltage correction reference value selecting method includes: and randomly selecting one group of data with half of high level and low level as one group of voltage correction reference values, and taking the data as the other group of voltage correction reference values after inverting the data according to the bits.
S2, a set of judgment logic is used for reading and writing voltage and voltage correction reference values of the PIM system to determine whether to start the PIM data calibration system.
In a specific embodiment, the determining logic in step S2 specifically includes the following steps:
s21, reading two groups of voltage correction reference values stored in a voltage correction marking area in a nonvolatile storage area, respectively marking the two groups of voltage correction reference values as X1 and X2, and performing first logic operation on the X1 and the X2 to obtain reference operation results L1 and L2; the read-write voltage of the PIM system is respectively marked as X '1 and X'2, and the X '1 and the X'2 are subjected to second logic operation to obtain actual operation results L '1 and L'2;
s22, comparing L1 and L2 with L '1 and L'2, and starting the PIM data calibration system when L '1 is not equal to L1 and L'2 is not equal to L2.
It should be noted that, the expression of the first logic operation is: l1= & (x1≡x2), l2= | (X1 & X2); the expression of the second logic operation is: l '1 = & (X' 1X '2), L'2 = | (X '1& X' 2).
Specifically, for two sets of voltage correction reference values X1, X2 in the voltage correction flag region, the following logical operation is performed: l1= ≡ (x1≡x2), l2= | (X1 & X2), the reference value is corrected according to the property that the voltage is composed of two sets of data of diametrically opposite levels, so that the resulting L1, L2 are both low levels; however, if the PIM system has a larger or smaller read-write voltage, then X '1 and X'2 will not be equal to X1 and X2, and the operation results L '1 and L'2 will not be both low; thus, when L '1 +.l1, L'2 +.l2, the PIM data calibration system is started.
And S3, determining the change direction of the read-write voltage of the PIM system according to the judgment condition of the step S2, and calibrating the read-write voltage parameters to change the read-write voltage of the PIM system.
In a specific embodiment, in the step S3, if L'1 is at a high level, which indicates that the current PIM system read-write voltage is larger, the read-write voltage parameter needs to be reduced to reduce the PIM system read-write voltage; if L'2 is high, indicating that the read-write voltage of the current PIM system is smaller, the read-write voltage parameter needs to be increased to increase the read-write voltage of the PIM system; the steps S2 to S3 are repeated until L '1 changes from high level to low level or L'2 changes from high level to low level.
S4, writing the calibrated read-write voltage parameters into the nonvolatile storage area on the chip, and simultaneously starting to prepare to read data stored in other storage areas.
The method of the invention aims to solve the problem of the prior art that the reliability of the PIM system with intelligent acceleration function is reduced after the read-write voltage is changed by calibrating the read-write voltage of the PIM system. The method is based on the SONOS memory, the calibration process is set to be started automatically without manual operation of a user, the voltage calibration circuit is simple, the occupied area is extremely small, and the user experience can be greatly improved.
Example 2
Referring to fig. 4, an automatic calibration system for read-write voltage applicable to PIM system includes a system initialization module 1, a logic judgment module 2, a read-write voltage parameter calibration module 3 and a calibration voltage parameter storage module 4 connected in sequence;
the system initialization module 1 is used for storing the voltage correction reference value in a nonvolatile storage area in a storage array and starting a PIM system;
the logic judgment module 2 is used for using a set of judgment logic for the read-write voltage and the voltage correction reference value of the PIM system to determine whether to start the PIM data calibration system;
the read-write voltage parameter calibration module 3 is used for calibrating read-write voltage parameters to change the read-write voltage of the PIM system.
The calibrated voltage parameter storage module 4 is used for writing the calibrated read-write voltage parameter into the nonvolatile storage area on the chip.
The memory array comprises a SONOS device, and the nonvolatile memory area of the memory array comprises a voltage correction mark area and a voltage correction memory area.
The voltage correction storage area has a readable and writable function, and is used for storing calibrated read-write voltage parameters.
It should be noted that the voltage correction flag field stores the voltage correction reference value, and starts the PIM system with the intermediate voltage data.
It should be noted that, the selection method of the voltage correction reference value includes: and randomly selecting one group of data with half of high level and low level as one group of voltage correction reference values, and taking the data as the other group of voltage correction reference values after inverting the data according to the bits.
It should be noted that the judging logic specifically includes the following steps:
reading two groups of voltage correction reference values stored in a voltage correction marking area in a nonvolatile storage area, respectively marking the two groups of voltage correction reference values as X1 and X2, and performing first logic operation on the X1 and the X2 to obtain reference operation results L1 and L2; the read-write voltage of the PIM system is respectively marked as X '1 and X'2, and the X '1 and the X'2 are subjected to second logic operation to obtain actual operation results L '1 and L'2;
comparing L1, L2 with L '1, L'2, and starting the PIM data calibration system when L '1 is not equal to L1 and L'2 is not equal to L2.
It should be noted that, the expression of the first logic operation is: l1= & (x1≡x2), l2= | (X1 & X2); the expression of the second logic operation is: l '1 = & (X' 1X '2), L'2 = | (X '1& X' 2).
It should be noted that, if L'1 is at a high level, it indicates that the current PIM system has a larger read-write voltage, the read-write voltage parameter needs to be reduced to reduce the PIM system read-write voltage; if L'2 is at a high level, which indicates that the current PIM system read-write voltage is smaller, the read-write voltage parameter needs to be increased to increase the PIM system read-write voltage.
Example 3
A storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of a read-write voltage auto-calibration method for a PIM system in embodiment 1.
It is to be understood that the above examples of the present invention are provided by way of illustration only and not by way of limitation of the embodiments of the present invention. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. Any modification, equivalent replacement, improvement, etc. which come within the spirit and principles of the invention are desired to be protected by the following claims.
Claims (4)
1. The read-write voltage automatic calibration method suitable for the PIM data calibration system is characterized by comprising the following steps of:
s1, storing a voltage correction reference value in a nonvolatile storage area in a storage array, and starting a PIM data calibration system;
s2, a set of judgment logic is used for reading and writing voltage and a voltage correction reference value of the PIM data calibration system so as to determine whether to start the PIM data calibration system;
s3, determining the change direction of the read-write voltage of the PIM data calibration system according to the judgment condition of the step S2, and calibrating the read-write voltage parameters to change the read-write voltage of the PIM data calibration system;
s4, writing the calibrated read-write voltage parameters into a nonvolatile storage area on the chip, and simultaneously starting to prepare to read data stored in other storage areas;
in the step S1, the memory array includes a SONOS device, and the memory array nonvolatile memory area includes a voltage correction flag area and a voltage correction memory area;
the voltage correction storage area has a readable and writable function and is used for storing calibrated read-write voltage parameters;
in the step S1, the voltage correction reference value is stored in the voltage correction flag area, and the PIM data calibration system is started with the intermediate voltage data;
the selection method of the voltage correction reference value comprises the following steps: randomly selecting a group of data with half of high level and low level as one group of voltage correction reference values, and taking the data as the other group of voltage correction reference values after inverting the data according to the bits;
the judging logic in the step S2 specifically includes the following steps:
s21, reading two groups of voltage correction reference values stored in a voltage correction marking area in a nonvolatile storage area, respectively marking the two groups of voltage correction reference values as X1 and X2, and performing first logic operation on the X1 and the X2 to obtain reference operation results L1 and L2; the read-write voltage of the PIM data calibration system is respectively marked as X '1 and X'2, and the X '1 and the X'2 are subjected to second logic operation to obtain actual operation results L '1 and L'2;
s22, comparing L1 and L2 with L '1 and L'2, and starting the PIM data calibration system when L '1 is not equal to L1 and L'2 is not equal to L2;
the expression of the first logic operation is: l1= & (x1≡x2), l2= | (X1 & X2); the expression of the second logic operation is: l '1 = & (X' 1X '2), L'2 = | (X '1& X' 2);
the PIM is in-memory calculation, which means that the data in the memory is directly calculated in the memory without being fetched.
2. The automatic calibration method of read-write voltage suitable for PIM data calibration system according to claim 1, wherein in said step S3, if L'1 is high, it indicates that the read-write voltage of the current PIM data calibration system is larger, then the read-write voltage parameter needs to be reduced to reduce the read-write voltage of the PIM data calibration system; if L'2 is high level, indicating that the read-write voltage of the current PIM data calibration system is smaller, the read-write voltage parameter needs to be increased to increase the read-write voltage of the PIM data calibration system; the steps S2 to S3 are repeated until L '1 changes from high level to low level or L'2 changes from high level to low level.
3. The read-write voltage automatic calibration system suitable for the PIM data calibration system is characterized by comprising a system initialization module (1), a logic judgment module (2), a read-write voltage parameter calibration module (3) and a calibration voltage parameter storage module (4) which are connected in sequence;
the system initialization module (1) is used for storing the voltage correction reference value in a nonvolatile storage area in a storage array and starting a PIM data calibration system by using intermediate voltage data;
the memory array comprises a SONOS device, and the nonvolatile memory area of the memory array comprises a voltage correction mark area and a voltage correction memory area;
the voltage correction mark area stores the voltage correction reference value and starts a PIM data calibration system by using intermediate voltage data;
the selection method of the voltage correction reference value comprises the following steps: randomly selecting a group of data with half of high level and low level as one group of voltage correction reference values, and taking the data as the other group of voltage correction reference values after inverting the data according to the bits;
the logic judgment module (2) is used for using a group of judgment logics for the read-write voltage of the PIM data calibration system and the voltage correction reference value to determine whether to start the PIM data calibration system;
the judging logic specifically comprises the following steps:
s21, reading two groups of voltage correction reference values stored in a voltage correction marking area in a nonvolatile storage area, respectively marking the two groups of voltage correction reference values as X1 and X2, and performing first logic operation on the X1 and the X2 to obtain reference operation results L1 and L2; the read-write voltage of the PIM data calibration system is respectively marked as X '1 and X'2, and the X '1 and the X'2 are subjected to second logic operation to obtain actual operation results L '1 and L'2;
s22, comparing L1 and L2 with L '1 and L'2, and starting the PIM data calibration system when L '1 is not equal to L1 and L'2 is not equal to L2;
the expression of the first logic operation is: l1= & (x1≡x2), l2= | (X1 & X2); the expression of the second logic operation is: l '1 = & (X' 1X '2), L'2 = | (X '1& X' 2);
the read-write voltage parameter calibration module (3) is used for determining the change direction of the read-write voltage of the PIM data calibration system according to the judgment condition of the logic judgment module (2), and calibrating the read-write voltage parameter to change the read-write voltage of the PIM data calibration system;
the calibrated voltage parameter storage module (4) is used for writing the calibrated read-write voltage parameters into a nonvolatile storage area on the chip;
the PIM is in-memory calculation, which means that the data in the memory is directly calculated in the memory without being fetched.
4. A storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of a read-write voltage automatic calibration method for PIM data calibration systems according to any one of claims 1 to 2.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310642698.6A CN116580751B (en) | 2023-06-01 | 2023-06-01 | Read-write voltage automatic calibration method and system suitable for PIM system |
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| CN202310642698.6A CN116580751B (en) | 2023-06-01 | 2023-06-01 | Read-write voltage automatic calibration method and system suitable for PIM system |
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| CN116580751B true CN116580751B (en) | 2024-03-12 |
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| CN113129983A (en) * | 2019-12-31 | 2021-07-16 | 杭州海康存储科技有限公司 | Method, apparatus and computer storage medium for calibrating threshold voltage set |
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| CN106980473A (en) * | 2017-03-30 | 2017-07-25 | 四川长虹电器股份有限公司 | The method for lifting EEPROM read-write reliabilities and speed |
| CN113129983A (en) * | 2019-12-31 | 2021-07-16 | 杭州海康存储科技有限公司 | Method, apparatus and computer storage medium for calibrating threshold voltage set |
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