CN109887537B - LDPC code decoding method based on threshold voltage drift sensing - Google Patents
LDPC code decoding method based on threshold voltage drift sensing Download PDFInfo
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Abstract
The invention discloses a decoding method of LDPC code with threshold voltage drift perception, which comprises the following steps: obtaining a current drift parameter of a flash memory page P to which data to be decoded belongs, and obtaining threshold voltage distribution D of a storage unit in the current flash memory page P according to the corresponding relation between the threshold voltage distribution of the storage unit and the drift parameter; taking the standard reading reference voltage and the voltage at each tail end point of the threshold voltage distribution D as sampling voltages, and determining the voltage range [ v ] in which the threshold voltage of each memory cell is positioned by applying different sampling voltagesi,vj](ii) a According to the voltage range [ v ]i,vj]Calculating soft decision information, and decoding LDPC codes for data to be decoded according to the soft decision information; wherein the drift parameters include erasing times and data storage time, vi＜vj. The invention can accurately acquire the soft decision information by using the drift characteristic of the threshold voltage of the storage unit, thereby improving the decoding performance of the LDPC code and reducing the decoding delay.
Description
Technical Field
The invention belongs to the technical field of solid-state disk storage, and particularly relates to a decoding method of an LDPC code with threshold voltage drift perception.
Background
Three-dimensional stacked flash memories have a high storage density characteristic, and thus are widely used as storage devices in solid state disks, smart phones, and computer systems. However, high storage density reduces data storage reliability. The LDPC code (Low-Density Parity-Check code) has strong error correction capability and is applied to a three-dimensional stacked flash memory to ensure the reliability of data storage. The LDPC is a soft-decision error correcting code, multiple levels are needed to obtain soft-decision information before decoding, and the high-precision soft-decision information can improve decoding performance and reduce decoding delay. In the three-dimensional stacked flash memory, in order to obtain high-precision soft decision information, the threshold voltage range of the memory cell needs to be accurately obtained.
As shown in fig. 1, after channel disturbances such as a Program/Erase (Program/Erase, abbreviated as P/E) and a storage disturbance, a threshold voltage of a memory cell in a flash memory may drift, so that an actual threshold voltage distribution of the memory cell may deviate from an ideal distribution. In the three-dimensional stacked flash memory, the drift phenomenon is very obvious, and the existing flash memory decoding method does not consider the drift characteristic of the threshold voltage of the storage unit in the three-dimensional stacked flash memory when the soft decision information is acquired, so that the accuracy of the acquired soft decision information is low, the decoding performance is low, the decoding delay is high, and the reading overhead of the three-dimensional stacked flash memory is increased.
Disclosure of Invention
Aiming at the defects and the improvement requirements of the prior art, the invention provides an LDPC code decoding method for sensing the threshold voltage drift, which aims to accurately acquire soft decision information by using the drift characteristic of the threshold voltage of a storage unit so as to improve the decoding performance of the LDPC code and reduce the decoding delay.
In order to achieve the above object, the present invention provides a decoding method of an LDPC code with threshold voltage drift sensing, comprising:
(1) obtaining a current drift parameter of a flash memory page P to which data to be decoded belongs, and obtaining threshold voltage distribution D of a storage unit in the current flash memory page P according to the corresponding relation between the threshold voltage distribution of the storage unit and the drift parameter;
(2) taking the standard reading reference voltage and the voltage at each tail end point of the threshold voltage distribution D as sampling voltages, and determining the voltage range [ v ] in which the threshold voltage of each memory cell is positioned by applying different sampling voltagesi,vj]；
(3) According to the voltage range [ v ]i,vj]Calculating soft decision information, and decoding LDPC codes for data to be decoded according to the soft decision information;
wherein the drift parameters include erasuresNumber of times and data retention time, vi＜vj。
The threshold voltage distribution of the storage unit can drift to different degrees along with different drift parameters (erasing times and data storage time).
Further, the method for establishing the corresponding relationship between the threshold voltage distribution and the drift parameter of the memory cell includes:
(S1) selecting a plurality of flash memory blocks from the three-dimensional stacked flash memory as a sample set, and dividing the total range of the threshold voltage of the memory cell into M subintervals;
(S2) writing random data into each flash memory block in the sample set sequentially until each flash memory block is fully written, and recording the current erasing times;
(S3) standing the three-dimensional stacked flash memory for a time interval and then transferring to (S4); the three-dimensional stacked flash memory is not operated during standing;
(S4) obtaining a current data retention time to obtain a current drift parameter;
(S5) obtaining the threshold voltage of each storage unit of each flash block in the sample set, and counting the number of the storage units of which the threshold voltages fall in each subinterval so as to fit and obtain the threshold voltage distribution corresponding to the current drift parameter;
(S6) repeating (S3) - (S5) for multiple times to obtain multiple different drift parameters and corresponding threshold voltage distributions;
(S7) performing (S2) - (S6) after performing the erasing operation on each flash block in the sample set according to the designated erasing times;
and (S8) repeating the step (S7) for multiple times to obtain multiple different drift parameters and corresponding threshold voltage distributions, and fitting to obtain the corresponding relation between the threshold voltage distributions and the drift parameters of the memory cells.
According to the invention, through a sampling and fitting method, the corresponding relation between the threshold voltage distribution of the storage unit and the drift parameter can be accurately obtained, so that accurate soft decision information can be obtained according to the drift characteristics of the threshold voltage distribution of the storage unit in the decoding process; writing efficiency can be improved and interference between flash memory pages can be reduced by sequentially writing data.
Further preferably, in step (S1), the division of the subintervals coincides with the division of the read voltage steps in the ReadOffset operation supported by the flash memory chip.
As a further preference, the flash blocks of the sample set are evenly distributed in different flash channels;
in the same channel, the flash memory blocks in the sample set are uniformly distributed in different chips;
in the same chip, the flash memory blocks in the sample set are uniformly distributed in different wafers;
in the same wafer, the flash blocks in the sample set are evenly distributed in different groupings.
By selecting the flash memory block through the method, the writing parallelism inside the three-dimensional stacked flash memory can be fully utilized when data is written, so that the writing efficiency is improved.
Further, the step (3) comprises:
(31) determining a voltage range [ v ]i,vj]If the interval type is a drift interval, the voltage range [ v ] is seti,vj]As a target interval [ v ]l,vu]And go to step (32); otherwise, go to step (34);
(32) according to the target interval [ vl,vu]Calculating soft decision information LLR '(k), and decoding LDPC codes of data to be decoded according to the soft decision information LLR' (k);
(33) if the decoding is successful, the step (35) is carried out; otherwise, in the target interval [ v ]l,vu]Internally selecting a sampling voltage vsAnd determining that the range in which the threshold voltage of the memory cell is located is a voltage range [ v ]l,vs]Or voltage range [ v ]s,vu]The determined voltage range is used as a new target interval [ v ]l,vu]Turning to step (32);
(34) according to the voltage range [ v ]i,vj]Calculating soft decision information LLR (k), and decoding LDPC codes according to the soft decision information LLR (k) for the data to be decoded; turning to step (35);
(35) ending the decoding;
k is the number of each bit of the flash memory page P in the bits stored in the memory unit; in the threshold voltage distribution D, the lower boundary point of the drift region is the standard read reference voltage vrefVoltage v at right end point with upper boundary point in first state1Or the upper limit point of the drift region is the standard read reference voltage vrefVoltage v at the left end point with the lower boundary point in the second state2(ii) a The first state and the second state are close to the standard read reference voltage v when the drift does not occurrefAnd v is a two memory cell state of1＜vref＜v2。
Due to the drift of the threshold voltage of the storage unit, the state of the storage unit in the drift region cannot be accurately determined, and the decoding can be successfully decoded only by multiple iterations; the state of the memory cell in the non-drift interval can be directly determined according to the range of the threshold voltage with high probability, and the decoding is successful; according to the decoding method, when the threshold voltage of the storage unit is in different intervals, different decoding modes are adopted, so that the decoding efficiency can be improved, and the decoding accuracy can be ensured.
As a further preferred, the soft decision information llr (k) is calculated by the formula:
wherein, STkRepresents the state set, S, of the k-th bit of 0 in the memory celllAnd m each represents the state of the memory cell,
and pm(v) Are respectively provided withRepresents the state SlAnd a probability density function for state m, N representing the total number of states of the memory cell.
Generally, by the above technical solution conceived by the present invention, the following beneficial effects can be obtained:
(1) the LDPC code decoding method for sensing the threshold voltage drift provided by the invention can acquire the current threshold voltage distribution of the storage unit according to the current drift parameter, acquire the soft decision information according to the acquired voltage distribution, accurately acquire the drift information of the threshold voltage and acquire the accurate soft decision information according to the drift characteristic of the threshold voltage, thereby improving the decoding performance and reducing the decoding delay.
(2) The LDPC code decoding method for sensing the threshold voltage drift can accurately acquire the corresponding relation between the threshold voltage distribution and the drift parameter of the storage unit through a sampling and fitting method, so that accurate soft decision information can be acquired according to the drift characteristic of the threshold voltage distribution of the storage unit in the decoding process.
(3) According to the LDPC code decoding method for sensing the threshold voltage drift, the selected sample flash memory blocks are uniformly distributed in the parallel operation units of the three-dimensional stacked flash memory, so that the writing parallelism inside the three-dimensional stacked flash memory can be fully utilized when data is written, and the writing efficiency is improved; data are written in a sequential writing mode, so that the writing efficiency can be improved, and the interference among flash memory pages can be reduced.
(4) According to the LDPC code decoding method for sensing the threshold voltage drift, when the threshold voltage of the storage unit falls in the drift interval, the decoding is performed in a multi-iteration mode, and when the threshold voltage of the storage unit falls in the non-drift interval, the decoding is performed directly, so that the decoding efficiency can be improved, and the decoding accuracy can be ensured.
Drawings
FIG. 1 is a diagram illustrating a conventional threshold voltage distribution drift of a memory cell;
fig. 2 is a flowchart of an LDPC code decoding method with threshold voltage drift sensing according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Before explaining the technical solution of the present invention in detail, the related basic concepts will be briefly introduced. In a three-dimensional stacked flash memory, a flash memory cell stores bit data in a manner of storing charges, and as the amount of charges stored is different, the threshold voltage of the memory cell will be in different voltage ranges, and correspondingly, the memory cell will be in different states for storing different bit data. According to the number of bits stored in the memory cell, the threshold voltage of the memory cell is divided into a plurality of voltage ranges which are not overlapped with each other, and the voltage ranges represent different states respectively. For example, an SLC (single Level cell) memory cell is used to store a bit of data, and its threshold voltage is divided into two voltage ranges that do not overlap with each other, and accordingly, the SLC memory cell has two states; an MLC (multi Level cell) memory cell is used to store two bits of data, and its threshold voltage is divided into four non-overlapping voltage ranges, and accordingly, the MLC memory cell has four states. The peripheral circuit needs to determine the state of the memory cell by means of a series of standard read reference voltages, and further determine the bit data value stored in the memory cell, and the specific number of the required standard read reference voltages is determined by the number of bits stored in the memory cell. In SLC memory cells, only one standard read reference voltage is needed; in an MLC memory cell, 3 standard read reference voltages are required.
For a given state, the point on the threshold voltage distribution curve where the threshold voltage is minimum and the point where the threshold voltage is maximum are the left and right tail end points of the corresponding state, respectively. As shown by the solid line in FIG. 1, when no shift occurs, the threshold voltage distribution curves of the adjacent states do not intersect, and the state with the smaller threshold voltage of the two states is considered as state P1 and thresholdThe state with larger value voltage is the state P2, the threshold voltage at the right tail end point of the state P1 is v1The threshold voltage at the left tail end point of state P2 is v2The standard read reference voltage between the two states is vrefThen v is satisfied1＜vref＜v2(ii) a As shown by the dotted line in fig. 1, after the drift occurs, the threshold voltage distribution curves of the adjacent states intersect; in the present invention, after the threshold voltage distribution shifts, the voltage range generated by the intersection of the threshold voltage distribution curves of adjacent states is called a drift region, specifically, the lower boundary point of the drift region is the standard read reference voltage vrefThe upper boundary point is the voltage v at the right tail end point of the state P11Or the upper limit point of the drift region is the standard read reference voltage vrefThe lower boundary point is the voltage v at the left tail end point of the state P22。
As can be seen from fig. 1, when the threshold voltage of the memory cell falls in the drift region, the state of the memory cell cannot be directly determined; when the threshold voltage of the memory cell falls in the non-drift region, the state of the memory cell can be directly determined according to the range of the threshold voltage with high probability.
In order to solve the problem that the decoding performance is low and the decoding delay is high due to the fact that the existing LDPC code decoding method cannot acquire accurate soft decision information when the threshold voltage distribution of a storage unit drifts, the LDPC code decoding method with threshold voltage drift sensing provided by the invention comprises the following steps as shown in FIG. 2:
(1) obtaining a current drift parameter of a flash memory page P to which data to be decoded belongs, and obtaining threshold voltage distribution D of a storage unit in the current flash memory page P according to the corresponding relation between the threshold voltage distribution of the storage unit and the drift parameter;
the drift parameters comprise erasing times and data storage time;
in an optional embodiment, the establishing of the corresponding relationship between the threshold voltage distribution and the drift parameter of the memory cell includes:
(S1) selecting a plurality of flash memory blocks from the three-dimensional stacked flash memory as a sample set, and dividing the total range of the threshold voltage of the memory cell into M subintervals;
in an optional embodiment, the sub-interval division is consistent with the division of the read voltage step in the ReadOffset operation supported by the flash memory chip; in the embodiment, the gear selection range is specifically-128 to 127, and 256 gears are selected in total, and each gear represents 10 mv;
the 100 flash blocks in the sample set are evenly distributed in different flash channels; in the same channel, the flash memory blocks in the sample set are uniformly distributed in different chips; in the same chip, the flash memory blocks in the sample set are uniformly distributed in different wafers; in the same wafer, the flash memory blocks in the sample set are uniformly distributed in different groups;
by selecting the flash memory blocks through the method, the writing parallelism inside the three-dimensional stacked flash memory can be fully utilized when data are written into the flash memory blocks in the sample set subsequently, so that the writing efficiency is improved;
(S2) writing random data into each flash memory block in the sample set sequentially until each flash memory block is fully written, and recording the current erasing times;
the writing efficiency can be improved and the interference between flash memory pages can be reduced by writing data in sequence;
(S3) standing the three-dimensional stacked flash memory for a time interval and then transferring to (S4); the three-dimensional stacked flash memory is not operated during standing;
the time interval of standing can be set to be one day, one week, one month or other time intervals according to the characteristics of the flash memory and actual needs;
(S4) obtaining a current data retention time to obtain a current drift parameter;
(S5) obtaining the threshold voltage of each storage unit of each flash block in the sample set, and counting the number of the storage units of which the threshold voltages fall in each subinterval so as to fit and obtain the threshold voltage distribution corresponding to the current drift parameter;
(S6) repeating (S3) - (S5) for multiple times to obtain multiple different drift parameters and corresponding threshold voltage distributions;
(S7) performing (S2) - (S6) after performing the erasing operation on each flash block in the sample set according to the designated erasing times;
in this embodiment, in order to obtain a plurality of different drift parameters and corresponding threshold voltage distributions, the erase/write frequency of the three-dimensional stacked flash memory is increased from 0 to 7000 times, and 500 is used as interval statistical data;
(S8) repeating the step (S7) for multiple times to obtain multiple different drift parameters and corresponding threshold voltage distributions, and fitting to obtain the corresponding relation between the threshold voltage distributions and the drift parameters of the memory cells;
according to the invention, through a sampling and fitting method, the corresponding relation between the threshold voltage distribution of the storage unit and the drift parameter can be accurately obtained, so that accurate soft decision information can be obtained according to the drift characteristics of the threshold voltage distribution of the storage unit in the decoding process;
(2) taking the standard reading reference voltage and the voltage at each tail end point of the threshold voltage distribution D as sampling voltages, and determining the voltage range [ v ] in which the threshold voltage of each memory cell is positioned by applying different sampling voltagesi,vj](ii) a Wherein v isi＜vj；
In addition to the standard read reference voltage, the threshold voltage at each tail end point of the current threshold voltage distribution D is also used as a sampling voltage, so that the voltage range in which the threshold voltage of the storage unit falls can be more accurately obtained;
(3) according to the voltage range [ v ]i,vj]Calculating soft decision information, and decoding LDPC codes for data to be decoded according to the soft decision information;
in an optional embodiment, step (3) specifically includes:
(31) determining a voltage range [ v ]i,vj]If the interval type is a drift interval, the voltage range [ v ] is seti,vj]As a target interval [ v ]l,vu]And go to step (32); otherwise, go to step (34);
(32) according to the target interval [ vl,vu]Calculating soft decision information LLR '(k), and decoding LDPC codes of data to be decoded according to the soft decision information LLR' (k); k is the bit stored in the memory cell by each bit of the flash memory page PThe number in (1);
(33) if the decoding is successful, the step (35) is carried out; otherwise, in the target interval [ v ]l,vu]Internally selecting a sampling voltage vsAnd determining that the range in which the threshold voltage of the memory cell is located is a voltage range [ v ]l,vs]Or voltage range [ v ]s,vu]The determined voltage range is used as a new target interval [ v ]l,vu]Turning to step (32);
(34) according to the voltage range [ v ]i,vj]Calculating soft decision information LLR (k), and decoding LDPC codes according to the soft decision information LLR (k) for the data to be decoded; turning to step (35);
the soft decision information LLR' (k) and the soft decision information LLR (k) have the same calculation method; the soft decision information llr (k) is calculated by the formula:
wherein, STkRepresents the state set, S, of the k-th bit of 0 in the memory celllAnd m each represents the state of the memory cell,
and pm(v) Respectively represent the state SlAnd a probability density function of the states m, N represents the total number of states of the memory cell, N is 2nN is the total number of bits stored in the storage unit; for three-dimensional stacked TLC (Triple-Level Cell), N is 3, N is 8, correspondingly,
(35) ending the decoding;
due to the drift of the threshold voltage of the storage unit, the state of the storage unit in the drift region cannot be accurately determined, and the decoding can be successfully decoded only by multiple iterations; the state of the memory cell in the non-drift interval can be directly determined according to the range of the threshold voltage with high probability, and the decoding is successful; according to the decoding method, when the threshold voltage of the storage unit is in different intervals, different decoding modes are adopted, so that the decoding efficiency can be improved, and the decoding accuracy can be ensured.
The LDPC code decoding method for sensing the threshold voltage drift provided by the invention can acquire the current threshold voltage distribution of the storage unit according to the current drift parameter, acquire the soft decision information according to the acquired voltage distribution, accurately acquire the drift information of the threshold voltage and acquire the accurate soft decision information according to the drift characteristic of the threshold voltage, thereby improving the decoding performance and reducing the decoding delay.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (5)
1. A decoding method of LDPC codes with perception of threshold voltage drift is characterized by comprising the following steps:
(1) obtaining a current drift parameter of a flash memory page P to which data to be decoded belongs, and obtaining threshold voltage distribution D of a storage unit in the current flash memory page P according to the corresponding relation between the threshold voltage distribution of the storage unit and the drift parameter;
(2) taking the standard reading reference voltage and the voltage at each tail end point of the threshold voltage distribution D as sampling voltages, and determining the voltage range [ v ] where the threshold voltage of each memory cell is positioned by applying different sampling voltagesi,vj]；
(3) According to said voltage range [ v ]i,vj]Calculating soft decision information, and decoding the LDPC code of the data to be decoded according to the soft decision information;
wherein the drift parameters include erasing times and data storage time, vi＜vj(ii) a The establishment mode of the corresponding relation between the threshold voltage distribution and the drift parameter of the memory cell comprises the following steps:
(S1) selecting a plurality of flash memory blocks from the three-dimensional stacked flash memory as a sample set, and dividing the total range of the threshold voltage of the memory cell into M subintervals;
(S2) sequentially writing random data into each flash block in the sample set until each flash block is fully written, and recording the current erasing times;
(S3) standing the three-dimensional stacked flash memory for a time interval and then transferring to (S4); not operating the three-dimensional stacked flash memory during standing;
(S4) obtaining a current data retention time to obtain a current drift parameter;
(S5) obtaining the threshold voltage of each storage unit of each flash block in the sample set, and counting the number of the storage units of which the threshold voltages fall in each subinterval so as to fit and obtain the threshold voltage distribution corresponding to the current drift parameter;
(S6) repeating (S3) - (S5) for multiple times to obtain multiple different drift parameters and corresponding threshold voltage distributions;
(S7) performing (S2) to (S6) after performing the erase/write operation on each flash block in the sample set according to the designated erase/write count;
and (S8) repeating the step (S7) for multiple times to obtain multiple different drift parameters and corresponding threshold voltage distributions, and fitting to obtain the corresponding relation between the threshold voltage distributions and the drift parameters of the memory cells.
2. The LDPC code decoding method with threshold voltage shift sensing as claimed in claim 1, wherein in the step (S1), the subintervals are divided in accordance with the division of the read voltage steps in the read compensation operation supported by the flash memory chip.
3. The method of decoding LDPC codes with threshold voltage drift sensing of claim 1 wherein the flash blocks in the sample set are evenly distributed in different flash channels;
in the same channel, the flash memory blocks in the sample set are uniformly distributed in different chips;
in the same chip, the flash memory blocks in the sample set are uniformly distributed in different wafers;
in the same wafer, the flash blocks in the sample set are evenly distributed in different groupings.
4. The LDPC code decoding method with threshold voltage drift sensing as claimed in claim 1, wherein the step (3) comprises:
(31) determining the voltage range [ v ]i,vj]If the voltage range is a drift range, the voltage range [ v ] is divided into a plurality of voltage rangesi,vj]As a target interval [ v ]l,vu]And go to step (32); otherwise, go to step (34);
(32) according to the target interval [ vl,vu]Calculating soft decision information LLR '(k), and decoding LDPC codes of the data to be decoded according to the soft decision information LLR' (k);
(33) if the decoding is successful, the step (35) is carried out; otherwise, in the target interval [ v ]l,vu]Internally selecting a sampling voltage vsAnd determining that the range in which the threshold voltage of the memory cell is located is a voltage range [ v ]l,vs]Or voltage range [ v ]s,vu]The determined voltage range is used as a new target interval [ v ]l,vu]Turning to step (32);
(34) according to said voltage range [ v ]i,vj]Calculating soft decision information LLR (k), and decoding LDPC codes of the data to be decoded according to the soft decision information LLR (k); turning to step (35);
(35) ending the decoding;
wherein k is the number of each bit of the flash memory page P in the bits stored in the memory cell; in the threshold voltage distribution D, the lower boundary point of the drift region is a standard read reference voltage vrefVoltage v at right end point with upper boundary point in first state1Or the upper limit point of the drift interval is a standard reading reference voltage vrefVoltage v at the left end point with the lower boundary point in the second state2(ii) a The first state and the second state are immediately adjacent to the first state when no drift occursStandard read reference voltage vrefAnd v is a two memory cell state of1＜vref＜v2。
5. The LDPC code decoding method with threshold voltage shift sensing as claimed in claim 4, wherein the soft decision information LLR (k) is calculated by the following formula:
wherein, STkRepresents the state set, S, of the k-th bit of 0 in the memory celllAnd m each represents the state of the memory cell,
and pm(v) Respectively represent the states SlAnd a probability density function of said states m, N representing the total number of states of the memory cell.
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