CN116577545A

CN116577545A - Fault detection method and device

Info

Publication number: CN116577545A
Application number: CN202310526219.4A
Authority: CN
Inventors: 曹军伟
Original assignee: Tianjin Jingwei Hengrun Technology Co ltd
Current assignee: Tianjin Jingwei Hengrun Technology Co ltd
Priority date: 2023-05-10
Filing date: 2023-05-10
Publication date: 2023-08-11

Abstract

The application discloses a fault detection method and device. The method comprises the following steps: under the condition that the load to be tested is in a working state, acquiring an electrical parameter of the load to be tested at a target time, wherein the target time is the middle time of a target time period, the target time period is a high-level time period of a PWM signal for driving the load to be tested, and determining that the load to be tested fails under the condition that the electrical parameter exceeds a preset range. Thus, the requirement on the load can be reduced, and the real-time fault detection can be carried out on the load.

Description

Fault detection method and device

Technical Field

The application belongs to the technical field of fault detection, and particularly relates to a fault detection method and device.

Background

Currently, fault detection is performed on a load driven by pulse width modulation (Pulse Width Modulation, PWM), and it is generally required to output a PWM signal with a duty cycle of 100% for a short period of time to drive the load, and then collect an electrical parameter of the load, and determine whether the load has a fault based on the electrical parameter.

However, the PWM signal with 100% duty ratio is outputted to drive the load, and the load is required to be high, and the fault detection is performed only in a short time when the PWM signal with 100% duty ratio is outputted to drive the load, and the real-time detection is not possible.

Disclosure of Invention

The embodiment of the application provides a fault detection method and device, which can reduce the requirement on a load and can also detect the fault of the load in real time.

In a first aspect, an embodiment of the present application provides a fault detection method, including:

under the condition that the load to be measured is in a working state, acquiring the electrical parameter of the load to be measured at a target time, wherein the target time is the middle time of a target time period, the target time period is a high-level time period of a Pulse Width Modulation (PWM) signal for driving the load to be measured,

and under the condition that the electrical parameters exceed the preset range, determining that the load to be tested fails.

In a second aspect, an embodiment of the present application provides a fault detection device, including:

an acquisition module for acquiring the electrical parameter of the load to be measured at a target time when the load to be measured is in a working state, wherein the target time is the middle time of a target time period, the target time period is a high level time period of a PWM signal for driving the load to be measured,

and the first determining module is used for determining that the load to be tested fails under the condition that the electrical parameter exceeds a preset range.

In a third aspect, an embodiment of the present application provides an electronic device, including: a processor and a memory storing computer program instructions,

the processor, when executing the computer program instructions, implements the fault detection method as shown in any of the embodiments of the first aspect.

In a fourth aspect, embodiments of the present application provide a computer storage medium having stored thereon computer program instructions which, when executed by a processor, implement the fault detection method shown in any of the embodiments of the first aspect.

In a fifth aspect, embodiments of the present application provide a computer program product, instructions in which, when executed by a processor of an electronic device, cause the electronic device to perform the fault detection method shown in any of the embodiments of the first aspect.

According to the fault detection method and device provided by the embodiment of the application, the electrical parameter of the load to be detected at the target moment can be obtained under the condition that the load to be detected is in the working state, and then the fault of the load to be detected is determined under the condition that the electrical parameter exceeds the preset range. The target time is the middle time of a target time period, and the target time period is a high level time period of a PWM signal for driving the load to be tested. Therefore, whether the load to be tested breaks down or not is determined by acquiring the electric parameters at the target moment, namely the stable high-level moment, and the PWM signal with the duty ratio of 100% is not required to be output to drive the load in a short time, so that the requirement on the load can be reduced, and the load can be detected in real time.

Drawings

In order to more clearly illustrate the technical solution of the embodiments of the present application, the drawings that are needed to be used in the embodiments of the present application will be briefly described, and it is possible for a person skilled in the art to obtain other drawings according to these drawings without inventive effort.

Figure 1 is a flow chart of a fault detection method provided by one embodiment of the present application,

figure 2 is a schematic diagram of a PWM waveform provided by one embodiment of the present application,

figure 3 is a flow chart of another fault detection method provided by one embodiment of the present application,

figure 4 is a schematic diagram of a fault detection system according to one embodiment of the present application,

FIG. 5 is a schematic diagram of a S32K1xx series chip according to one embodiment of the present application,

figure 6 is a schematic structural diagram of a fault detection device according to an embodiment of the present application,

fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be described in further detail below with reference to the accompanying drawings and the detailed embodiments. It should be understood that the particular embodiments described herein are meant to be illustrative of the application only and not limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the application by showing examples of the application.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.

The embodiment of the application provides a fault detection method, and the fault detection method provided by the embodiment of the application is introduced below.

Fig. 1 is a schematic flow chart of a fault detection method according to an embodiment of the present application.

As shown in fig. 1, the execution body of the fault detection method may be a fault detection device or a fault detection system, and the fault detection method may include the following steps:

s110, under the condition that the load to be measured is in a working state, acquiring the electrical parameter of the load to be measured at a target moment,

s120, under the condition that the electrical parameters exceed the preset range, determining that the load to be tested fails.

Therefore, the electric parameter of the load to be measured at the target moment can be obtained under the condition that the load to be measured is in a working state, and then the fault of the load to be measured is determined under the condition that the electric parameter exceeds a preset range. The target time is the middle time of a target time period, and the target time period is a high level time period of a PWM signal for driving the load to be tested. Therefore, whether the load to be tested breaks down or not is determined by acquiring the electric parameters at the target moment, namely the stable high-level moment, and the PWM signal with the duty ratio of 100% is not required to be output to drive the load in a short time, so that the requirement on the load can be reduced, and the load can be detected in real time.

Referring to S110, the target time may be an intermediate time of the target period, and the target period may be a high level period of the PWM signal driving the load to be measured.

For example, the waveform of the PWM signal may be as shown in fig. 2, wherein the corresponding time at 210 may be the target time.

Since the rising and falling edges of the PWM signal are not strictly pulses and some loads to be measured (e.g., inductive loads) are not in a full output state in the pulse rising phase or the pulse falling phase, it is not reasonable to acquire the state of the loads to be measured in the pulse rising phase or the pulse falling phase. The target moment is the moment when the load output is the most stable, so that the electric parameter acquired at the target moment can most reflect the state of the load to be measured.

Specifically, a PWM signal may be output to the load to be measured, so that the load to be measured is in a working state, and then, under the condition that the load to be measured is in the working state, an electrical parameter of the load to be measured at a target time is obtained.

The electrical parameter may be a voltage or an analog-to-digital (AD) value of the voltage. The load under test may be a PWM driven load.

In some embodiments, the load to be measured may be a backlight.

Of course, the load to be measured may be another PWM-driven load, which is not limited herein.

In some embodiments, to more accurately determine the target time, the method may further include, before S110:

and determining the target moment according to the preset duty ratio and the preset period of the PWM signal.

Here, the duty ratio and the period of the PWM signal output to the load to be measured may be set in advance. The target time may be determined based on a preset duty cycle and a preset period of the PWM signal.

For example, if the PWM frequency is to be configured to be 100HZ by configuring a Flexible Timer Module (FTM), the frequency of the FTM Module may be configured to be 8Mhz, and the frequency division coefficient may be 128, then the count value may be configured to be 625 times, so that a square wave of 8 Mhz/128/625=100 HZ, i.e. 100HZ, may be obtained, and thus the count value 625 may be used as the preset period of the PWM signal. In the case where the count value is 625, the PWM signal may be set to have a duty cycle (i.e., a preset duty cycle) of 50% by starting the output when the channel matching value of the FTM module is 312. In addition, the PWM signal may be configured to be in an edge mode, so that the preset duty ratio is 50%, the output corresponding to the counts 0 to 312 is in a high level, and the output corresponding to the counts 313 to 624 is in a low level, and thus the high level period (i.e., the target period) is 0 to 312, and the target time is the intermediate time 156 of 0 to 312.

Thus, the target time can be accurately determined according to the preset duty ratio and the preset period of the PWM signal.

Referring to S120, it may be determined whether the electrical parameter exceeds a preset range, if so, it may be determined that the load to be tested is faulty, and if not, it may be determined that the load to be tested is in a normal operating state, and output may be continued.

For example, in the case where the electrical parameter is an AD value, the preset range may be [30, 900].

Therefore, the fault detection can be carried out on the load to be detected in real time, so that when the load to be detected breaks down, the output can be turned off in time, and the load to be detected is protected.

In some embodiments, to more accurately determine whether the load to be tested is malfunctioning, the electrical parameters may include a first electrical parameter and a second electrical parameter, which may be acquired by different sampling modules, S120 may include:

an average of the first electrical parameter and the second electrical parameter is determined,

and under the condition that the average value exceeds a preset range, determining that the load to be tested fails.

Here, the first electrical parameter may be collected by the first sampling module, and the second electrical parameter may be collected by the second sampling module, to determine whether an average value of the first electrical parameter and the second electrical parameter exceeds a preset range.

The sampling module may be an analog-to-digital conversion (Analog to Digital Converter, ADC) module, for example.

Therefore, whether the load to be tested breaks down or not is determined through the average value of the electrical parameters acquired by the two sampling modules, the influence of sampling errors on the fault detection accuracy can be reduced, and the fault detection accuracy is improved.

In some embodiments, to further improve the accuracy of fault detection, determining the average value of the first electrical parameter and the second electrical parameter may include:

determining a difference between the first electrical parameter and the second electrical parameter,

in the event that the difference does not exceed the first threshold, an average value is determined.

Here, the difference value of the electrical parameters collected by the different sampling modules may be compared with the first threshold value, and if the difference value does not exceed the first threshold value, the collected electrical parameters (i.e., the first electrical parameter and the second electrical parameter) may be considered valid, an average value of the first electrical parameter and the second electrical parameter may be determined, and whether the load to be tested fails may be determined according to the average value.

For example, if the sampling module is an ADC module, the first electrical parameter and the second electrical parameter are AD values, and since the ADC module is 10-bit acquisition, the reference voltage is 5V, and thus the 10 AD values are 0.048V, if the sampling value floats by not more than 0.05V, the deviation is considered to be small, and it can be determined whether the load to be tested is faulty based on the sampling value, and thus the first threshold may be 10. Of course, the first threshold value also needs to be set according to the actual load to be measured.

Therefore, the reliability verification is carried out based on the difference value of the electric parameters acquired by different sampling modules, and whether the load to be tested breaks down or not is determined based on the electric parameters under the condition that the electric parameters are determined to be reliable, so that the problem of inaccurate fault detection caused by the faults of the sampling modules can be avoided, and the accuracy of fault detection can be further improved. .

In some embodiments, to improve the robustness of the fault detection, after determining the difference between the first electrical parameter and the second electrical parameter, the method may further include:

in case the difference exceeds a first threshold, the number of sampling errors is increased by 1,

it is determined whether the number of sampling errors reaches a second threshold,

under the condition that the sampling error times do not reach the second threshold value, returning to execute the process of obtaining the electrical parameters of the load to be tested at the target moment under the condition that the load to be tested is in the working state,

and setting the sampling error number to 0 and outputting first prompt information under the condition that the sampling error number reaches a second threshold value.

Here, the first hint information may be used to hint that the sample was erroneous.

Specifically, if the difference between the first electrical parameter and the second electrical parameter exceeds the first threshold, the sampling error number may be increased by 1, if the sampling error number does not reach the second threshold, S110 may be executed again, and if the sampling error number reaches the second threshold, the first prompt message may be output, and the error may be reported. The reporting means may be, for example, a unified diagnostic service (Unified Diagnostic Services, UDS) or 1939.

In addition, if the number of sampling errors reaches the second threshold, the output of the PWM signal may be turned off, and the number of sampling errors may be set to 0, so as to restart counting later.

The second threshold may be, for example, 5, and may specifically be set according to actual requirements, which is not limited herein.

In this way, in the case where the number of sampling errors does not exceed the second threshold, the sampling can be re-sampled until the number of sampling errors exceeds the second threshold, without stopping the fault detection when the difference exceeds the first threshold, so that the robustness of the fault detection is high.

In some embodiments, in order to accurately determine the fault type of the load to be tested, determining that the load to be tested has a fault when the average value exceeds the preset range may include:

and under the condition that the average value is smaller than a third threshold value, determining that the load to be tested has an open circuit fault,

and under the condition that the average value is larger than a fourth threshold value, determining that the load to be tested has short-circuit fault.

Here, the third threshold may be smaller than the fourth threshold. For example, the third threshold may be 30 and the fourth threshold may be 900.

For example, if the average value of the first electrical parameter and the second electrical parameter is less than 30, an open circuit fault may be reported, and if it is greater than 900, the load output may be turned off, and a short circuit fault may be reported.

In this way, the specific fault type of the load to be tested can be accurately determined by comparing the average value of the first electrical parameter and the second electrical parameter with the threshold value.

In some embodiments, to improve the accuracy of fault detection, determining that the load to be tested has an open circuit fault if the average value is smaller than the third threshold value may include:

and under the condition that N average values corresponding to the continuous N sampling periods are smaller than a third threshold value, determining that the load to be tested has an open circuit fault.

Here, N may be an integer greater than 1.

The sampling period may be 10ms, for example. If the average value of the first electrical parameter and the second electrical parameter acquired in 10 continuous periods is smaller than 30, the open-circuit fault of the load to be detected can be determined.

Therefore, whether the load to be tested has an open circuit fault or not can be determined through multiple times of judgment, and inaccuracy of single judgment is avoided.

In some embodiments, to improve the accuracy of fault detection, determining that the load to be tested has a short-circuit fault when the average value is greater than the fourth threshold may include:

and under the condition that M average values corresponding to the continuous M sampling periods are all larger than a fourth threshold value, determining that the load to be tested has short circuit faults.

Here, M may be an integer greater than 1.

For example, if the average value of the first electrical parameter and the second electrical parameter acquired in 10 consecutive periods is greater than 900, it may be determined that the load to be tested has a short circuit fault.

Therefore, whether the load to be tested has a short circuit fault or not can be determined through multiple times of judgment, and inaccuracy of single judgment is avoided.

To better describe the overall scheme, based on the above embodiments, as a specific example, as shown in fig. 3, the fault detection method may include S301-S308, which will be explained in detail below.

S301, under the condition that a load to be measured is in a working state, acquiring a first electric parameter and a second electric parameter of the load to be measured at a target moment.

S302, determining a difference value between the first electrical parameter and the second electrical parameter.

S303, judging whether the difference exceeds a first threshold, if so, executing S307, and if not, executing S304.

S304, determining an average value of the first electrical parameter and the second electrical parameter.

S305, judging whether the average value exceeds a preset range, if so, executing S306, and if not, returning to executing S301.

S306, turning off PWM output and reporting fault.

S307, the sampling error count is added to 1.

S308, judging whether the sampling error times reach a second threshold value, if so, executing S306, and if not, returning to executing S301.

The embodiment of the application also provides a fault detection system, and the fault detection system provided by the embodiment of the application is introduced below.

Fig. 4 is a schematic structural diagram of a fault detection system according to an embodiment of the present application.

As shown in fig. 4, the fault detection system 400 may include: an S32K1xx series chip 410, a high-drive chip 420 and a resistor 430.

Wherein:

the S32K1xx series chip 410 may be configured to output a PWM signal to drive the load 440 to be tested, so that the load 440 to be tested is in a working state.

The high-drive chip 420 may be configured to collect a current value of the load 440 to be tested when the load 440 to be tested is in an operating state, and send the current value to the S32K1xx series chip 410.

The S32K1xx series chip 410 may be configured to determine an electrical parameter of the load under test 440 based on the current value and the resistance value of the resistor 430. Therefore, the electrical parameter of the load to be measured 440 at the target time can be obtained in the case where the load to be measured 440 is in the operating state.

In addition, the load under test 440 may be connected to a power source, which may be grounded. The power supply may be, for example, 24V.

In some embodiments, as shown in fig. 5, the S32K1xx series chip 410 may include: FTM module 411, trigger control (Trigger MUX Control, TRGMUX) module 412, programmable delay (Programmable delay block, PDB) module 413, first ADC module 414, and second ADC module 415.

Wherein:

FTM module 411 is a time module, and may output a PWM waveform externally, or may trigger internally, and trigger TRGMUX module 412 while generating a PWM waveform.

The FTM module 411 may be configured to have a clock of 62.5KHz/s, output a PWM waveform in an edge alignment mode, a frequency of 100Hz, a duty cycle of 50%, and an internal trigger mode.

The specific configuration of FTM module 411 is as follows:

s1.1: configuring FTM module SC registers

1) 128 frequency division is configured, sc.ps=7

2) Configuring an FTM module clock source as an FTM input clock source, sc.clks=3

3) Configuring a PWM output mode of the FTM module as an edge alignment mode, and enabling SC.CPWMS=0

4) Configuring an nth channel of the FTM module as a PWM output, sc.pwmen=1

5) Frequency division coefficient of the FTM module is configured to be 1, and sc.fltps=0

S1.2: configuring an FTM module MOD register

1) FTM module count value 625 is configured, mod=625

S1.3: SC register and numerical value for configuring n channel of FTM module

1) Inhibit memory direct access (Direct Memory Access, DMA) function, cnsc.dma=0

2) Capture function is disabled, cnsc.icrst=0

3) Configuring the channels into an edge alignment mode, cnsc.elsa=0

4) Configuring the channels into an edge alignment mode, cnsc.elsb=1

5) Configuring the channels into an edge alignment mode, cnsc.msa=1

6) Configuring the channels into an edge alignment mode, cnsc.msb=1

7) Channel disruption is prohibited, cnsc.chie=0

8) No additional pulse is generated when PWM is generated, cnsc. Trigmode=0

9) Configure the channel final output to be 0, cnsc. Chov=0

10 For example), when the configuration channel matching value is 312, output is started, cnV =312

S1.4: configuring CNTIN register of FTM module

Configuring the FTM module count reset value to be 0, cntin=0

S1.5: configuring FTM module external triggers

Configuration channel n is an internal trigger mode, chntrig=1

And n represents a channel corresponding to the FTM module, wherein the channel is a physical channel for outputting PWM.

TRGMUX module 412 provides a very flexible mechanism to connect various trigger sources to multiple pins/peripherals so that TRGMUX module 412 can connect the trigger signals of FTM module 411 to PDB module 413.

The specific configuration of the PDB module 413 is as follows:

s2: configuring TRGMUX_PDB1 register, inputting the trigger generated by S1.5 into PDB1 module,

TRGMUX_PDB1.SEL0＝Trigger_Source

TRGMUX_PDB1.LK＝1

the PDB module 413 is a programmable delay block, and because the FTM and PDB modules use the same time base, the target time can be loaded to the PDB module 413, and then the first ADC module 414 and the second ADC module 415 are triggered.

The PDB module 413 may be configured to have a clock of 62.5KHz/s, with the PDB input source from the output of TRGMUX module 412.

The specific configuration of the PDB module 413 is as follows:

s3.1: configuring a PDB module SC register

1) Enable PDB module, sc.pdben=1

2) The trigger mode is selected as TRGMUX output, SC.TRGSEL=0

3) The PDB module is configured to divide 128, sc.prescaler=7

4) Disabling DMA module, sc.dmaen=0

5) Enabling PDB sequence error interrupts, sc.pdbeie=1

S3.2: configuring MOD registers

Configuring MOD register value as 156, triggering ADC module when PDB module count reaches 156

MOD＝156

S3.3: configuring PDB module CHnC1 register

1) N-channel pre-trigger enable of PDB, chnc1.en=1

2) The n-channel of PDB turns off bypass mode, chnc1. Tos=0

3) N-channel back-to-back mode configuration of PDB, chnc1.bb=0

S3.4: configuring PDB module CHnS register

Enabling the nth lane, mth mini lane, chns.cf=m of PDB module

S3.5: configuring PDB module CHnDLYm register

Configuring the mth small channel delay of the nth channel of the PDB module to be 156, chndlym=156

The above n represents the channel of the PDB module 413, and m represents the PWM duty cycle midpoint value of 50% of the value of 156 is 100Hz, where the nth channel corresponds to the mth small channel.

The first ADC block 414 and the second ADC block 415 may sample simultaneously. The S32K1xx can support hardware interleaving among multiple ADCs, so that the first ADC module 414 and the second ADC module 415 can sample simultaneously after the PDB module 413 triggers ADC sampling.

The specific configuration of the first ADC block 414 and the second ADC block 415 is as follows:

s4.1: the chicttl register is configured to enable one AD sampling channel to be simultaneously input to the first ADC block 414 and the second ADC block 415.

Adc_interval_en=active (which ADC channel in particular can be configured according to the actual schematic diagram).

Based on the same inventive concept, the embodiment of the application also provides a fault detection device. The following describes in detail the fault detection apparatus provided in the embodiment of the present application with reference to fig. 6.

Fig. 6 is a schematic structural diagram of a fault detection device according to an embodiment of the present application.

As shown in fig. 6, the fault detection device may include:

an obtaining module 601, configured to obtain, when the load to be tested is in an operating state, an electrical parameter of the load to be tested at a target time, where the target time is an intermediate time of a target period, and the target period is a high level period of a PWM signal driving the load to be tested,

the first determining module 602 is configured to determine that the load to be tested fails when the electrical parameter exceeds a preset range.

In some embodiments, to more accurately determine the target time, the apparatus may further include:

the second determining module is used for determining the target moment according to the preset duty ratio and the preset period of the PWM signal before acquiring the electrical parameter of the load to be tested at the target moment under the condition that the load to be tested is in the working state.

In some embodiments, to more accurately determine whether the load to be tested is malfunctioning, the electrical parameters include a first electrical parameter and a second electrical parameter, where the first electrical parameter and the second electrical parameter are obtained by different sampling modules, the first determining module 602 may include:

a first determination sub-module for determining an average of the first electrical parameter and the second electrical parameter,

and the second determining submodule is used for determining that the load to be tested fails under the condition that the average value exceeds a preset range.

In some embodiments, to further improve the accuracy of fault detection, the first determining sub-module may include:

a first determining unit for determining a difference between the first electrical parameter and the second electrical parameter,

and a second determining unit for determining an average value in case the difference value does not exceed the first threshold value.

In some embodiments, to improve the robustness of the fault detection, the first determination submodule may further include:

an accumulation unit for adding 1 to the number of sampling errors in case the difference exceeds a first threshold,

a third determining unit for determining whether the number of sampling errors reaches a second threshold,

an iteration unit for returning to execute the process of obtaining the electrical parameter of the load to be tested at the target moment under the condition that the load to be tested is in the working state under the condition that the sampling error times do not reach the second threshold value,

the output unit is used for setting the sampling error number to 0 under the condition that the sampling error number reaches a second threshold value, and outputting first prompt information, wherein the first prompt information is used for prompting sampling errors.

In some embodiments, to accurately determine the fault type of the load to be measured, the second determination submodule may include:

a fourth determining unit for determining that the load to be tested has an open circuit fault if the average value is smaller than the third threshold value,

and the fifth determining unit is used for determining that the load to be tested has a short circuit fault under the condition that the average value is larger than the fourth threshold value, and the third threshold value is smaller than the fourth threshold value.

In some embodiments, to improve the accuracy of the fault detection, the fourth determining unit may include:

and the first determination subunit is used for determining that the load to be tested has an open circuit fault under the condition that N average values corresponding to the continuous N sampling periods are smaller than a third threshold value, and N is an integer larger than 1.

In some embodiments, to improve the accuracy of the fault detection, the fifth determining unit may include:

and the second determining subunit is used for determining that the load to be tested has a short circuit fault under the condition that M average values corresponding to the continuous M sampling periods are all larger than a fourth threshold value, and M is an integer larger than 1.

In some embodiments, the load to be measured may be a backlight.

As shown in fig. 7, the electronic device 7 is capable of implementing a structural diagram of an exemplary hardware architecture of the electronic device according to the fault detection method and the fault detection apparatus in the embodiment of the present application. The electronic device may refer to an electronic device in an embodiment of the present application.

The electronic device 7 may comprise a processor 701 and a memory 702 storing computer program instructions.

In particular, the processor 701 may comprise a Central Processing Unit (CPU), or an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), or may be configured as one or more integrated circuits implementing embodiments of the present application.

Memory 702 may include mass storage for data or instructions. By way of example, and not limitation, memory 702 may comprise a Hard Disk Drive (HDD), floppy Disk Drive, flash memory, optical Disk, magneto-optical Disk, magnetic tape, or universal serial bus (Universal Serial Bus, USB) Drive, or a combination of two or more of the foregoing. The memory 702 may include removable or non-removable (or fixed) media, where appropriate. Memory 702 may be internal or external to the integrated gateway disaster recovery device, where appropriate. In a particular embodiment, the memory 702 is a non-volatile solid state memory. In particular embodiments, memory 702 may include Read Only Memory (ROM), random Access Memory (RAM), magnetic disk storage media devices, optical storage media devices, flash memory devices, electrical, optical, or other physical/tangible memory storage devices. Thus, in general, the memory 702 includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software comprising computer-executable instructions and when the software is executed (e.g., by one or more processors) it is operable to perform the operations described with reference to a method in accordance with an aspect of the application.

The processor 701 implements any of the fault detection methods of the above embodiments by reading and executing computer program instructions stored in the memory 702.

In one example, the electronic device may also include a communication interface 703 and a bus 704. As shown in fig. 7, the processor 701, the memory 702, and the communication interface 703 are connected by a bus 704 and perform communication with each other.

The communication interface 703 is mainly used for implementing communication between each module, device, unit and/or apparatus in the embodiment of the present application.

Bus 704 includes hardware, software, or both that couple components of the electronic device to one another. By way of example, and not limitation, the buses may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an infiniband interconnect, a Low Pin Count (LPC) bus, a memory bus, a micro channel architecture (MCa) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a video electronics standards association local (VLB) bus, or other suitable bus, or a combination of two or more of the above. Bus 704 may include one or more buses, where appropriate. Although embodiments of the application have been described and illustrated with respect to a particular bus, the application contemplates any suitable bus or interconnect.

The electronic device may perform the fault detection method in the embodiment of the present application, thereby implementing the fault detection method and apparatus described in connection with fig. 1 to 6.

In addition, in combination with the fault detection method in the above embodiment, the embodiment of the present application may be implemented by providing a computer storage medium. The computer storage medium has stored thereon computer program instructions which, when executed by a processor, implement any of the fault detection methods of the above embodiments.

It should be understood that the application is not limited to the particular arrangements and instrumentality described above and shown in the drawings. For the sake of brevity, a detailed description of known methods is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method processes of the present application are not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between steps, after appreciating the spirit of the present application.

The functional blocks shown in the above-described structural block diagrams may be implemented in hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, a plug-in, a function card, or the like. When implemented in software, the elements of the application are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine readable medium or transmitted over transmission media or communication links by a data signal carried in a carrier wave. A "machine-readable medium" may include any medium that can store or transfer information. Examples of machine-readable media include electronic circuitry, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio Frequency (RF) links, and the like. The code segments may be downloaded via computer networks such as the internet, intranets, etc.

It should also be noted that the exemplary embodiments mentioned in this disclosure describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, or may be performed in a different order from the order in the embodiments, or several steps may be performed simultaneously.

Aspects of the present application are described above with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a processor may be, but is not limited to being, a general purpose processor, a special purpose processor, an application specific processor, or a field programmable logic circuit. It will also be understood that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware which performs the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In the foregoing, only the specific embodiments of the present application are described, and it will be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the systems, modules and units described above may refer to the corresponding processes in the foregoing method embodiments, which are not repeated herein. It should be understood that the scope of the present application is not limited thereto, and any equivalent modifications or substitutions can be easily made by those skilled in the art within the technical scope of the present application, and they should be included in the scope of the present application.

Claims

1. A method of fault detection, the method comprising:

under the condition that a load to be measured is in a working state, acquiring the electrical parameter of the load to be measured at a target time, wherein the target time is the middle time of a target time period, the target time period is a high level time period of a Pulse Width Modulation (PWM) signal for driving the load to be measured,

and under the condition that the electric parameter exceeds a preset range, determining that the load to be tested fails.

2. The method according to claim 1, wherein before acquiring the electrical parameter of the load under test at the target moment in the case where the load under test is in an operating state, the method further comprises:

3. The method of claim 1, wherein the electrical parameters comprise a first electrical parameter and a second electrical parameter, the first electrical parameter and the second electrical parameter being obtained by different sampling modules,

and under the condition that the electrical parameter exceeds a preset range, determining that the load to be tested fails comprises the following steps:

determining an average of the first electrical parameter and the second electrical parameter,

4. A method according to claim 3, wherein said determining an average of said first electrical parameter and said second electrical parameter comprises:

in case the difference does not exceed a first threshold, the average value is determined.

5. The method according to claim 4, wherein the method further comprises:

in case the difference exceeds the first threshold, the number of sampling errors is increased by 1,

determining whether the number of sampling errors reaches a second threshold,

and setting the sampling error number to 0 under the condition that the sampling error number reaches the second threshold value, and outputting first prompt information, wherein the first prompt information is used for prompting sampling errors.

6. A method according to claim 3, wherein determining that the load under test is faulty in the event that the average value exceeds a preset range comprises:

and under the condition that the average value is larger than a fourth threshold value, determining that the load to be tested has short-circuit fault, wherein the third threshold value is smaller than the fourth threshold value.

7. The method of claim 6, wherein determining that the load under test has an open circuit fault if the average value is less than a third threshold value comprises:

and under the condition that N average values corresponding to N continuous sampling periods are smaller than the third threshold value, determining that the load to be tested has an open circuit fault, wherein N is an integer larger than 1.

8. The method of claim 6, wherein determining that the load under test has a short circuit fault if the average value is greater than a fourth threshold value comprises:

and under the condition that M average values corresponding to the continuous M sampling periods are all larger than the fourth threshold value, determining that the load to be tested has short circuit faults, wherein M is an integer larger than 1.

9. The method of claim 1, wherein the load to be tested is a backlight.

10. A fault detection device, the device comprising:

an acquisition module, configured to acquire an electrical parameter of a load to be measured at a target time when the load to be measured is in a working state, where the target time is an intermediate time of a target period, and the target period is a high level period of a PWM signal driving the load to be measured,

and the first determining module is used for determining that the load to be tested breaks down under the condition that the electric parameter exceeds a preset range.