CN116540146B - GPIO short circuit detection method and GPIO short circuit detection system - Google Patents
GPIO short circuit detection method and GPIO short circuit detection system Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
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Abstract
The invention discloses a GPIO short circuit detection method and a detection system thereof, wherein the detection method comprises the following steps: configuring a GPIO port on a microcontroller chip into a push-pull output mode; configuring an output configuration value of the GPIO port, and acquiring an input detection value of the GPIO port; and comparing the output configuration value with the input detection value, and judging the short circuit condition of the GPIO port according to a comparison result. The method and the device utilize the characteristics of the microcontroller chip, adopt the same IO port to carry out output and input detection, acquire the output configuration value and the input detection value of the GPIO port through the input data register, the output data register and the like, compare the output configuration value with the input detection value, and judge whether the GPIO port is short-circuited according to the comparison result. Compared with the prior art, the short circuit detection circuit additionally arranged is adopted for detection, so that the cost of the whole circuit and the PCB area are reduced.
Description
Technical Field
The present invention relates to the field of integrated circuits, and in particular, to a GPIO short-circuit detection method and a GPIO short-circuit detection system.
Background
The MCU (Micro Controller Unit, microcontroller chip) can be connected with peripheral circuit through the IO port, before or during the use, the circuit can take place the short circuit and lead to the electric current too big and burn out the chip and thus influence whole circuit. Through setting General-purpose input/output (GPIO), the short circuit condition of each GPIO can be detected, and the short circuit can be timely reported when the short circuit occurs, so that the loss is reduced.
In the prior art, short circuit detection is realized through a special short circuit detection circuit, and extra devices are needed, so that the cost and the PCB area are increased.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the GPIO short circuit detection method and the GPIO short circuit detection system are provided to solve the problems of high cost and large PCB area in the prior art that short circuit detection is performed by adopting a short circuit detection circuit.
In order to solve the technical problems, the invention adopts the following technical scheme:
a GPIO short circuit detection method comprises the following steps:
configuring a GPIO port on a microcontroller chip into a push-pull output mode;
configuring an output configuration value of the GPIO port, and acquiring an input detection value of the GPIO port;
and comparing the output configuration value with the input detection value, and judging the short circuit condition of the GPIO port according to a comparison result.
Further, the step of configuring the output configuration value of the GPIO port and obtaining the input detection value of the GPIO port includes:
providing an output data register, configuring said output configuration value of said GPIO port by configuring said output data register;
an input data register is provided to register input data of the GPIO port and to obtain the input detection value of the GPIO port from the input data register.
Further, the step of comparing the output configuration value with the input detection value and judging the short circuit condition of the GPIO port according to the comparison result includes:
configuring the output configuration value to be 1 by configuring the output data register, and recording the output configuration value as a first output configuration value;
reading out the input detection value through the input data register and recording the input detection value as a first input detection value;
comparing the first output configuration value with the first input detection value;
when the first output configuration value is not equal to the first input detection value, judging that the periphery of the GPIO port is short-circuited to ground;
when the first output configuration value is equal to the first input detection value, configuring the output configuration value to be 0 by configuring the output data register, and recording the output configuration value as a second output configuration value;
reading out the input detection value through the input data register and recording the input detection value as a second input detection value;
comparing the second output configuration value with the second input detection value;
when the second output configuration value is equal to the second input detection value, judging that the GPIO port is not short-circuited;
and when the second output configuration value is not equal to the second input detection value, judging that the periphery of the GPIO port is short-circuited to a power supply.
Further, the step of comparing the output configuration value with the input detection value and judging the short circuit condition of the GPIO port according to the comparison result includes:
providing an exclusive or gate logic element, and connecting the input and the output of the GPIO through the exclusive or gate logic element;
the output configuration value is compared with the input detection value by the exclusive or gate logic element.
Further, the step of comparing the output configuration value with the input detection value and judging the short circuit condition of the GPIO port according to the comparison result further includes:
providing an exclusive or gate input data register, and registering an output result of the exclusive or gate logic element in the exclusive or gate input data register.
A GPIO short circuit detection system comprises an output data register, an input driver, an output driver, a GPIO port and a first processing module;
the output data register is connected with the output driver and the GPIO port through the output driver, and is used for configuring an output configuration value of the GPIO port;
the input data register is connected with the input driver and the GPIO port through the input driver, and is used for registering an input detection value sent by the GPIO port;
the first processing module is respectively connected with the input data register and the output data register, and is used for comparing the output configuration value with the input detection value and judging the short circuit condition of the GPIO port according to the comparison result.
Further, the input driver adopts a schmitt trigger.
Further, the output driver comprises an output control unit, a first field effect transistor of a P channel and a second field effect transistor of an N channel;
the output control unit is respectively connected with the output data register, the grid electrode of the first field effect tube and the grid electrode of the second field effect tube, the source electrode of the first field effect tube is used for being connected with a power supply voltage, the drain electrode of the first field effect tube is respectively connected with the drain electrode of the second field effect tube and the GPIO port, the drain electrode of the second field effect tube is grounded, and the output control unit is used for controlling the first field effect tube and the second field effect tube to output corresponding signals to the GPIO port according to the output configuration value.
Further, the GPIO short-circuit detection system further comprises a first protection diode and a second protection diode;
the anode of the first protection diode is connected with the GPIO port, the input driver and the output driver respectively, and the cathode of the first protection diode is used for being connected with a power supply voltage;
and the cathode of the second protection diode is respectively connected with the GPIO port, the input driver and the output driver, and the anode of the second protection diode is grounded.
A GPIO short circuit detection system comprises an output data register, an exclusive-OR gate input data register, an input driver, an output driver, a GPIO port, an exclusive-OR gate logic element and a second processing module;
the output data register is connected with the output driver and the GPIO port through the output driver, and is used for configuring an output configuration value of the GPIO port;
the first input end of the exclusive-or gate logic element is connected with the input driver, the second input end of the exclusive-or gate logic element is connected with the output data register, the output end of the exclusive-or gate logic element is connected with the exclusive-or gate input data register, and the exclusive-or gate logic element is used for carrying out exclusive-or operation on the input detection value of the GPIO port and the output configuration value configured by the output data register and outputting an operation result;
the exclusive-OR gate input data register is used for registering an operation result output by the exclusive-OR gate logic element;
the second processing module is connected with the exclusive-or gate input data register, and is used for reading the operation result from the exclusive-or gate input data register and judging the short circuit condition of the GPIO port according to the operation result.
The invention has the beneficial effects that: the method and the device utilize the characteristics of the microcontroller chip, adopt the same IO port to carry out output and input detection, acquire the output configuration value and the input detection value of the GPIO port through the input data register, the output data register and the like, compare the output configuration value with the input detection value, and judge whether the GPIO port is short-circuited according to the comparison result. Compared with the prior art, the short circuit detection circuit additionally arranged is adopted for detection, so that the cost of the whole circuit and the PCB area are reduced.
Drawings
FIG. 1 is a first flow chart of a GPIO short circuit detection method according to an embodiment of the present invention;
FIG. 2 is a second flow chart of a GPIO short circuit detection method according to an embodiment of the present invention;
FIG. 3 is a third flow chart of a method for detecting a short circuit of a GPIO according to an embodiment of the present invention;
FIG. 4 is a second flowchart of a GPIO short circuit detection method according to a second embodiment of the present invention;
FIG. 5 is a schematic block diagram of a GPIO short circuit detection system according to a third embodiment of the present invention;
fig. 6 is a schematic block diagram of a GPIO short-circuit detection system according to a fourth embodiment of the present invention.
Description of the reference numerals:
100. an output data register; 200. an input data register; 300. an input driver; 400. an output driver; 410. an output control unit; 500. a first processing module; 600. a second processing module; 700. an exclusive-or gate logic element; 800. the exclusive or gate inputs the data register.
Detailed Description
In order to describe the technical contents, the achieved objects and effects of the present invention in detail, the following description will be made with reference to the embodiments in conjunction with the accompanying drawings.
Example 1
Referring to fig. 1 to 3, the present embodiment provides a GPIO short circuit detection method applied to detect GPIO ports of a micro-controller chip.
Referring to fig. 1, the method includes the steps of:
s10, configuring a GPIO port on a microcontroller chip into a push-pull output mode;
before this step, the microcontroller chip is initialized.
S20, configuring an output configuration value of the GPIO port, and acquiring an input detection value of the GPIO port;
s30, comparing the output configuration value with the input detection value, and judging the short circuit condition of the GPIO port according to a comparison result.
According to the GPIO short circuit detection method, the characteristics of the micro-controller chip are utilized, the same IO output and input detection is adopted, the output configuration value and the input detection value of the GPIO port are obtained through the input data register and the output data register integrated in the micro-controller chip, the output configuration value and the input detection value can be compared through the comparison device in the micro-controller, and whether the GPIO port is short circuited or not is judged according to the comparison result. Compared with the prior art, the short circuit detection circuit additionally arranged is adopted for detection, so that the cost of the whole circuit and the PCB area are reduced.
Referring to fig. 2, in some embodiments, step S20 includes:
s21a, providing an output data register, and configuring the output configuration value of the GPIO port by configuring the output data register;
s22a, providing an input data register to register input data of the GPIO port, and acquiring the input detection value of the GPIO port from the input data register.
Referring to fig. 3, specifically, step S30 includes:
a1, configuring the output configuration value to be 1 by configuring the output data register, and recording the output configuration value as a first output configuration value;
a2, reading out the input detection value through the input data register and recording the input detection value as a first input detection value;
a3, comparing the first output configuration value with the first input detection value;
a41, when the first output configuration value is not equal to the first input detection value, judging that the periphery of the GPIO port is in short circuit to ground;
a42, when the first output configuration value is equal to the first input detection value, configuring the output configuration value to be 0 by configuring the output data register, and recording the output configuration value as a second output configuration value;
a5, reading out the input detection value through the input data register and recording the input detection value as a second input detection value;
a6, comparing the second output configuration value with the second input detection value;
a71, when the second output configuration value is equal to the second input detection value, judging that the GPIO port is not shorted;
a72, when the second output configuration value is not equal to the second input detection value, judging that the power supply is short-circuited at the periphery of the GPIO port.
It can be understood that in this embodiment, the output configuration value of the port output data register of the GPIO is configured to be 1 or 0, so as to control the GPIO port to output high and low levels, and the high and low level states of the peripheral circuit are determined by reading the value of the port input data register.
Example two
Referring to fig. 1 and 4, another GPIO short-circuit detection method is provided in this embodiment.
Referring to fig. 1, the method includes the steps of:
s10, configuring a GPIO port on a microcontroller chip into a push-pull output mode;
before this step, the microcontroller chip is initialized.
S20, configuring an output configuration value of the GPIO port, and acquiring an input detection value of the GPIO port;
s30, comparing the output configuration value with the input detection value, and judging the short circuit condition of the GPIO port according to a comparison result.
Referring to fig. 4, the difference between the first embodiment and the second embodiment is that step S30 of the present embodiment includes:
s21b, providing an exclusive OR gate logic element, and connecting the input and the output of the GPIO through the exclusive OR gate logic element;
s22b, comparing the output configuration value with the input detection value through the exclusive OR gate logic element.
Specifically, step S30 further includes: providing an exclusive or gate input data register, and registering an output result of the exclusive or gate logic element in the exclusive or gate input data register.
It can be understood that the input and output of the GPIO ports are connected by the exclusive or gate, if the input and output results are consistent, the output of the exclusive or gate logic element is 0, if the input and output results are inconsistent, the output of the exclusive or gate logic element is 1, the results are stored in the exclusive or gate input data register, and the peripheral short circuit condition of each GPIO can be known through reading the exclusive or gate input data register. Similarly, the input result determination can be performed once when the output of the GPIO port is used every time, and whether the short circuit condition exists can be determined as well through the reading of the register.
Therefore, the embodiment can directly read the value of the exclusive or gate input data register without reading the value of the input/output data register and comparing the value, so as to determine whether the periphery is shorted, and shorten the detection flow.
Example III
Referring to fig. 5, the present embodiment provides a GPIO short-circuit detection system, which adopts the GPIO short-circuit detection method described in the first embodiment.
The GPIO short-circuit detection system includes an output data register 100, an input data register 200, an input driver 300, an output driver 400, a GPIO port J1, and a first processing module 500. The output data register 100 is connected to the output driver 400 and to the GPIO port J1 via the output driver 400, and the output data register 100 is configured to configure an output configuration value of the GPIO port J1. The input data register 200 is connected to the input driver 300 and to the GPIO port J1 via the input driver 300, and the input data register 200 is used for registering an input detection value sent by the GPIO port J1. The first processing module 500 is respectively connected to the input data register 200 and the output data register 100, and is configured to compare the output configuration value with the input detection value, and determine a short circuit condition of the GPIO port J1 according to a comparison result. The GPIO port J1 is one of the I/O pins of the microcontroller chip.
The principle of the GPIO short-circuit detection system of this embodiment is: the front-stage functional module of the output data register 100 writes the configuration confidence into the output data register 100, so that the output data register 100 configures the output matching value of the GPIO port J1, and outputs the output matching value to the GPIO port J1 after being driven by the output driver 400, and after the GPIO is configured into the output mode, the GPIO can be controlled to output high and low levels through the configuration of the register. The input signal of the GPIO port J1 is driven by the input driver 300 and is registered in the input data register 200, and the corresponding input detection value can be read from the input data register 200, for example, the register is only readable, the GPIO detects the high-low level state of IO through the input driver 300 and stores the state in the input data register 200, and the value of the register can be read without reconfiguring the GPIO mode. The first processing module 500 obtains the output configuration value and the input detection value respectively, compares the output configuration value and the input detection value, and determines whether the GPIO port J1 is shorted according to the comparison result. The output data register 100, the input data register 200, the input driver 300, the output driver 400, the GPIO port J1, and the first processing module 500 are all integrated on the micro-controller chip, and the first processing module 500 may be responsible for writing configuration information, reading information, transmitting information, and other tasks, which are not limited herein.
Specifically, by configuring the output data register 100, the output configuration value is configured to be 1 and recorded as the first output configuration value, and at this time, the input detection value is read out from the input data register 200 and recorded as the first input detection value. And when the first output configuration value is equal to the first input detection value, judging that the periphery of the GPIO port J1 is short-circuited to ground. Further, when the first output configuration value is not equal to the first input detection value, the output configuration value is configured to be 0 by configuring the output data register 100 and recorded as a second output configuration value. The input detection value is read out from the input data register 200 at this time and recorded as a second input detection value. When the second output configuration value is equal to the second input detection value, judging that the GPIO port J1 is not short-circuited; and when the second output configuration value is not equal to the second input detection value, judging that the periphery of the GPIO port J1 is short-circuited to the power supply.
It can be appreciated that compared with the prior art that the short circuit detection circuit is additionally arranged for detection, the GPIO short circuit detection system of the embodiment reduces the cost of the whole circuit and the area of the PCB.
In some embodiments, the input driver 300 employs a schmitt trigger in order to suppress noise.
In some embodiments, the output driver 400 includes an output control unit 410, a first fet Q1 for P-channel, and a second fet Q2 for N-channel. The output control unit 410 is respectively connected to the output data register 100, the gate of the first field effect transistor Q1 and the gate of the second field effect transistor Q2, the source of the first field effect transistor Q1 is used for accessing a supply voltage, the drain of the first field effect transistor Q1 is respectively connected to the drain of the second field effect transistor Q2 and the GPIO port J1, the drain of the second field effect transistor Q2 is grounded, and the output control unit 410 is used for controlling the first field effect transistor Q1 and the second field effect transistor Q2 to output corresponding signals to the GPIO port J1 according to the output configuration value.
It can be appreciated that the present embodiment is advantageous for enhancing the driving capability of the output by employing a pair of complementary field effect transistors.
In some embodiments, to protect the GPIO port J1, the GPIO short-circuit detection system further comprises a first protection diode D1 and a second protection diode D2. The anode of the first protection diode D1 is connected to the GPIO port J1, the input driver 300 and the output driver 400, respectively, and the cathode of the first protection diode D1 is used for accessing a supply voltage. The cathode of the second protection diode D2 is connected to the GPIO port J1, the input driver 300 and the output driver 400, respectively, and the anode of the second protection diode D2 is grounded.
Illustratively, the GPIO short-circuit detection system may also employ a timer or other timing means to perform short-circuit detection of the GPIO to ensure safe operation of the system.
Example IV
Referring to fig. 6, another GPIO short-circuit detection system is provided in this embodiment, and the GPIO short-circuit detection method described in the second embodiment is adopted.
The GPIO short-circuit detection system includes an output data register 100, an exclusive-or gate input data register 800, an input driver 300, an output driver 400, a GPIO port J1, an exclusive-or gate logic element 700, and a second processing module 600. The output data register 100 is connected to the output driver 400 and to the GPIO port J1 via the output driver 400, and the output data register 100 is configured to configure an output configuration value of the GPIO port J1.
A first input end of the exclusive-or gate logic element 700 is connected to the input driver 300, a second input end of the exclusive-or gate logic element 700 is connected to the output data register 100, an output end of the exclusive-or gate logic element 700 is connected to the exclusive-or gate input data register 800, and the exclusive-or gate logic element 700 is configured to perform an exclusive-or operation on the input detection value of the GPIO port J1 and the output configuration value configured by the output data register 100, which are sent by the input driver 300, and output an operation result.
The xor gate input data register 800 is used for registering the operation result output by the xor gate logic element 700. The second processing module 600 is connected to the xor gate input data register 800, and the second processing module 600 is configured to read the operation result from the xor gate input data register 800, and determine a short circuit condition of the GPIO port J1 according to the operation result.
As can be understood, in the present embodiment, compared with the third embodiment, the input/output of the GPIO port J1 is connected by the exclusive or gate, if the input and output results are identical, the output of the exclusive or gate logic element 700 is 0, if the input and output results are not identical, the output of the exclusive or gate logic element 700 is 1, the result is stored in the exclusive or gate input data register 800, and the peripheral short circuit condition of each GPIO can be known by reading the exclusive or gate input data register 800. Therefore, the value of the input/output data register 100 is not required to be read and compared, and the value of the exclusive or gate input data register 800 is directly read, so that whether the peripheral is shorted can be determined, and the detection flow is shortened.
Further, the specific arrangements of the input driver 300, the output driver 400, the GPIO port J1, and the like in the present embodiment can refer to the technical content in the third embodiment, and will not be described herein again.
In summary, the GPIO short-circuit detection method and the GPIO short-circuit detection system provided by the invention utilize the characteristics of the microcontroller chip, perform output and input detection by using the same IO port, obtain the output configuration value and the input detection value of the GPIO port through the input and output data registers, compare the output configuration value and the input detection value, and determine whether the GPIO port is short-circuited according to the comparison result. Compared with the prior art that the short circuit detection circuit is additionally arranged for detection, the GPIO short circuit detection method and the GPIO short circuit detection system ensure that the peripheral circuit can be found and processed in time when short circuit occurs, meanwhile, circuits and devices are not additionally arranged, and the cost of the whole circuit and the PCB area are reduced.
In addition, in the GPIO short-circuit detection system of the present application, the input and output of the GPIO ports may be connected by an exclusive or gate, the operation result of the exclusive or gate may be stored in an exclusive or gate input data register, and the peripheral short-circuit condition of each GPIO may be known by reading the exclusive or gate input data register. The value of the input data register of the exclusive or gate can be directly read without reading the value of the input data register and comparing the value, so that whether the peripheral is short-circuited can be judged, and the detection flow is shortened.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent changes made by the specification and drawings of the present invention, or direct or indirect application in the relevant technical field, are included in the scope of the present invention.
Claims (8)
1. The GPIO short circuit detection method is characterized by comprising the following steps:
configuring a GPIO port on a microcontroller chip into a push-pull output mode;
configuring an output configuration value of the GPIO port, and acquiring an input detection value of the GPIO port;
comparing the output configuration value with the input detection value, and judging the short circuit condition of the GPIO port according to a comparison result;
the output configuration value of the port output data register of the configuration GPIO is 1 or 0 so as to control the GPIO port to output high and low levels, and the high and low level states of the peripheral circuit are judged by reading the value of the port input data register;
comparing the output configuration value with the input detection value, and judging the short circuit condition of the GPIO port according to the comparison result, wherein the step of comparing the output configuration value with the input detection value comprises the following steps:
configuring the output configuration value to be 1 by configuring the output data register, and recording the output configuration value as a first output configuration value;
reading out the input detection value through the input data register and recording the input detection value as a first input detection value;
comparing the first output configuration value with the first input detection value;
when the first output configuration value is not equal to the first input detection value, judging that the periphery of the GPIO port is short-circuited to ground;
when the first output configuration value is equal to the first input detection value, configuring the output configuration value to be 0 by configuring the output data register, and recording the output configuration value as a second output configuration value;
reading out the input detection value through the input data register and recording the input detection value as a second input detection value;
comparing the second output configuration value with the second input detection value;
when the second output configuration value is equal to the second input detection value, judging that the GPIO port is not short-circuited;
and when the second output configuration value is not equal to the second input detection value, judging that the periphery of the GPIO port is short-circuited to a power supply.
2. The GPIO short-circuit detection method of claim 1 wherein the step of configuring the output configuration value of the GPIO port and obtaining the input detection value of the GPIO port comprises:
providing an output data register, configuring said output configuration value of said GPIO port by configuring said output data register;
an input data register is provided to register input data of the GPIO port and to obtain the input detection value of the GPIO port from the input data register.
3. The GPIO short-circuit detection method of claim 1, wherein the step of comparing the output configuration value with the input detection value and determining the short-circuit condition of the GPIO port according to the comparison result comprises:
providing an exclusive or gate logic element, and connecting the input and the output of the GPIO through the exclusive or gate logic element;
the output configuration value is compared with the input detection value by the exclusive or gate logic element.
4. The GPIO short-circuit detection method of claim 3 wherein the step of comparing the output configuration value with the input detection value and determining the short-circuit condition of the GPIO port based on the comparison result further comprises:
providing an exclusive or gate input data register, and registering an output result of the exclusive or gate logic element in the exclusive or gate input data register.
5. The GPIO short circuit detection system is characterized by comprising an output data register, an input driver, an output driver, a GPIO port and a first processing module;
the output data register is connected with the output driver and the GPIO port through the output driver, and is used for configuring an output configuration value of the GPIO port;
the input data register is connected with the input driver and the GPIO port through the input driver, and is used for registering an input detection value sent by the GPIO port;
the first processing module is respectively connected with the input data register and the output data register, and is used for comparing the output configuration value with the input detection value and judging the short circuit condition of the GPIO port according to the comparison result
The output configuration value of the port output data register of the configuration GPIO is 1 or 0 so as to control the GPIO port to output high and low levels, and the high and low level states of the peripheral circuit are judged by reading the value of the port input data register;
the first processing module is configured to compare the output configuration value with the input detection value, and determine, according to a comparison result, a short circuit condition of the GPIO port, where the determining includes:
configuring the output configuration value to be 1 by configuring the output data register, and recording the output configuration value as a first output configuration value;
reading out the input detection value through the input data register and recording the input detection value as a first input detection value;
comparing the first output configuration value with the first input detection value;
when the first output configuration value is not equal to the first input detection value, judging that the periphery of the GPIO port is short-circuited to ground;
when the first output configuration value is equal to the first input detection value, configuring the output configuration value to be 0 by configuring the output data register, and recording the output configuration value as a second output configuration value;
reading out the input detection value through the input data register and recording the input detection value as a second input detection value;
comparing the second output configuration value with the second input detection value;
when the second output configuration value is equal to the second input detection value, judging that the GPIO port is not short-circuited;
and when the second output configuration value is not equal to the second input detection value, judging that the periphery of the GPIO port is short-circuited to a power supply.
6. The GPIO short-circuit detection system of claim 5 wherein the input driver employs a schmitt trigger.
7. The GPIO short-circuit detection system of claim 5 wherein the output driver comprises an output control unit, a first field effect transistor of a P-channel, and a second field effect transistor of an N-channel;
the output control unit is respectively connected with the output data register, the grid electrode of the first field effect tube and the grid electrode of the second field effect tube, the source electrode of the first field effect tube is used for being connected with a power supply voltage, the drain electrode of the first field effect tube is respectively connected with the drain electrode of the second field effect tube and the GPIO port, the drain electrode of the second field effect tube is grounded, and the output control unit is used for controlling the first field effect tube and the second field effect tube to output corresponding signals to the GPIO port according to the output configuration value.
8. The GPIO short-circuit detection system of claim 5 further comprising a first protection diode and a second protection diode;
the anode of the first protection diode is connected with the GPIO port, the input driver and the output driver respectively, and the cathode of the first protection diode is used for being connected with a power supply voltage;
and the cathode of the second protection diode is respectively connected with the GPIO port, the input driver and the output driver, and the anode of the second protection diode is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN116540146A (en) | 2023-08-04 |
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