CN116536635A - Chip processing method - Google Patents
Chip processing method Download PDFInfo
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- CN116536635A CN116536635A CN202210083447.4A CN202210083447A CN116536635A CN 116536635 A CN116536635 A CN 116536635A CN 202210083447 A CN202210083447 A CN 202210083447A CN 116536635 A CN116536635 A CN 116536635A
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- chip
- coating
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- argon
- cleaned
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- 238000003672 processing method Methods 0.000 title abstract description 6
- 239000011248 coating agent Substances 0.000 claims abstract description 71
- 238000000576 coating method Methods 0.000 claims abstract description 71
- 238000007747 plating Methods 0.000 claims abstract description 44
- 239000000463 material Substances 0.000 claims abstract description 36
- 239000010410 layer Substances 0.000 claims abstract description 23
- 238000004140 cleaning Methods 0.000 claims abstract description 20
- 239000011247 coating layer Substances 0.000 claims abstract description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 12
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 6
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 6
- 239000010703 silicon Substances 0.000 claims abstract description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 6
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 6
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 6
- 239000010936 titanium Substances 0.000 claims abstract description 6
- 239000004408 titanium dioxide Substances 0.000 claims abstract description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 66
- 229910052786 argon Inorganic materials 0.000 claims description 33
- 238000004544 sputter deposition Methods 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 20
- 238000010438 heat treatment Methods 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 10
- 239000013077 target material Substances 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 238000002294 plasma sputter deposition Methods 0.000 claims description 3
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 239000007789 gas Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000001816 cooling Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3457—Sputtering using other particles than noble gas ions
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/02—Pretreatment of the material to be coated
- C23C14/021—Cleaning or etching treatments
- C23C14/022—Cleaning or etching treatments by means of bombardment with energetic particles or radiation
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
- C23C14/081—Oxides of aluminium, magnesium or beryllium
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
- C23C14/083—Oxides of refractory metals or yttrium
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/10—Glass or silica
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
- C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/54—Controlling or regulating the coating process
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physical Vapour Deposition (AREA)
Abstract
The invention discloses a processing method of a chip, which comprises the following steps: performing plasma cleaning on the chip to obtain a cleaned chip; forming a pre-plating layer on the cleaned chip by using a first plating material to obtain a pre-plated chip; wherein the first coating material is silicon or titanium; forming a coating layer on the pre-coated chip by using a second coating material to obtain a coated chip; wherein the second coating material is one or more of silicon dioxide, titanium dioxide and aluminum oxide. By adopting the embodiment of the invention, the coating layer with good heat conductivity can be formed on the surface of the chip, the manufacturing cost is low, and the influence on the whole thickness of the chip is low.
Description
Technical Field
The invention relates to the technical field of microelectronic processing, in particular to a processing method of a chip.
Background
The integrated circuit is continuously improved and developed, the volume is continuously reduced, the price is continuously reduced, and the performance of the semiconductor chip at the core part is continuously improved. The chip performs operation under the condition of small size, so that a large amount of heat is necessarily generated, and if the heat is not reasonably dissipated, the working performance of the chip is affected, and the service life of the chip is shortened. The traditional heat dissipation mode mainly comprises the steps of distributing cooling pipes on the back of a chip or pasting cooling fins on the back of the chip, however, the manufacturing cost is higher, and the whole thickness of the chip can be greatly influenced.
Disclosure of Invention
The embodiment of the invention provides a processing method of a chip, which can form a coating layer with good heat conductivity on the surface of the chip, has low manufacturing cost and has lower influence on the whole thickness of the chip.
An embodiment of the present invention provides a method for processing a chip, including:
performing plasma cleaning on the chip to obtain a cleaned chip;
forming a pre-plating layer on the cleaned chip by using a first plating material to obtain a pre-plated chip; wherein the first coating material is silicon or titanium;
forming a coating layer on the pre-coated chip by using a second coating material to obtain a coated chip; wherein the second coating material is one or more of silicon dioxide, titanium dioxide and aluminum oxide.
As an improvement of the above solution, the performing plasma cleaning on the chip to obtain a cleaned chip includes:
placing the chip into a first vacuum chamber of a plasma cleaning device;
controlling the plasma cleaning equipment to vacuumize the first vacuum chamber so that the first vacuum degree is achieved in the first vacuum chamber;
argon is introduced into the first vacuum chamber, so that the air pressure in the first vacuum chamber reaches a preset air pressure;
and applying a first bias voltage on the chip, controlling the plasma cleaning equipment to generate argon plasma, and performing argon plasma sputtering on the chip to obtain the cleaned chip.
As a modification of the above, the first vacuum degree is 2.5X10 -3 -3.5×10 -3 Pa, wherein the preset air pressure is 2-3Pa, the first bias voltage is-90 to-110V, and the sputtering time of the argon plasma is 9-11min.
As an improvement of the above solution, the forming a pre-plating layer on the cleaned chip using the first plating material, to obtain a pre-plated chip, includes:
placing the cleaned chip into a second vacuum chamber of a coating device;
controlling the coating equipment to vacuumize the second vacuum chamber so that the second vacuum degree is achieved in the second vacuum chamber;
argon is introduced into the second vacuum chamber;
controlling the coating equipment to pre-sputter a first target material formed by a first coating material;
and controlling the coating equipment to perform first sputtering coating on the cleaned chip by using the first target material so as to form a pre-coating layer on the cleaned chip and obtain the pre-coated chip.
As a modification of the above, the second vacuum degree is 1×10 -5 -1×10 -3 Pa, the flow of the argon is 90-110sccm.
As an improvement of the above scheme, the technological parameters of the first sputtering coating include: the power of the power supply is 450-550W, the negative bias voltage is-450-550V, and the heating temperature of the substrate is 100-120 ℃.
As an improvement of the scheme, the thickness of the pre-plating layer is 80-100nm, and the thickness of the coating layer is 85-95nm.
As an improvement of the above solution, the forming a plating layer on the preplating chip using the second plating material to obtain a plated chip includes:
placing the pre-plated chip into a second vacuum chamber of a coating device;
controlling the coating equipment to vacuumize the second vacuum chamber so that the second vacuum chamber reaches a third vacuum degree;
argon and oxygen are introduced into the second vacuum chamber;
and controlling the coating equipment to perform second sputtering coating on the preplating chip by using a second target material formed by a second coating material so as to form a coating layer on the preplating chip and obtain the coated chip.
As a modification of the above, the third vacuum degree is 4.1X10 -1 -4.3×10 -1 Pa, wherein the flow rate of the argon is 290-310sccm, and the ratio of the argon to the oxygen is 85:15.
as an improvement of the above scheme, the technological parameters of the second sputtering coating include: the power of the target surface is 4.1-4.3W, the voltage of the target surface is 460-480V, and the heating temperature of the substrate is 100-120 ℃.
The embodiment of the invention has the following beneficial effects:
the chip is subjected to plasma cleaning to obtain a cleaned chip, so that impurities on the surface of the chip can be removed, and the coating quality is improved; forming a pre-plating layer on the cleaned chip by using a first plating material to obtain a pre-plated chip, wherein the first plating material is silicon or titanium, so that the bonding force between a subsequent plating layer and the surface of the chip can be improved, and the plating quality can be improved; and then forming a coating layer on the pre-plated chip by using a second coating material to obtain a coated chip, wherein the second coating material is one or more of silicon dioxide, titanium dioxide and aluminum oxide, so that the surface of the chip is provided with the coating layer with good heat conductivity, the coating cost is low, and the influence on the whole thickness of the chip is low.
Drawings
Fig. 1 is a flow chart of a method for processing a chip according to an embodiment of the invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, a flow chart of a chip processing method according to an embodiment of the invention includes:
s11, performing plasma cleaning on the chip to obtain a cleaned chip;
s12, forming a preplating layer on the cleaned chip by using a first coating material to obtain a preplating chip; wherein the first coating material is silicon or titanium;
s13, forming a coating layer on the pre-coated chip by using a second coating material to obtain a coated chip; wherein the second coating material is one or more of silicon dioxide, titanium dioxide and aluminum oxide.
The plating method for forming the pre-plating layer and the plating layer is not limited, and various plating methods such as vacuum plating, evaporation plating, sputtering plating, etc. may be arbitrarily selected in practice.
In the embodiment, the chip is subjected to plasma cleaning to obtain the cleaned chip, so that impurities on the surface of the chip can be removed, and the coating quality is improved; forming a pre-plating layer on the cleaned chip by using a first plating material to obtain a pre-plated chip, wherein the first plating material is silicon or titanium, so that the bonding force between a subsequent plating layer and the surface of the chip can be improved, and the plating quality can be improved; and then forming a coating layer on the pre-plated chip by using a second coating material to obtain a coated chip, wherein the second coating material is one or more of silicon dioxide, titanium dioxide and aluminum oxide, so that the surface of the chip is provided with the coating layer with good heat conductivity, the coating cost is low, and the influence on the whole thickness of the chip is low.
As an optional embodiment, the performing plasma cleaning on the chip to obtain a cleaned chip includes:
s111, placing the chip into a first vacuum chamber of plasma cleaning equipment;
s112, controlling the plasma cleaning equipment to vacuumize the first vacuum chamber so that the first vacuum degree is achieved in the first vacuum chamber;
s113, introducing argon into the first vacuum chamber to enable the air pressure in the first vacuum chamber to reach a preset air pressure;
and S114, applying a first bias voltage on the chip, controlling the plasma cleaning equipment to generate argon plasma, and performing argon plasma sputtering on the chip to obtain the cleaned chip.
Further, in order to ensure the cleaning efficiency and quality, the first vacuum degree is 2.5X10 -3 -3.5×10 -3 Pa, wherein the preset air pressure is 2-3Pa, the first bias voltage is-90 to-110V, and the sputtering time of the argon plasma is 9-11min.
Specifically, in the present embodiment, the first vacuum degree may be 2.5x10 -3 pa、2.75×10 -3 pa、3.0×10 -3 pa、3.25×10 -3 pa、3.5×10 -3 pa; the sputtering time of the argon plasma can be 9min, 9.5min, 10min, 10.5min, 11min. Of course, the sputtering time of the first vacuum degree and the argon plasma is not limited to the specific values listed above, and may be set according to actual requirements, and will not be described in more detail herein.
As an alternative embodiment, the forming a pre-plating layer on the cleaned chip by using a first plating film material, to obtain a pre-plated chip includes:
s121, placing the cleaned chip into a second vacuum chamber of a coating device;
s122, controlling the coating equipment to vacuumize the second vacuum chamber so that the second vacuum degree is achieved in the second vacuum chamber;
s123, introducing argon into the second vacuum chamber;
s124, controlling the coating equipment to pre-sputter a first target material formed by a first coating material;
s125, controlling the coating equipment to perform first sputtering coating on the cleaned chip by using the first target material so as to form a pre-coating layer on the cleaned chip and obtain the pre-coated chip.
In this embodiment, before the first sputtering film plating, the first target is sputtered in advance, so that the effect of cleaning the surface of the target can be achieved, impurities on the surface of the target can be removed, and the film plating quality is improved.
Further, in order to ensure the coating efficiency and the coating quality, the second vacuum degree is 1×10 -5 -1×10 -3 Pa, the flow of the argon is 90-110sccm.
Specifically, in the present embodiment, the second vacuum degree may be 1×10 -5 pa、1×10 -4 pa、1×10 -3 pa; the flow rate of the argon gas may be 90sccm, 95sccm, 100sccm, 105sccm, 110sccm. Of course, the second vacuum degree and the flow rate of the argon gas are not limited to the specific values listed above, and may be set according to actual requirements, and will not be further described herein.
Further, in order to ensure the coating efficiency and the coating quality, the technological parameters of the first sputtering coating include: the power of the power supply is 450-550W, the negative bias voltage is-450-550V, and the heating temperature of the substrate is 100-120 ℃.
Specifically, in the present embodiment, the power of the power source may be 450W, 475W, 500W, 525W, 550W; the negative bias may be-450V, -475V, -500V, -525V, -550V; the substrate heating temperature may be 100 ℃, 105 ℃, 110 ℃, 115 ℃, 120 ℃. Of course, the process parameters of the first sputtering coating are not limited to the specific values listed above, and may be set according to actual requirements, and will not be further described herein.
It should be noted that, other process parameters of the first sputtering coating may be freely selected except for the power supply, the negative bias and the substrate heating temperature, which are not limited herein.
As an alternative embodiment, in order to ensure better thermal conductivity and reduce the influence on the overall thickness of the chip, the thickness of the pre-plating layer is 80-100nm, and the thickness of the coating layer is 85-95nm.
Specifically, in this embodiment, the thickness of the pre-plating layer may be 80nm, 85nm, 90nm, 95nm, 100nm, and the thickness of the plating layer may be 85nm, 87.5nm, 90nm, 92.5nm, 95nm. Of course, the thickness of the pre-plating layer and the thickness of the coating layer are not limited to the specific values listed above, and may be set according to actual requirements, and will not be described herein.
As an optional embodiment, the forming a plating layer on the pre-plated chip by using the second plating material, to obtain a plated chip includes:
s131, placing the chip subjected to preplating into a second vacuum chamber of a coating device;
s132, controlling the coating equipment to vacuumize the second vacuum chamber so that the second vacuum chamber reaches a third vacuum degree;
s133, introducing argon and oxygen into the second vacuum chamber;
s134, controlling the coating equipment to perform second sputtering coating on the chip after pre-coating by using a second target material formed by a second coating material so as to form a coating layer on the chip after pre-coating, thereby obtaining the chip after coating.
Further, in order to ensure the coating efficiency and the coating quality, the third vacuum degree is 4.1X10 -1 -4.3×10 -1 Pa, wherein the flow rate of the argon is 290-310sccm, and the ratio of the argon to the oxygen is 85:15.
specifically, in the present embodiment, the third vacuum degree may be 4.1X10 -1 Pa、4.15×10 -1 Pa、4.2×10 -1 Pa、4.25×10 -1 Pa、4.3×10 -1 Pa; the flow rate of the argon gas was 290sccm, 295sccm, 300sccm, 305sccm, 310sccm. Of course, the third vacuum degree and the flow rate of the argon are not limited to the specific values listed above, and may be set according to actual requirements, and will not be further described herein.
Further, in order to ensure the coating efficiency and the coating quality, the technological parameters of the second sputtering coating include: the power of the target surface is 4.1-4.3W, the voltage of the target surface is 460-480V, and the heating temperature of the substrate is 100-120 ℃.
Specifically, in the present embodiment, the target surface power is 4.1W, 4.15W, 4.2W, 4.25W, 4.3W; the target surface voltages were 460V, 465V, 470V, 475V, 480V; the substrate heating temperature was 100 ℃, 105 ℃, 110 ℃, 115 ℃, 120 ℃. Of course, the process parameters of the second sputter coating are not limited to the specific values listed above, and may be set according to actual requirements, which will not be described herein.
It should be noted that, other process parameters of the second sputter coating may be freely selected, except for the target surface power, the target surface voltage and the substrate heating temperature, which are not limited herein.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.
Claims (10)
1. A method of processing a chip, comprising:
performing plasma cleaning on the chip to obtain a cleaned chip;
forming a pre-plating layer on the cleaned chip by using a first plating material to obtain a pre-plated chip; wherein the first coating material is silicon or titanium;
forming a coating layer on the pre-coated chip by using a second coating material to obtain a coated chip; wherein the second coating material is one or more of silicon dioxide, titanium dioxide and aluminum oxide.
2. The method for processing a chip according to claim 1, wherein the step of performing plasma cleaning on the chip to obtain a cleaned chip comprises:
placing the chip into a first vacuum chamber of a plasma cleaning device;
controlling the plasma cleaning equipment to vacuumize the first vacuum chamber so that the first vacuum degree is achieved in the first vacuum chamber;
argon is introduced into the first vacuum chamber, so that the air pressure in the first vacuum chamber reaches a preset air pressure;
and applying a first bias voltage on the chip, controlling the plasma cleaning equipment to generate argon plasma, and performing argon plasma sputtering on the chip to obtain the cleaned chip.
3. The method of processing a chip according to claim 2, wherein the first vacuum degree is 2.5X10 -3 -3.5×10 -3 Pa, wherein the preset air pressure is 2-3Pa, the first bias voltage is-90 to-110V, and the sputtering time of the argon plasma is 9-11min.
4. The method for manufacturing a chip according to claim 1, wherein the step of forming a pre-plating layer on the cleaned chip using the first plating material to obtain a pre-plated chip comprises:
placing the cleaned chip into a second vacuum chamber of a coating device;
controlling the coating equipment to vacuumize the second vacuum chamber so that the second vacuum degree is achieved in the second vacuum chamber;
argon is introduced into the second vacuum chamber;
controlling the coating equipment to pre-sputter a first target material formed by a first coating material;
and controlling the coating equipment to perform first sputtering coating on the cleaned chip by using the first target material so as to form a pre-coating layer on the cleaned chip and obtain the pre-coated chip.
5. The method of processing a chip as set forth in claim 4, wherein said second vacuum degree is 1X 10 -5 -1×10 -3 Pa, the flow of the argon is 90-110sccm.
6. The method for manufacturing a chip according to claim 4, wherein the process parameters of the first sputter coating include: the power of the power supply is 450-550W, the negative bias voltage is-450-550V, and the heating temperature of the substrate is 100-120 ℃.
7. The method of claim 1, wherein the pre-plating layer has a thickness of 80-100nm and the plating layer has a thickness of 85-95nm.
8. The method for manufacturing a chip according to claim 1, wherein the forming a plating layer on the preplating chip using the second plating material to obtain a plated chip comprises:
placing the pre-plated chip into a second vacuum chamber of a coating device;
controlling the coating equipment to vacuumize the second vacuum chamber so that the second vacuum chamber reaches a third vacuum degree;
argon and oxygen are introduced into the second vacuum chamber;
and controlling the coating equipment to perform second sputtering coating on the preplating chip by using a second target material formed by a second coating material so as to form a coating layer on the preplating chip and obtain the coated chip.
9. The method of processing a chip as set forth in claim 8, wherein said third vacuum degree is 4.1X 10 -1 -4.3×10 -1 Pa, wherein the flow rate of the argon is 290-310sccm, and the ratio of the argon to the oxygen is 85:15.
10. the method for manufacturing a chip according to claim 8, wherein the process parameters of the second sputter coating include: the power of the target surface is 4.1-4.3W, the voltage of the target surface is 460-480V, and the heating temperature of the substrate is 100-120 ℃.
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| CN202210083447.4A CN116536635A (en) | 2022-01-25 | 2022-01-25 | Chip processing method |
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| CN202210083447.4A CN116536635A (en) | 2022-01-25 | 2022-01-25 | Chip processing method |
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