CN116527065B - Direct current error automatic eliminating device and method applied to transmitter system - Google Patents
Direct current error automatic eliminating device and method applied to transmitter system Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0475—Circuits with means for limiting noise, interference or distortion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
Abstract
The embodiment of the application discloses a direct current error automatic elimination device and a method applied to a transmitter system, wherein the device comprises the following components: analog signal acquisition unit: sampling, holding and amplifying the direct current voltage at the mixer; an analog-to-digital converter: digital conversion is carried out on the analog signals; digital adaptive algorithm unit: generating a corresponding digital control signal according to the digital signal; a digital-to-analog converter: the digital control signal is converted into a corresponding analog signal for compensating the direct current error of the transmitter system accordingly. The application can automatically eliminate the DC error in the transmitter system, has simple operation, and can reduce the requirement on the DC error design of each module of the whole transmitting signal link; the application is independent of the signal chain path, and has no influence on the signal of the transmitter; the device of the application does not need to work all the time, and can be closed when not needed so as to save the power consumption of a transmitter system.
Description
Technical Field
The present application relates to the field of transmitters, and in particular, to an apparatus and method for automatically eliminating dc errors in a transmitter system.
Background
In a transmitter system, baseband I/Q signals are modulated and then transmitted to a matching network and an antenna end through an analog module such as a filter, a radio frequency module such as a mixer and a power amplifier. Because some direct current errors are inevitably generated in the whole transmitting signal link, the output end of the power amplifier can have not only needed useful signal energy, but also unexpected local oscillation leakage signal energy, and the excessive local oscillation leakage signal energy can influence the transmitting carrier suppression.
Most of the prior art starts from an analog module and a radio frequency module for optimizing a transmitting signal link, and reduces direct current error of each module as much as possible, which requires that the structure of the corresponding module is more complex. For example, the dc errors of the amplifier and mixer modules are optimized in the patent US20080278212A1 and US06642767B2, respectively, but the design complexity of the corresponding modules is increased, and some other performance of the corresponding modules is often sacrificed for optimizing the dc errors of the modules.
A typical transmitter includes a low frequency portion and a high frequency portion as shown in fig. 1. The low frequency part is mainly a filter for filtering the baseband signal to generate the I-path and Q-path signals required later. The high frequency part is mainly an oscillator, a mixer and an amplifier for mixing and amplifying signals of the I path and the Q path to output.
Disclosure of Invention
The technical problem to be solved by the embodiment of the application is to provide a direct current error automatic elimination device and method applied to a transmitter system, so as to automatically monitor and eliminate the direct current error in a transmitting signal link of the transmitter system.
To solve the above-mentioned technical problem, an embodiment of the present application proposes a direct current error automatic cancellation device applied to a transmitter system including a filter for filtering a baseband signal to generate an I-path signal and a Q-path signal, a mixer for mixing the I-path signal and the Q-path signal, and an amplifier for amplifying an output, the device comprising:
analog signal acquisition unit: sampling, holding and amplifying the direct current voltage at the mixer;
an analog-to-digital converter: digital conversion is carried out on the analog signals amplified by the analog signal acquisition unit, and the converted digital signals are delivered to the digital self-adaptive algorithm unit;
digital adaptive algorithm unit: generating a corresponding digital control signal according to the digital signal;
a digital-to-analog converter: the digital control signal is converted into a corresponding analog signal for compensating the direct current error of the transmitter system accordingly.
Further, the signal acquisition point of the analog signal acquisition unit is at the output position of the mixer or at the input position of the mixer; the compensated analog voltage signal output by the digital-to-analog converter is at the input position of a filter of the transmitter system, or at the output position of a filter of the transmitter system or at the input position of a mixer.
Further, the analog signal acquisition unit adopts a pre-amplification circuit, and the analog-to-digital converter adopts a hysteresis comparator.
Further, the digital-to-analog converter is an n-bit digital stream DAC,
the digital self-adaptive algorithm unit sequentially assigns values from the highest bit to the lowest bit of the digital stream DAC of n bits, collects the output results of the analog-to-digital converter for n times, determines final assignments according to the results, and converts the digital-to-analog converter into corresponding analog voltage signals to compensate the direct current working voltage errors of the I channel signals and the Q channel signals.
Further, the digital self-adaptive algorithm unit pre-assigns 1 to DAC < n-i >, if n-1-i is not less than zero, pre-assigns 0 to DAC < n-1-i >, reads the result of the hysteresis comparator and determines the final assignment of DAC < n-i > according to the result, wherein i starts from 1, 1 is added each time until i=n, the result of n hysteresis comparators is acquired, corresponding DAC < n-1:0> is obtained, and sequential assignment from DAC < n-1> to DAC <0> is completed; i.epsilon.n.
Correspondingly, the embodiment of the application also provides a direct current error automatic elimination method applied to the transmitter system, which comprises the following steps:
sampling and amplifying: sampling, holding and amplifying the direct-current voltage at the mixer to obtain an amplified analog signal;
analog-to-digital conversion step: digital conversion is carried out on the amplified analog signals to obtain converted digital signals;
the digital self-adaption calculation step comprises the following steps: generating a corresponding digital control signal according to the converted digital signal;
a digital-to-analog conversion step: the corresponding digital control signal is converted into an analog signal for corresponding compensation of the direct current error of the transmitter system.
Further, in the sampling amplification step, the signal sampling point is at an output position of a mixer of the transmitter system, or at an input position of the mixer; in the digital-to-analog conversion step, the output compensation analog signal is output at an input position of a filter of the transmitter system, or at an output position of the filter of the transmitter system or at an input position of a mixer.
Further, a pre-amplifying circuit is adopted for sampling, holding and amplifying in the sampling and amplifying step, and a hysteresis comparator is adopted for digital conversion in the analog-to-digital conversion step.
Further, in the digital-to-analog conversion step, an n-bit digital stream DAC is adopted to convert an analog signal; in the digital self-adaptive calculation step, the values are sequentially assigned from the highest bit to the lowest bit of an n-bit digital stream DAC, the output result of the n-time hysteresis comparator is collected, and the final assignment is determined according to the result so as to compensate the DC working voltage errors of the I channel signal and the Q channel signal.
Further, in the digital-to-analog conversion step, firstly, 1 is pre-assigned to DAC < n-i >, if n-1-i is not smaller than zero, the DAC < n-1-i > is pre-assigned to DAC <0>, the result of the hysteresis comparator is read, and the final assignment of DAC < n-i > is determined according to the result, wherein i starts from 1, 1 is added each time until i=n, the result of the hysteresis comparator is acquired n times, the corresponding DAC < n-1:0> is obtained, and the sequential assignment from DAC < n-1> to DAC <0> is completed; i.epsilon.n.
The beneficial effects of the application are as follows: the application can automatically eliminate the DC error in the transmitter system, has simple operation, and can reduce the requirement on the DC error design of each module of the whole transmitting signal link; the application is independent of the signal chain path, and has no influence on the signal of the transmitter; the device of the application does not need to work all the time, and can be closed when not needed so as to save the power consumption of a transmitter system.
Drawings
Fig. 1 is a block diagram of a prior art transmitter system.
Fig. 2 is a schematic structural diagram of an automatic dc error cancellation apparatus applied to a transmitter system according to an embodiment of the present application.
Fig. 3 is a flowchart illustrating an operation of the direct current error automatic cancellation apparatus applied to a transmitter system according to an embodiment of the present application.
Fig. 4 is a schematic diagram of an automatic dc error cancellation apparatus applied to a transmitter system according to an embodiment of the present application.
Fig. 5 is a schematic diagram of a digital-to-analog converter in accordance with an embodiment of the present application.
Fig. 6 is a flowchart of the operation of the digital adaptive algorithm unit of an embodiment of the present application.
Detailed Description
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other, and the present application will be further described in detail with reference to the drawings and the specific embodiments.
In the embodiment of the present application, if there is a directional indication (such as up, down, left, right, front, and rear … …) only for explaining the relative positional relationship, movement condition, etc. between the components in a specific posture (as shown in the drawings), if the specific posture is changed, the directional indication is correspondingly changed.
In addition, the description of "first," "second," etc. in this disclosure is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implying an indication of the number of features being indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature.
The application adds the automatic DC error elimination device in the conventional transmitter system, which can automatically monitor and eliminate the DC error in the transmitting signal link. Referring to fig. 2 to 3, the dc error automatic cancellation device applied to a transmitter system of the present application includes an analog signal acquisition unit, an analog-to-digital converter, a digital adaptive algorithm unit, and a digital-to-analog converter. The direct current error automatic eliminating device is independent of a signal chain path and can automatically eliminate the direct current error of a transmitter system.
The analog signal acquisition unit of the application adopts an amplifier circuit to sample, hold and amplify the direct current voltage at the mixer. The analog signal acquisition unit typically has sample, hold and amplify functions to handle small dc errors in the transmitter system, and may be implemented without the amplifying function.
The analog-to-digital converter is used for digitally converting the amplified analog signal, and the converted digital signal is delivered to the digital self-adaptive algorithm unit for algorithm analysis, and a proper digital control signal is generated after the digital self-adaptive algorithm unit analyzes. The digital-to-analog converter is used for converting a suitable digital control signal into a corresponding analog signal, which is used for correspondingly compensating the direct current error of the transmitter system.
The signal acquisition point of the analog signal acquisition unit may be placed at the output of the mixer or at the input of the mixer. The compensated analog voltage signal output by the digital-to-analog converter can be placed at the input of the filter, at the output of the filter or at the input of the mixer.
When there is DC error in the transmitter system, i.e. DC working voltages of I and Q channels have errors, the analog signal acquisition unit can acquire, process and amplify the tiny error voltage value, and then convert the tiny error voltage value into a digital signal corresponding to the analog voltage value through the analog-to-digital converter and transmit the digital signal to the digital self-adaptive algorithm unit for algorithm analysis. The digital self-adaptive algorithm unit generates corresponding proper digital control output signals according to different input digital signals, and the proper digital control signals are converted into corresponding analog voltage signals after being subjected to analog-to-digital conversion, and the analog voltage signals are used for compensating direct current errors in a transmitter system. The work flow of the automatic DC error eliminating device applied to the transmitter system is shown in figure 3, the DC working voltage at the mixer can be automatically collected after the automatic DC error eliminating device is started, and if the DC working voltage has errors, a corresponding analog voltage signal can be automatically generated to compensate the errors, so that the aim of eliminating the DC errors of the transmitter is fulfilled.
As an embodiment, the digital-to-analog converter is an n-bit digital stream DAC.
The digital self-adaptive algorithm unit sequentially assigns values from the highest bit to the lowest bit of the digital stream DAC of n bits, collects the output results of the analog-to-digital converter for n times, determines final assignments according to the results, and converts the digital-to-analog converter into corresponding analog voltage signals to compensate the direct current working voltage errors of the I channel signals and the Q channel signals.
As one implementation, the digital adaptive algorithm unit pre-assigns 1 to DAC < n-i >, if n-1-i is not less than zero, pre-assigns 0 to DAC < n-1-i >, reads the result of the hysteresis comparator and determines the final assignment of DAC < n-i > according to the result, wherein i starts from 1, adds 1 each time until i=n, collects the result of n hysteresis comparators to obtain corresponding DAC < n-1:0>, and completes the sequential assignment from DAC < n-1> to DAC <0 >; i.epsilon.n.
As shown in fig. 4, when the I-path dc voltage vi=vcm+vos at the mixer and the Q-path dc voltage vq=vcm at the mixer, the analog signal acquisition unit selects a pre-amplifying circuit with a voltage gain a, which can be used to amplify the fine error signal Vos, and the analog-to-digital converter portion selects a hysteresis comparator circuit with a high output when Vos >0 and a low output when Vos < 0. The digital self-adaptive algorithm aims to finish the assignment of the digital stream with 7 bits or more from the highest bit to the lowest bit according to the output result of the comparator, the bit number of the digital stream needs to be matched with the following digital-to-analog converter, and the proper digital stream bit number is selected by comprehensively considering the calibration precision of direct current errors, unit current Iuit (Iu for short) of the digital-to-analog converter, system power consumption, chip area and the like. Taking 7bit digital stream DAC <6:0> as an example, the digital-to-analog converter is a 7bit current DAC, the digital-to-analog converter of the amplifying version is shown in fig. 5, the current DAC can control corresponding single-pole double-throw switches in the circuit through corresponding logic high or logic low of the digital stream DAC <6:0>, and current change of output nodes I_current and Q_current is realized through different positions of the switches. By default, DAC <6:0> =100_0000, the corresponding effect is that only the switch of DAC <6> is connected to the i_current node, the switches of DAC <5> -DAC <0> are connected to the q_current node, according to kirchhoff's current law, the external output current at the i_current node is 64 iu-64 iu=0, and the q_current node the external output current at this point is 32 x iu +16 x iu +8 x iu +4 x iu +2 x iu + iu-64 x iu = 0, the output of the digital-to-analog converter will not affect the subsequent filter DC voltages VA/VB/VI/VQ. The effect of the output current of the digital-to-analog converter on the subsequent filter direct current voltage is that according to vi=va-i_current R, vq=vb-q_current R, voltage compensation for VI/VQ is achieved by changing the current direction and current magnitude of i_current and q_current. When the DC error cancellation system starts to work, DAC <6:0> is given a default value of 100_0000, and then the digital self-adaptive algorithm finishes the sequential assignment from DAC <6> to DAC <0> according to the output result of the hysteresis comparator. The evaluation criterion is that when the output result of the comparator is high, it indicates that vos is greater than 0 at this time, i.e., VI > VQ, i_current needs to be positive, and q_current needs to be negative, so that the DAC at this time should evaluate the bit to satisfy the corresponding single pole double throw switch connection i_current. Similarly, when the output of the comparator is low, it indicates that vos is less than 0 at this time, i.e., VI < VQ, i_current needs to be negative, and q_current needs to be positive, so this bit assignment of the DAC at this time needs to satisfy the corresponding single pole double throw switch connection q_current.
The workflow of the digital adaptive algorithm unit is shown in fig. 6, and is simply described as pre-assigning 1 to DAC <7-i >, if 6-i is not less than zero, pre-assigning 0 to DAC <6-i >, reading the result of the comparator, and determining the final assignment of DAC <7-i > according to the result, wherein i starts from 1, and adds 1 each time until i=7, so that the result of the hysteresis comparator needs to be acquired 7 times for obtaining the corresponding DAC <6:0>, thereby completing the sequential final assignment from DAC <6> to DAC <0 >. Vi=va-i_current after final assignment is completed, vq=vb-q_current, and if the initial VI dc voltage is not equal to VQ, a voltage with VI equal to VQ may be achieved by corresponding compensation of i_current and q_current.
The application relates to a direct current error automatic elimination method applied to a transmitter system, which comprises a sampling amplification step, an analog-to-digital conversion step, a digital self-adaptive calculation step and a digital-to-analog conversion step.
Sampling and amplifying: and sampling, holding and amplifying the direct-current voltage at the mixer to obtain an amplified analog signal. In the specific implementation, the amplifying function is not included, and only sampling and holding are performed, and then digital conversion is performed.
Analog-to-digital conversion step: and carrying out digital conversion on the amplified analog signals to obtain converted digital signals.
The digital self-adaption calculation step comprises the following steps: and generating a corresponding digital control signal according to the converted digital signal.
A digital-to-analog conversion step: the corresponding digital control signal is converted into an analog signal for corresponding compensation of the direct current error of the transmitter system.
The analog-digital converter, the digital self-adaptive algorithm unit and the digital-analog converter are used together, and are used for generating corresponding proper output analog signals for different input analog signals.
As an embodiment, in the sampling amplification step, the signal sampling point is at an output location of a mixer of the transmitter system, or at an input location of the mixer; in the digital-to-analog conversion step, the output compensation analog signal is output at an input position of a filter of the transmitter system, or at an output position of the filter of the transmitter system or at an input position of a mixer.
As an implementation mode, the sampling and amplifying step adopts a pre-amplifying circuit to sample, hold and amplify, and the analog-to-digital conversion step adopts a hysteresis comparator to carry out digital conversion.
In the digital-to-analog conversion step, an n-bit digital stream DAC is adopted to convert an analog signal; in the digital self-adaptive calculation step, the values are sequentially assigned from the highest bit to the lowest bit of an n-bit digital stream DAC, the output result of the n-time hysteresis comparator is collected, and the final assignment is determined according to the result so as to compensate the DC working voltage errors of the I channel signal and the Q channel signal.
In the digital-to-analog conversion step, firstly, 1 is pre-assigned to DAC < n-i >, if n-1-i is not smaller than zero, the DAC < n-1-i > is pre-assigned to DAC <0>, the result of the hysteresis comparator is read, the final assignment of DAC < n-i > is determined according to the result, i starts from 1, 1 is added each time until i=n, the result of n hysteresis comparators is acquired, the corresponding DAC < n-1:0> is obtained, and the sequential assignment from DAC < n-1> to DAC <0> is completed; i.epsilon.n.
Although embodiments of the present application have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the spirit and scope of the application as defined by the appended claims and their equivalents.
Claims (4)
1. An automatic dc error cancellation apparatus for use in a transmitter system including a filter for filtering a baseband signal to produce an I-path signal and a Q-path signal, a mixer for mixing the I-path signal and the Q-path signal, and an amplifier for amplifying an output, the apparatus comprising:
analog signal acquisition unit: sampling, holding and amplifying the direct current voltage at the mixer;
an analog-to-digital converter: digital conversion is carried out on the analog signals amplified by the analog signal acquisition unit, and the converted digital signals are delivered to the digital self-adaptive algorithm unit;
digital adaptive algorithm unit: generating a corresponding digital control signal according to the digital signal;
a digital-to-analog converter: converting the digital control signal into a corresponding compensation analog signal for correspondingly compensating the direct current error of the transmitter system;
the signal acquisition point of the analog signal acquisition unit is at the output position of the mixer; the analog signal acquisition unit adopts a pre-amplification circuit, and the analog-to-digital converter adopts a hysteresis comparator;
the digital-to-analog converter is an n-bit digital stream DAC, the digital-to-analog converter controls a corresponding single-pole double-throw switch in the circuit through corresponding digital stream DAC logic high or logic low, and current change of output nodes I_current and Q_current is realized through different positions of the switch; the digital-to-analog converter realizes voltage compensation for VI and VQ by changing the current direction and the current magnitude of I_current and Q_current according to VI=VA-I_current R and VQ=VB-Q_current R, wherein VA and VB are direct current voltages of I-path and Q-path filters respectively, VI and VQ are direct current voltages output by I-path and Q-path mixers respectively, I_current and Q_current are external output currents of I-path and Q-path respectively, and R is a resistance value in the filters;
the digital self-adaptive algorithm unit sequentially assigns values from the highest bit to the lowest bit of the digital stream DAC of n bits, collects the output results of the analog-to-digital converter for n times, determines final assignments according to the results, and converts the digital-to-analog converter into corresponding analog voltage signals to compensate the direct current working voltage errors of the I channel signals and the Q channel signals;
the digital self-adaptive algorithm unit pre-assigns 1 to DAC < n-i >, if n-1-i is not less than zero, pre-assigns 0 to DAC < n-1-i >, reads the result of the hysteresis comparator and decides the final assignment of DAC < n-i > according to the result, wherein i starts from 1, 1 is added each time until i=n, the result of n hysteresis comparators is collected to obtain corresponding DAC < n-1:0>, and sequential assignment from DAC < n-1> to DAC <0> is completed; i.epsilon.n.
2. The apparatus of claim 1, wherein the compensation analog signal output from the digital-to-analog converter is at an input position of a filter of the transmitter system, or at an output position of the filter of the transmitter system or at an input position of a mixer.
3. A method for automatically removing dc errors applied to a transmitter system, comprising:
sampling and amplifying: sampling, holding and amplifying the direct-current voltage at the mixer to obtain an amplified analog signal; the signal acquisition point is at the output position of the mixer of the transmitter system;
analog-to-digital conversion step: digital conversion is carried out on the amplified analog signals to obtain converted digital signals;
the digital self-adaption calculation step comprises the following steps: generating a corresponding digital control signal according to the converted digital signal;
a digital-to-analog conversion step: converting the corresponding digital control signal into a compensation analog signal for corresponding compensation of the direct current error of the transmitter system;
in the sampling and amplifying step, a pre-amplifying circuit is adopted for sampling, holding and amplifying, and in the analog-to-digital conversion step, a hysteresis comparator is adopted for digital conversion;
in the digital-to-analog conversion step, an n-bit digital stream DAC is adopted to convert an analog signal; the digital-to-analog converter controls a corresponding single-pole double-throw switch in the circuit through corresponding digital stream DAC logic high or logic low, and realizes current change of output nodes I_current and Q_current through different positions of the switch; the digital-to-analog converter realizes voltage compensation for VI and VQ by changing the current direction and the current magnitude of I_current and Q_current according to VI=VA-I_current R and VQ=VB-Q_current R, wherein VA and VB are direct current voltages of I-path and Q-path filters respectively, VI and VQ are direct current voltages output by I-path and Q-path mixers respectively, I_current and Q_current are external output currents of I-path and Q-path respectively, and R is a resistance value in the filters;
in the digital self-adaptive calculation step, the most significant bit to the least significant bit of an n-bit digital stream DAC are sequentially assigned, the output result of an n-time hysteresis comparator is collected, and the final assigned value is determined according to the result so as to compensate the DC working voltage errors of an I channel signal and a Q channel signal;
in the digital-to-analog conversion step, firstly, pre-assigning 1 to DAC < n-i >, if n-1-i is not less than zero, pre-assigning 0 to DAC < n-1-i >, reading the result of the hysteresis comparator, and determining the final assignment of DAC < n-i > according to the result, wherein i starts from 1, adds 1 each time until i=n, collects the result of n hysteresis comparators to obtain corresponding DAC < n-1:0>, and completing the sequential assignment from DAC < n-1> to DAC <0 >; i.epsilon.n.
4. A method for automatically canceling a dc error applied to a transmitter system according to claim 3, wherein in the digital-to-analog conversion step, the output compensating analog signal is output at an input position of a filter of the transmitter system, or at an output position of the filter of the transmitter system or at an input position of a mixer.
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| CN101304395A (en) * | 2008-06-27 | 2008-11-12 | 中兴通讯股份有限公司 | Zero intermediate frequency transmitter as well as method and apparatus for correcting sideband and local oscillation leakage thereof |
| CN101909025A (en) * | 2010-04-27 | 2010-12-08 | 广州市广晟微电子有限公司 | Method, device and system for realizing calibration for local oscillator restraint |
| CN107968667A (en) * | 2016-10-20 | 2018-04-27 | 国民技术股份有限公司 | A kind of DC maladjustment eliminates circuit and method |
| CN111480300A (en) * | 2017-12-18 | 2020-07-31 | 瑞典爱立信有限公司 | Local oscillator leakage detection and cancellation |
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