CN116526986A - Self-adaptive capacitance anti-radiation radio frequency SOI power amplifier - Google Patents
Self-adaptive capacitance anti-radiation radio frequency SOI power amplifier Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention provides an anti-irradiation radio frequency SOI power amplifier circuit structure of a self-adaptive capacitor, which belongs to the field of radio frequency integrated circuits and comprises a four-stack power amplifier, an irradiation detection control circuit and a switch capacitor array. The four-stack power amplifier comprises four-stack transistors, a bias resistor and a radio frequency choke inductor; the irradiation detection control circuit comprises an irradiation detection circuit and a threshold detector; the switched capacitor array is composed of a switching transistor and a capacitor. Due to the total dose irradiation effect, when irradiation is performed, the performance of the transistor is reduced, and the performance of the power amplifier is also reduced. At the working frequency of 10GHz, compared with the traditional four-stack power amplifier, the gain, the power additional efficiency and the saturated output power of the invention are obviously improved in the irradiation environment of 300 krad.
Description
Technical Field
The invention belongs to the field of radio frequency integrated circuits, and particularly relates to an anti-irradiation radio frequency SOI power amplifier of a self-adaptive capacitor.
Background
The exploration of aerospace brings wide development space for an aerospace communication system, and the aerospace communication technology is an important communication bridge for pushing human space exploration, however, the performance of the wireless transceiver system is easy to change in an irradiation environment when the wireless transceiver system faces various irradiation tests in space. The SOI technology is widely applied to various irradiation-resistant applications due to the excellent irradiation resistance performance, and has good application prospect in the process of fully integrating the system. In addition, the transistor stacking technology based on the SOI technology can make up for the defect of low withstand voltage value of a single transistor, thereby improving the output power of the power amplifier. The Satahorn of san Diego division of California university designs a power amplifier with saturated output power of 1.74W and working frequency of 1.9GHz based on 130nmSOI technology, and the circuit schematic diagram is shown in figure 4. The conventional non-radiation-hardened power amplifier shown in fig. 4 may have performance reduced to some extent due to reduced carrier mobility, changed threshold voltage, etc. after receiving a certain dose of radiation. The radio frequency power amplifier serving as a core component of the wireless receiving and transmitting system has less research which can be referred to in the aspect of radiation reinforcement, and has great research significance in consideration of radiation resistance reinforcement of the radio frequency power amplifier.
Disclosure of Invention
The invention provides an anti-radiation radio frequency SOI power amplifier circuit structure of a self-adaptive capacitor, which is characterized in that an SOI technology is used, and the self-adaptive capacitor for resisting radiation is added to an RF SOI power amplifier, so that the anti-radiation reinforcement of the power amplifier is realized, and the problem of the degradation of the radiation performance of the power amplifier is effectively reduced.
The specific technical scheme of the invention is as follows: an anti-radiation radio frequency SOI power amplifier of a self-adaptive capacitor comprises four stacked power amplifiers, an irradiation detection control circuit and a switch capacitor array. The four-stack power amplifier comprises four-stack transistors, a bias resistor and a radio frequency choke inductor, the irradiation detection control circuit comprises an irradiation detection circuit and a threshold detector, and the switch capacitor array consists of switch transistors and capacitors; the grid electrodes of the four stacked transistors are respectively connected with the switch capacitor array and the bias resistor, and the drain electrodes of the four stacked transistors are connected with the radio frequency choke inductor; the irradiation detection circuit is connected with the threshold detector, and irradiation signals are detected and amplified by the irradiation detection circuit and then converted into control signals by the threshold detector to control the switch capacitor array to be turned on and off.
Further, the four-stack power amplifier comprises four-stack transistors, a bias resistor and a radio frequency choke inductor. Wherein the four stacked transistors include a first transistor M1, a second transistor M2, a third transistor M3, and a fourth transistor M4; the bias resistor comprises a first resistor Rb1, a second resistor Rb2, a third resistor Rb3 and a fourth resistor Rb4; the radio frequency choke inductance is a first inductance RFC; the switched capacitor array includes a first switched capacitor array CA1, a second switched capacitor array CA2, and a third switched capacitor array CA3. The gate of the first transistor M1 is connected to the signal input terminal RFin, and meanwhile, the gate of the first transistor M1 is connected to the first bias voltage Vb1 through the first resistor Rb1, the source of the first transistor M1 is grounded, and the drain of the first transistor M1 is connected to the source of the second transistor M2; the grid electrode of the second transistor M2 is connected to the ground through the first switch capacitor array CA1, meanwhile, the grid electrode of the second transistor M2 is connected with the second bias voltage Vb2 through a second resistor Rb2, and the drain electrode of the second transistor M2 is connected with the source electrode of the third transistor M3; the gate of the third transistor M3 is connected to the ground through the second switched capacitor array CA2, while the gate of the third transistor M3 is connected to the third bias voltage Vb3 through the third resistor Rb3, and the drain of the third transistor M3 is connected to the source of the fourth transistor M4; the gate of the fourth transistor M4 is connected to the ground through the third switched capacitor array CA3, while the gate of the fourth transistor M4 is connected to the fourth bias voltage Vb4 through the fourth resistor Rb4, and the drain of the fourth transistor M4 is connected to the signal output terminal RFout and to the power supply via the first inductor RFC.
Further, the irradiance detection control circuit includes an irradiance detection circuit and a threshold detector. The irradiation detection circuit comprises a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a fifth resistor R5 and a sixth resistor R6; the threshold detectors include a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first threshold detector A1, a second threshold detector A2, and a third threshold detector A3. The drain electrode and the grid electrode of the fifth transistor M5 are connected with a power supply, the source electrode of the fifth transistor M5 is connected with the grid electrode and the drain electrode of the sixth transistor M6, the source electrode of the sixth transistor M6 is connected with the upper end of the fifth resistor R5, the lower end of the fifth resistor R5 is grounded, the upper end of the sixth resistor R6 is connected with the power supply, the lower end of the sixth resistor R6 is connected with the drain electrode of the seventh transistor M7, the grid electrode of the seventh transistor M7 is connected with the upper end of the fifth resistor R5, the source electrode of the seventh transistor M7 is connected with the drain electrode and the grid electrode of the eighth transistor M8, and the source electrode of the eighth transistor M8 is grounded; the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 are sequentially connected in series, the upper end of the seventh resistor R7 is connected with the lower end of the sixth resistor R6, and the lower end of the ninth resistor R9 is grounded; each threshold detector consists of four inverters connected in series; the input of the first threshold detector A1 is connected with the upper end of the seventh resistor R7, the output of the first threshold detector A1 is a first control signal SW1, the input of the second threshold detector A2 is connected with the upper end of the eighth resistor R8, the output of the second threshold detector A2 is a second control signal SW2, the input of the third threshold detector A3 is connected with the upper end of the ninth resistor R9, and the output of the third threshold detector A3 is a third control signal SW3.
Further, the switched capacitor array is composed of a switching transistor and a capacitor. The first switched capacitor array CA1 includes a first capacitor C10, a second capacitor C11, a third capacitor C12, a fourth capacitor C13, a ninth transistor M11, a tenth transistor M12, and an eleventh transistor M13; the second switched capacitor array CA2 includes a fifth capacitor C20, a sixth capacitor C21, a seventh capacitor C22, an eighth capacitor C23, a twelfth transistor M21, a thirteenth transistor M22, a fourteenth transistor M23, and the third switched capacitor array CA3 includes a ninth capacitor C30, a tenth capacitor C31, an eleventh capacitor C32, a twelfth capacitor C33, a fifteenth transistor M31, a sixteenth transistor M32, and a seventeenth transistor M33. For the transistors in the switched capacitor array, the gates of the ninth transistor M11, the twelfth transistor M21, and the fifteenth transistor M31 are controlled by the first control signal SW1, the gates of the tenth transistor M12, the thirteenth transistor M22, and the sixteenth transistor M32 are controlled by the second control signal SW2, and the gates of the eleventh transistor M13, the fourteenth transistor M23, and the seventeenth transistor M33 are controlled by the third control signal SW 3; the upper ends of a ninth capacitor C30, a tenth capacitor C31, an eleventh capacitor C32 and a twelfth capacitor C33 of the third switched capacitor array CA3 are all connected to the gate of the fourth transistor M4, the lower end of the ninth capacitor C30 is grounded, the lower end of the tenth capacitor C31 is connected to the drain of the fifteenth transistor M31, the gate of the fifteenth transistor M31 is controlled by the first control signal SW1, the source of the fifteenth transistor M31 is grounded, the lower end of the eleventh capacitor C32 is connected to the drain of the sixteenth transistor M32, the gate of the sixteenth transistor M32 is controlled by the second control signal SW2, the source of the sixteenth transistor M32 is grounded, the gate of the seventeenth transistor M33 is controlled by the third control signal SW3, the source of the seventeenth transistor M33 is grounded, and the first switched capacitor array CA1, the second switched capacitor array CA2 and the third switched capacitor array CA3 have the same circuit structure.
Further, in the fourth stacked power amplifier, the static current flows from the power supply, through the first inductor RFC, into the drain of the fourth transistor M4, out of the source of the fourth transistor M4, into the drain of the third transistor M3, out of the source of the third transistor M3, into the drain of the second transistor M2, out of the source of the second transistor M2, into the drain of the first transistor M1, out of the source of the first transistor M1, and finally into the ground; in the irradiation detection control circuit, the trend of the static current starts from a power supply and respectively goes to the ground through two branches, the current in the first branch sequentially goes through a fifth transistor M5, a sixth transistor M6 and a fifth resistor R5 to the ground, the current in the second branch firstly flows through the sixth resistor R6, one part sequentially goes through a seventh transistor M7 and an eighth transistor M8 to the ground, and the other part sequentially goes through the seventh resistor R7, the eighth resistor R8 and a ninth resistor R9 to the ground.
Further, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M11, the tenth transistor M12, the eleventh transistor M13, the twelfth transistor M21, the thirteenth transistor M22, the fourteenth transistor M23, the fifteenth transistor M31, the sixteenth transistor M32, and the seventeenth transistor M33 are NMOS transistors.
Further, the capacitance values of the first capacitor C10, the second capacitor C11, the third capacitor C12, the fourth capacitor C13, the fifth capacitor C20, the sixth capacitor C21, the seventh capacitor C22, the eighth capacitor C23, the ninth capacitor C30, the tenth capacitor C31, the eleventh capacitor C32, and the twelfth capacitor C33 in each switched capacitor array are in the range of 1fF to 10nF.
Further, the resistance values of the first resistor Rb1, the second resistor Rb2, the third resistor Rb3, the fourth resistor Rb4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are in the range of 100 Ω to 100kΩ.
Further, the first inductance RFC ranges from 100pH to 100nH.
The working principle is as follows: due to the total dose irradiation effect, the performance of the transistor is reduced when irradiated, and the carrier mobility, threshold voltage and the like of the NMOS transistor are reduced to a certain extent. At this time, the currents of the fifth transistor M5, the sixth transistor M6 and the fifth resistor R5 branch in the radiation detection control circuit will decrease, resulting in a drop in the source voltage of the sixth transistor M6, this voltage is amplified by the sixth resistor R6, the seventh transistor M7 and the eighth transistor M8 branch, and a potential rising with the total radiation dose is output from the drain of the seventh transistor M7; the potential which rises along with the total irradiation dose passes through a voltage division network formed by a seventh resistor R7, an eighth resistor R8 and a ninth resistor R9 to obtain three potentials with different variation amplitudes, and the potentials respectively pass through a first threshold detector A1, a second threshold detector A2 and a third threshold detector A3 to obtain a first control signal SW1, a second control signal SW2 and a third control signal SW3. The total dose irradiation effect can reduce the performance of the four-stack power amplifier, and three control signals generated by the irradiation detection control circuit are changed from low level to high level under different irradiation doses, and the closing and opening of the corresponding capacitors are respectively controlled to correct the performance of the power amplifier. The irradiation sensitivity of the irradiation detection control circuit can be adjusted by adjusting the values of the fifth resistor R5 and the sixth resistor R6, and also can be adjusted by adjusting the values of the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9. In addition, the irradiation resistance of the four-stack power amplifier can be improved to different degrees by adjusting the capacitance in the switch capacitor array.
The beneficial effects of the invention are as follows: according to the invention, the adaptive switched capacitor array is added in the traditional four-stack power amplifier, so that the degradation of the power amplifier performance caused by irradiation can be obviously improved; at an operating frequency of 10GHz, under an irradiation environment of 300krad, a conventional four-stack power amplifier has a 2.4dB gain (S21) drop, an 8% power added efficiency PAE drop, and a saturated output power Psat drop of 1.6 dBm. The self-adaptive capacitance anti-radiation radio frequency SOI power amplifier provided by the invention can realize that the gain (S21) is not reduced, the power added efficiency PAE is reduced by 2%, the saturated output power Psat is only reduced by 0.5dBm under the irradiation of the total dose of 300krad, and has obvious improvement effect on the power amplifier performance degradation caused by irradiation.
Drawings
Fig. 1 is a block diagram of a circuit module adopting a radio frequency stacked power amplifier according to the present invention.
Fig. 2 is a circuit diagram showing connection between a switched capacitor array CAi (i is 1, 2 or 3) and an irradiation detection control circuit according to the present invention.
Fig. 3 is a schematic diagram of an adaptive capacitor anti-radiation rf SOI power amplifier according to embodiment 1 of the present invention.
Fig. 4 is a circuit diagram of a conventional non-irradiation reinforced power amplifier in the prior art.
Fig. 5 shows the variation of gain (S21) with irradiation of a conventional non-irradiation reinforced power amplifier.
Fig. 6 shows the variation of the gain (S21) of the adaptive capacitance anti-radiation rf SOI power amplifier according to example 1 with radiation.
Fig. 7 shows the variation of saturated output power Psat and power added efficiency PAE of a conventional non-irradiated reinforcement power amplifier with irradiation.
Fig. 8 shows the variation of the radiation-resistant rf SOI power amplifier saturated output power Psat and the power added efficiency PAE of the adaptive capacitance according to the radiation of embodiment 1.
Detailed Description
The present invention will be further described with reference to the following specific embodiments in order to make the objects, technical solutions and advantages of the present invention more clear.
The following non-limiting example 1 will enable one of ordinary skill in the art to more fully understand the invention, but is not intended to limit the invention in any way.
Example 1
With reference to fig. 1 to 3, this embodiment provides an adaptive capacitance anti-radiation radio frequency SOI power amplifier, which includes a four-stack power amplifier, an irradiation detection control circuit, and a switched capacitor array. The four-stack power amplifier comprises four-stack transistors, a bias resistor, a radio frequency choke inductance, an input matching network and an output matching network, wherein the four-stack transistors comprise a first transistor M1, a second transistor M2, a third transistor M3 and a fourth transistor M4; the bias resistor comprises a first resistor Rb1, a second resistor Rb2, a third resistor Rb3 and a fourth resistor Rb4; the radio frequency choke inductance is a first inductance RFC; the input matching network comprises a second inductor Lin and a thirteenth capacitor Cin; the output matching network includes a third inductance Lout and a fourteenth capacitance Cout. The radiation detection control circuit includes a radiation detection circuit and a threshold detector. The irradiation detection circuit comprises a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a fifth resistor R5 and a sixth resistor R6; the threshold detector comprises a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first threshold detector A1, a second threshold detector A2 and a third threshold detector A3, and each threshold detector is composed of four inverters connected in series. The switch capacitor array consists of switch transistors and capacitors, and the first switch capacitor array CA1 comprises a first capacitor C10, a second capacitor C11, a third capacitor C12, a fourth capacitor C13, a ninth transistor M11, a tenth transistor M12 and an eleventh transistor M13; the second switched capacitor array CA2 includes a fifth capacitor C20, a sixth capacitor C21, a seventh capacitor C22, an eighth capacitor C23, a twelfth transistor M21, a thirteenth transistor M22, a fourteenth transistor M23, and the third switched capacitor array CA3 includes a ninth capacitor C30, a tenth capacitor C31, an eleventh capacitor C32, a twelfth capacitor C33, a fifteenth transistor M31, a sixteenth transistor M32, and a seventeenth transistor M33.
The circuit structure is as follows: the overall circuit is shown in fig. 3. For the four-stack power amplifier, a grid electrode of the first transistor M1 is connected with a signal input end RFin through an input matching network, meanwhile, the grid electrode of the first transistor M1 is connected with a first bias voltage Vb1 through a first resistor Rb1, a source electrode of the first transistor M1 is grounded, and a drain electrode of the first transistor M1 is connected with a source electrode of the second transistor M2; the grid electrode of the second transistor M2 is connected to the ground through the first switch capacitor array CA1, meanwhile, the grid electrode of the second transistor M2 is connected with the second bias voltage Vb2 through a second resistor Rb2, and the drain electrode of the second transistor M2 is connected with the source electrode of the third transistor M3; the gate of the third transistor M3 is connected to the ground through the second switched capacitor array CA2, while the gate of the third transistor M3 is connected to the third bias voltage Vb3 through the third resistor Rb3, and the drain of the third transistor M3 is connected to the source of the fourth transistor M4; the gate of the fourth transistor M4 is connected to the ground through the third switched capacitor array CA3, while the gate of the fourth transistor M4 is connected to the fourth bias voltage Vb4 through the fourth resistor Rb4, and the drain of the fourth transistor M4 is connected to the signal output terminal RFout through the output matching network and is connected to the power supply via the first inductor RFC. For the irradiation detection control circuit, the drain electrode and the gate electrode of the fifth transistor M5 are connected with a power supply, the source electrode of the fifth transistor M5 is connected with the gate electrode and the drain electrode of the sixth transistor M6, the source electrode of the sixth transistor M6 is connected with the upper end of the fifth resistor R5, the lower end of the fifth resistor R5 is grounded, the upper end of the sixth resistor R6 is connected with the power supply, the lower end of the sixth resistor R6 is connected with the drain electrode of the seventh transistor M7, the gate electrode of the seventh transistor M7 is connected with the upper end of the fifth resistor R5, the source electrode of the seventh transistor M7 is connected with the drain electrode and the gate electrode of the eighth transistor M8, and the source electrode of the eighth transistor M8 is grounded; the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 are sequentially connected in series, the upper end of the seventh resistor R7 is connected with the lower end of the sixth resistor R6, and the lower end of the ninth resistor R9 is grounded; each threshold detector consists of four inverters connected in series; the specific connection mode of the switch capacitor array CAi (i is 1, 2 or 3) and the irradiation detection control circuit is shown in fig. 2, the input of the first threshold detector A1 is connected with the upper end of the seventh resistor R7, the output of the first threshold detector A1 is the first control signal SW1, the input of the second threshold detector A2 is connected with the upper end of the eighth resistor R8, the output of the second threshold detector A2 is the second control signal SW2, the input of the third threshold detector A3 is connected with the upper end of the ninth resistor R9, and the output of the third threshold detector A3 is the third control signal SW3. For the switched capacitor array, the circuit structures of the first switched capacitor array CA1, the second switched capacitor array CA2 and the third switched capacitor array CA3 are the same, taking the third switched capacitor array CA3 as an example, the upper ends of a ninth capacitor C30, a tenth capacitor C31, an eleventh capacitor C32 and a twelfth capacitor C33 are all connected to the grid electrode of the fourth transistor M4, the lower end of the ninth capacitor C30 is grounded, the lower end of the tenth capacitor C31 is connected to the drain electrode of the fifteenth transistor M31, the grid electrode of the fifteenth transistor M31 is controlled by the first control signal SW1, the source electrode of the fifteenth transistor M31 is grounded, the lower end of the eleventh capacitor C32 is connected to the drain electrode of the sixteenth transistor M32, the grid electrode of the sixteenth transistor M32 is controlled by the second control signal SW2, the lower end of the twelfth capacitor C33 is connected to the drain electrode of the seventeenth transistor M33, the grid electrode of the seventeenth transistor M33 is controlled by the third control signal SW3, and the source electrode of the seventeenth transistor M33 is grounded; specifically, the gates of the ninth transistor M11, the twelfth transistor M21, and the fifteenth transistor M31 are controlled by the first control signal SW1, the gates of the tenth transistor M12, the thirteenth transistor M22, and the sixteenth transistor M32 are controlled by the second control signal SW2, and the gates of the eleventh transistor M13, the fourteenth transistor M23, and the seventeenth transistor M33 are controlled by the third control signal SW3. The input matching network comprises a second inductor Lin and a thirteenth capacitor Cin, one end of the thirteenth capacitor Cin is connected with the signal output end RFin, and meanwhile, the input matching network is grounded through the second inductor Lin, and the other end of the thirteenth capacitor Cin is connected with the grid electrode of the first transistor M1. The output matching network includes a third inductor Lout and a fourteenth capacitor Cout, one end of the fourteenth capacitor Cout is connected to the signal output terminal RFout, and is grounded through the third inductor Lout, and the other end of the fourteenth capacitor Cout is connected to the drain electrode of the fourth transistor M4.
In the fourth stacked power amplifier section, the static current starts from the power supply, flows into the drain electrode of the fourth transistor M4 through the first inductor RFC, flows out from the source electrode of the fourth transistor M4, flows into the drain electrode of the third transistor M3, flows out from the source electrode of the third transistor M3, flows into the drain electrode of the second transistor M2, flows out from the source electrode of the second transistor M2, flows into the drain electrode of the first transistor M1, flows out from the source electrode of the first transistor M1, and finally flows into the ground; in the irradiation detection control circuit, the trend of the static current starts from a power supply and respectively goes to the ground through two branches, the current in the first branch sequentially goes through a fifth transistor M5, a sixth transistor M6 and a fifth resistor R5 to the ground, the current in the second branch firstly flows through the sixth resistor R6, one part sequentially goes through a seventh transistor M7 and an eighth transistor M8 to the ground, and the other part sequentially goes through the seventh resistor R7, the eighth resistor R8 and a ninth resistor R9 to the ground.
In the four-stack power amplifier, the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are NMOS, the gate length L is 120nm, and the gate width W is 1536um; the inductance value of the first inductor RFC is 10nH, and the values of the first resistor Rb1, the second resistor Rb2, the third resistor Rb3 and the fourth resistor Rb4 are all 10kΩ; in the input matching network, the value of the second inductor Lin is 144pH, and the value of the thirteenth capacitor Cin is 8.5pF; in the output matching network, the value of the third inductor Lout is 450pH, and the value of the fourteenth capacitor Cout is 1.83pF. In the irradiation detection control circuit, the fifth transistor M5 and the sixth transistor M6 are NMOS, the gate length L is 120nm, and the gate width W is 160nm; the seventh transistor M7 and the eighth transistor M8 are NMOS, the gate length L is 120nm, and the gate width W is 800nm; the resistance values of the fifth resistor R5 and the sixth resistor R6 are 10k omega; the resistance values of the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are 17kΩ, 14.3kΩ, and 68.7kΩ, respectively. In the switched capacitor array, the ninth transistor M11, the tenth transistor M12, the eleventh transistor M13, the twelfth transistor M21, the thirteenth transistor M22, the fourteenth transistor M23, the fifteenth transistor M31, the sixteenth transistor M32 and the seventeenth transistor M33 are all NMOS, the gate length L is 220nm, and the gate width W is 16um; in the first switched capacitor array CA1, the values of the first capacitor C10, the second capacitor C11, the third capacitor C12, and the fourth capacitor C13 are 2.16pF, 1.08pF, 1.2pF, and 1.2pF, respectively; in the second switched capacitor array CA2, the values of the fifth capacitor C20, the sixth capacitor C21, the seventh capacitor C22, and the eighth capacitor C23 are 540fF, 60fF, 144fF, and 240fF, respectively; in the third switched capacitor array CA3, the values of the ninth capacitor C30, the tenth capacitor C31, the eleventh capacitor C32, and the twelfth capacitor C33 are 300fF, 3fF, 12fF, and 60fF, respectively.
Working principle: due to the total dose irradiation effect, the performance of the transistor is reduced when irradiated, and the carrier mobility, threshold voltage and the like of the NMOS transistor are reduced to a certain extent. At this time, the currents of the fifth transistor M5, the sixth transistor M6 and the fifth resistor R5 branch in the radiation detection control circuit will decrease, resulting in a drop in the source voltage of the sixth transistor M6, this voltage is amplified by the sixth resistor R6, the seventh transistor M7 and the eighth transistor M8 branch, and a potential rising with the total radiation dose is output from the drain of the seventh transistor M7; the potential which rises along with the total irradiation dose passes through a voltage division network formed by a seventh resistor R7, an eighth resistor R8 and a ninth resistor R9 to obtain three potentials with different variation amplitudes, and the potentials respectively pass through a first threshold detector A1, a second threshold detector A2 and a third threshold detector A3 to obtain a first control signal SW1, a second control signal SW2 and a third control signal SW3. The total dose irradiation effect can reduce the performance of the four-stack power amplifier, and three control signals generated by the irradiation detection control circuit are changed from low level to high level under different irradiation doses, and the closing and opening of the corresponding capacitors are respectively controlled to correct the performance of the power amplifier. The irradiation sensitivity of the irradiation detection control circuit can be adjusted by adjusting the values of the fifth resistor R5 and the sixth resistor R6, and also can be adjusted by adjusting the values of the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9. In addition, the irradiation resistance of the four-stack power amplifier can be improved to different degrees by adjusting the capacitance in the switch capacitor array.
According to the graph of gain versus irradiance shown in fig. 5, the gain of a conventional four stack power amplifier (S21) decreases with irradiance by 2.4dB at 10GHz with a total dose of 300 krad.
Fig. 6 is a graph showing the variation of the gain of the radiation-resistant radio-frequency SOI power amplifier using the adaptive capacitor according to the present embodiment along with the radiation, and it can be seen that the graph is significantly more compact, and the gain (S21) at 10GHz is not reduced under the total dose radiation condition of 300 krad.
Fig. 7 shows a graph of saturated output power Psat and power added efficiency PAE of a conventional four-stack power amplifier as a function of irradiation. At a total dose of 300krad the saturated output power Psat drops by 1.6dBm and the power added efficiency PAE drops by approximately 8%.
The irradiation-dependent curves of the saturated output power Psat and the power added efficiency PAE of the irradiation-resistant radio-frequency SOI power amplifier with the adaptive capacitor obtained in the embodiment of fig. 8 show that the saturated output power Psat is only reduced by 0.5dBm and the power added efficiency PAE is only reduced by 2% under the irradiation condition of the total dose of 300krad, which is obviously improved compared with the traditional four-stack power amplifier.
Claims (9)
1. An anti-radiation radio frequency SOI power amplifier of a self-adaptive capacitor is characterized in that: the device comprises a four-stack power amplifier, an irradiation detection control circuit and a switched capacitor array; the four-stack power amplifier comprises four-stack transistors, a bias resistor and a radio frequency choke inductor, the irradiation detection control circuit comprises an irradiation detection circuit and a threshold detector, and the switch capacitor array consists of a plurality of switch transistors and a plurality of capacitors; the grid electrodes of the four stacked transistors are respectively connected with the switch capacitor array and the bias resistor, and the drain electrodes of the four stacked transistors are connected with the radio frequency choke inductor; the irradiation detection circuit is connected with the threshold detector, and irradiation signals are detected and amplified by the irradiation detection circuit and then converted into control signals by the threshold detector to control the switch capacitor array to be turned on and off.
2. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 1, wherein: the fourth stacked transistor includes a first transistor M1, a second transistor M2, a third transistor M3, and a fourth transistor M4; the bias resistor comprises a first resistor Rb1, a second resistor Rb2, a third resistor Rb3 and a fourth resistor Rb4; the radio frequency choke inductance is a first inductance RFC; the switched capacitor array comprises a first switched capacitor array CA1, a second switched capacitor array CA2 and a third switched capacitor array CA3; the gate of the first transistor M1 is connected to the signal input terminal RFin, and meanwhile, the gate of the first transistor M1 is connected to the first bias voltage Vb1 through the first resistor Rb1, the source of the first transistor M1 is grounded, and the drain of the first transistor M1 is connected to the source of the second transistor M2; the grid electrode of the second transistor M2 is connected to the ground through the first switch capacitor array CA1, meanwhile, the grid electrode of the second transistor M2 is connected with the second bias voltage Vb2 through a second resistor Rb2, and the drain electrode of the second transistor M2 is connected with the source electrode of the third transistor M3; the gate of the third transistor M3 is connected to the ground through the second switched capacitor array CA2, while the gate of the third transistor M3 is connected to the third bias voltage Vb3 through the third resistor Rb3, and the drain of the third transistor M3 is connected to the source of the fourth transistor M4; the gate of the fourth transistor M4 is connected to the ground through the third switched capacitor array CA3, while the gate of the fourth transistor M4 is connected to the fourth bias voltage Vb4 through the fourth resistor Rb4, and the drain of the fourth transistor M4 is connected to the signal output terminal RFout and to the power supply via the first inductor RFC.
3. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 2, characterized by: the irradiation detection circuit comprises a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a fifth resistor R5 and a sixth resistor R6; the threshold detector comprises a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first threshold detector A1, a second threshold detector A2 and a third threshold detector A3; the drain electrode and the grid electrode of the fifth transistor M5 are connected with a power supply, the source electrode of the fifth transistor M5 is connected with the grid electrode and the drain electrode of the sixth transistor M6, the source electrode of the sixth transistor M6 is connected with the upper end of the fifth resistor R5, the lower end of the fifth resistor R5 is grounded, the upper end of the sixth resistor R6 is connected with the power supply, the lower end of the sixth resistor R6 is connected with the drain electrode of the seventh transistor M7, the grid electrode of the seventh transistor M7 is connected with the upper end of the fifth resistor R5, the source electrode of the seventh transistor M7 is connected with the drain electrode and the grid electrode of the eighth transistor M8, and the source electrode of the eighth transistor M8 is grounded; the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 are sequentially connected in series, the upper end of the seventh resistor R7 is connected with the lower end of the sixth resistor R6, and the lower end of the ninth resistor R9 is grounded; each threshold detector consists of four inverters connected in series; the input of the first threshold detector A1 is connected with the upper end of the seventh resistor R7, the output of the first threshold detector A1 is a first control signal SW1, the input of the second threshold detector A2 is connected with the upper end of the eighth resistor R8, the output of the second threshold detector A2 is a second control signal SW2, the input of the third threshold detector A3 is connected with the upper end of the ninth resistor R9, and the output of the third threshold detector A3 is a third control signal SW3.
4. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 3, further characterized by: the first switched capacitor array CA1 includes a first capacitor C10, a second capacitor C11, a third capacitor C12, a fourth capacitor C13, a ninth transistor M11, a tenth transistor M12, and an eleventh transistor M13; the second switched capacitor array CA2 includes a fifth capacitor C20, a sixth capacitor C21, a seventh capacitor C22, an eighth capacitor C23, a twelfth transistor M21, a thirteenth transistor M22, a fourteenth transistor M23, and the third switched capacitor array CA3 includes a ninth capacitor C30, a tenth capacitor C31, an eleventh capacitor C32, a twelfth capacitor C33, a fifteenth transistor M31, a sixteenth transistor M32, a seventeenth transistor M33; for the transistors in the switched capacitor array, the gates of the ninth transistor M11, the twelfth transistor M21, and the fifteenth transistor M31 are controlled by the first control signal SW1, the gates of the tenth transistor M12, the thirteenth transistor M22, and the sixteenth transistor M32 are controlled by the second control signal SW2, and the gates of the eleventh transistor M13, the fourteenth transistor M23, and the seventeenth transistor M33 are controlled by the third control signal SW 3; the upper ends of a ninth capacitor C30, a tenth capacitor C31, an eleventh capacitor C32 and a twelfth capacitor C33 of the third switched capacitor array CA3 are all connected to the gate of the fourth transistor M4, the lower end of the ninth capacitor C30 is grounded, the lower end of the tenth capacitor C31 is connected to the drain of the fifteenth transistor M31, the gate of the fifteenth transistor M31 is controlled by the first control signal SW1, the source of the fifteenth transistor M31 is grounded, the lower end of the eleventh capacitor C32 is connected to the drain of the sixteenth transistor M32, the gate of the sixteenth transistor M32 is controlled by the second control signal SW2, the source of the sixteenth transistor M32 is grounded, the gate of the seventeenth transistor M33 is controlled by the third control signal SW3, the source of the seventeenth transistor M33 is grounded, and the first switched capacitor array CA1, the second switched capacitor array CA2 and the third switched capacitor array CA3 have the same circuit structure.
5. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 4, wherein: in the fourth stacked power amplifier, the static current flows from the power supply, through the first inductor RFC, into the drain electrode of the fourth transistor M4, flows out from the source electrode of the fourth transistor M4, flows into the drain electrode of the third transistor M3, flows out from the source electrode of the third transistor M3, flows into the drain electrode of the second transistor M2, flows out from the source electrode of the second transistor M2, flows into the drain electrode of the first transistor M1, flows out from the source electrode of the first transistor M1, and finally flows into the ground; in the irradiation detection control circuit, the trend of the static current starts from a power supply and respectively goes to the ground through two branches, the current in the first branch sequentially goes through a fifth transistor M5, a sixth transistor M6 and a fifth resistor R5 to the ground, the current in the second branch firstly flows through the sixth resistor R6, one part sequentially goes through a seventh transistor M7 and an eighth transistor M8 to the ground, and the other part sequentially goes through the seventh resistor R7, the eighth resistor R8 and a ninth resistor R9 to the ground.
6. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 5, characterized by: the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M11, the tenth transistor M12, the eleventh transistor M13, the twelfth transistor M21, the thirteenth transistor M22, the fourteenth transistor M23, the fifteenth transistor M31, the sixteenth transistor M32, and the seventeenth transistor M33 are NMOS transistors.
7. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 6, wherein: the capacitance values of the first capacitor C10, the second capacitor C11, the third capacitor C12, the fourth capacitor C13, the fifth capacitor C20, the sixth capacitor C21, the seventh capacitor C22, the eighth capacitor C23, the ninth capacitor C30, the tenth capacitor C31, the eleventh capacitor C32 and the twelfth capacitor C33 in each switched capacitor array are in the range of 1fF to 10nF.
8. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 7, wherein: the resistance values of the first resistor Rb1, the second resistor Rb2, the third resistor Rb3, the fourth resistor Rb4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 are in the range of 100 Ω to 100kΩ.
9. The adaptive capacitive anti-radiation radio frequency SOI power amplifier of claim 7, wherein: the range of the first inductance RFC is 100 pH-100 nH.
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