CN116525413A - Wafer epitaxial surface treatment method - Google Patents
Wafer epitaxial surface treatment method Download PDFInfo
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- CN116525413A CN116525413A CN202310538600.2A CN202310538600A CN116525413A CN 116525413 A CN116525413 A CN 116525413A CN 202310538600 A CN202310538600 A CN 202310538600A CN 116525413 A CN116525413 A CN 116525413A
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- Prior art keywords
- wafer
- oxide layer
- impurity particles
- surface treatment
- treatment method
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- 238000000034 method Methods 0.000 title claims abstract description 28
- 238000004381 surface treatment Methods 0.000 title claims abstract description 17
- 239000002245 particle Substances 0.000 claims abstract description 72
- 239000012535 impurity Substances 0.000 claims abstract description 70
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 46
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 42
- 238000004140 cleaning Methods 0.000 claims abstract description 23
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 21
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 18
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 238000011010 flushing procedure Methods 0.000 claims abstract description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 16
- 238000002791 soaking Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 abstract description 2
- 238000000926 separation method Methods 0.000 abstract description 2
- 239000008187 granular material Substances 0.000 abstract 6
- 235000012431 wafers Nutrition 0.000 description 85
- 238000009826 distribution Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000004506 ultrasonic cleaning Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02082—Cleaning product to be cleaned
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
The application provides a wafer epitaxial surface treatment method which is applied to the technical field of wafer surface treatment and comprises the following steps of S1, pre-cleaning a wafer attached with particles; s2, depositing a silicon dioxide oxide layer on the surface of the wafer; and S3, flushing the wafer by using hydrofluoric acid. Through wasing the great impurity granule of wafer surface volume, separate it out the wafer surface, avoid impurity granule volume great to shelter from the impurity granule of small volume, lead to unable to carry out abundant deposition to the wafer surface, the silica oxide layer of deposit bonds with the impurity granule on the wafer, impurity granule on the wafer and silica oxide layer are washd the separation out wafer together at the in-process that uses hydrofluoric acid to wash out the impurity granule on the wafer surface, the oxide layer of deposit protects the wafer simultaneously, avoid hydrofluoric acid to damage the wafer.
Description
Technical Field
The application relates to the technical field of wafer surface treatment, in particular to a wafer epitaxial surface treatment method.
Background
In the epitaxial process, the phenomenon that a load locking device clamps broken wafers occurs, after the process is finished, equipment alarms and the like, so that impurity particles are generated on the surfaces of the wafers, and the existing treatment method is to wash the wafers with clear water once or wash the wafers with equipment with ultrasonic waves for 2-3 times.
The affected wafer cannot be taken off due to equipment failure or cannot enter a cleaning machine to be cleaned timely due to too many impurity particles, so that a thin oxide layer is generated on the surface of the wafer epitaxial layer, and the surface impurity particles are wrapped by the oxide layer formed on the surface of the wafer epitaxial layer and solidified on the surface of the wafer, so that the surface impurity particles are difficult to rinse by clean water or ultrasonic waves.
Based on this, a new solution is needed.
Disclosure of Invention
In view of this, the embodiments of the present disclosure provide a wafer epitaxial surface treatment method for removing impurity particles solidified on a wafer surface.
The embodiment of the specification provides the following technical scheme: s1, pre-cleaning a wafer attached with particles;
s2, depositing a silicon dioxide oxide layer on the surface of the wafer;
and S3, flushing the wafer by using hydrofluoric acid.
Optionally, the impurity particles on the surface of the wafer are placed for more than 8 hours.
Optionally, the impurity particles with the particle size larger than 20nm are subjected to pre-cleaning separation in S1.
Optionally, the thickness of the silicon dioxide oxide layer deposited in S2 is 20-40nm.
Optionally, in S3, the oxide and impurity particles on the wafer are cleaned by rinsing or soaking.
Optionally, in S1, the wafer is pre-cleaned by using clean water or ultrasonic waves.
Optionally, the concentration of hydrofluoric acid is 30%.
Compared with the prior art, the beneficial effects that above-mentioned at least one technical scheme that this description embodiment adopted can reach include at least:
and the impurity particles on the wafer and the silicon dioxide oxide layer are cleaned and separated by using hydrofluoric acid, so that the impurity particles on the surface of the wafer are cleaned, and meanwhile, the deposited oxide layer protects the wafer and prevents the wafer from being damaged by the hydrofluoric acid.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of a wafer epitaxial surface treatment method according to the present application;
FIG. 2 is a graph showing impurity particle distribution obtained by scanning before cleaning in the present application;
FIG. 3 is a graph showing impurity particle distribution obtained by scanning after clean water cleaning;
FIG. 4 is a graph showing the distribution of impurity particles obtained by scanning after ultrasonic cleaning according to the present application;
fig. 5 is a graph showing the distribution of impurity particles obtained by scanning after hydrofluoric acid cleaning in the present application.
Detailed Description
Embodiments of the present application are described in detail below with reference to the accompanying drawings.
Other advantages and effects of the present application will become apparent to those skilled in the art from the present disclosure, when the following description of the embodiments is taken in conjunction with the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. The present application may be embodied or carried out in other specific embodiments, and the details of the present application may be modified or changed from various points of view and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present application, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, apparatus may be implemented and/or methods practiced using any number and aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should also be noted that the illustrations provided in the following embodiments merely illustrate the basic concepts of the application by way of illustration, and only the components related to the application are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided in order to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details.
In the epitaxial process, the phenomenon that a load locking device clamps broken wafers occurs, after the process is finished, equipment alarms and the like, so that impurity particles are generated on the surfaces of the wafers, and the existing treatment method is to wash the wafers with clear water once or wash the wafers with equipment with ultrasonic waves for 2-3 times.
The affected wafer cannot be taken off due to equipment failure or cannot enter a cleaning machine to be cleaned in time due to too many impurity particles, so that a thin oxide layer with the thickness of 0.1-0.8nm is generated on the surface of the wafer epitaxial layer, and the surface impurity particles are wrapped by the oxide layer formed on the surface of the wafer epitaxial layer and solidified on the surface of the wafer, so that the surface impurity particles are difficult to be washed out by clean water or ultrasonic waves.
In view of this, the inventors have conducted intensive studies and improved searches on impurity particles on the wafer surface, and found that: clean water or ultrasonic cleaning surface impurity particles are directly used, and the impurity particles are difficult to clean because the oxide layer is wrapped and fixed, and the wafer is damaged because the impurity particles are directly cleaned by hydrofluoric acid.
Based on this, the embodiment of the present specification proposes a wafer epitaxial surface treatment method: the wafer is pre-cleaned, impurity particles with larger volume are cleaned, a silicon dioxide oxide layer is deposited on the surface of the wafer, the impurity particles are wrapped and bonded by the silicon dioxide oxide layer, and finally hydrofluoric acid is used for cleaning the silicon dioxide oxide layer and the impurity particles.
The following describes the technical solutions provided by the embodiments of the present application with reference to the accompanying drawings.
As shown in fig. 1, an embodiment of the present disclosure provides a wafer epitaxial surface treatment method, which may include:
step S1, pre-cleaning a wafer attached with impurity particles;
s2, depositing a silicon dioxide oxide layer on the surface of the wafer;
and step S3, using hydrofluoric acid to rinse the wafer.
The impurity particles with larger volume on the surface of the wafer are cleaned, the surface of the wafer is separated, the large-volume impurity particles are prevented from shielding small-volume impurity particles, the surface of the wafer cannot be fully deposited, the deposited silicon dioxide oxide layer is adhered to the impurity particles on the wafer, the impurity particles on the wafer and the silicon dioxide oxide layer are cleaned and separated out from the wafer in the process of cleaning by using hydrofluoric acid, so that the impurity particles on the surface of the wafer are cleaned, and meanwhile, the deposited oxide layer protects the wafer, and the wafer is prevented from being damaged by the hydrofluoric acid.
Further, as shown in fig. 2, the impurity particles on the surface of the wafer are scanned by the scanning electron microscope to obtain an impurity particle distribution diagram on the surface of the wafer, the placement time of the impurity particles on the surface of the wafer is more than 8 hours, and the placement time is less than 8 hours because no oxide film is formed between the surface of the wafer and the impurity particles, so that the impurity particles can be directly cleaned and separated by using clear water or ultrasonic wave, and after the placement time exceeds 8 hours, the impurity particles are fixed on the wafer and are difficult to be cleaned by using water and ultrasonic wave.
Further, the concentration of hydrofluoric acid is 30%, and the hydrofluoric acid in the concentration range can effectively remove silicon dioxide oxide and impurity particles of the electrode without damaging the wafer.
Further, impurities with the particle size of more than 20nm are separated in the step S1 by a pre-cleaning mode. The wafer is easily separated through clear water washing or ultrasonic wave mode to bulky impurity, avoids impurity particle volume great to shelter from the impurity particle of small volume simultaneously, leads to unable abundant deposition to the wafer surface.
The clean water cleaning and the ultrasonic cleaning can be used for cleaning and separating impurity particles with the particle size larger than 20nm on the surface of the wafer, and if the wafer with the particle size larger than 20nm on the surface of the wafer is subjected to the clean water cleaning and/or the ultrasonic cleaning, the wafer is scrapped.
Further, in the step S2, the thickness of the silicon dioxide oxide layer is 20-40nm, and the particle size of impurity particles on the surface of the wafer is smaller than 20nm. The silicon dioxide oxide layer in the thickness range can fully wrap the impurity particles, so that hydrofluoric acid is convenient to clean the wafer, the silicon dioxide oxide layer carries the impurity particles to be cleaned and separated from the surface of the wafer, the wafer is protected, and the corrosion of the hydrofluoric acid to the wafer is reduced.
In an alternative embodiment, as shown in fig. 3 and fig. 4, in step S1, the wafer is pre-cleaned by using clean water or ultrasonic wave, fig. 3 is an impurity particle distribution diagram of the wafer surface obtained by scanning the impurity particles on the wafer surface cleaned by the clean water through a scanning electron microscope, and fig. 4 is an impurity particle distribution diagram of the wafer surface obtained by scanning the impurity particles on the wafer surface cleaned by the ultrasonic wave through the scanning electron microscope.
In an alternative embodiment, as shown in fig. 5, fig. 5 is a diagram of a distribution of impurity particles on a wafer surface obtained by scanning impurity particles on the wafer surface after depositing an oxide layer and cleaning with hydrofluoric acid by using a scanning electron microscope, and in step S3, oxide and impurity particles on the wafer are cleaned by using a rinsing or soaking method. The deposited silica oxide layer and impurity particles are cleaned and separated by hydrofluoric acid.
In an alternative embodiment, the wafer is pre-cleaned using ultrasonic waves after the clean water cleaning in step S1.
The silicon dioxide oxide layer deposited in the method is adhered to and wrapped with impurity particles on the wafer, and the impurity particles on the wafer and the silicon dioxide oxide layer are cleaned and separated from the wafer in the process of cleaning by using hydrofluoric acid, so that the impurity particles on the surface of the wafer are cleaned, the deposited oxide layer protects the wafer, and the wafer is prevented from being damaged by the hydrofluoric acid;
the wafer surface is pre-cleaned before being deposited, impurity particles with larger particle sizes are cleaned, the phenomenon that large-volume impurity particles shield small-volume impurity particles is avoided, the wafer surface cannot be fully deposited, cleaning blind areas are generated, and the wafer is damaged is avoided.
In this specification, identical and similar parts of the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the description is relatively simple for the embodiments described later, and reference is made to the description of the foregoing embodiments for relevant points.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily conceivable by those skilled in the art within the technical scope of the present application should be covered in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (7)
1. A wafer epitaxial surface treatment method is characterized in that: comprising the steps of (a) a step of,
s1, pre-cleaning a wafer attached with particles;
s2, depositing a silicon dioxide oxide layer on the surface of the wafer;
and S3, flushing the wafer by using hydrofluoric acid.
2. The wafer epitaxial surface treatment method according to claim 1, characterized in that: and the placing time of the impurity particles on the surface of the wafer is more than 8 hours.
3. The wafer epitaxial surface treatment method according to claim 1, characterized in that: and S1, pre-cleaning and separating impurity particles with the particle size of more than 20nm.
4. The wafer epitaxial surface treatment method according to claim 1, characterized in that: and S2, depositing a silicon dioxide oxide layer with the thickness of 20-40nm.
5. The wafer epitaxial surface treatment method according to claim 1, characterized in that: and S3, cleaning oxide and impurity particles on the wafer by adopting a flushing or soaking mode.
6. The wafer epitaxial surface treatment method according to claim 1, characterized in that: and S1, pre-cleaning the wafer by adopting clear water or ultrasonic waves.
7. The wafer epitaxial surface treatment method according to claim 1, characterized in that: the concentration of hydrofluoric acid is 30%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310538600.2A CN116525413A (en) | 2023-05-12 | 2023-05-12 | Wafer epitaxial surface treatment method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310538600.2A CN116525413A (en) | 2023-05-12 | 2023-05-12 | Wafer epitaxial surface treatment method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116525413A true CN116525413A (en) | 2023-08-01 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310538600.2A Pending CN116525413A (en) | 2023-05-12 | 2023-05-12 | Wafer epitaxial surface treatment method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116525413A (en) |
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2023
- 2023-05-12 CN CN202310538600.2A patent/CN116525413A/en active Pending
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