CN116489110A - Method, device, chip and storage medium for checking routing data packet - Google Patents

Method, device, chip and storage medium for checking routing data packet Download PDF

Info

Publication number
CN116489110A
CN116489110A CN202310464043.4A CN202310464043A CN116489110A CN 116489110 A CN116489110 A CN 116489110A CN 202310464043 A CN202310464043 A CN 202310464043A CN 116489110 A CN116489110 A CN 116489110A
Authority
CN
China
Prior art keywords
data packet
output
chip
target
port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310464043.4A
Other languages
Chinese (zh)
Inventor
崔昭华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taichu Wuxi Electronic Technology Co ltd
Original Assignee
Taichu Wuxi Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taichu Wuxi Electronic Technology Co ltd filed Critical Taichu Wuxi Electronic Technology Co ltd
Priority to CN202310464043.4A priority Critical patent/CN116489110A/en
Publication of CN116489110A publication Critical patent/CN116489110A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3009—Header conversion, routing tables or routing tags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/109—Integrated on microchip, e.g. switch-on-chip
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3027—Output queuing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses a method, a device, a chip and a storage medium for checking a routing data packet, wherein routers in the chip are connected through a network on chip, and the method comprises the following steps: transmitting the received data packet to a corresponding output port through each input port of the target router; according to the route information included in each data packet, adding each data packet into a data packet queue matched with a corresponding output port; and obtaining output results corresponding to the output ports, comparing the output results with corresponding data packet queues, and determining a data packet verification result corresponding to the target router according to the comparison results. The technical scheme of the embodiment of the invention can improve the verification efficiency of the routing data packet and save the resource expenditure in the verification process of the routing data packet.

Description

Method, device, chip and storage medium for checking routing data packet
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method, an apparatus, a chip, and a storage medium for verifying a routing data packet.
Background
A System On Chip (SOC) includes a Network On Chip (NOC), and the NOC Network may implement information interaction through a plurality of routers.
Wherein, a plurality of input ports and output ports can be deployed on each router. After receiving the data packet through the input port, the router outputs the data packet through the corresponding output port according to the routing information corresponding to the data packet. However, due to the complex structure of the NOC network, when the router outputs a packet, the packet may not reach the expected output port, or the output port may output an erroneous packet. Therefore, it is necessary to check whether the data packet output by the router matches the output port.
The prior art lacks a method for efficiently checking the router data packet and saving the resource overhead.
Disclosure of Invention
The invention provides a method, a device, a chip and a storage medium for verifying a routing data packet, which can improve the verification efficiency of the routing data packet and save the resource expense in the verification process of the routing data packet.
According to one aspect of the present invention, there is provided a method for verifying a routing data packet, applied to a chip, where routers in the chip are connected through a network on chip, the method comprising:
transmitting the received data packet to a corresponding output port through each input port of the target router;
according to the route information included in each data packet, adding each data packet into a data packet queue matched with a corresponding output port;
and obtaining output results corresponding to the output ports, comparing the output results with corresponding data packet queues, and determining a data packet verification result corresponding to the target router according to the comparison results.
Optionally, before transmitting the received data packet to the corresponding output port through each input port of the target router, the method further includes:
and acquiring all output ports corresponding to the target router, and establishing a data packet queue corresponding to each output port one by one.
Optionally, obtaining an output result corresponding to each output port includes:
judging whether the output port receives data packets respectively transmitted by a plurality of input ports at the same time;
if yes, arbitrating each data packet through a preset arbitrator to obtain an output sequence corresponding to each data packet;
and sequentially acquiring output results corresponding to the output ports according to the output sequence.
Optionally, the route information includes a port identifier of a corresponding output port;
according to the routing information included in each data packet, adding each data packet to a data packet queue matched with a corresponding output port, including:
determining a target output port matched with each data packet according to the port identification included in each data packet;
and acquiring data packet queues corresponding to the target output ports respectively, and adding identification information corresponding to the data packets into the corresponding data packet queues.
Optionally, comparing each output result with a corresponding data packet queue, and determining a data packet verification result corresponding to the target router according to the comparison result, including:
judging whether a target data packet consistent with the output result exists in the data packet queue or not;
if yes, determining that the output result is correct, and marking that the target data packet is successfully checked;
if not, determining that the output result is wrong, and marking that the output result verification fails.
Optionally, after determining that the output result is correct and marking that the target data packet is successfully verified, the method further includes: and deleting the target data packet in the data packet queue so as to release the storage resources occupied by the target data packet.
According to another aspect of the present invention, there is provided a routing data packet verification apparatus applied to a chip, where routers in the chip are connected through a network on chip, the apparatus comprising:
the data packet transmission module is used for transmitting the received data packet to the corresponding output port through each input port of the target router;
the data packet adding module is used for adding each data packet into a data packet queue matched with a corresponding output port according to the routing information included in each data packet;
the data packet comparison module is used for obtaining output results corresponding to the output ports, comparing the output results with the corresponding data packet queues, and determining a data packet verification result corresponding to the target router according to the comparison results.
According to another aspect of the present invention, there is provided a chip including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the routing packet verification method of any one of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the method for verifying a routing data packet according to any embodiment of the present invention when executed.
According to another aspect of the present invention, there is provided a computer program product comprising a computer program which, when executed by a processor, implements a method of routing data packet verification according to any of the embodiments of the present invention.
According to the technical scheme provided by the embodiment of the invention, the received data packet is transmitted to the corresponding output port through each input port of the target router; according to the route information included in each data packet, adding each data packet into a data packet queue matched with a corresponding output port; the technical means of obtaining the output results corresponding to the output ports, comparing the output results with the corresponding data packet queues, and determining the data packet verification results corresponding to the target router according to the comparison results can improve the verification efficiency of the routing data packet and save the resource cost in the verification process of the routing data packet.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a method for checking a routing data packet according to an embodiment of the present invention;
fig. 2 is a flowchart of another method for verifying a routing data packet according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a routing data packet verification device according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a chip structure for implementing a method for checking a routing data packet according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a flowchart of a method for verifying a routing data packet according to a first embodiment of the present invention, where the method may be applied to a case of verifying a data packet output from an output port of a router in a chip, and the method may be performed by a routing data packet verification device, where the routing data packet verification device may be implemented in a form of hardware and/or software, and the routing data packet verification device may be configured in the chip, where routers in the chip are connected through a network on chip. As shown in fig. 1, the method includes:
step 110, the received data packet is transmitted to the corresponding output port through each input port of the target router.
In this embodiment, the target router may be any router in the network on chip. The target router may include a plurality of input ports and a plurality of output ports therein. After detecting that an input port in the target router receives a data packet, the data packet can be transmitted to a corresponding output port according to the routing information. Specifically, the routing information may include port information, such as a port address, of a corresponding output port.
In one implementation manner of this embodiment, before the received data packet is transmitted to the corresponding output port through each input port of the target router, the method further includes: and acquiring all output ports corresponding to the target router, and establishing a data packet queue corresponding to each output port one by one.
In a specific embodiment, a packet queue corresponding to each output port one-to-one may be established according to the port identifier corresponding to each output port. The data packet queue is used for storing information of correct data packets output by the output port.
And 120, adding each data packet to a data packet queue matched with a corresponding output port according to the routing information included in each data packet.
In a specific embodiment, an output port matching each data packet may be determined according to the routing information (e.g., the output port address) carried in the data packet, and each data packet may be added to the data packet queue matching the corresponding output port.
And 130, obtaining output results corresponding to the output ports, comparing the output results with the corresponding data packet queues, and determining a data packet verification result corresponding to the target router according to the comparison results.
In this step, the data packet output by the output port (i.e., the output result) may be obtained, and the output result is compared with each data packet in the data packet queue corresponding to the port, and then the data packet verification result corresponding to the target router is determined according to the comparison result.
The method has the advantages that the data packets in the target router can be quickly checked by constructing the data packet queue matched with each output port, and the checking efficiency of the data packets of the router is improved; secondly, because the occupied storage resources in the data packet queue are less, the resource expenditure in the process of checking the router data packet can be saved.
According to the technical scheme provided by the embodiment of the invention, the received data packets are transmitted to the corresponding output ports through the input ports of the target router, the data packets are added to the data packet queues matched with the corresponding output ports according to the routing information included in the data packets, the output results corresponding to the output ports are obtained, the output results are compared with the corresponding data packet queues, and the technical means of determining the data packet verification results corresponding to the target router according to the comparison results can improve the verification efficiency of the routing data packets and save the resource expense in the verification process of the routing data packets.
Example two
Fig. 2 is a flowchart of a method for checking a routing data packet according to a second embodiment of the present invention, where the foregoing embodiment is further refined. As shown in fig. 2, the method includes:
step 210, transmitting the received data packet to the corresponding output port through each input port of the target router.
Step 220, determining a target output port matched with each data packet according to the port identifier included in each data packet.
In this embodiment, the data packet may carry corresponding routing information, where the routing information may include a port identifier of the corresponding output port, for example, a port name, or an identity (Identity document, ID) or the like.
In a specific embodiment, assuming that the destination router includes five output ports, any character in (0, 1,2,3, 4) may be included in the data packet received by the destination router, where the character is used to identify the specific output port corresponding to the data packet.
Step 230, acquiring data packet queues corresponding to the target output ports respectively, and adding identification information corresponding to the data packets to the corresponding data packet queues.
In this embodiment, after determining the destination output port to which the data packet matches, the data packet queue corresponding to the destination output port may be obtained, and the identification information (for example, the name, identifier, or ID of the data packet) of the data packet may be added to the data packet queue.
The advantage of this arrangement is that by adding the identification information of the data packet to the data packet queue, the storage resources occupied by the data packet queue can be reduced, and the resource overhead in the process of checking the router data packet can be saved.
Step 240, obtaining output results corresponding to each output port, judging whether a target data packet consistent with the output results exists in a corresponding data packet queue, if so, executing steps 250-260, and if not, executing step 270.
In one implementation manner of this embodiment, obtaining an output result corresponding to each output port includes: judging whether the output port receives data packets respectively transmitted by a plurality of input ports at the same time; if yes, arbitrating each data packet through a preset arbitrator to obtain an output sequence corresponding to each data packet; and sequentially acquiring output results corresponding to the output ports according to the output sequence.
In this embodiment, if a certain output port receives data packets respectively transmitted by multiple input ports at the same time, the arbiter may determine an output sequence corresponding to each data packet according to the priority corresponding to each data packet, and sequentially output each data packet according to the output sequence through the output port.
In the step, after the output result of the output port is obtained, the output result can be searched and compared with a data packet queue corresponding to the output port, and if a target data packet consistent with the output result exists in the data packet queue, the target data packet can be considered to be transmitted to an expected output port; otherwise, if the target data packet consistent with the output result does not exist in the data packet queue, the output result can be considered to be output error.
Step 250, determining that the output result is correct, and marking that the verification of the target data packet is successful.
And 260, deleting the target data packet in the data packet queue so as to release the storage resources occupied by the target data packet.
In this embodiment, since the delay time from receiving the data packet to outputting the data packet by the target router is short, the data packet queue can be maintained within a short data length (for example, 5bit-8bit order) for a long time, so that the resource overhead in the process of checking the router data packet can be saved; secondly, for the whole network-on-chip, even if a large number of data packet queues are deployed, the working efficiency of the network-on-chip is not affected, and a large number of routing data packets are checked through a plurality of data packet queues, so that the positioning efficiency of faults in the network-on-chip can be greatly improved.
Step 270, determining that the output result is wrong, and marking that the output result fails to verify.
In one implementation manner of this embodiment, after comparing all output results of the output port with the packet queue, if there is a packet in the packet queue that is inconsistent with any output result, the packet may be considered to be not transmitted to the output port, that is, the packet verification fails.
According to the technical scheme provided by the embodiment of the invention, through each input port of a target router, a received data packet is transmitted to a corresponding output port, a target output port matched with each data packet is determined according to port identifiers included in each data packet, a data packet queue corresponding to each target output port is obtained, identification information corresponding to each data packet is added to the corresponding data packet queue, an output result corresponding to each output port is obtained, whether the corresponding data packet queue has a target data packet consistent with the output result is judged, if yes, the output result is determined to be correct, the target data packet is marked to be successfully checked, and the target data packet is deleted in the data packet queue so as to release storage resources occupied by the target data packet; if not, determining the error of the output result and marking the technical means of failure verification of the output result, so that the verification efficiency of the routing data packet can be improved, and the resource cost in the verification process of the routing data packet is saved.
Example III
Fig. 3 is a schematic structural diagram of a device for verifying a routing data packet according to a third embodiment of the present invention, where the device is applied to a chip, and routers in the chip are connected through a network on chip. As shown in fig. 3, the apparatus includes: a packet transmission module 310, a packet addition module 320, and a packet comparison module 330.
The data packet transmission module 310 is configured to transmit, through each input port of the target router, the received data packet to a corresponding output port;
a packet adding module 320, configured to add each of the packets to a packet queue matched with a corresponding output port according to routing information included in each of the packets;
the packet comparison module 330 is configured to obtain output results corresponding to each output port, compare each output result with a corresponding packet queue, and determine a packet verification result corresponding to the target router according to the comparison result.
According to the technical scheme provided by the embodiment of the invention, the received data packets are transmitted to the corresponding output ports through the input ports of the target router, the data packets are added to the data packet queues matched with the corresponding output ports according to the routing information included in the data packets, the output results corresponding to the output ports are obtained, the output results are compared with the corresponding data packet queues, and the technical means of determining the data packet verification results corresponding to the target router according to the comparison results can improve the verification efficiency of the routing data packets and save the resource expense in the verification process of the routing data packets.
On the basis of the above embodiment, the routing information includes a port identifier of the corresponding output port. The apparatus further comprises:
the queue establishing module is used for acquiring all output ports corresponding to the target router and establishing a data packet queue corresponding to each output port one by one.
The packet adding module 320 includes:
a port determining unit, configured to determine, according to a port identifier included in each data packet, a target output port that matches each data packet;
the identification adding unit is used for obtaining the data packet queues corresponding to the target output ports respectively and adding the identification information corresponding to the data packets into the corresponding data packet queues.
The packet comparison module 330 includes:
the port judging unit is used for judging whether the output port simultaneously receives data packets respectively transmitted by a plurality of input ports;
the arbitration unit is used for arbitrating each data packet through a preset arbiter when the output port simultaneously receives the data packets respectively transmitted by the plurality of input ports, so as to obtain the output sequence corresponding to each data packet;
the result acquisition unit is used for sequentially acquiring output results corresponding to the output ports according to the output sequence;
the data packet judging unit is used for judging whether a target data packet consistent with the output result exists in the data packet queue; if yes, determining that the output result is correct, and marking that the target data packet is successfully checked; if not, determining that the output result is wrong, and marking that the output result verification fails;
and the data packet deleting unit is used for deleting the target data packet in the data packet queue after determining that the output result is correct and marking that the target data packet is successfully checked so as to release the storage resource occupied by the target data packet.
The device can execute the method provided by all the embodiments of the invention, and has the corresponding functional modules and beneficial effects of executing the method. Technical details not described in detail in the embodiments of the present invention can be found in the methods provided in all the foregoing embodiments of the present invention.
Example IV
Fig. 4 shows a schematic diagram of the structure of a chip 10 that may be used to implement an embodiment of the invention. As shown in fig. 4, the chip 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the chip 10 can also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
The various components in the chip 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the chip 10 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the routing packet verification method.
In some embodiments, the routing data packet verification method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the chip 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the routing packet verification method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the routing data packet verification method in any other suitable way (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a chip having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or a trackball) through which a user can provide input to the chip. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (10)

1. The method is characterized by being applied to a chip, wherein routers in the chip are connected through a network on chip, and the method comprises the following steps:
transmitting the received data packet to a corresponding output port through each input port of the target router;
according to the route information included in each data packet, adding each data packet into a data packet queue matched with a corresponding output port;
and obtaining output results corresponding to the output ports, comparing the output results with corresponding data packet queues, and determining a data packet verification result corresponding to the target router according to the comparison results.
2. The method of claim 1, further comprising, prior to transmitting the received data packets to the corresponding output ports through each of the input ports of the target router:
and acquiring all output ports corresponding to the target router, and establishing a data packet queue corresponding to each output port one by one.
3. The method of claim 2, wherein obtaining the output result corresponding to each output port comprises:
judging whether the output port receives data packets respectively transmitted by a plurality of input ports at the same time;
if yes, arbitrating each data packet through a preset arbitrator to obtain an output sequence corresponding to each data packet;
and sequentially acquiring output results corresponding to the output ports according to the output sequence.
4. The method according to claim 1, wherein the routing information includes a port identifier of a corresponding output port;
according to the routing information included in each data packet, adding each data packet to a data packet queue matched with a corresponding output port, including:
determining a target output port matched with each data packet according to the port identification included in each data packet;
and acquiring data packet queues corresponding to the target output ports respectively, and adding identification information corresponding to the data packets into the corresponding data packet queues.
5. The method of claim 1, wherein comparing each of the output results with a corresponding packet queue and determining a packet verification result corresponding to the target router based on the comparison results, comprises:
judging whether a target data packet consistent with the output result exists in the data packet queue or not;
if yes, determining that the output result is correct, and marking that the target data packet is successfully checked;
if not, determining that the output result is wrong, and marking that the output result verification fails.
6. The method of claim 5, further comprising, after determining that the output result is correct and marking that the target packet verification is successful:
and deleting the target data packet in the data packet queue so as to release the storage resources occupied by the target data packet.
7. A device for verifying a routing data packet, the device being applied to a chip, wherein routers in the chip are connected through a network on chip, the device comprising:
the data packet transmission module is used for transmitting the received data packet to the corresponding output port through each input port of the target router;
the data packet adding module is used for adding each data packet into a data packet queue matched with a corresponding output port according to the routing information included in each data packet;
the data packet comparison module is used for obtaining output results corresponding to the output ports, comparing the output results with the corresponding data packet queues, and determining a data packet verification result corresponding to the target router according to the comparison results.
8. A chip, the chip comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the routing packet verification method of any one of claims 1-6.
9. A computer readable storage medium storing computer instructions for causing a processor to implement the method of routing data packet verification of any one of claims 1-6 when executed.
10. A computer program product, characterized in that the computer program product comprises a computer program which, when executed by a processor, implements the routing data packet verification method according to any one of claims 1-6.
CN202310464043.4A 2023-04-26 2023-04-26 Method, device, chip and storage medium for checking routing data packet Pending CN116489110A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310464043.4A CN116489110A (en) 2023-04-26 2023-04-26 Method, device, chip and storage medium for checking routing data packet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310464043.4A CN116489110A (en) 2023-04-26 2023-04-26 Method, device, chip and storage medium for checking routing data packet

Publications (1)

Publication Number Publication Date
CN116489110A true CN116489110A (en) 2023-07-25

Family

ID=87215317

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310464043.4A Pending CN116489110A (en) 2023-04-26 2023-04-26 Method, device, chip and storage medium for checking routing data packet

Country Status (1)

Country Link
CN (1) CN116489110A (en)

Similar Documents

Publication Publication Date Title
CN113766487B (en) Cloud mobile phone information acquisition method, device, equipment and medium
CN113641544B (en) Method, apparatus, device, medium and product for detecting application state
CN116401113A (en) Environment verification method, device and medium for heterogeneous many-core architecture acceleration card
CN116418689A (en) Request message response method and device, electronic equipment and storage medium
CN116489110A (en) Method, device, chip and storage medium for checking routing data packet
CN116192534A (en) Train control data communication transmission method, device, equipment and storage medium
CN116301676A (en) Printing equipment connection method, device, equipment and storage medium
US10129147B2 (en) Network-on-chip flit transmission method and apparatus
CN115130112A (en) Quick start-stop method, device, equipment and storage medium
CN116306407B (en) Verification method, device, equipment and storage medium of Network On Chip (NOC)
CN116055386B (en) Port weight updating method, device, chip and storage medium
US10067816B2 (en) Model checking apparatus and method, and storage medium having program stored therein
CN114610511B (en) Input verification method and device, electronic equipment and storage medium
CN117492822B (en) Change contrast method, device, electronic equipment and storage medium
CN114238004B (en) Method and device for checking data transmission correctness of interconnected circuit and electronic equipment
CN116248574A (en) Routing information determining method, device, chip and storage medium
CN116599896A (en) Multi-channel communication method, device and equipment in Network On Chip (NOC) verification
CN117319379A (en) Unidirectional file transmission method, unidirectional file transmission device, unidirectional file transmission equipment and unidirectional file transmission medium
CN115794609A (en) Script sharing method and device, electronic equipment and storage medium
CN117421363A (en) Verification method, device, equipment and medium of data processing flow
CN118535643A (en) Database synchronization method and device, electronic equipment and storage medium
CN118631753A (en) Message processing method and device, electronic equipment and storage medium
CN116227906A (en) Automatic deployment method, device, equipment and medium of assembly line
CN117785264A (en) Interface configuration method, device and storage medium for server operation and maintenance
CN116015665A (en) Method, device, equipment and medium for repeatedly detecting virtual article

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination