CN116488623B

CN116488623B - Current comparator

Info

Publication number: CN116488623B
Application number: CN202310750203.1A
Authority: CN
Inventors: 王锐; 李建军; 帅柏林
Original assignee: Guangxin Microelectronics Suzhou Co ltd
Current assignee: Guangxin Microelectronics Suzhou Co ltd
Priority date: 2023-06-25
Filing date: 2023-06-25
Publication date: 2023-10-20
Anticipated expiration: 2043-06-25
Also published as: CN116488623A

Abstract

The invention discloses a current comparator, which relates to the field of circuits, and is characterized in that current signals output by a first input module and a second input module are respectively converted into first voltage and second voltage through a conversion module, the voltage comparator realizes comparison of two input currents by utilizing voltage signals corresponding to output ports of the first input module and the second input module, namely, a hedging node formed by the output ports of the first input module and the second input module, namely, the two input currents during output, and the limit of limited output impedance of a current source and current sinking at the hedging node to the two input currents is broken through by utilizing the high gain of the voltage comparator, so that the high gain of the output of the current comparator is realized, the precision of the whole current comparator is improved, the voltage comparator can be applied to a comparison process of micro currents, the application range of the current comparator is expanded, and the application requirements of users are further met.

Description

Current comparator

Technical Field

The present invention relates to the field of circuits, and in particular, to a current comparator.

Background

The current comparator is an important analog circuit, and has two current inputs and one voltage output, and the magnitude relation of the two input currents is determined according to different conditions of the output voltage. Current comparators are widely used in POR (Power-on-reset) circuits, over-current temperature detection circuits, and various types of state switching circuits or signal processing, and along with the gradual wide application, the requirements of related personnel on the current comparators are also higher and higher.

The current comparator is generally realized by adopting a current source (current source) and current sink (current sink) opposite-impact method, the compared current is converted into a current source and a current sink through a current mirror, and the output of the current source and the output of the current sink are connected together to form an opposite-impact node. When the current of the current source is larger than the current of the current sink, the opposite-punching node is pulled up to the power supply voltage, and when the current of the current source is smaller than the current of the current sink, the opposite-punching node is pulled down to the ground. Thereby realizing the function of comparing the input current by the output voltage. However, the output of the existing current comparator is limited by the limited output impedance of the current source and the current sink, and the output cannot achieve high gain, so that the comparison of the micro current is difficult, the accuracy of the whole current comparator is not high enough, and the application requirement is difficult to meet.

Disclosure of Invention

The invention aims to provide a current comparator, which breaks through the limitation of limited output impedance of a current source and a current sink at a hedging point on two input currents by utilizing the high gain of the voltage comparator, realizes the high gain of the output of the current comparator, improves the precision of the whole current comparator, can be applied to the comparison process of micro current, expands the application range of the current comparator and further meets the application requirements of users.

In order to solve the technical problems, the invention provides a current comparator, which comprises a first input module, a second input module, a conversion module and a voltage comparator; the input end of the first input module is used as a first input end of the current comparator, a first input current is connected to the first input end, the input end of the second input module is used as a second input end of the current comparator, a second input current is connected to the first output end of the first input module, the first output end of the first input module is respectively connected with the first output end of the second input module and the first input end of the conversion module, the second output end of the first input module is respectively connected with the second output end of the second input module and the second input end of the conversion module, the first output end of the conversion module is connected with the first input end of the voltage comparator, the second output end of the conversion module is connected with the second input end of the voltage comparator, and the output end of the voltage comparator is used as the output end of the current comparator;

the conversion module is used for converting the first difference value into a first voltage and converting the second difference value into a second voltage; the first difference value is obtained by subtracting the current output by the second input module from the current output by the first input module, and the first voltage is linearly related to the first difference value; the second difference value is obtained by subtracting the current output by the first input module from the current output by the second input module, and the second voltage is linearly related to the second difference value;

The voltage comparator is configured to compare the first voltage and the second voltage to compare the first input current and the second input current.

Optionally, the conversion module includes a first conversion transistor, a second conversion transistor, a third conversion transistor and a fourth conversion transistor, a first end of the first conversion transistor is connected with a first power supply, a second end of the first conversion transistor is connected with a first output end of the first input module, a first output end of the second input module and a first input end of the voltage comparator, a first end of the second conversion transistor is connected with a first output end of the first input module, a first output end of the second input module and a first input end of the voltage comparator are connected, a second end of the second conversion transistor is connected with a second power supply, a first end of the third conversion transistor is connected with the first power supply, a second end of the third conversion transistor is connected with a second output end of the first input module, a second output end of the second input module and a second input end of the voltage comparator are connected with the first output end of the first input module, a first end of the fourth conversion transistor is connected with the second output end of the first input module, a second output end of the second conversion transistor is connected with the second conversion transistor, a second conversion transistor is connected with the first conversion transistor, and the first conversion transistor is in a state.

Optionally, the conversion module further includes a first clamp transistor, a second clamp transistor, a third clamp transistor, and a fourth clamp transistor; the first end of the first clamping transistor is connected with the second end of the first conversion transistor, the second end of the first clamping transistor is connected with the first output end of the first input module, the first output end of the second input module is connected with the first input end of the third conversion transistor, the control end of the second clamping transistor is connected with the first output end of the first input module, the first output end of the second input module is connected with the first input end of the voltage comparator, the second end of the second input module is connected with the first end of the second conversion transistor, the control end of the second clamping transistor is connected with the second end of the third conversion transistor, the second end of the third clamping transistor is connected with the second end of the first input module, the second end of the second input module is connected with the first output end of the first input module, the second output end of the second input module is connected with the second input end of the fourth conversion transistor, the second clamping transistor is connected with the second input end of the second conversion transistor, and the second input end of the fourth conversion transistor is in a state.

Optionally, the voltage comparator includes a first voltage transistor, a second voltage transistor, a first mirror module, a second mirror module, a third mirror module and a current tube, where a control end of the first voltage transistor is connected to a first output end of the first input module, a first output end of the second input module, a second end of the first clamp transistor and a first end of the second clamp transistor, a control end of the second voltage transistor is connected to a second output end of the first input module, a second output end of the second input module, a second end of the third clamp transistor and a first end of the fourth clamp transistor, a first end of the first voltage transistor is connected to an input end of the first mirror module, an output end of the first mirror module is connected to an input end of the second mirror module, an output end of the second mirror module is used as an output end of the voltage comparator, and is connected to a second output end of the third input end of the third mirror module, a second end of the third mirror transistor is connected to a first end of the second voltage transistor, and a first end of the second mirror transistor is connected to a first end of the second voltage transistor, and a second end of the second transistor is connected to a second end of the second bias transistor.

Optionally, the voltage comparator further comprises a bias circuit, wherein the output end of the bias circuit is respectively connected with the first input module, the second input module, and the conversion module and the voltage comparator;

the bias circuit is used for outputting a second bias current, the second bias current is larger than the first input current, and the second bias current is larger than the second input current.

Optionally, the bias circuit includes a current source, a first current transistor, a second current transistor, a third current transistor and a fourth current transistor, where a first end of the first current transistor is connected to the first power supply, a second end of the first current transistor is used as a first output end of the bias circuit and is connected to a first end of the second current transistor, a control end of the first current transistor is connected to a control end of the third current transistor, a second end of the second current transistor is connected to the second power supply, a control end of the second current transistor is used as a second output end of the bias circuit and is connected to a control end of the fourth current transistor, a second end of the fourth current transistor is connected to the second power supply, a first end of the third current transistor is connected to the first power supply, and a second end of the current source is connected to a first end of the fourth current transistor.

Optionally, the first input module includes a first input circuit and a first pre-amplifying circuit, a first input end of the first input circuit is used as a first input end of the current comparator, a first input current is connected, a second input end is connected with a first output end of the bias circuit, a third input end is connected with a second output end of the bias circuit, an output end is connected with an input end of the first pre-amplifying circuit, a first output end of the first pre-amplifying circuit is respectively connected with a first output end of the second input module and a first input end of the converting module, and a second output end of the first pre-amplifying circuit is respectively connected with a second output end of the second input module and a second input end of the converting module.

Optionally, the first input circuit includes a first input transistor, a second input transistor, a third input transistor, a fourth input transistor, a fifth input transistor and a sixth input transistor, where a first end of the first input transistor is connected to the first power supply, a second end of the first input transistor is connected to a first end of the second input transistor, a control end of the first input transistor is connected to a control end of the third current transistor, a control end of the second input transistor is connected to a control end of the fourth current transistor, a second end of the second input transistor serves as a first input end of the current comparator, and is connected to a control end of the third input transistor, a first end of the sixth input transistor is connected to the first power supply, a second end of the third input transistor is connected to a first end of the fourth input transistor, a control end of the fourth input transistor is connected to a fifth end of the fifth input transistor, and a second end of the fifth input transistor is connected to the fifth input transistor, and a fifth input transistor is connected to the fifth input end of the fifth input transistor.

Optionally, the first pre-amplifying circuit includes a first amplifying transistor, a second amplifying transistor, a third amplifying transistor, a fourth amplifying module and a fifth amplifying module, where a control end of the first amplifying transistor is connected to a control end of the fifth input transistor, a control end of the second amplifying transistor is connected to a control end of the sixth input transistor, a first end of the first amplifying transistor is connected to the second power supply, a second end of the first amplifying transistor is connected to a first end of the second amplifying transistor, a second end of the second amplifying transistor is connected to an input end of the fourth amplifying module and a control end of the third amplifying transistor, a first end of the third amplifying transistor is connected to the first power supply, a second end of the third amplifying transistor is used as a first output end of the first pre-amplifying circuit, an output end of the fourth amplifying module is connected to an input end of the fifth amplifying module, and an output end of the fifth amplifying module is used as a second output end of the first pre-amplifying circuit.

Optionally, the bias circuit further includes a fifth current transistor, a sixth current transistor, a seventh current transistor and a sixth mirror module, where a control end of the fifth current transistor is connected to a control end of the third current transistor, a control end of the sixth current transistor is connected to a control end of the fourth current transistor, a first end of the fifth current transistor is connected to the first power supply, a second end of the fifth current transistor is connected to a first end of the sixth current transistor, a second end of the sixth current transistor is respectively connected to an input end of the sixth mirror module, a control end of the second conversion transistor is connected to a control end of the fourth conversion transistor, an output end of the sixth mirror module is respectively connected to a first end of the seventh current transistor, a control end of the seventh current transistor is connected to a control end of the first conversion transistor and a control end of the third conversion transistor, and a second end of the seventh current transistor is connected to the first power supply.

The invention provides a current comparator, which comprises a first input module, a second input module, a conversion module and a voltage comparator, wherein current signals output by the first input module and the second input module are respectively converted into first voltage and second voltage through the conversion module, so that the voltage comparator can compare the first input current and the second input current by utilizing the comparison process of the first voltage and the second voltage; the voltage comparator utilizes the voltage signals corresponding to the output ports of the first input module and the second input module to detect two input currents, namely, the opposite impact node formed by the two input currents when the two input currents are output, and utilizes the high gain of the voltage comparator to break through the limit of the limited output impedance of the current source and the current sink at the opposite impact node to the two input currents, so that the high gain of the output of the current comparator is realized, the precision of the whole current comparator is improved, the voltage comparator can be applied to the comparison process of the micro currents, the application range of the current comparator is expanded, and the application requirements of users are further met.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic diagram of a current comparator according to the present invention;

FIG. 2 is a schematic diagram of another current comparator according to the present invention;

fig. 3 is a schematic diagram of a specific circuit structure of a current comparator according to the present invention.

Detailed Description

The core of the invention is to provide a current comparator, which breaks through the limitation of limited output impedance of a current source and a current sink at a hedging point on two input currents by utilizing the high gain of the voltage comparator, realizes the high gain of the output of the current comparator, improves the precision of the whole current comparator, can be applied to the comparison process of micro current, expands the application range of the current comparator and further meets the application requirements of users.

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a current comparator according to the present invention; in order to solve the technical problems, the invention provides a current comparator, which comprises a first input module 1, a second input module 2, a conversion module 3 and a voltage comparator 4; the input end of the first input module 1 is used as a first input end of a current comparator, a first input current is connected, the input end of the second input module 2 is used as a second input end of the current comparator, a second input current is connected, the first output end of the first input module 1 is respectively connected with the first output end of the second input module 2 and the first input end of the conversion module 3, the second output end of the first input module 1 is respectively connected with the second output end of the second input module 2 and the second input end of the conversion module 3, the first output end of the conversion module 3 is connected with the first input end of the voltage comparator 4, the second output end of the conversion module 3 is connected with the second input end of the voltage comparator 4, and the output end of the voltage comparator 4 is used as the output end of the current comparator;

the conversion module 3 is configured to convert the first difference value into a first voltage and convert the second difference value into a second voltage; the first difference value is obtained by subtracting the current output by the second input module 2 from the current output by the first input module 1, and the first voltage is linearly related to the first difference value; the second difference value is obtained by subtracting the current output by the first input module 1 from the current output by the second input module 2, and the second voltage is linearly related to the second difference value;

The voltage comparator 4 is used to compare the first voltage with the second voltage to compare the first input current with the second input current.

Specifically, assuming that the voltage at the first input end of the voltage comparator 4 is VA, the voltage at the second input end is VB, the first input current is I1, the second input current is I2, when the first input current and the second input current exist, the first input module 1 outputs the first input current, the second input module 2 outputs the second input current, the first output end of the first input module 1 is connected with the first output end of the second input module 2, the current received by the first input end of the conversion module 3 is the first input current minus the second input current, the second output end of the first input module 1 is connected with the second output end of the second input module 2, the current received by the second input end of the conversion module 3 is the second input current minus the first input current, that is, VA and (I1-I2) are in linear correlation, the VB and (I2-I1) are in linear correlation, the conversion module 3 converts the received current signal into the voltage signal through the opposite-impulse principle, and the voltage comparator 4 compares the voltages of the two opposite-impulse nodes to obtain the final output.

It will be appreciated that if the output of the voltage comparator 4 appears VA > VB, then (I1-I2) > (I2-I1), i.e. I1 > I2; if the output of the voltage comparator 4 is expressed as VA < VB, it proves that (I1-I2) < (I2-I1), i.e. I1 < I2; the voltage comparator 4 can thus perform a comparison of the first input current and the second input current by means of a comparison of VA and VB. The specific circuit configuration and implementation of the voltage comparator 4 are not particularly limited herein.

It can be understood that the two opposite-impact nodes are two input ports of the conversion module 3, and are consistent with the two output ports of the conversion module 3, and the opposite-impact principle is that the characteristics of current sources or current sinks represented by two current signals received by the conversion module 3 are generally represented by the directions of the current signals represented by the current sources as forward directions. The process of converting the current difference value into a voltage signal by the conversion module 3 can be realized by utilizing the characteristics of a current source or a current sink of the current, wherein the characteristics of the current source can enable the voltage of an output node to be increased, and the characteristics of the current sink can enable the voltage of the output node to be decreased; the application is not particularly limited, and the application can be adjusted according to different situations of input current in practical application.

In practical application, the first input module 1 and the second input module 2 amplify the first input current and the second input current to a certain extent respectively, so that the current transmission process is facilitated, and the accuracy and reliability of the comparison result are improved. The specific circuit structures and implementation manners of the first input module 1 and the second input module 2 are not particularly limited herein, the current transmission can be implemented by using a mirror module, and the current amplification can be implemented by using different coefficient selection of a current mirror.

It can be understood that the conversion module 3 is matched with the voltage comparator 4, the voltage comparator 4 is additionally arranged at the opposite-impact node in the prior art, the limitation caused by the limited output impedance of the opposite-impact node is avoided, the opposite-impact principle and the voltage comparator 4 can be combined on the basis of the prior art, the voltage comparator 4 is utilized to improve the gain of current and voltage, high precision is realized, and the accuracy and reliability of the current comparator are further improved; so that the current comparator can be used for small currents with the level of the register and can be widely used in interfaces of analog circuits and digital circuits. The specific gain effect of the voltage comparator 4 on the current comparator is related to the specific type of the voltage comparator 4, and the present application is not particularly limited herein.

The invention provides a current comparator, which comprises a first input module 1, a second input module 2, a conversion module 3 and a voltage comparator 4, wherein current signals output by the first input module 1 and the second input module 2 are respectively converted into a first voltage and a second voltage through the conversion module 3, so that the voltage comparator 4 can compare the first input current and the second input current by using a comparison process of the first voltage and the second voltage; the voltage comparator 4 utilizes the voltage signals corresponding to the output ports of the first input module 1 and the second input module 2 to detect two input currents, namely, the opposite impact node formed by the output ports of the first input module 1 and the second input module 2 when the two input currents are output, and utilizes the high gain of the voltage comparator 4 to break through the limit of the limited output impedance of the current source and the current sink at the opposite impact node to the two input currents, thereby realizing the high gain of the output of the current comparator, improving the precision of the whole current comparator, enabling the precision of the whole current comparator to be applied to the comparison process of the micro currents, expanding the application range of the current comparator and further meeting the application requirements of users.

On the basis of the above embodiment, please refer to fig. 2, fig. 2 is a schematic diagram of another current comparator provided by the present invention; referring to fig. 3, fig. 3 is a schematic diagram of a specific circuit structure of a current comparator provided by the present invention, where VDD in fig. 3 is a first power source, VSS is a second power source, and Vo is an output result of the current comparator.

As an alternative embodiment, the conversion module 3 includes a first conversion transistor Q1, a second conversion transistor Q2, a third conversion transistor Q3 and a fourth conversion transistor Q4, where a first end of the first conversion transistor Q1 is connected to a first power supply, a second end of the first conversion transistor Q1 is connected to a first output end of the first input module 1, a first output end of the second input module 2 is connected to a first input end of the first input module 1, a first end of the second conversion transistor Q2 is connected to a first output end of the first input module 1, a first output end of the second input module 2 is connected to a first input end of the voltage comparator 4, a second end of the second conversion transistor Q3 is connected to a second power supply, a first end of the third conversion transistor Q3 is connected to the first power supply, a second end of the second conversion transistor Q3 is connected to a second output end of the first input module 1, a second output end of the second input module 2 is connected to a second input end of the voltage comparator 4, a first end of the fourth conversion transistor Q4 is connected to a second output end of the first input module 1, a first end of the second conversion transistor Q4 is connected to a second output end of the second input module 2 is connected to a second input end of the voltage comparator 4, and the first conversion transistor Q4 is connected to the first output end of the second conversion transistor Q2 is in a state.

It will be appreciated that in converting the first input module 1 and the second input module 2 by using the principle of hedging, the conversion module 3 needs to use a power source or ground to form a loop, so that the conversion module 3 can form a hedging point when receiving the output currents of the first input module 1 and the second input module 2. The conversion module 3 employs the first conversion transistor Q1, the second conversion transistor Q2, the third conversion transistor Q3 and the fourth conversion transistor Q4, and the first conversion transistor Q1 and the second conversion transistor Q2 cooperatively use the output current of the first output terminal of the first input module 1 and the output current of the first output terminal of the second input module 2 to form a first opposite-impact node, that is, the first input terminal of the conversion module 3 is also the first output terminal of the conversion module 3, where the current received by the conversion module 3 is in positive linear correlation with (I1-I2); the third conversion transistor Q3 and the fourth conversion transistor Q4 cooperate to form a second opposite-impact node by using the output current of the second output terminal of the first input module 1 and the output current of the second output terminal of the second input module 2, that is, the second input terminal of the conversion module 3, that is, the second output terminal of the conversion module 3, where the current received by the conversion module 3 is in positive correlation with (I2-I1).

In order to ensure that the first, second, third and fourth switching transistors Q1, Q2, Q3 and Q4 are in the normally-on state, the first bias current is required to be connected to the control terminals of the first, second and fourth switching transistors Q1, Q2, Q3 and Q4, and the fixed bias current is required to ensure that the first, second, third and fourth switching transistors Q1, Q2, Q3 and Q4 are normally-on. The specific types and implementation of the first, second, third and fourth switching transistors Q1, Q2, Q3 and Q4 are not particularly limited herein, and may be implemented by transistor devices such as MOS transistors (Metal Oxide Semiconductor Field Effect Transistor, metal oxide semiconductor type field effect transistors) or transistors. The implementation of the first bias current is not particularly limited herein, and may be implemented by a fixed bias current source or a voltage source, or may be implemented by a fixed bias circuit.

Specifically, the function of the conversion module 3 is realized through the first conversion transistor Q1, the second conversion transistor Q2, the third conversion transistor Q3 and the fourth conversion transistor Q4, two opposite-impact nodes are formed by utilizing four conversion transistors, and the voltage at the positions of the two opposite-impact nodes is output, so that the conversion between a current signal and a voltage signal is realized, the circuit structure is simple, the realization is easy, the function of the conversion module 3 is effectively realized, meanwhile, the process of realizing the conversion module 3 by utilizing transistor devices can avoid excessive power consumption, the reliable realization of a current comparator is ensured, and the accuracy of the current comparator is further ensured.

As an alternative embodiment, the conversion module 3 further comprises a first clamp transistor MNC1, a second clamp transistor MPC1, a third clamp transistor MNC2 and a fourth clamp transistor MPC2; the first end of the first clamping transistor MNC1 is connected with the second end of the first switching transistor Q1, the second end is respectively connected with the first output end of the first input module 1, the first output end of the second input module 2 is connected with the first input end of the voltage comparator 4, the control end is respectively connected with the first power supply and the control end of the third clamping transistor MNC2, the first end of the second clamping transistor MPC1 is respectively connected with the first output end of the first input module 1, the first output end of the second input module 2 is connected with the first input end of the voltage comparator 4, the second end is connected with the first end of the second switching transistor Q2, the control end is respectively connected with the second power supply and the control end of the fourth clamping transistor MPC2, the first end of the third clamping transistor MNC2 is connected with the second end of the third switching transistor Q3, the second end is respectively connected with the second output end of the first input module 1, the second output end of the second input module 2 and the second input end of the voltage comparator 4 are respectively connected with the second clamping transistor MNC2, the second input end of the fourth clamping transistor MPC2 is in a state of the fourth clamping transistor MNC2 and the first input end of the fourth clamping transistor MNC2 is respectively.

Considering that the voltage of the opposite-impact node may have large fluctuation due to the change of current, a first clamping transistor MNC1, a second clamping transistor MPC1, a third clamping transistor MNC2 and a fourth clamping transistor MPC2 are additionally arranged at the opposite-impact node in the conversion module 3, and the four transistor devices play a clamping role, so that the voltage swing of the opposite-impact node is limited between VSS+VGSP and VDD-VGSN, the voltage comparator 4 can quickly respond to achieve a high-speed comparison role, wherein VSS is the supply voltage of the second power supply, the supply voltage of the VDD first power supply, VGSP is the voltage corresponding to the internal resistances of the first clamping transistor MNC1 and the third clamping transistor MNC2, and VGSN is the voltage corresponding to the internal resistances of the second clamping transistor MPC1 and the fourth clamping transistor MPC 2; the specific types and implementation of the first clamp transistor MNC1, the second clamp transistor MPC1, the third clamp transistor MNC2, and the fourth clamp transistor MPC2 are not particularly limited herein, and may be implemented by transistor devices such as MOS transistors.

Specifically, the first clamping transistor MNC1, the second clamping transistor MPC1, the third clamping transistor MNC2 and the fourth clamping transistor MPC2 are additionally arranged at the opposite-impact node in the conversion module, so that the voltage comparator 4 can respond quickly, the circuit structure is simple and easy to realize, the accuracy and the reliability of the conversion module 3 are ensured, the stability and the reliability of the whole circuit are further improved, the reliable realization of the current comparator is ensured, and the accuracy of the current comparator is further improved.

As an alternative embodiment, the voltage comparator 4 includes a first voltage transistor N1, a second voltage transistor N2, a first mirroring module, a second mirroring module, a third mirroring module and a current tube N3, where the control end of the first voltage transistor N1 is connected to the first output end of the first mirroring module 1, the first output end of the second mirroring module 2, the second end of the first mirroring transistor MNC1 and the first end of the second mirroring transistor MPC1, the control end of the second voltage transistor N2 is connected to the second output end of the first input module 1, the second output end of the second input module 2, the second end of the third mirroring transistor MNC2 and the first end of the fourth mirroring transistor MPC2, the first end of the first voltage transistor N1 is connected to the input end of the first mirroring module, the output end of the first mirroring module is connected to the input end of the second mirroring module, the output end of the second mirroring module serves as the output end of the voltage comparator 4, the control end of the second voltage transistor N2 is connected to the output end of the third mirroring module, the second end of the second voltage transistor N2 is connected to the first end of the second voltage transistor N3, and the first end of the second voltage transistor N2 is connected to the first end of the second voltage transistor N3.

It can be understood that the voltage comparator 4 can be implemented by using a first voltage transistor N1, a second voltage transistor N2, a first mirror module, a second mirror module, a third mirror module and a current tube N3, where the first voltage transistor N1 corresponds to a voltage VA at a first input end of the voltage comparator 4, the second voltage transistor N2 corresponds to a voltage VB at a second input end of the voltage comparator 4, the first voltage transistor N1 responds to VA, a current corresponding to VA is output through the first mirror module and the second mirror module, the second voltage transistor N2 responds to VB, a current corresponding to VB is output through the third mirror module, and finally, the current tube N3 is a tail current tube N3 of the voltage comparator 4, and a normal-on state is maintained to ensure accurate implementation of the voltage comparator 4, and the specific circuit structure of the voltage comparator 4 can have a specific implementation mode. Taking fig. 3 as an example, the first mirror module is implemented by a current mirror formed by N4 and N5, the second mirror module is implemented by a current mirror formed by N6 and N7, and the third mirror module is implemented by a current mirror formed by N8 and N9.

Specifically, the function of the voltage comparator 4 can be effectively realized through the first voltage transistor N1, the second voltage transistor N2, the first mirror module, the second mirror module, the third mirror module and the current tube N3, the current structure is simple, the implementation is easy, and the structure of the voltage comparator 4 is utilized to realize high-gain output.

As an alternative embodiment, the voltage comparator further comprises a bias circuit 5, wherein the output end of the bias circuit 5 is respectively connected with the first input module 1, the second input module 2, the conversion module 3 and the voltage comparator 4;

the bias circuit 5 is configured to output a second bias current, the second bias current being greater than the first input current, the second bias current being greater than the second input current.

Considering that the existing current comparator generally only supports input current with single polarity, that is, the input current is either all input current flowing into the current comparator or all input current flowing out of the current comparator, the function of comparing bipolar input current cannot be achieved. The bias circuit 5 is additionally arranged, the bias circuit 5 is connected with the first input module 1 and the second input module 2 respectively, and outputs a second bias current, the bias circuit 5 is introduced, so that the first input module 1 and the second input module 2 can be self-provided with direct current bias to become a current type summation input stage, and a small signal input current and a direct current output by the bias circuit 5 can be added, namely, the second bias current and the input current are respectively summed and output to the next stage. Since the bias current I0 is greater than the first input current I1 and the second input current I2, particularly greater than the input current of the small signal, the first input module 1 and the second input module 2 can process the input current in both positive and negative directions, thereby realizing bipolar current input.

It should be understood that, considering that the conversion module 3 and the voltage comparator 4 need a first bias current to ensure normal operation when in use, the bias circuit 5 is also connected with the conversion module 3 and the voltage comparator 4 respectively, and directly uses the second bias current output by the bias circuit 5 as the first bias current, thereby further reducing the complexity of the circuit structure and simplifying the circuit structure. The specific circuit configuration and implementation of the bias circuit 5 are not particularly limited, and the present application may be set according to actual application.

Considering that the traditional current comparator has limitation when the current is very small and is close to 0, and can only compare with the input current with single polarity, the input stage of the current comparator is provided with the bias current by adding the bias circuit 5, so that bipolar current input can be supported; when the input current has bipolar property, the current comparator can output two states of high and low level according to the magnitude of the input current. The circuit structure is simplified, and the application range of the current comparator is further expanded.

As an alternative embodiment, the bias circuit 5 includes a current source IS, a first current transistor P1, a second current transistor P2, a third current transistor P3 and a fourth current transistor P4, the first terminal of the first current transistor P1 IS connected to a first power source, the second terminal IS a first output terminal of the bias circuit 5 and IS connected to a first terminal of the second current transistor P2, the control terminal of the first current transistor P1 and the control terminal of the third current transistor P3 are connected to a second power source, the second terminal of the second current transistor P2 IS connected to a second power source, the control terminal IS a second output terminal of the bias circuit 5 and IS connected to a control terminal of the fourth current transistor P4, the second terminal of the fourth current transistor P4 and the first terminal of the current source IS connected to a second power source, the first terminal of the third current transistor P3 IS connected to the first power source, and the second terminal IS connected to the first terminal of the fourth current transistor P4.

It will be appreciated that the bias circuit 5 may be implemented by a circuit structure formed by the current source IS, the first current transistor P1, the second current transistor P2, the third current transistor P3 and the fourth current transistor P4, where the first current transistor P1 and the third current transistor P3 form a set of current mirrors, the second current transistor P2 and the fourth current transistor P4 form a set of current mirrors, and the first power source, the second power source and the current source IS form a second bias current with stable output, and the second bias current IS transmitted through the two sets of current mirrors. As for the current source IS, the specific types and implementation manners of the first current transistor P1, the second current transistor P2, the third current transistor P3 and the fourth current transistor P4 are not particularly limited herein, and the first current transistor P1, the second current transistor P2, the third current transistor P3 and the fourth current transistor P4 may be implemented by transistor devices such as MOS transistors.

Specifically, the bias circuit 5 may include a current source IS, a first current transistor P1, a second current transistor P2, a third current transistor P3 and a fourth current transistor P4, and the structure of the current source IS and the current mirror IS used to realize the output of a fixed bias current, so that the function of the bias circuit 5 IS effectively realized, the circuit structure IS simple and easy to realize, and the output of the fixed bias current ensures the accurate realization of each module in the current comparator.

As an alternative embodiment, the first input module 1 includes a first input circuit 21 and a first pre-amplifying circuit 23, where a first input terminal of the first input circuit 21 is used as a first input terminal of the current comparator, a first input current is connected to the first input terminal, a second input terminal is connected to a first output terminal of the bias circuit 5, a third input terminal is connected to a second output terminal of the bias circuit 5, an output terminal is connected to an input terminal of the first pre-amplifying circuit 23, a first output terminal of the first pre-amplifying circuit 23 is connected to a first output terminal of the second input module 2 and a first input terminal of the converting module 3, respectively, and a second output terminal of the first pre-amplifying circuit 23 is connected to a second output terminal of the second input module 2 and a second input terminal of the converting module 3, respectively.

It can be understood that the first input module 1 generally includes a first input circuit 21 and a first pre-amplifying circuit 23, where the first input circuit 21 is mainly configured to receive a first input current and a fixed second bias current, and output the sum of the first input current and the second bias current to the first pre-amplifying circuit 23, and the first pre-amplifying circuit 23 mainly amplifies a transmitted current signal, so as to further improve a current transmission effect, and facilitate accurate implementation of a subsequent current comparison process. Similarly, the second input module 2 generally includes a second input circuit 22 and a second pre-amplifying circuit 24, and functions, connection manners, circuit structures, implementation manners and the like of the second input circuit 22 and the second pre-amplifying circuit 24 correspond to the first input circuit 21 and the first pre-amplifying circuit 23, respectively, and are not described in detail herein. The specific circuit configuration and implementation of the first input circuit 21 and the first pre-amplification circuit 23 are not particularly limited herein.

Specifically, the first input module 1 includes a first input circuit 21 and a first pre-amplifying circuit 23, the first input circuit 21 performs the function of adding the input current and the bias current, the first pre-amplifying circuit 23 performs the function of transmitting and amplifying the current, and correspondingly, the second input module 2 includes a second input circuit 22 and a second pre-amplifying circuit 24, the function of the first input module 1 is effectively implemented by using the first input circuit 21 and the first pre-amplifying circuit 23, the internal structure of the current comparator is further clarified, and the accurate implementation of the current comparator is ensured.

As an alternative embodiment, the first input circuit 21 includes a first input transistor S1, a second input transistor S2, a third input transistor S3, a fourth input transistor S4, a fifth input transistor S5 and a sixth input transistor S6, the first end of the first input transistor S1 is connected to the first power supply, the second end is connected to the first end of the second input transistor S2, the control end of the first input transistor S1 is connected to the control end of the third current transistor P3, the control end of the second input transistor S2 is connected to the control end of the fourth current transistor P4, the second end of the second input transistor S2 serves as the first input end of the current comparator, and is connected to the control end of the third input transistor S3, the first end of the sixth input transistor S6 and the control end of the sixth input transistor S6, the first end of the third input transistor S3 is connected to the first power supply, the second end is connected to the first end of the fourth input transistor S4, the control end of the fourth input transistor S4 and the fifth input transistor S5 are connected to the control end of the fifth input transistor S5, and the fifth input transistor S6 are connected to the control end of the fifth input transistor S4.

It will be appreciated that the control terminals of the first input transistor S1 and the second input transistor S2 are connected to the control terminals of the current transistors in the bias circuit 5, the first input transistor S1 and the third current transistor P3 form a current mirror structure, the second bias current can be mirrored into the first input circuit 21, the second input transistor S2 and the fourth current transistor P4 form a current mirror structure, the second bias current can be mirrored into the first input circuit 21, and the third input transistor S3 and the sixth input transistor S6, the fourth input transistor S4 and the fifth input transistor S5 form a set of current mirrors, respectively, the second bias current can be mirrored into the first input circuit 21, the first terminal of the sixth input transistor S6 and the second terminal of the second input transistor S2 are connected to the first input current, thus forming a signal of the addition of the first bias current and the second bias current at the first terminal of the sixth input transistor S6 and the second terminal of the second input transistor S2. The specific types and implementation of the first input transistor S1, the second input transistor S2, the third input transistor S3, the fourth input transistor S4, the fifth input transistor S5, and the sixth input transistor S6 are not particularly limited herein, and may be implemented by transistor devices such as MOS transistors or triode transistors. Correspondingly, the circuit structure of the second input circuit 22 may be implemented with reference to this circuit structure, and the embodiment is not described herein again, taking fig. 3 as an example, and S6, S7, S8, S9, S10 and S11 form the second input circuit 22.

In practical application, the input stage can adopt a current mirror of a bipolar tube to reduce the influence of noise and offset in consideration of the fact that the duty ratio of the noise and offset of the input stage in the whole current comparator is maximum. The input stage adopts a bipolar current mirror, and bandwidth is limited by adding a set capacitor, so that the influence of noise and offset is reduced.

Specifically, the first input circuit 21 includes a first input transistor S1, a second input transistor S2, a third input transistor S3, a fourth input transistor S4, a fifth input transistor S5 and a sixth input transistor S6, and realizes current transmission through a current mirror structure formed, and finally realizes outputting a current signal that adds the first input current and the second bias current.

As an alternative embodiment, the first pre-amplifying circuit 23 includes a first amplifying transistor K1, a second amplifying transistor K2, a third amplifying transistor K5, a fourth mirroring module and a fifth mirroring module, the control terminal of the first amplifying transistor K1 is connected to the control terminal of the fifth input transistor S5, the control terminal of the second amplifying transistor K2 is connected to the control terminal of the sixth input transistor S6, the first terminal of the first amplifying transistor K1 is connected to the second power supply, the second terminal is connected to the first terminal of the second amplifying transistor K2, the second terminal of the second amplifying transistor K2 is connected to the input terminal of the fourth mirroring module and the control terminal of the third amplifying transistor K5, the first terminal of the third amplifying transistor K5 is connected to the first power supply, the second terminal is used as the first output terminal of the first pre-amplifying circuit 23, the output terminal of the fourth mirroring module is connected to the input terminal of the fifth mirroring module, and the output terminal of the fifth mirroring module is used as the second output terminal of the first pre-amplifying circuit 23.

It can be understood that the first amplifying transistor K1 and the second amplifying transistor K2 cooperate with the third input transistor S3, the fourth input transistor S4, the fifth input transistor S5 and the sixth input transistor S6 in the first input circuit 21 to form two sets of current mirror structures, so that the current signals added by the first input current and the second bias current are transmitted to the first pre-amplifying circuit 23, a certain coefficient can be set to amplify the current signals at the same time, then the fourth mirror module is further utilized to amplify the current signals, the fourth mirror module cooperates with the third amplifying transistor K5 to output amplified current signals as output signals of the first input end of the first input module 1, the fourth mirror module cooperates with the fifth mirror module to output amplified current signals as output signals of the second input end of the first input module 1, the output signals of the two output ends of the first input module 1 are consistent, the current signals added by the first input current and the second bias current are in a positive linear relation, the two output signals are respectively connected with the two output ends of the conversion module 3 and the second input module and the first input module and the second input module are connected to form a difference value by the second input module, and the second input module is connected with the second input module and the second input module is connected to the first input module and the second input module is different. The specific types and implementation manners of the first amplifying transistor K1, the second amplifying transistor K2, the third amplifying transistor K5, the fourth mirroring module and the fifth mirroring module are not particularly limited herein, and the first amplifying transistor K1, the second amplifying transistor K2 and the third amplifying transistor K5 may be implemented by transistor devices such as MOS transistors or triodes; the fourth mirror module and the fifth mirror module can be directly realized by using a current mirror, and can also adopt other types of mirror transmission modules. Taking fig. 3 as an example, the fourth mirroring module is implemented by a current mirror formed by K3 and K4, and the fifth mirroring module is implemented by a current mirror formed by K6 and K7.

Correspondingly, the circuit structure of the second pre-amplifying circuit 24 may be implemented with reference to such circuit structure, and the embodiment will not be described herein again, taking fig. 3 as an example, where K8, K9, K10, K11, K12, K13 and K14 constitute the second pre-amplifying circuit 24.

Specifically, the first pre-amplifying circuit 23 includes a first amplifying transistor K1, a second amplifying transistor K2, a third amplifying transistor K5, a fourth mirror module and a fifth mirror module, and realizes current transmission through a current mirror structure and a mirror module formed, and finally, outputs two current output signals which are linearly related to positive and are added with the first input current and the second bias current, and the first pre-amplifying circuit 23, the second pre-amplifying circuit 24 and the conversion module 3 cooperate to realize two opposite-impact nodes.

As an alternative embodiment, the bias circuit 5 further includes a fifth current transistor P5, a sixth current transistor P6, a seventh current transistor P7 and a sixth mirror module, the control terminal of the fifth current transistor P5 is connected to the control terminal of the third current transistor P3, the control terminal of the sixth current transistor P6 is connected to the control terminal of the fourth current transistor P4, the first terminal of the fifth current transistor P5 is connected to the first power supply, the second terminal is connected to the first terminal of the sixth current transistor P6, the second terminal of the sixth current transistor P6 is connected to the input terminal of the sixth mirror module, the control terminal of the second conversion transistor Q2 and the control terminal of the fourth conversion transistor Q4, the output terminal of the sixth mirror module is connected to the first terminal of the seventh current transistor P7, the control terminal of the first conversion transistor Q1 and the control terminal of the third conversion transistor Q3, and the second terminal of the seventh current transistor P7 are connected to the first power supply.

Considering that the bias circuit 5 also needs to provide a fixed bias current for the conversion module 3 and the voltage comparator 4, the bias circuit 5 further comprises a fifth current transistor P5, a sixth current transistor P6, a seventh current transistor P7 and a sixth mirror module, the fifth current transistor P5 cooperates with the third current transistor P3 to transmit the second bias current, the sixth current transistor P6 cooperates with the fourth current transistor P4 to transmit the second bias current, and then the sixth mirror module and the seventh current transistor P7 are utilized to transmit the second bias current to the control terminals of the first conversion transistor Q1, the second conversion transistor Q2, the third conversion transistor Q3, the fourth conversion transistor Q4 and the current tube N3, respectively, so as to ensure accurate implementation of the conversion module 3 and the voltage comparator 4. The specific types and implementation manners of the fifth current transistor P5, the sixth current transistor P6, the seventh current transistor P7, and the sixth mirror module are not particularly limited herein, and the fifth current transistor P5, the sixth current transistor P6, and the seventh current transistor P7 may be implemented by transistor devices such as MOS transistors or triodes; the sixth mirror module may be implemented directly using a current mirror, or may be implemented using other types of mirror transfer modules. Taking fig. 3 as an example, the sixth mirror module is implemented by two sets of current mirrors consisting of P8 and P10, and P9 and P11.

Specifically, the bias circuit 5 further includes a fifth current transistor P5, a sixth current transistor P6, a seventh current transistor P7 and a sixth mirror module, and the fifth current transistor P5, the sixth current transistor P6, the seventh current transistor P7 and the sixth mirror module are utilized to output the second bias current to the first conversion transistor Q1, the second conversion transistor Q2, the third conversion transistor Q3, the fourth conversion transistor Q4 and the control end of the current tube N3, so as to ensure the normal working process of the conversion module 3 and the voltage comparator 4.

As a specific example, the high precision current comparator shown in fig. 3 supports bipolar input currents and can compare current at the level of cashier. Meanwhile, by adopting the input stage of the bipolar tube, the equivalent input noise and offset of the current comparator are reduced, and the precision is improved. Therefore, the current comparator can support bipolar input current, noise is effectively reduced by adopting an input stage current mirror of a bipolar tube and a bandwidth limiting method, and micro current of a cashier level can be compared by adopting high gains of a pre-amplification stage and a decision stage circuit, so that high precision is achieved.

As shown in fig. 3, the high-precision current comparator according to the present invention includes a Bias stage (Bias), an input stage (input stage) supporting bipolar current, a current pre-amplification stage (pre amplifier stage), and a decision stage (decision stage). The bias stage is a bias circuit 5, the input stage circuit is a first input circuit 21 and a second input circuit 22, the decision circuit is a conversion module 3 and a voltage comparator 4, and the input stage circuit is connected with the bias circuit 5 and has direct current bias, so that positive and negative bidirectional input current can be supported. The first input circuit 21 and the second input circuit 22 can minimize noise current and offset current by using a current mirror of a bipolarr tube, and the first input circuit 21 and the second input circuit 22 add signal current and direct current bias current and output the added signal current and direct current bias current to a corresponding pre-amplification stage circuit. The pre-amplification stage circuit amplifies the input differential current by k1 times k2 times and outputs the amplified differential current to the decision circuit. The conversion module 3 and the voltage comparator 4 also have direct current bias, and after receiving the input differential signal current, the conversion module 3 converts the current into voltage by means of the opposite punching node, and then the final comparison output is obtained through the voltage comparator 4.

The two paths of input currents are summed with the second bias current I0 in the first input circuit 21 and the second input circuit 22 respectively, k1 (I0+I1) and k1 (I0+I2) are obtained by amplifying k1 times through a bipolar current mirror respectively, and k1k2 (I0+I1) and k1k2 (I0+I2) are obtained by amplifying k2 times through a MOS tube current mirror respectively. The current output by the first pre-amplifying circuit 23 is represented as a current source, the current output by the second pre-amplifying circuit 24 is represented as a current sink, the output of the current source k1k2 (i0+i1) is connected with the output of the current sink k1k2 (i0+i2), the amplified small signal current k1k2 (I1-I2) can be obtained, and the output of the current source k1k2 (i0+i2) is connected with the output of the current sink k1k2 (i0+i1), and the amplified small signal current k1k2 (I2-I1) can be obtained. The two currents are output currents of the pre-amplifying stage, that is, input currents of the conversion module 3, and are sent to the voltage comparator 4 for comparison through the conversion module 3, where va=k1k2 (I1-I2) ro, and vb=k1k2 (I2-I1) ro.

Thus the final overall current to voltage gain isThe method comprises the steps of carrying out a first treatment on the surface of the Where ro is the impedance at the hedging nodes VA and VB, which is also a fixed value when the circuit structure is fixed, G is the gain of the voltage comparator 4, k1 and k2 are the amplification factors corresponding to the mirror ratio of the current mirror, V represents the final output voltage, and I represents the current difference of the two input currents. For example, when k1=8, k2=4, ro=1m, g=1k, the current-to-voltage gain can be 64G times, so the current comparator using the voltage comparator 4 can be completely smaller than the current of the nanoampere level.

It will be appreciated that C1 and C2 are provided in the first input circuit 21 and the second input circuit 22 as bandwidth limiting capacitances, respectively, which can be adjusted according to the frequency of the input signal, minimizing the effect of noise. Resistors R1 and R2 are also arranged as load resistors to further protect the circuit. Meanwhile, a compensation capacitor C3 is arranged in the bias circuit 5 to play a role in compensating the circuit.

In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.

It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. The current comparator is characterized by comprising a first input module, a second input module, a conversion module and a voltage comparator; the input end of the first input module is used as a first input end of the current comparator, a first input current is connected to the first input end, the input end of the second input module is used as a second input end of the current comparator, a second input current is connected to the first output end of the first input module, the first output end of the first input module is respectively connected with the first output end of the second input module and the first input end of the conversion module, the second output end of the first input module is respectively connected with the second output end of the second input module and the second input end of the conversion module, the first output end of the conversion module is connected with the first input end of the voltage comparator, the second output end of the conversion module is connected with the second input end of the voltage comparator, and the output end of the voltage comparator is used as the output end of the current comparator;

the voltage comparator is configured to compare the first voltage and the second voltage to compare the first input current and the second input current;

the switching module comprises a first switching transistor, a second switching transistor, a third switching transistor and a fourth switching transistor, wherein a first end of the first switching transistor is connected with a first power supply, a second end of the first switching transistor is respectively connected with a first output end of the first input module, a first output end of the second input module and a first input end of the voltage comparator, a first end of the second switching transistor is respectively connected with the first output end of the first input module, a first output end of the second input module is connected with a first input end of the voltage comparator, a second end of the second switching transistor is connected with a second power supply, a first end of the third switching transistor is connected with the first power supply, a second end of the third switching transistor is respectively connected with a second output end of the first input module, a second output end of the second input module and a second input end of the voltage comparator are respectively connected with a second output end of the first input module, a first end of the fourth switching transistor is respectively connected with a second output end of the first input module, a second output end of the second switching transistor is connected with a second switching transistor, a second output end of the second switching transistor is connected with a first switching transistor, a second switching transistor is in a state, and the first switching transistor is connected with a third switching transistor.

2. The current comparator of claim 1, wherein the conversion module further comprises a first clamp transistor, a second clamp transistor, a third clamp transistor, and a fourth clamp transistor; the first end of the first clamping transistor is connected with the second end of the first conversion transistor, the second end of the first clamping transistor is connected with the first output end of the first input module, the first output end of the second input module is connected with the first input end of the third conversion transistor, the control end of the second clamping transistor is connected with the first output end of the first input module, the first output end of the second input module is connected with the first input end of the voltage comparator, the second end of the second input module is connected with the first end of the second conversion transistor, the control end of the second clamping transistor is connected with the second end of the third conversion transistor, the second end of the third clamping transistor is connected with the second end of the first input module, the second end of the second input module is connected with the first output end of the first input module, the second output end of the second input module is connected with the second input end of the fourth conversion transistor, the second clamping transistor is connected with the second input end of the second conversion transistor, and the second input end of the fourth conversion transistor is in a state.

3. The current comparator of claim 2, wherein the voltage comparator comprises a first voltage transistor, a second voltage transistor, a first mirror module, a second mirror module, a third mirror module and a current tube, wherein the control terminal of the first voltage transistor is connected to the first output terminal of the first mirror module, the first output terminal of the second mirror module, the second terminal of the first clamp transistor and the first terminal of the second clamp transistor, the control terminal of the second voltage transistor is connected to the second output terminal of the first input module, the second output terminal of the second input module, the second terminal of the third clamp transistor and the first terminal of the fourth clamp transistor, the first terminal of the first voltage transistor is connected to the input terminal of the first mirror module, the output terminal of the first mirror module is connected to the input terminal of the second mirror module, the output terminal of the second mirror module is used as the output terminal of the voltage comparator, the second output terminal of the second voltage comparator is connected to the first terminal of the second mirror module, the second output terminal of the third mirror transistor is connected to the first terminal of the second mirror transistor, the first terminal of the second mirror transistor is connected to the second terminal of the second current tube, and the first terminal of the second mirror transistor is connected to the first terminal of the second current tube.

4. A current comparator according to any one of claims 1 to 3, further comprising a bias circuit, the output of the bias circuit being connected to the first input module, the second input module, the conversion module and the voltage comparator, respectively;

5. The current comparator of claim 4, wherein the bias circuit comprises a current source, a first current transistor, a second current transistor, a third current transistor and a fourth current transistor, a first terminal of the first current transistor being connected to the first power supply, a second terminal being a first output terminal of the bias circuit and being connected to a first terminal of the second current transistor, respectively, a control terminal of the first current transistor being connected to the second power supply, a control terminal of the second current transistor being a second output terminal of the bias circuit and being connected to a control terminal of the fourth current transistor, respectively, a second terminal of the fourth current transistor being connected to the second power supply, a first terminal of the third current transistor being connected to the first power supply, and a second terminal of the current source being connected to a first terminal of the fourth current transistor.

6. The current comparator of claim 5, wherein the first input module comprises a first input circuit and a first pre-amplification circuit, the first input terminal of the first input circuit is used as the first input terminal of the current comparator, the first input terminal is connected with the first output terminal of the bias circuit, the third input terminal is connected with the second output terminal of the bias circuit, the output terminal is connected with the input terminal of the first pre-amplification circuit, the first output terminal of the first pre-amplification circuit is respectively connected with the first output terminal of the second input module and the first input terminal of the conversion module, and the second output terminal of the first pre-amplification circuit is respectively connected with the second output terminal of the second input module and the second input terminal of the conversion module.

7. The current comparator of claim 6, wherein the first input circuit comprises a first input transistor, a second input transistor, a third input transistor, a fourth input transistor, a fifth input transistor and a sixth input transistor, a first terminal of the first input transistor is connected to the first power supply, a second terminal is connected to a first terminal of the second input transistor, a control terminal of the first input transistor is connected to a control terminal of the third current transistor, a control terminal of the second input transistor is connected to a control terminal of the fourth current transistor, a second terminal of the second input transistor serves as a first input terminal of the current comparator and is connected to a control terminal of the third input transistor, a first terminal of the sixth input transistor is connected to the first power supply, a second terminal is connected to a control terminal of the fourth input transistor, a fourth terminal is connected to a control terminal of the fourth input transistor, a fifth terminal is connected to a control terminal of the fifth input transistor, and a fifth input transistor is connected to a control terminal of the fifth input transistor.

8. The current comparator of claim 7, wherein the first pre-amplification circuit comprises a first amplification transistor, a second amplification transistor, a third amplification transistor, a fourth mirror module and a fifth mirror module, the control terminal of the first amplification transistor is connected to the control terminal of the fifth input transistor, the control terminal of the second amplification transistor is connected to the control terminal of the sixth input transistor, the first terminal of the first amplification transistor is connected to the second power supply, the second terminal is connected to the first terminal of the second amplification transistor, the second terminal of the second amplification transistor is connected to the input terminal of the fourth mirror module and the control terminal of the third amplification transistor, respectively, the first terminal of the third amplification transistor is connected to the first power supply, the second terminal is the first output terminal of the first pre-amplification circuit, the output terminal of the fourth mirror module is connected to the second power supply, and the second terminal of the fifth mirror module is the second output terminal of the fifth pre-amplification circuit.

9. The current comparator of claim 5, wherein the bias circuit further comprises a fifth current transistor, a sixth current transistor, a seventh current transistor and a sixth mirror module, the control terminal of the fifth current transistor being connected to the control terminal of the third current transistor, the control terminal of the sixth current transistor being connected to the control terminal of the fourth current transistor, the first terminal of the fifth current transistor being connected to the first power supply, the second terminal being connected to the first terminal of the sixth current transistor, the second terminal of the sixth current transistor being connected to the input terminal of the sixth mirror module, the control terminal of the second switching transistor and the control terminal of the fourth switching transistor, the output terminal of the sixth mirror module being connected to the first terminal of the seventh current transistor, the control terminal of the seventh current transistor being connected to the control terminal of the first switching transistor and the control terminal of the seventh switching transistor, the second terminal of the seventh switching transistor being connected to the first power supply.