CN116487253A - Self-aligned double imaging method - Google Patents

Self-aligned double imaging method Download PDF

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Publication number
CN116487253A
CN116487253A CN202310473241.7A CN202310473241A CN116487253A CN 116487253 A CN116487253 A CN 116487253A CN 202310473241 A CN202310473241 A CN 202310473241A CN 116487253 A CN116487253 A CN 116487253A
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China
Prior art keywords
photoresist
layer
substrate
patterned photoresist
etching
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CN202310473241.7A
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Chinese (zh)
Inventor
官锡俊
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Priority to CN202310473241.7A priority Critical patent/CN116487253A/en
Publication of CN116487253A publication Critical patent/CN116487253A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/30Imagewise removal using liquid means
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/40Treatment after imagewise removal, e.g. baking

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

The present application provides a method of self-aligned dual imaging comprising: step S1, providing a substrate, coating photoresist on the substrate, exposing and developing to form patterned photoresist; step S2, coating a shrinkage material on the substrate to completely cover the patterned photoresist; s3, forming a bonding layer in the junction area of the shrinkage material and the patterned photoresist by baking; step S4, etching back the shrinkage material and the cementing layer until the top of the patterned photoresist is exposed; step S5, removing the shrinkage material and the patterned photoresist outside the area where the bonding layer is located through development; and S6, transferring the pattern defined by the glued layer onto the substrate by etching. The self-aligned pattern frequency multiplication can be realized through the photoetching process and one-time back etching, the complexity of the process can be reduced, the production cost can be effectively reduced, and the production efficiency is improved.

Description

Self-aligned double imaging method
Technical Field
The application relates to the technical field of semiconductors, in particular to a self-aligned double imaging method.
Background
Conventional photolithographic multiple exposure uses multiple independent exposures, each of which produces a portion of the pattern that is ultimately transferred together by etching to the substrate, enabling superposition of the spatial pattern.
Self-aligned dual imaging (SADP) is a more advanced multiple patterning technique, and is typically: after one lithography is completed, non-lithographic process steps (film deposition, etching, etc.) are used successively to achieve spatial frequency doubling of the lithographic pattern. The SADP technology is mainly difficult to integrate photoetching, etching, film deposition and other technologies, and has complex manufacturing process and high production cost.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present application is to provide a self-aligned dual imaging method for solving the problems of complex process and high production cost of the prior art.
To achieve the above and other related objects, the present application provides a method of self-aligned dual imaging, comprising:
step S1, providing a substrate, coating photoresist on the substrate, exposing and developing to form patterned photoresist;
step S2, coating a shrinkage material on the substrate to completely cover the patterned photoresist;
s3, forming a bonding layer in the junction area of the shrinkage material and the patterned photoresist by baking;
step S4, etching back the shrinkage material and the cementing layer until the top of the patterned photoresist is exposed;
step S5, removing the shrinkage material and the patterned photoresist outside the area where the bonding layer is located through development;
and S6, transferring the pattern defined by the glued layer onto the substrate by etching.
Preferably, the photoresist is a positive photoresist or a negative photoresist.
Preferably, the patterned photoresist has a thickness of 50nm to 300nm.
Preferably, when the photoresist coated in step S1 is a positive photoresist, the shrink material is a non-polar polymer; when the photoresist coated in step S1 is a negative photoresist, the shrink material is a polar polymer.
Preferably, the thickness of the shrink material is 50nm to 500nm.
Preferably, when the photoresist coated in the step S1 is a positive photoresist, the adhesive layer formed in the step S3 is a polar adhesive layer; when the photoresist coated in step S1 is a negative photoresist, the adhesive layer formed in step S3 is a nonpolar adhesive layer.
Preferably, the baking is carried out at a temperature of 80 to 200 ℃.
Preferably, the line width of the glue layer becomes larger as the temperature increases.
Preferably, the equipment for carrying out the baking is a hot plate.
Preferably, the back etching in step S4 has the same etching rate for the shrink material, the glue layer and the photoresist.
Preferably, the total thickness of the shrink material and glue layer on top of the patterned photoresist removed by back etching is 50nm to 500nm.
Preferably, when the polar glue layer is formed in step S3, the developing solution used for the development in step S5 is a negative developing solution; when the nonpolar adhesive layer is formed in step S3, the developing solution used for the development in step S5 is TMAH developing solution.
As described above, the self-aligned dual imaging method provided by the present application has the following beneficial effects: the self-aligned pattern frequency multiplication can be realized through the photoetching process and one-time back etching, the complexity of the process can be reduced, the production cost can be effectively reduced, and the production efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram showing a cross-sectional structure of a device formed after each step is completed in a conventional self-aligned dual imaging technique; the method comprises the steps of carrying out a first treatment on the surface of the
FIG. 2 is a schematic diagram showing a cross-sectional structure of a device formed after each step in the self-aligned dual imaging method according to the embodiment of the present application;
FIG. 3 shows a flow chart of a method of self-aligned dual imaging provided by an embodiment of the present application;
fig. 4 is a data analysis chart showing the line width of the glue layer formed in the area where the shrink material and the patterned photoresist interface by the self-aligned dual imaging method according to the embodiment of the present application.
Detailed Description
Other advantages and effects of the present application will become apparent to those skilled in the art from the present disclosure, when the following description of the embodiments is given by way of specific examples. The present application may be carried out or applied in other and different embodiments, and the details in the present description may be modified or changed from various viewpoints and applications, without departing from the spirit of the present invention.
The following description of the embodiments of the present application will be made apparent and complete in conjunction with the accompanying drawings, in which embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
In the description of the present application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," and the like indicate orientations or positional relationships, which are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the devices or elements being referred to must have a particular orientation, be configured and operated in a particular orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, or can be communicated inside the two components, or can be connected wirelessly or in a wired way. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.
In addition, the technical features described below in the different embodiments of the present application may be combined with each other as long as they do not collide with each other.
Referring to fig. 1, a schematic cross-sectional structure of a device formed after each step in the conventional self-aligned dual imaging technology is shown.
First, a hard mask layer, a sacrificial material layer (sactifice layer), a bottom anti-reflective coating (BARC), and a photoresist are sequentially formed on a substrate.
Then, the patterned photoresist is formed by exposure and development of a photolithography process.
And then, sequentially etching the bottom anti-reflection coating and the sacrificial material layer by taking the patterned photoresist as a mask until the hard mask layer is exposed, transferring the pattern to the sacrificial material layer, and removing the patterned photoresist and the bottom anti-reflection coating after etching.
Next, a thin film is deposited covering the hard mask layer and the hard mask layer.
Then, a film is etched Back (Etch Back), and a sidewall made of the film is formed on the sidewall of the sacrificial material layer.
Next, the sacrificial material layer is removed by etching.
And finally, taking the side wall formed by the film as a mask, etching the hard mask layer until the substrate is exposed, and removing the side wall formed by the film after etching is finished.
In the existing self-aligned double imaging technology, after one lithography is completed, non-lithography process steps (film deposition, etching and the like) are sequentially used for realizing space frequency multiplication of the lithography pattern, and finally, redundant patterns are removed. The difficulty is mainly to integrate the processes of photoetching, etching, film deposition and the like, and the process is complex and the production cost is high.
To address this problem, the present application provides a method of self-aligned dual imaging.
Referring to fig. 2, a schematic cross-sectional structure of a device formed after each step in the self-aligned dual imaging method according to the embodiment of the present application is shown.
First, a hard mask layer, a sacrificial material layer (sactifice layer), a bottom anti-reflective coating (BARC), and a photoresist are sequentially formed on a substrate.
Then, the patterned photoresist is formed by exposure and development of a photolithography process.
Next, a shrink material is applied covering the patterned photoresist and the exposed bottom antireflective coating.
Next, a glue layer is formed at the area where the shrink material interfaces with the photoresist by baking.
Next, the shrink material and glue layer are etched Back (Etch Back) until the photoresist is exposed.
Next, the shrink material and photoresist outside the area where the glue layer is located are removed by development.
And finally, sequentially etching the bottom anti-reflection coating, the sacrificial material layer and the hard mask layer by taking the bonding layer as a mask until the substrate is exposed, and removing the bonding layer, the bottom anti-reflection coating and the sacrificial material layer after etching.
As shown in fig. 2, the self-aligned double imaging method provided by the application can realize self-aligned pattern frequency multiplication through a photolithography process and one-time back etching, so that the complexity of the process can be reduced, the production cost can be effectively reduced, and the production efficiency can be improved. Therefore, the method effectively overcomes various defects in the prior art and has high industrial utilization value.
Referring to fig. 3, a flowchart of a method for self-aligned dual imaging according to an embodiment of the present application is shown.
As shown in fig. 3, the self-aligned dual imaging method includes the steps of:
step S1, providing a substrate, coating photoresist on the substrate, exposing and developing to form patterned photoresist;
step S2, coating a shrinkage material on the substrate to completely cover the patterned photoresist;
s3, forming a bonding layer in the junction area of the shrinkage material and the patterned photoresist by baking;
step S4, etching back the shrinkage material and the cementing layer until the top of the patterned photoresist is exposed;
step S5, removing the shrinkage material and the patterned photoresist outside the area where the bonding layer is located through development;
and S6, transferring the pattern defined by the glued layer onto the substrate by etching.
In step S1, the substrate may be a semiconductor substrate, for example, may be silicon (Si), germanium (Ge), siGe substrate, silicon-on-insulator (Silicon On Insulator, SOI), germanium-on-insulator (Germanium On Insulator, GOI), or the like. In other embodiments, the semiconductor substrate may also be a substrate including other element semiconductors or compound semiconductors, and may also be a stacked structure, such as Si/SiGe, or the like. Those skilled in the art may select the constituent materials of the substrate according to the type of device structure formed on the substrate, and thus the type of substrate should not limit the scope of the present invention.
A film layer to be patterned is formed on a substrate, and after the film layer is formed, a hard mask layer, a sacrificial material layer, and a bottom anti-reflective coating layer are sequentially formed on the substrate, as an example, before a photoresist is coated.
The photoresist coated on the substrate may be either positive or negative photoresist. The coating is performed using a spin coating process.
For positive photoresists, the exposure is preceded by a polymer that is not hydrophilic, can be dissolved in an organic solvent (e.g., a negative developer (NTD developer)), and cannot be dissolved in an alkaline solution (e.g., a tetramethylammonium hydroxide (TMAH) developer); after exposure, the photochemical reaction is excited to generate acid, and the polarity of the polymer is changed after baking to become hydrophilic polymer which is no longer dissolved in organic solvent but can be dissolved in alkaline solution.
For negative photoresists, which are acidic polymers, the deprotection reaction is initiated after baking to dissolve in an alkaline solution (e.g., TMAH developer), the photobase generator is initiated after exposure, and is insoluble in an alkaline solution after baking and soluble in an organic solvent (e.g., negative developer (NTD developer)).
Illustratively, the patterned photoresist has a thickness of 50nm to 300nm, for example 100nm.
In step S2, the coating is performed using a spin coating process. Illustratively, the thickness of the coated shrink material is 50nm to 500nm, for example 200nm.
When the photoresist coated in step S1 is a positive photoresist, the shrink material may be a non-polar polymer; when the photoresist coated in step S1 is a negative photoresist, the shrink material may be a polar polymer.
In step S3, the shrink material is crosslinked (X-linked) or mixed (intermitted) with the patterned photoresist by baking to a specific temperature, and a glue layer is formed at the interface area of the shrink material and the photoresist.
The equipment for carrying out the baking may be a hot plate. Illustratively, the baking is carried out at a temperature of 80 ℃ to 200 ℃, for example 120 ℃. As shown in fig. 4, the line width of the glue layer formed at the region where the shrink material and the patterned photoresist interface becomes larger as the temperature increases.
When the photoresist coated in step S1 is a positive photoresist, the shrinkage material coated in step S2 is baked to form a polar glue layer after contacting the positive photoresist, and is insoluble in an organic solvent (e.g., negative developer (NTD developer)).
When the photoresist coated in step S1 is a negative photoresist, the shrinkage material coated in step S2 is baked to form a non-polar adhesive layer after contacting the negative photoresist, and is insoluble in an alkaline solution (e.g., TMAH developer).
In step S4, the back etching has the same etching rate for the shrink material, the glue layer and the photoresist.
Illustratively, the total thickness of the shrink material and glue layer on top of the patterned photoresist removed by back etching is 50nm to 500nm, e.g. 220nm.
In step S5, the developing solution used for the development is a negative developing solution or a TMAH developing solution.
When the polar glue layer is formed in the step S3, the developing solution adopted in the development is negative developing solution; when the nonpolar adhesive layer is formed in the step S3, the developing solution used for developing is TMAH developing solution.
In step S6, the pattern defined by the glue layer is transferred to the film layer to be patterned on the substrate by etching, which is dry etching.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concepts of the present application by way of illustration, and only the components related to the present invention are shown in the drawings rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
The foregoing embodiments are merely illustrative of the principles of the present application and their effectiveness, and are not intended to limit the application. Modifications and variations may be made to the above-described embodiments by those of ordinary skill in the art without departing from the spirit and scope of the present application. Accordingly, it is intended that all equivalent modifications and variations which can be accomplished by persons skilled in the art without departing from the spirit and technical spirit of the present disclosure shall be covered by the claims of this application.

Claims (12)

1. A method of self-aligned dual imaging, the method comprising:
step S1, providing a substrate, coating photoresist on the substrate, exposing and developing to form patterned photoresist;
step S2, coating a shrinkage material on the substrate to completely cover the patterned photoresist;
s3, forming a gluing layer in the area where the shrinkage material and the patterned photoresist are in juncture by baking;
step S4, etching back the shrinkage material and the glued layer until the top of the patterned photoresist is exposed;
step S5, removing the shrinkage material and the patterned photoresist outside the area where the bonding layer is located through development;
and S6, transferring the pattern defined by the glued layer onto the substrate through etching.
2. The method of claim 1, wherein the photoresist is a positive photoresist or a negative photoresist.
3. The method of claim 2, wherein the patterned photoresist has a thickness of 50nm to 300nm.
4. The method according to claim 2, wherein when the photoresist coated in step S1 is a positive photoresist, the shrink material is a non-polar polymer; when the photoresist coated in the step S1 is a negative photoresist, the shrink material is a polar polymer.
5. The method of claim 1 or 4, wherein the shrink material has a thickness of 50nm to 500nm.
6. The method according to claim 2, wherein when the photoresist coated in the step S1 is a positive photoresist, the adhesive layer formed in the step S3 is a polar adhesive layer; when the photoresist coated in the step S1 is a negative photoresist, the adhesive layer formed in the step S3 is a non-polar adhesive layer.
7. The method according to claim 1, wherein the baking is carried out at a temperature of 80 ℃ to 200 ℃.
8. The method of claim 7, wherein the linewidth of the glue layer increases with increasing temperature.
9. The method of claim 1, wherein the equipment for performing the baking is a hotplate.
10. The method according to claim 1, wherein the back etching in step S4 has the same etching rate for the shrink material, the glue layer and the photoresist.
11. The method according to claim 1 or 10, characterized in that the total thickness of the shrink material and glue layer on top of the patterned photoresist removed by the back etching is 50nm to 500nm.
12. The method according to claim 6, wherein when the polar glue layer is formed in the step S3, the developing solution used for the development in the step S5 is a negative developing solution; when the non-polar glue layer is formed in the step S3, the developing solution used for the development in the step S5 is a TMAH developing solution.
CN202310473241.7A 2023-04-27 2023-04-27 Self-aligned double imaging method Pending CN116487253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310473241.7A CN116487253A (en) 2023-04-27 2023-04-27 Self-aligned double imaging method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310473241.7A CN116487253A (en) 2023-04-27 2023-04-27 Self-aligned double imaging method

Publications (1)

Publication Number Publication Date
CN116487253A true CN116487253A (en) 2023-07-25

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Country Status (1)

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CN (1) CN116487253A (en)

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