CN116483610A

CN116483610A - Fault repairing method, device and equipment

Info

Publication number: CN116483610A
Application number: CN202310517383.9A
Authority: CN
Inventors: 阮浩宇; 李志兵
Original assignee: Alibaba China Co Ltd
Current assignee: Alibaba China Co Ltd
Priority date: 2023-05-06
Filing date: 2023-05-06
Publication date: 2023-07-25

Abstract

The application provides a fault repairing method, device and equipment, which are applied to computing equipment, wherein a processor and a display card are arranged in the computing equipment, and the method comprises the following steps: obtaining a repair file from the display card, wherein the repair file is used for repairing the faults of a basic input/output system (BIOS) of a processor and/or computing equipment; and performing fault repair on the processor and/or the BIOS according to the repair file. To improve the stability of the computing device.

Description

Fault repairing method, device and equipment

Technical Field

The present disclosure relates to the field of computers, and in particular, to a fault repairing method, device and equipment.

Background

If the computing equipment fails, the computing equipment can be repaired by writing a repair file by a worker.

In the related art, repair files are typically burned in flash memory by a processor in the computing device to repair the computing device. However, in the above manner, when the repair file is burned in the flash memory, the processor resources are fully occupied, so that the processor cannot process other processes, resulting in lower stability of the computing device.

Disclosure of Invention

Aspects of the present application provide a fault repair method, apparatus, and device to improve stability of a computing device.

In a first aspect, the present application provides a fault repair method applied to a computing device, where a processor and a graphics card are disposed in the computing device, the method including:

obtaining a repair file from the display card, wherein the repair file is used for repairing faults of the Basic Input Output System (BIOS) of the processor and/or the computing equipment;

and performing fault repair on the processor and/or the BIOS according to the repair file.

In one possible implementation manner, obtaining a repair file from the graphics card includes:

acquiring a first instruction, wherein the first instruction is a starting instruction or an interrupt instruction;

and acquiring a repair file from the display card according to the first instruction, wherein the repair file comprises a processor repair file and/or a BIOS repair file, the processor repair file is used for repairing the processor, and the BIOS repair file is used for repairing the BIOS.

In a possible implementation manner, the computing device further comprises a flash memory, and the first instruction is a start instruction; according to the first instruction, obtaining a repair file from the display card includes:

acquiring the processor repair file from the display card or the flash memory; the method comprises the steps of,

If the BIOS repair file exists in the display card, acquiring the BIOS repair file from the display card;

the repair file comprises the processor repair file, or the repair file comprises the processor repair file and the BIOS repair file.

In a possible implementation manner, the processor repair file is obtained in the display card or the flash memory, including:

if a first repair file for repairing the processor exists in the display card, acquiring the first repair file from the display card, and determining the first repair file as the processor repair file;

and if the first repair file does not exist in the display card, acquiring a second repair file for repairing the processor in the flash memory, and determining the second repair file as the processor repair file.

if a first repair file for repairing the processor exists in the display card, determining a first version number of the first repair file;

determining a second version number of a second repair file for repairing the processor in the flash memory;

If the first version number is higher than or equal to the second version number, acquiring the first repair file from the display card, and determining the first repair file as the processor repair file;

and if the second version number is higher than the first version number, acquiring the second repair file from the flash memory, and determining the second repair file as the processor repair file.

In one possible implementation, the first instruction is an interrupt instruction; according to the first instruction, obtaining a repair file from the display card includes:

and acquiring the processor repair file from the display card, wherein the repair file comprises the processor repair file.

In one possible implementation, performing fault repair on the processor and/or the BIOS according to the repair file includes:

if the processor repairing file comprises a processor repairing file for repairing the processor, performing fault repairing on the processor according to the processor repairing file;

if the BIOS repair file comprises a BIOS repair file for repairing the BIOS, performing fault repair on the BIOS according to the BIOS repair file.

In one possible implementation, performing fault repair on the processor according to the processor repair file includes:

performing security verification processing on the processor repair file to obtain a security verification result;

determining a first identifier of the processor repair file and a second identifier of the processor when the security verification result indicates that the processor repair file is secure;

and if the first identifier is consistent with the second identifier, performing fault repair on the processor according to the processor repair file.

In one possible implementation, the processor and the graphics card are connected by a peripheral component interconnect express (PCI express) bus; obtaining a repair file from the graphics card includes:

and the processor acquires the repair file from the display card through the PCIe bus.

In a possible implementation manner, a Baseboard Management Controller (BMC) is arranged in the computing device, the repair file is stored in the display card by the BMC, and the BMC is connected with the display card through a PCIe bus; the method further comprises the steps of:

the BMC acquires a processor repair file for repairing the processor, and performs legal verification processing on the processor repair file to obtain a legal verification result; if the legal verification result indicates that the processor repair file is legal, the BMC sends the processor repair file to the display card through the PCIe bus; and/or the number of the groups of groups,

The BMC acquires a BIOS repair file for repairing the BIOS, and performs legal verification processing on the BIOS repair file to obtain a legal verification result; and if the legal verification result indicates that the BIOS repair file is legal, the BMC sends the BIOS repair file to the display card through the PCIe bus.

In one possible implementation, the BMC is connected to the processor through an eSPI bus; after the BMC sends the processor repair file to the display card through the PCIe bus, the BMC further comprises:

the BMC obtains the current stage of the BIOS;

and when the current stage of the BIOS is an operation stage, the BMC sends an interrupt signal to the processor through the ePI bus.

In a second aspect, the present application provides a fault resilient apparatus for use in a computing device, the apparatus comprising: an acquisition module and a repair module, wherein,

the acquisition module is used for acquiring a repair file from the display card, wherein the repair file is used for repairing the faults of the basic input/output system BIOS of the processor and/or the computing equipment;

and the repair module is used for repairing faults of the processor and/or the BIOS according to the repair file.

In one possible implementation manner, the acquiring module is specifically configured to:

In a possible implementation manner, the computing device further comprises a flash memory, and the first instruction is a start instruction; the acquisition module is specifically configured to:

In one possible implementation, the first instruction is an interrupt instruction; the acquisition module is specifically configured to:

In one possible implementation, the repair module is specifically configured to:

In one possible implementation, the processor and the graphics card are connected by a peripheral component interconnect express (PCI express) bus; the acquisition module is specifically configured to:

and acquiring the repair file from the display card through the PCIe bus.

In one possible implementation manner, the BMC and the display card are connected through a PCIe bus;

In a possible implementation manner, a Baseboard Management Controller (BMC) is arranged in the computing device, the repair file is stored in the display card by the BMC, and the BMC is connected with the processor through an eSPI bus; after the BMC sends the processor repair file to the display card through the PCIe bus, the BMC further comprises:

the BMC obtains the current stage of the BIOS;

In a third aspect, embodiments of the present application provide a computing device comprising: the display card is connected with the processor through a PCIe bus, and the processor is used for executing the method for executing any one of the first aspect.

In a possible implementation manner, the computing device further includes a baseboard management controller BMC and a flash memory, the graphics card is connected with the BMC through a PCIe bus, the processor and the BMC are connected through an eSPI bus, the flash memory is connected with the processor and the BMC through an eSPI bus, and the BMC is configured to execute the fault repairing method according to any one of the first aspect.

In a fourth aspect, embodiments of the present application provide a computer-readable storage medium having stored therein computer-executable instructions for implementing the fault remediation method of any one of the first aspects when the computer-executable instructions are executed by a processor.

In a fifth aspect, embodiments of the present application provide a computer program product comprising a computer program which, when executed by a processor, implements the method of fault remediation as set out in any one of the first aspects.

The embodiment of the application provides a fault repairing method, device and equipment, wherein a processor can acquire a repairing file from a display card, and perform fault repairing on the processor and/or BIOS according to the repairing file. Compared with the method that the repair file is burnt in the flash memory through the processor, the repair file can be stored in the display card, so that the resources of the processor are not occupied, and the storage efficiency is high; the processor acquires the repair file in the display card through the PCIe bus, so that compared with the process of acquiring the repair file in the flash memory through the eSPI bus, the speed of acquiring the repair file is greatly improved, the time length of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:

fig. 1 is a schematic view of a scenario provided in an exemplary embodiment of the present application;

FIG. 2 is a schematic flow chart of a fault repair method according to an exemplary embodiment of the present application;

FIG. 3 is a schematic structural diagram of a repair file according to an exemplary embodiment of the present application;

FIG. 4 is a flow chart of another method for fault remediation provided in an exemplary embodiment of the present application;

FIG. 5 is a process schematic diagram of a fault remediation method according to an exemplary embodiment of the present application;

FIG. 6 is a flow chart of yet another method of fault remediation provided in an exemplary embodiment of the present application;

FIG. 7 is a process schematic diagram of another method of fault remediation provided in an exemplary embodiment of the present application;

fig. 8 is a schematic structural diagram of a fault repairing apparatus according to an exemplary embodiment of the present application;

fig. 9 is a schematic structural diagram of a computing device according to an exemplary embodiment of the present application.

Detailed Description

It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) referred to in the present application are information and data authorized by the user or fully authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards, and provide corresponding operation entries for the user to select authorization or rejection.

For the purposes, technical solutions and advantages of the present application, the technical solutions of the present application will be clearly and completely described below with reference to specific embodiments of the present application and corresponding drawings. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

Fig. 1 is a schematic view of a scenario provided in an exemplary embodiment of the present application. Referring to fig. 1, a computing device may include a processor and a graphics card.

A worker may write a repair file on an electronic device. The repair file may be sent to the computing device by the electronic device so that the computing device may store the repair file in the graphics card. The processor may obtain the repair file from the graphics card and perform fault repair on the processor or basic input output system (Basic Input Output System, BIOS) based on the repair file.

In the embodiment of the application, the repair file can be obtained from the display card, and the fault repair is performed on the processor or the BIOS according to the repair file. Compared with the method that the repair file is burnt in the flash memory through the processor, the repair file can be stored in the display card, so that the resources of the processor are not occupied, and the storage efficiency is high; the processor can acquire the repair file in the display card through the peripheral component interconnect express (Peripheral Component Interconnect Express, PCIe) bus, compared with the process of acquiring the repair file in the flash memory through the enhanced serial peripheral interface (Enhanced Serial Peripheral Interface, eSPI) bus, the speed of acquiring the repair file is greatly improved, the time length of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved.

The technical scheme shown in the application is described in detail through specific embodiments. It should be noted that the following embodiments may exist alone or in combination with each other, and for the same or similar content, the description will not be repeated in different embodiments.

Fig. 2 is a flow chart of a fault repairing method according to an exemplary embodiment of the present application. Referring to fig. 2, the method may include:

s201, acquiring a repair file from the display card.

The execution body of the embodiment of the application may be a processor, or may be a fault repairing device provided in a computing device. The fault repairing device can be realized by software or a combination of software and hardware. The fault resilient means may be a processor in the computing device. For ease of understanding, the execution body will be described below as an example of a processor.

Alternatively, the processor may be a central processing unit (Central Processing Unit, CPU).

Memory-mapped I/O Memory (MMIO Memory) may be included in the graphics card. MMIO is a memory area.

The repair file may be written by a worker for repairing a failure of the BIOS of the processor and/or computing device. The BIOS is firmware burned into flash memory.

The repair files may include processor repair files and/or BIOS repair files. The processor repair file may be used to repair the processor, and the BIOS repair file may be used to repair the BIOS.

Next, the structure of the repair file will be described with reference to fig. 3.

Fig. 3 is a schematic structural diagram of a repair file according to an exemplary embodiment of the present application. Referring to fig. 3, a File Header (File Header), repair information, and a signature certificate may be included in the repair File. The signature certificate may include a first Hash (Hash) value that is encrypted, and may be used to perform a legal verification process on the repair file.

Alternatively, the repair file may be stored by the baseboard management controller (Baseboard Manager Controller, BMC) to the MMIO region in the graphics card over the PCIe bus.

In an alternative embodiment, the processor and the display card may be connected through a PCIe bus, and the processor may obtain the repair file from the display card through the PCIe bus.

Optionally, the processor may acquire the first instruction, and acquire the repair file from the graphics card according to the first instruction.

The first instruction may be a start instruction or an interrupt instruction. The boot instructions may be used to instruct the boot of a BIOS program. The interrupt instruction may be used to trigger a System management interrupt (System Management Interrupt, SMI) function to interrupt the running Operating System (OS).

Optionally, the processor may execute the program statement to obtain the first instruction, and obtain the repair file from the graphics card through the PCIe bus according to the first instruction. For example, if the repair file 1 is stored in the graphics card, the processor may execute the program statement 1, obtain the first instruction, and obtain the repair file 1 from the graphics card through the PCIe bus according to the first instruction.

S202, performing fault repair on the processor and/or the BIOS according to the repair file.

Optionally, if the repair file includes a processor repair file for repairing the processor, the processor may be subjected to fault repair according to the processor repair file; if the BIOS repair file comprises the BIOS repair file for repairing the BIOS, performing fault repair on the BIOS according to the BIOS repair file.

In an alternative embodiment, the fault repair for the processor may be performed according to the processor repair file by: carrying out security verification processing on the processor repair file to obtain a security verification result; determining a first identifier for processing the repair file and a second identifier of the processor when the security verification result indicates that the processor repair file is secure; and if the first identifier is consistent with the second identifier, performing fault repair on the processor according to the processor repair file.

The security verification process refers to the process that the processor verifies the repair information in the processor repair file.

Optionally, the processor may parse the processor repair file to obtain repair information in the processor repair file.

The processor can perform security verification processing on the repair information through a preset algorithm to obtain a security verification result.

Alternatively, the security verification result may include the following 2 cases:

case 1: the security verification results in that the processor is at risk to repair the file.

In this case, the processor may not repair the file using the processor.

For example, if the processor repair file 1 includes repair information 1, the processor may perform security verification processing on the repair file 1 through a preset algorithm to obtain a security verification result. If the security verification result is that the processor repair file 1 is at risk, the processor cannot use the processor repair file 1 to perform fault repair.

Case 2: the security verification result is that the processor repairs the file security.

In this case, the processor may further determine a first identification of the processor repair file, and a second identification of the processor. And if the first identifier is consistent with the second identifier, the processor performs fault repair on the processor according to the processor repair file.

Optionally, the processor repair file may further include a first identifier, where the first identifier may be used to indicate a processor type to which the processor repair file is adapted.

The processor may have its own second identification. The second identification may be a processor type of the processor.

Optionally, if the first identifier is consistent with the second identifier, the processor repair file may be adapted to the processor, and the processor may perform fault repair on the processor according to the processor repair file.

For example, if the processor repair file 1 includes repair information 1, the processor may perform security verification processing on the repair file 1 through a preset algorithm to obtain a security verification result. If the security verification result is that the processor repair file 1 is secure, the processor may further determine a first identifier of the processor repair file and a second identifier of the processor. Assuming that the first identifier is A001 and the second identifier is A001, the processor can perform fault repair on the processor according to the processor repair file 1 because the first identifier is consistent with the second identifier; if the second identifier is B031, the processor cannot perform fault repair on the processor according to the processor repair file 1 because the first identifier and the second identifier are inconsistent.

According to the technical scheme, the computing equipment can repair software vulnerabilities on a large scale, and the deployment time of firmware is shortened; the BIOS firmware can be upgraded in a non-inductive way, other tasks cannot be affected in the upgrading process, and the interruption risk is avoided.

In the embodiment of the application, the processor may obtain the repair file from the graphics card, and perform fault repair on the processor and/or the BIOS according to the repair file. Compared with the method that the repair file is burnt in the flash memory through the processor, the repair file can be stored in the display card, so that the resources of the processor are not occupied, and the storage efficiency is high; the processor acquires the repair file in the display card through the PCIe bus, so that compared with the process of acquiring the repair file in the flash memory through the eSPI bus, the speed of acquiring the repair file is greatly improved, the time length of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved.

When the BIOS program is in different stages, the processor acquires the fault repair file and the fault repair process is different. Next, on the basis of the embodiment shown in fig. 2, the above-mentioned fault repairing method will be described in detail with reference to fig. 4 when the BIOS program is in the boot phase; the above-mentioned fault repairing method is described in detail with reference to fig. 6 when the BIOS program is in the run phase.

Fig. 4 is a flow chart of another fault repair method according to an exemplary embodiment of the present application. Referring to fig. 4, the method may include:

s401, the BMC acquires the repair file, and performs legal verification processing on the repair file to obtain a legal verification result.

Alternatively, the repair files may include a processor repair file and/or a BIOS repair file.

Since the repair file may include a processor repair file and/or a BIOS repair file, the BMC may determine the type of the repair file after acquiring the repair file.

Optionally, if the BMC determines that the repair file is a processor repair file, the BMC may perform legal verification processing on the processor repair file to obtain a legal verification result, where the legal verification result may be that the processor repair file is legal or that the processor repair file is illegal; if the BMC determines that the repair file is the BIOS repair file, the BMC can perform legal verification processing on the BIOS repair file to obtain a legal verification result, wherein the legal verification result can be that the BIOS repair file is legal or the BIOS repair file is illegal.

The legal verification process may be that the BMC verifies the signed certificate in the processor repair file and/or the BIOS repair file.

Optionally, after the BMC obtains the processor repair file and/or the BIOS repair file, the processor repair file and/or the BIOS repair file may be parsed to obtain a header, repair information, and a signature certificate in the processor repair file and/or the BIOS repair file, so as to perform legal verification processing on the processor repair file and/or the BIOS repair file according to the signature certificate.

Optionally, because the signature certificate includes the first Hash value, the BMC may obtain the first Hash value from the signature certificate, and may decrypt the first Hash value by using a decryption algorithm to obtain the second Hash value.

The BMC can also determine a third Hash value according to the file header and the repair information through a Hash algorithm.

If the second Hash value is consistent with the third Hash value, determining that the legal verification result is legal for the processor repair file and/or the BIOS repair file; if the second Hash value is inconsistent with the third Hash value, the legal verification result can be determined to be illegal for the processor repair file and/or the BIOS repair file.

For example, if the BMC obtains the repair file 1 and determines that the repair file 1 is a processor repair file, the BMC may analyze the processor repair file and determine the header 1, the repair information 1 and the signature certificate 1 in the processor repair file. If the first Hash value included in the signature certificate 1 is 15, the BMC may obtain the first Hash value 15 in the signature certificate 1, and may perform decryption processing on the first Hash value through a decryption algorithm, so as to obtain a second Hash value 06. If the BMC obtains a third Hash value which is 06 according to the file header 1 and the repair information 1 through a Hash algorithm, the processor repair file can be determined to be legal because the second Hash value and the third Hash value are 06; if the BMC obtains a third Hash value which is 02 according to the file header 1 and the repair information 1 through a Hash algorithm, the processor can determine that the repair file is illegal because the second Hash value 06 is inconsistent with the third Hash value 02.

For example, if the BMC obtains the repair file 2 and determines that the repair file 2 is a BIOS repair file, the BMC may analyze the BIOS repair file and determine the header 2, the repair information 2 and the signature certificate 2 in the BIOS repair file. If the first Hash value included in the signature certificate 2 is 36, the BMC may obtain the first Hash value 36 in the signature certificate 2, and may decrypt the first Hash value 36 through a decryption algorithm to obtain a second Hash value 17. If the BMC obtains a third Hash value of 17 according to the file header 2 and the repair information 2 through a Hash algorithm, the BIOS repair file is determined to be legal because the second Hash value and the third Hash value are 17; if the BMC obtains a third Hash value of 11 according to the file header 2 and the repair information 2 through a Hash algorithm, the BIOS repair file can be determined to be illegal because the second Hash value 17 is inconsistent with the third Hash value 17.

And S402, if the legal verification result indicates that the repair file is legal, the BMC sends the repair file to the display card through the PCIe bus.

Since the repair file may include a processor repair file and/or a BIOS repair file, the validation result indicates that the repair file is valid, including the processor repair file is valid, and/or the BIOS repair file is valid.

If the legal verification result is that the processor repair file is legal, the BMC can send the processor repair file to the display card through the PCIe bus so as to store the processor repair file in an MMIO area in the display card.

For example, if the legal verification result is that the processor repair file 1 is legal, the BMC may send the processor repair file 1 to the display card through the PCIe bus.

If the legal verification result is that the BIOS repair file is legal, the BMC can send the BIOS repair file to the display card through a PCIe bus so as to store the BIOS repair file in an MMIO area in the display card.

For example, if the legal verification result is that the BIOS repair file 1 is legal, the BMC may send the BIOS repair file 1 to the display card through the PCIe bus.

The BMC is used for storing the processor repair file and/or the BIOS repair file in the display card, so that compared with the process of burning the processor repair file and/or the BIOS repair file in the flash memory, the storage efficiency is improved, the resources of the processor are not occupied, and the shutdown restarting of the computing device is not required.

S403, the processor acquires a first instruction, wherein the first instruction is a starting instruction.

The first instruction may be a start-up instruction for instructing the processor to start up the BIOS program.

Alternatively, the processor may execute a program statement to fetch the first instruction. For example, the processor may execute program statement 1, fetching a first instruction 1, which may be a launch instruction.

S404, the processor determines whether a BIOS repair file exists in the display card according to the first instruction.

Alternatively, the graphics card may store a repair file, where the repair file may be a processor repair file, or the repair file may include a processor repair file or a BIOS repair file.

And the processor determines whether the BIOS repair file exists in the display card according to the first instruction. If the BIOS repair file exists, S405 may be executed; if the BIOS repair file does not exist, S406 is performed.

S405, the processor acquires a BIOS repair file, and performs fault repair on the BIOS according to the BIOS repair file.

In an alternative embodiment, the processor may obtain the BIOS repair file from the graphics card via the PCIe bus, and may load the BIOS repair file to perform the failover of the BIOS program.

S406, the processor determines a processor repair file in the display card or the flash memory according to the first instruction.

Optionally, a flash memory may also be provided in the computing device. The flash memory may have stored therein a processor repair file.

It should be noted that the version of the processor repair file in the flash memory may be different from or the same as the version of the processor repair file in the graphics card.

Because the processor repair files are stored in the display card and the flash memory, the BIOS repair files may be stored in the display card, so that the processor can acquire the processor repair files in the display card or the flash memory according to the first instruction.

In an alternative embodiment, the processor repair file is obtained in the video card or the flash memory, which may include the following 3 cases:

case 1: the first repair file exists in the graphics card, and the second repair file does not exist in the flash memory.

Both the first repair file and the second repair file may be used to repair a processor failure.

In this case, since only the first repair file for repairing the processor failure exists in the graphics card, the processor may acquire the first repair file in the graphics card through the PCIe bus, and determine the first repair file as the processor repair file.

For example, if the display card has a first repair file as repair file 1 and the flash memory has no second repair file for repairing the processor fault, the processor may acquire repair file 1 from the display card and determine repair file 1 as the processor repair file.

Case 2: the first repair file does not exist in the graphics card, and the second repair file exists in the flash memory.

In this case, the processor may acquire a second repair file for repairing the processor in the flash memory and determine the second repair file as the processor repair file.

In this case, since only the second repair file for repairing the processor failure exists in the flash memory, the processor may acquire the second repair file in the flash memory and determine the second repair file as the processor repair file.

For example, if the second repair file exists in the flash memory as repair file 2, and the first repair file for repairing the processor failure does not exist in the graphics card, the processor may obtain repair file 2 in the flash memory, and determine repair file 2 as the processor repair file.

Case 3: the display card has a first repair file, and the flash memory has a second repair file.

In this case, since the repair file for repairing the processor exists in both the graphic card and the flash memory, the processor can determine the latest repair file as the processor repair file.

In particular, the processor may determine a first version number of the first repair file and a second version number of the second repair file. If the first version number is higher than or equal to the second version number, the processor can acquire a first repair file from the display card through the PCIe bus, and the first repair file is determined to be the processor repair file; if the second version number is higher than the first version number, the processor may obtain a second repair file in the flash memory and determine the second repair file as a processor repair file.

The first version number may be used to indicate a version of the first repair file; the second version number may be used to indicate a version of the second repair file. Alternatively, both the first version number and the second version number may be data numbers.

For example, if the processor determines that the first version number of the first repair file in the display card is 003 and determines that the second version number of the second repair file in the flash memory is 002, the processor may acquire the first repair file in the display card through the PCIe bus and determine the first repair file as the processor repair file because the first version number 003 is higher than the second version number 002; if the second version number of the second repair file in the flash memory is 004, the processor may obtain the second repair file in the flash memory and determine the second repair file as the processor repair file because the second version number 004 is higher than the first version number 003.

S407, the processor acquires the processor repair file, and performs security verification processing on the processor repair file to obtain a security verification result.

Optionally, after the processor determines the processor repair file, the processor repair file may be obtained in a display card or a flash memory.

In an alternative embodiment, the processor may parse the processor repair file to obtain repair information in the processor repair file. The processor can perform security verification processing on the repair information through a preset algorithm to obtain a security verification result.

If the security verification result shows that the processor repair file is at risk, the processor cannot use the processor repair file to perform fault repair; if the security verification result is that the processor repair file is secure, S408 may be performed.

S408, when the security verification result indicates that the processor repair file is secure, the processor determines whether the processor repair file is suitable for the processor.

The processor may further determine a first identification of the processor repair file, and a second identification of the processor. If the first identifier is consistent with the second identifier, the processor repair file is indicated to be adaptable to the processor, and S409 may be executed; if the first identifier is inconsistent with the second identifier, the processor repair file is not matched with the processor, and the processor cannot repair the fault of the processor according to the processor repair file.

For example, if the first identifier of the processor repair file 1 is a001 and the second identifier of the processor is a001, S409 may be executed because the first identifier and the second identifier are identical; if the second identifier is B031, the processor cannot perform fault repair on the processor according to the processor repair file 1 because the first identifier and the second identifier are inconsistent.

S409, the processor performs fault restoration on the processor according to the processor restoration file.

Optionally, the processor may load the processor repair file into the memory to perform fault repair on the processor.

In the embodiment of the application, the BMC can acquire the repair file and perform legal verification processing on the repair file to obtain a legal verification result. If the legal verification result indicates that the repair file is legal, the BMC can send the repair file to the display card through the PCIe bus. The processor can acquire the first instruction, and can determine whether the BIOS repair file exists in the display card according to the first instruction, if so, the processor can acquire the BIOS repair file from the display card through the PCIe bus. The processor can determine the processor repair file in the display card or the flash memory, acquire the processor repair file, and perform security verification processing on the processor repair file to obtain a security verification result. When the security verification result indicates that the processor repair file is secure, the processor may further determine whether the processor repair file is appropriate for the processor. If yes, the processor can carry out fault restoration on the processor according to the processor restoration file. Because the BMC is connected with the display card and the processor and the display card through the PCIe bus, the BMC stores the repair file in the display card through the PCIe bus, compared with the process of burning the repair file in the flash memory through the processor, the BMC does not occupy the resources of the processor, and the storage efficiency is high; the processor acquires the repair file in the display card through the PCIe bus, so that compared with the process of acquiring the repair file in the flash memory through the eSPI bus, the speed of acquiring the repair file is greatly improved, the time length of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved.

Next, the above-described fault repairing method will be described in further detail by way of specific example with reference to fig. 5 on the basis of the embodiment shown in fig. 4.

Fig. 5 is a process schematic diagram of a fault repairing method according to an exemplary embodiment of the present application. Referring to fig. 5, a processor, a graphics card, a BMC, and a flash memory may be included in a computing device.

The worker may send the processor repair file and/or the BIOS repair file to the computing device via the electronic device. In step (1), the BMC may obtain the processor repair file and the BIOS repair file. The BMC may determine the type of the repair file, i.e., the BMC may determine that the obtained repair file is a processor repair file or a BIOS repair file.

If the BMC determines that the repair file is the processor repair file, the BMC can perform legal verification processing on the processor repair file to obtain a legal verification result, wherein the legal verification result can be that the processor repair file is legal or the processor repair file is illegal; if the BMC determines that the repair file is the BIOS repair file, the BMC can perform legal verification processing on the BIOS repair file to obtain a legal verification result, wherein the legal verification result can be that the BIOS repair file is legal or the BIOS repair file is illegal.

In the step (2), when the legal verification result is that the processor repair file is legal, the BMC can send the processor repair file to the display card through the PCIe bus so as to store the processor repair file in an MMIO area in the display card; when the legal verification result is that the BIOS repair file is legal, the BMC can send the BIOS repair file to the display card through a PCIe bus so as to store the BIOS repair file in an MMIO area in the display card.

In step (3), the processor may execute the program statement, and obtain a first instruction, which may be a start instruction. The processor can determine whether the BIOS repair file exists in the display card according to the starting instruction. If so, the processor can acquire the BIOS repair file through the PCIe bus and perform fault repair on the BIOS according to the BIOS repair file.

In step (4), the processor may further determine whether a processor repair file exists in the graphics card. If so, the processor may determine a first version number of the processor repair file in the graphics card. Assume that the processing repair file in the graphics card is processing repair file 2, and the first version number is 2.

In step (5), the processor may determine whether a processor repair file is present in the flash memory. If so, the processor may obtain a second version number of the processor repair file in the flash memory. Assume that the process repair file in the flash memory is process repair file 1 and the second version number is 1.

In step (6), the processor may determine whether the first version number is greater than or equal to the second version number. If the processor is higher than the processor, the processor can acquire the processor repair file from the display card through the PCIe bus. For example, the first version number of the processor repair file 2 in the graphics card is 2, and the second version number of the processor repair file 1 in the flash memory is 1, and since the first version number is higher than the second version number, it is indicated that the processor repair file 2 is newer than the version of the processor repair file 1, and then the processor may acquire the processor repair file 2 in the graphics card through the PCIe bus.

Optionally, after the processor obtains the processor repair file, the processor repair file may be subjected to security verification processing to obtain a security verification result. When the security verification result indicates that the processor repair file is secure, the processor determines whether the processor repair file is adapted to the processor. If so, the processor can load the processor repair file and perform fault repair on the processor according to the processor repair file. For example, if the processor determines that processor repair file 2 is legitimate and adapted, the processor may load processor repair file 2 and processor repair file 2 performs a failover to the processor.

In the embodiment of the application, the BMC may obtain the processor repair file and/or the BIOS repair file, and perform legal verification processing on the processor repair file and/or the BIOS repair file to obtain a legal verification result. If the legal verification result indicates that the processor repair file and/or the BIOS repair file are legal, the BMC can send the processor repair file and/or the BIOS repair file to the display card through the PCIe bus. The processor may obtain the first instruction, and may determine, according to the first instruction, whether a BIOS repair file exists in the display card. If so, the processor can acquire the BIOS repair file from the display card through the PCIe bus. The processor can determine the processor repair file in the display card or the flash memory, acquire the processor repair file, and perform security verification processing on the processor repair file to obtain a security verification result. When the security verification result indicates that the processor repair file is secure, the processor may further determine whether the processor repair file is appropriate for the processor. If yes, the processor can carry out fault restoration on the processor according to the processor restoration file. Because the BMC is connected with the display card and the processor and the display card through the PCIe bus, the BMC stores the repair file in the display card through the PCIe bus, compared with the process of burning the repair file in the flash memory through the processor, the BMC does not occupy the resources of the processor, and the storage efficiency is high; the processor acquires the repair file in the display card through the PCIe bus, so that compared with the process of acquiring the repair file in the flash memory through the eSPI bus, the speed of acquiring the repair file is greatly improved, the time length of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved.

Fig. 6 is a flow chart of yet another fault repair method according to an exemplary embodiment of the present application. Referring to fig. 6, the method may include:

s601, the BMC acquires the processor repair file, and performs legal verification processing on the processor repair file to obtain a legal verification result.

The staff may send the repair file to the computing device through the electronic device so that the BMC may obtain the repair file. If the BMC determines that the repair file is the processor repair file, the BMC can perform legal verification processing on the processor repair file to obtain a legal verification result, wherein the legal verification result can be that the processor repair file is legal or the processor repair file is illegal.

Specifically, after the BMC obtains the processor repair file, the processor repair file can be analyzed, a file header, repair information and a signature certificate in the processor repair file are obtained, and decryption processing is performed according to a first Hash value in the signature certificate to obtain a second Hash value; the BMC can determine and obtain a third Hash value according to the file header and the repair information through a Hash algorithm. If the second Hash value is consistent with the third Hash value, determining that the legal verification result is legal for the processor repair file; if the second Hash value is inconsistent with the third Hash value, the legal verification result can be determined to be that the processor repairs the file illegally.

And S602, if the legal verification result indicates that the processor repair file is legal, the BMC sends the processor repair file to the display card through the PCIe bus.

For example, if the legal verification result is that the processor repair file 1 is legal, the BMC may send the processor repair file 1 to the display card through the PCIe bus to store the processor repair file 1 in an MMIO area in the display card.

S603, the BMC acquires the current stage of the BIOS.

Alternatively, the BMC and the processor may be connected via an eSPI bus.

When the BIOS program enters the run phase, the processor may send a first signal to the BMC, which may be used to instruct the BIOS program to enter the run phase.

After the BMC acquires the first signal, it may determine that the current phase of the BIOS is the run phase.

It should be noted that, during the running phase of the BIOS program, the processor starts the OS system and runs.

S604, when the current stage of the BIOS is the operation stage, the BMC sends an interrupt signal to the processor through the ePI bus.

If the repair file obtained by the BMC includes the processor repair file and the current stage of the BIOS is the operation stage, the BMC sends an interrupt signal to the processor through the eSPI bus, and the interrupt instruction can be used for triggering the SMI function to interrupt the operation of the operating system.

S605, the processor acquires a first instruction, wherein the first instruction is an interrupt instruction.

Optionally, after the processor acquires the interrupt signal sent by the BMC, the processor may trigger the SMI function to interrupt running the operating system. The processor may obtain a first instruction according to the interrupt signal, where the first instruction may be an interrupt instruction.

S606, the processor determines a processor repair file in the display card or the flash memory according to the first instruction.

S607, the processor acquires the processor repair file, and performs security verification processing on the processor repair file to obtain a security verification result.

S608, when the security verification result indicates that the processor repair file is secure, the processor determines whether the processor repair file is suitable for the processor.

S609, the processor performs fault repair on the processor according to the processor repair file.

It should be noted that, the specific execution process of steps S606 to S609 may refer to steps S406 to S409, and will not be described herein.

In the embodiment of the application, the BMC can acquire the processor repair file and perform legal verification processing on the processor repair file to obtain a legal verification result. If the legal verification result indicates that the processor repair file is legal, the BMC can send the processor repair file to the display card through the PCIe bus. The BMC acquires the current stage of the BIOS and sends an interrupt signal to the processor through the ePI bus when the current stage of the BIOS is the running stage. The processor may obtain the first instruction and may determine a processor repair file in the display card or flash memory based on the first instruction. The processor can acquire the processor repair file, and perform security verification processing on the processor repair file to obtain a security verification result. When the security verification result indicates that the processor repair file is secure, the processor may further determine whether the processor repair file is appropriate for the processor. If yes, the processor can carry out fault restoration on the processor according to the processor restoration file. Because the BMC is connected with the display card and the processor and the display card through the PCIe bus, the BMC stores the processor repair file in the display card through the PCIe bus, compared with the process of burning the processor repair file in the flash memory through the processor, the BMC does not occupy the resources of the processor, and the storage efficiency is high; the processor acquires the processor repair file in the display card through the PCIe bus, so that the speed of acquiring the processor repair file is greatly improved, the duration of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved compared with the speed of acquiring the processor repair file in the flash memory through the ePI bus.

Next, the above-described fault repairing method will be described in further detail by way of a specific example with reference to fig. 7 on the basis of the embodiment shown in fig. 6.

Fig. 7 is a process schematic diagram of another fault repair method according to an exemplary embodiment of the present application. Referring to fig. 7, a processor, a graphics card, a BMC, and a flash memory may be included in a computing device.

The worker may send the processor repair file 2 to the computing device via the electronic device. In step (1), the BMC may obtain processor repair file 2. The BMC may determine that the type of processor repair file 2 is a processor repair file.

If the BMC determines that the repair file is the processor repair file, the BMC can perform legal verification processing on the processor repair file to obtain a legal verification result, wherein the legal verification result can be that the processor repair file is legal or the processor repair file is illegal.

In step (2), when the legal verification result is that the processor repair file is legal, the BMC may send the processor repair file to the display card through the PCIe bus to store the processor repair file in an MMIO area in the display card.

In step (3), the BMC may obtain the current phase of the BIOS program. If the current phase of the BIOS program is the run phase, the BMC may send an interrupt signal to the processor via the eSPI bus to trigger the SMI function to interrupt running the operating system.

In step (4), the processor may acquire an interrupt signal to acquire the first instruction as an interrupt instruction. The processor may determine a first version number of a processor repair file in the graphics card based on the interrupt instruction. Assume that the processing repair file in the graphics card is processing repair file 2, and the first version number is 2.

It should be noted that, the technical scheme of the application can be applied to various scenes such as bare metal computing equipment or common computing equipment, OS authority is not needed, and the processor repair file can be stored in the display card in a BMC out-of-band mode. The processor may load the processor repair file in-band in real-time and may take effect of the processor repair file persistence.

In the embodiment of the application, the BMC can acquire the processor repair file and perform legal verification processing on the processor repair file to obtain a legal verification result. If the legal verification result indicates that the processor repair file is legal, the BMC can send the processor repair file to the display card through the PCIe bus. The BMC acquires the current phase of the BIOS and sends an interrupt signal to the processor through the ePI bus when the phase of the BIOS is the running phase. The processor may obtain the first instruction and may determine a processor repair file in the display card or flash memory based on the first instruction. The processor can acquire the processor repair file, and perform security verification processing on the processor repair file to obtain a security verification result. When the security verification result indicates that the processor repair file is secure, the processor may further determine whether the processor repair file is appropriate for the processor. If yes, the processor can carry out fault restoration on the processor according to the processor restoration file. Because the BMC is connected with the display card and the processor and the display card through the PCIe bus, the BMC stores the processor repair file in the display card through the PCIe bus, compared with the process of burning the processor repair file in the flash memory through the processor, the BMC does not occupy the resources of the processor, and the storage efficiency is high; the processor acquires the processor repair file in the display card through the PCIe bus, so that the speed of acquiring the processor repair file is greatly improved, the duration of occupying the processor resource is reduced, and the stability of the computing device is comprehensively improved compared with the speed of acquiring the processor repair file in the flash memory through the ePI bus.

Fig. 8 is a schematic structural diagram of a fault repairing apparatus according to an exemplary embodiment of the present application. Referring to fig. 8, the apparatus 10 may include: an acquisition module 11 and a repair module 12, wherein,

the obtaining module 11 is configured to obtain a repair file from the graphics card, where the repair file is used to repair a fault of the processor and/or a basic input/output system BIOS of the computing device;

the repair module 12 is configured to perform fault repair on the processor and/or the BIOS according to the repair file.

In one possible implementation, the obtaining module 11 is specifically configured to:

In a possible implementation manner, the computing device further comprises a flash memory, and the first instruction is a start instruction; the acquiring module 11 is specifically configured to:

In one possible implementation, the first instruction is an interrupt instruction; the acquiring module 11 is specifically configured to:

In one possible implementation, the repair module 12 is specifically configured to:

In one possible implementation, the processor and the graphics card are connected by a peripheral component interconnect express (PCI express) bus; the acquiring module 11 is specifically configured to:

and acquiring the repair file from the display card through the PCIe bus.

In a possible implementation manner, a Baseboard Management Controller (BMC) is arranged in the computing device, the repair file is stored in the display card by the BMC, and the BMC is connected with the display card through a PCIe bus;

the BMC obtains the current stage of the BIOS;

Fig. 9 is a schematic structural diagram of a computing device according to an exemplary embodiment of the present application. Referring to fig. 9, the computing device includes a processor, a graphics card, a BMC, and a flash memory.

The flash memory can store a BIOS program, and the processor can read the BIOS program in the flash memory, start and run the BIOS program.

The processor, BMC and flash memory may be interconnected by an eSPI bus.

The processor and the display card, and the BMC and the display card can be connected through a PCIe bus.

The processor and BMC may perform the failover method described in any of the embodiments above.

Accordingly, embodiments of the present application provide a computer readable storage medium having stored therein computer executable instructions for implementing the fault remediation method according to any one of the method embodiments described above when the computer executable instructions are executed by a processor.

Accordingly, embodiments of the present application may also provide a computer program product, including a computer program, which, when executed by a processor, may implement the fault repair method shown in any of the above-mentioned method embodiments.

It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media.

Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.

The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.

Claims

1. A method of fault remediation, for use with a computing device having a processor and a graphics card disposed therein, the method comprising:

2. The method of claim 1, wherein obtaining a repair file from the graphics card comprises:

3. The method of claim 2, wherein the computing device further comprises a flash memory therein, the first instruction being a boot instruction; according to the first instruction, obtaining a repair file from the display card includes:

4. The method of claim 3, wherein obtaining the processor repair file in the graphics card or the flash memory comprises:

5. The method of claim 3, wherein obtaining the processor repair file in the graphics card or the flash memory comprises:

6. The method of claim 2, wherein the first instruction is an interrupt instruction; according to the first instruction, obtaining a repair file from the display card includes:

7. The method according to any of claims 1-6, wherein performing failover of the processor and/or the BIOS based on the repair file comprises:

8. The method of claim 7, wherein performing fault repair on the processor according to the processor repair file comprises:

9. The method of any of claims 1-8, wherein the processor and the graphics card are connected by a peripheral component interconnect express (PCIe) bus; obtaining a repair file from the graphics card includes:

10. The method according to any one of claims 1-9, wherein a baseboard management controller, BMC, is provided in the computing device, the repair file is stored in the graphics card by the BMC, and the BMC is connected with the graphics card through a PCIe bus; the method further comprises the steps of:

11. The method of any of claims 1-10, wherein the BMC is coupled to the processor via an eSPI bus; after the BMC sends the processor repair file to the display card through the PCIe bus, the BMC further comprises:

The BMC obtains the current stage of the BIOS;

12. A computing device, comprising: the display card is connected with the processor through a PCIe bus, and the processor is used for executing the method of any one of the claims 1-9.

13. The computing device of claim 12, further comprising a baseboard management controller, BMC, and a flash memory, the graphics card and the BMC being connected by a PCIe bus, the processor and the BMC being connected by an eSPI bus, the flash memory being connected by the eSPI bus to the processor and the BMC, respectively, the BMC being configured to perform the method of any of claims 10-11.

14. A computer readable storage medium having stored therein computer executable instructions which, when executed by a processor, implement the method of any of claims 1-11.