CN116470969B - Radio frequency chip module debugging device and method - Google Patents
Radio frequency chip module debugging device and method Download PDFInfo
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Abstract
The invention relates to the technical field of communication, and discloses a radio frequency chip module debugging device and a method, wherein the radio frequency chip module debugging device comprises a debugging connection module, a direct current power supply, a radio frequency signal source, a radio frequency signal analyzer, a debugging board and an upper computer, the debugging connection module comprises a substrate and a debugging PAD arranged on the substrate, the debugging PAD is electrically connected with one end of a debugging bias signal, one ends of a plurality of analog switches are respectively connected with the upper computer and the direct current power supply, the second ends of the plurality of analog switches are respectively connected with the other end of a debugging power amplification chip, one end of a current detection unit is connected with the direct current power supply, and the other end of the current detection unit is connected with the analog switch; the current detection unit is used for detecting an output current signal, and the radio frequency signal analyzer is used for detecting an output radio frequency signal and feeding back the current signal and the radio frequency signal to the upper computer. The radio frequency chip module debugging device has low research and development cost and high test efficiency.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a device and a method for debugging a radio frequency chip module.
Background
With the advent of the information age, wireless communication technology has been rapidly developed, and from cellular phones, wireless local area networks, bluetooth, etc., have become an integral part of social life and development. The progress of wireless communication technology has not been separated from the development of radio frequency power amplifier chips. In rf power amplifier chip designs, the amplifier is typically of a multi-stage design, typically 2 or 3 stages. In each stage of amplifier design, bias voltage or current is an important parameter that determines the gain, linearity, etc. of the amplifier. The DC bias voltage or current is generally output by the LDO regulated power supply circuit, and the bias voltage or current can be adjusted by adjusting the LDO parameters. In conventional amplifier PA design and tuning, tuning of the bias voltage/current often takes a significant amount of time.
In practical amplifier module design, the amplifier circuit and the LDO voltage regulator circuit are designed into different dies (commonly called Die) due to different chip materials, process nodes and the like, and are electrically connected through gold wires or copper wires by mounting a plurality of different Die on a substrate.
However, in the conventional amplifier chip or module circuit design, the hardware parameters of the LDO providing the bias voltages of each stage are designed to be adjustable, and the adjustment of the output voltage of the LDO can be achieved by a laser cutting method. And each time parameter adjustment is completed, cutting and testing are carried out, and proper LDO parameters are obtained through multiple iterations; however, the method needs to be completed manually, and has high cost and low efficiency.
Disclosure of Invention
The embodiment of the invention aims to provide a radio frequency chip module debugging device which is used for solving the problems of troublesome debugging, high cost and low debugging efficiency of the conventional radio frequency chip module.
In order to solve the technical problems, in a first aspect, an embodiment of the present invention provides a radio frequency chip module debugging device, configured to debug a radio frequency chip module, where the radio frequency chip module includes a power amplification chip and a bias chip, and the power amplification chip is provided with a debugging bias signal, and the radio frequency chip module debugging device is characterized in that the radio frequency chip module debugging device includes a debugging connection module, a direct current power supply, a radio frequency signal source, a radio frequency signal analyzer, a debugging board and an upper computer, where the debugging connection module is welded on the debugging board and forms an electrical connection, an output end of the direct current power supply is electrically connected with the debugging board to supply power to the debugging board, and the upper computer is electrically connected with the debugging connection module, the radio frequency signal source and the radio frequency signal analyzer, respectively; the radio frequency signal source is used for outputting radio frequency signals to the debugging board, and the radio frequency signal analyzer is used for collecting and analyzing the radio frequency signals;
the debugging connection module comprises a substrate and debugging PADs arranged on the substrate, wherein the first ends of the debugging PADs are electrically connected with the first ends of the debugging offset signals, the debugging offset signals comprise n, the debugging PADs comprise 2n, and n is a positive integer; two-by-two connection is carried out between 2n debugging PADs;
the debugging board comprises a plurality of analog switches, a plurality of adjustable linear stabilized voltage supplies and a current detection unit; the first ends of the analog switches are respectively connected with the upper computer and the adjustable linear stabilized power supplies, the second ends of the analog switches are respectively connected with the second ends of the debugging PADs, the first ends of the current detection units are connected with the adjustable linear stabilized power supplies, the second ends of the current detection units are connected with the analog switches, the adjustable linear stabilized power supplies are used for outputting current signals, and the radio frequency signal analyzer is used for detecting output radio frequency signals and feeding back the current signals and the radio frequency signals to the upper computer.
Preferably, the plurality of adjustable linear voltage-stabilized power supplies include a first adjustable linear voltage-stabilized power supply, a second adjustable linear voltage-stabilized power supply and a third adjustable linear voltage-stabilized power supply; the input end of the first adjustable linear voltage-stabilizing power supply, the input end of the second adjustable linear voltage-stabilizing power supply and the input end of the third adjustable linear voltage-stabilizing power supply are respectively connected with the upper computer and the direct current power supply; the output end of the first adjustable linear voltage-stabilizing power supply, the output end of the second adjustable linear voltage-stabilizing power supply and the output end of the third adjustable linear voltage-stabilizing power supply are respectively connected with a plurality of analog switches.
Preferably, the plurality of analog switches include a first analog switch, a second analog switch and a third analog switch, and an output end of the first adjustable linear voltage-stabilizing power supply, an output end of the second adjustable linear voltage-stabilizing power supply and an output end of the third adjustable linear voltage-stabilizing power supply are respectively connected with an input end of the first analog switch, an input end of the second analog switch and an input end of the current detection unit; the output end of the current detection unit is connected with the third analog switch;
the input end of the radio frequency chip module comprises a first input end, a second input end, a third input end and a fourth input end, wherein the output end of the first analog switch, the output end of the second analog switch and the output end of the third analog switch are respectively connected with the first input end, the second input end and the third input end, and the fourth input end is connected with the radio frequency signal source;
and the output end of the radio frequency chip module is connected with the radio frequency signal analyzer.
Preferably, the current detection unit is a ammeter.
Preferably, the upper computer is connected with the plurality of analog switches in a GPIO control mode.
Preferably, the first adjustable linear voltage-stabilized power supply, the second adjustable linear voltage-stabilized power supply and the third adjustable linear voltage-stabilized power supply are respectively connected with the upper computer in an MIPI control mode.
Preferably, the upper computer is connected with the radio frequency signal source through a data bus.
Preferably, the data bus includes a GPIB line, a network line, and a USB line.
In a second aspect, an embodiment of the present invention provides a method for debugging a radio frequency chip module, where the method for debugging a radio frequency chip module is based on the device for debugging a radio frequency chip module, and the method for debugging a radio frequency chip module includes the following steps:
s1, setting the debugging board to be in a disabled state; the debugging board receives GPIO instructions output by the upper computer, sets a plurality of analog switches and the radio frequency signal source to be in a disabled state, and the GPIO instructions comprise GPIO1, GPIO2 and GPIO3;
s2, receiving an MIPI control instruction output by the upper computer through the adjustable linear voltage-stabilized power supply, and respectively adjusting output voltages of the first adjustable linear voltage-stabilized power supply, the second adjustable linear voltage-stabilized power supply and the third adjustable linear voltage-stabilized power supply;
s3, receiving a radio frequency signal sent by the radio frequency signal source through the debugging board; the radio frequency signal source receives a radio frequency instruction sent by the upper computer and completes signal source configuration according to the radio frequency instruction, and the radio frequency signal source outputs the radio frequency signal;
s4, setting the GPIO1 and the GPIO2 in a disabled state;
s5, acquiring the radio frequency signals output by the debugging connection module through the radio frequency signal analyzer; the radio frequency signal analyzer receives the command sent by the upper computer, so that the radio frequency signal analyzer is in a signal capturing state, and captures the radio frequency signal output by the debugging connection module in real time;
s6, according to the GPIO3 in an enabling state, the third analog switch is turned on to supply power to the debugging connection module;
s7, after a first preset time T0, receiving the GPIO2 sent by the upper computer through the debugging board, and controlling the first analog switch and the second analog switch to be opened for outputting bias voltage;
s8, after a second preset time T1, receiving a current measurement request sent by the upper computer through the debugging board, measuring a static current by a ammeter, and transmitting the static current to the upper computer;
s9, after a third preset time T2, receiving a specific radio frequency modulation signal through the debugging board; the specific radio frequency modulation signal is received by the radio frequency signal source and the GPIO3 enabled by the upper computer triggers the radio frequency signal source to send the specific radio frequency modulation signal;
s10, respectively acquiring radio frequency signal indexes and working currents output by the debugging board through the radio frequency signal analyzer and the ammeter, uploading the radio frequency signal indexes and the working currents to the upper computer, and outputting test results by the upper computer.
Preferably, the debugging method further comprises the following steps:
s11, receiving the GPIO instruction sent by the upper computer through the debugging board and performing all disabling;
s12, returning to the S6, and repeating the measurement process in the same state, and obtaining N pieces of statistical data after repeating the measurement for N times, wherein N is a positive integer;
s13, adjusting the output voltage of the first adjustable linear voltage-stabilized power supply and the output voltage of the second adjustable linear voltage-stabilized power supply according to preset output voltage, and returning to the S2;
s14, outputting a test result after all the preset output voltages are tested.
Compared with the prior art, the radio frequency chip module debugging device provided by the invention has the advantages that the debugging connecting module is welded on the debugging board, the output end of the direct current power supply is electrically connected with the debugging board for supplying power to the debugging board, and the upper computer is electrically connected with the debugging connecting module, the radio frequency signal source and the radio frequency signal analyzer respectively; the radio frequency signal source is used for outputting radio frequency signals to the debugging board, and the radio frequency signal analyzer is used for collecting the radio frequency signals and analyzing the radio frequency signals; the debugging connection module comprises a substrate and a debugging PAD arranged on the substrate, the debugging PAD is electrically connected with one end of a debugging bias signal, one end of a plurality of analog switches of the debugging board is respectively connected with an upper computer and an adjustable linear voltage-stabilized power supply, the output voltage of each LDO is set through the upper computer, the second ends of the plurality of analog switches are respectively connected with the other end of the debugging PAD, one end of a current detection unit is connected with the adjustable linear voltage-stabilized power supply, and the other end of the current detection unit is connected with the analog switch; the adjustable linear stabilized power supply is used for outputting a current signal, the radio frequency signal analyzer is used for detecting the output radio frequency signal, and feeding back the current signal and the radio frequency signal to the upper computer; repeatedly measuring the same state for a plurality of times, obtaining a plurality of statistical data, and outputting a test result through an upper computer; therefore, the research and development time cost of the radio frequency chip module can be reduced, and the testing efficiency is improved.
Drawings
For a clearer description of the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the description below are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art, wherein:
fig. 1 is a schematic structural diagram of a radio frequency chip module debugging device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a radio frequency chip module debugging device according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a RF chip module according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a second embodiment of the present invention;
FIG. 5 is a flowchart showing a method for debugging a radio frequency chip module according to an embodiment of the present invention;
fig. 6 is a flowchart II of a method for debugging a radio frequency chip module according to an embodiment of the present invention.
100, a radio frequency chip module debugging device, 1, a radio frequency chip module, 2, a debugging connection module, 21, a substrate, 22, a debugging PAD,3, a direct current power supply, 4, a radio frequency signal source, 5, a radio frequency signal analyzer, 6, a debugging board, 7, an upper computer, 8, a plurality of analog switches, 81, a first analog switch, 82, a second analog switch, 83, a third analog switch, 9, a current detection unit, 10 and an adjustable linear stabilized voltage supply.
Detailed Description
The following description of the technical solutions in the embodiments of the present invention will be clear and complete, and it is obvious that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1-4, an embodiment of the present invention provides a radio frequency chip module debugging device 100, configured to debug a radio frequency chip module 1, where the radio frequency chip module 1 includes a power amplification chip (PA DIE) and a bias chip (LOGIC DIE), the power amplification chip is provided with debugging bias signals (A3 and B3), the radio frequency chip module debugging device 100 includes a debugging connection module 2, a dc power supply 3, a radio frequency signal source 4, a radio frequency signal analyzer 5, a debugging board 6 and an upper computer 7, the debugging connection module 2 is welded on the debugging board 6 and forms an electrical connection, an output end of the dc power supply 3 is electrically connected with the debugging board 6 to supply power to the debugging board 6, and the upper computer 7 is electrically connected with the debugging connection module 2, the radio frequency signal source 4 and the radio frequency signal analyzer 5, respectively; the radio frequency signal source 4 is configured to output a radio frequency signal to the debug board 6, and the radio frequency signal analyzer 5 is configured to collect and analyze the radio frequency signal.
The debug connection module 2 comprises a substrate 21 and debug PADs 22 arranged on the substrate 21, wherein a first end of the debug PADs 22 is electrically connected with a first end of the debug bias signals, the number of the debug bias signals is n, the number of the debug PADs 22 is 2n, and n is a positive integer; and 2n debug PADs 22 are connected in pairs. And the second end of the debugging bias signal is electrically connected with the power amplification chip.
Specifically, a plurality of debug PADs 22 are arranged on the substrate 21, and the debug PADs 22 are designed in pairs, so that the bias voltage automatic debugging function is realized. When the number of the debug bias signals is 2, such as A3 and B3, the number of the debug PAD22 is 4, such as A1 and A2 group, and a B1 and B2 group, the A1 and the A2 are electrically connected through the wiring on the substrate 21, and similarly the B1 and the B2 are electrically connected through the wiring on the substrate 21. A2 and A3 are connected by A4 connection line, B2 and B3 are connected by B4 connection line, wherein A1 and B1 are used for connecting with external debugging board 6, A2 and B2 are used for connecting with bias signal input of A3 and B3 respectively.
The debugging board 6 comprises a plurality of analog switches 8, a plurality of adjustable linear stabilized voltage supplies 10 and a current detection unit 9; the first ends of the plurality of analog switches 8 are respectively connected with the upper computer 7 and the plurality of adjustable linear stabilized voltage supplies 10, the second ends of the plurality of analog switches 8 are respectively connected with the second ends of the debugging PAD22, the first ends of the current detection units 9 are connected with the adjustable linear stabilized voltage supplies 10, and the second ends of the current detection units 9 are connected with the plurality of analog switches 8; the adjustable linear stabilized power supply is used for outputting a current signal; the radio frequency signal analyzer 5 is configured to detect an output radio frequency signal, and feed back the current signal and the radio frequency signal to the host computer 7.
Specifically, the LDO output voltage of each adjustable linear voltage-stabilized power supply 10 is set through the upper computer 7, a plurality of statistical data are obtained after repeated measurement is performed on the same state for a plurality of times, and a test result is output through the upper computer 7; therefore, the research and development time cost of the radio frequency chip module 1 can be reduced, and the test efficiency is improved.
In this embodiment, the adjustable linear voltage-stabilized power supply 10 includes a first adjustable linear voltage-stabilized power supply LDO1, a second adjustable linear voltage-stabilized power supply LDO2, and a third adjustable linear voltage-stabilized power supply LDO3; the input end of the first adjustable linear voltage-stabilized power supply LDO1, the input end of the second adjustable linear voltage-stabilized power supply LDO2 and the input end of the third adjustable linear voltage-stabilized power supply LDO3 are respectively connected with the upper computer 7 and a direct current power supply; the output end of the first adjustable linear voltage-stabilized power supply LDO1, the output end of the second adjustable linear voltage-stabilized power supply LDO2 and the output end of the third adjustable linear voltage-stabilized power supply LDO3 are respectively connected with a plurality of analog switches 8. An external adjustable linear voltage regulator 10 is used to supply dc power to the debug board 6 via a connector on the debug board 6. By dividing the adjustable linear regulated power supply 10 into a first adjustable linear regulated power supply LDO1, a second adjustable linear regulated power supply LDO2 and a third adjustable linear regulated power supply LDO3; the first adjustable linear voltage stabilizing power supply LDO1, the second adjustable linear voltage stabilizing power supply LDO2 and the third adjustable linear voltage stabilizing power supply LDO3 are used for outputting voltages to the analog switches 8, so that voltage output control is conveniently carried out on the debugging connection module 2 through the analog switches 8.
Optionally, the first adjustable linear regulated power supply LDO1 and the second adjustable linear regulated power supply LDO2 are used for providing bias voltage for the radio frequency chip module 1, and the third adjustable linear regulated power supply LDO3 is used for providing main power supply for the debug board 6. Further, the first adjustable linear regulated power supply LDO1 and the second adjustable linear regulated power supply LDO2 do not adopt DC/DC type power supplies, and the third adjustable linear regulated power supply LDO3 can adopt DC/DC type power supplies.
The output voltage range of the first adjustable linear voltage-stabilized power supply LDO1 is 0.7V-1.2V, the output voltage range of the second adjustable linear voltage-stabilized power supply LDO2 is 0.8V-1.3V, and the output voltage range is adjusted on the basis of actual debugging, so that an optimal value can be obtained in the shortest time.
In this embodiment, the plurality of analog switches 8 includes a first analog switch 81, a second analog switch 82, and a third analog switch 83, where an output end of the first adjustable linear voltage regulator LDO1, an output end of the second adjustable linear voltage regulator LDO2, and an output end of the third adjustable linear voltage regulator LDO3 are respectively connected to an input end of the first analog switch 81, an input end of the second analog switch 82, and an input end of the current detection unit 9; the output end of the current detection unit 9 is connected to the third analog switch 83. By connecting the first analog switch 81, the second analog switch 82 and the third analog switch 83 with the upper computer 7 and the direct current power supply 3 respectively, the upper computer 7 outputs independent GPIO control signals, so that the time sequence of the output signals can be controlled more accurately, and the control effect is better.
The input end of the rf chip module 1 includes a first input end, a second input end, a third input end and a fourth input end, the output end of the first analog switch 81, the output end of the second analog switch 82 and the output end of the third analog switch 83 are respectively connected to the first input end, the second input end and the third input end, and the fourth input end is connected to the rf signal source 4; the output end of the radio frequency chip module 1 is connected with the radio frequency signal analyzer 5. The upper computer 7 respectively sends measurement requests to the radio frequency signal analyzer 5 and the ammeter through a data bus; the radio frequency signal analyzer 5 measures the radio frequency signal and uploads the data, and the ammeter measures the operating current and uploads the data.
In this embodiment, the current detection unit 9 is a ammeter. The amplified radio frequency signals are output through the debugging connection module 2 and sent to the external radio frequency signal analyzer 5 through the radio frequency interface of the debugging board 6. The radio frequency signal analyzer 5 measures and uploads the indexes such as the amplitude, the EVM, the frequency spectrum and the like of the signal according to the setting, and the ammeter synchronously measures and uploads the current data. EVM (error vector magnitude) the vector amplitude error is the difference between the theoretical waveform and the actual waveform received, and is the root mean square value of the ratio of the average error vector signal power to the average reference signal power.
In this embodiment, the host computer 7 is connected to the plurality of analog switches 8 by a GPIO control method. The GPIO control mode is a pin of a computer, and the pin can be used for realizing the transmission or the reception of signals. GPIO (General purpose input/output), general purpose input/output interface.
In this embodiment, the first adjustable linear regulated power supply LDO1, the second adjustable linear regulated power supply LDO2, the third adjustable linear regulated power supply LDO3 and the upper computer 7 are respectively connected through an MIPI control mode. The MIPI control mode is used for transmitting data of peripheral devices such as an image sensor and a liquid crystal display, and implementing an image data transmission and receiving function (MIPI REFE, a control interface standard for controlling a radio frequency front end of a mobile terminal), so that the upper computer 7 can conveniently display output voltage values of the first adjustable linear regulated power supply LDO1, the second adjustable linear regulated power supply LDO2 and the third adjustable linear regulated power supply LDO 3. The mobile industry processor interface (Mobile Industry Processor Interface abbreviated MIPI) is an open standard and a specification established for mobile application processors by the MIPI alliance.
In this embodiment, the upper computer 7 is connected to the rf signal source 4 through a data bus.
In this embodiment, the data bus includes a GPIB line, a network line, and a USB line. Among them, the General-purpose interface bus (GPIB-Purpose Interface Bus) is a bus to which devices and computers are connected. Most desktop instruments are connected to a computer via GPIB lines and GPIB interfaces. The network line is used for a transmission network, so that the degree of signal interference can be effectively reduced. The USB cable is used for charging and data transmission of the terminal device.
Example two
Referring to fig. 1-6, an embodiment of the invention provides a method for debugging a radio frequency chip module, which is based on the radio frequency chip module debugging device 100 of the first embodiment, and the debugging method comprises the following steps:
s1, setting a debugging board 6 to be in a disabled state; the debug board 6 receives a GPIO instruction output by the host computer 7, and sets the plurality of analog switches 8 and the radio frequency signal source 4 to a disabled state, where the GPIO instruction includes GPIO1, GPIO2 and GPIO3.
One end of A1 is connected with one end of A2, one end of B1 is connected with one end of B2, before debugging, the connecting wire between the power amplification chip and the bias chip is removed, the connecting wire is connected between the other end of A2 and A3 through an A4 connecting wire, and the other end of B2 is connected with B3 through a B4 connecting wire. After the above-mentioned integral connection is completed, a combination of the radio frequency chip module 1 and the debug connection module 2 is formed, and is welded to the debug board 6.
Specifically, the external adjustable linear voltage-stabilized power supply 10 supplies direct current (VCC) to the debug board 6 through a connection interface. The upper computer 7 outputs a GPIO instruction to enable the analog switches 8 and the radio frequency switches to be in a disabled state.
S2, receiving an MIPI control instruction output by the upper computer 7 through the adjustable linear voltage-stabilized power supply 10, and adjusting the first adjustable linear voltage-stabilized power supply LDO1, the second adjustable linear voltage-stabilized power supply LDO2 and the third adjustable linear voltage-stabilized power supply LDO3 to output voltages respectively.
Specifically, the upper computer 7 sequentially transmits instructions to each adjustable linear voltage-stabilized power supply through the control bus, and sets the output voltage of each adjustable linear voltage-stabilized power supply. The upper computer 7 stores the output voltage range of each stage of adjustable linear voltage-stabilized power supply, such as the output voltage range of 0.7V-1.2V of the first adjustable linear voltage-stabilized power supply LDO1, and the output voltage range of 0.8V-1.3V of the second adjustable linear voltage-stabilized power supply LDO 2; the output voltage range can be adjusted based on actual debugging experience, and the optimal value is obtained in the shortest time.
S3, receiving a radio frequency signal sent by the radio frequency signal source 4 through the debugging board 6; the radio frequency signal source 4 receives a radio frequency instruction sent by the upper computer 7, completes signal source configuration according to the radio frequency instruction, and the radio frequency signal source 4 outputs a radio frequency signal.
Specifically, the upper computer 7 sends an instruction to the external radio frequency signal source 4 through a data bus, so as to complete the configuration of the signal source, and the data bus can be any form such as GPIB, network line, USB, etc.
S4, setting the GPIO1 and the GPIO2 in a disabled state.
S5, acquiring radio frequency signals output by the debugging connection module 2 through the radio frequency signal analyzer 5; the radio frequency signal analyzer 5 receives a command sent by the upper computer 7, so that the radio frequency signal analyzer 5 is in a signal capturing state, and captures the radio frequency signal output by the debugging connection module 2 in real time.
Specifically, the upper computer 7 transmits a command to the external radio frequency signal analyzer 5 through the data bus, so that the signal analyzer is in a signal capturing state.
And S6, according to the GPIO3 in an enabling state, the third analog switch 83 is turned on to supply power to the debugging connection module 2.
S7, after the first preset time T0, the GPIO2 sent by the upper computer 7 is received through the debugging board 6, and the first analog switch 81 and the second analog switch 82 are controlled to be opened for outputting bias voltage.
The first preset time T0 is generally 0us to several tens of us, for example, 0us to 10us,20us,30us, etc., and is specifically selected according to the output power of the radio frequency chip module 1 to be debugged, which will not be described herein.
S8, after the second preset time T1, the debugging board 6 receives a current measurement request sent by the upper computer 7, the ammeter measures the static current, and the static current is returned to the upper computer 7. The static current is the static working current ICQ of the power amplifier, so that the adjustment of the working current of the power amplifier can be supported, the effect of the power amplifier is further optimized, and meanwhile, the bias voltage of the power amplifier can be adjusted.
Wherein the second preset time T1 is greater than the first preset time T0.
S9, after a third preset time T2, receiving a specific radio frequency modulation signal through the debugging board 6; the specific rf modulation signal is received by the rf signal source 4 and the GPIO3 enabled by the host computer 7 triggers the rf signal source 4 to send the specific rf modulation signal.
The third preset time T2 is greater than the first preset time T1.
S10, respectively acquiring radio frequency signal indexes and working currents output by the debugging board 6 through the radio frequency signal analyzer 5 and the ammeter, uploading the radio frequency signal indexes and the working currents to the upper computer 7, and outputting test results by the upper computer 7.
Specifically, the amplified radio frequency signal is output through the debugging connection module 2, and is sent to the external radio frequency signal analyzer 5 through the radio frequency interface of the debugging board 6. The radio frequency signal analyzer 5 measures and uploads the indexes such as the power, EVM, frequency spectrum and the like of the signal according to the setting, and the ammeter synchronously measures and uploads the current data. The upper computer 7 respectively sends measurement requests to the radio frequency signal analyzer 5 and the ammeter through a data bus; the radio frequency signal analyzer 5 measures radio frequency signals and uploads data, the ammeter measures working current and uploads data to the upper computer 7, and the upper computer 7 displays test results.
Through the steps S1-S10, a plurality of statistical data are obtained after repeated measurement is carried out for a plurality of times on the same state, and a test result is output through the upper computer 7; therefore, the research and development time cost of the radio frequency chip module 1 can be reduced, and the test efficiency is improved.
In this embodiment, the debugging method further includes the following steps:
s11, receiving GPIO instructions sent by the upper computer 7 through the debugging board 6 and performing all disabling.
S12, returning to S6, repeating the measurement process in the same state, and obtaining N pieces of statistical data after repeating the measurement for N times, wherein N is a positive integer.
S13, adjusting the output voltage of the first adjustable linear voltage-stabilized power supply LDO1 and the output voltage of the second adjustable linear voltage-stabilized power supply LDO2 according to the preset output voltage, and returning to S2.
S14, outputting a test result after all the preset output voltages are tested.
Specifically, all GPIO states are disabled by the host computer 7. The upper computer 7 returns to S6, and repeats the measurement process in the same state. After repeating the measurement N times, N pieces of statistical data are obtained. The upper computer 7 steps the output voltage of the first adjustable linear regulated power supply LDO1 and the output voltage of the second adjustable linear regulated power supply LDO2 according to the preset steps, and returns to S2. After all the preset output voltages are tested, the upper computer 7 outputs test results. And through multiple measurements, multiple test results are obtained, analysis is carried out according to the multiple test results, and the optimal test result is output, so that the test precision can be improved.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present invention.
Claims (10)
1. The radio frequency chip module debugging device is used for debugging a radio frequency chip module, the radio frequency chip module comprises a power amplification chip and a bias chip, and the power amplification chip is provided with a debugging bias signal, and is characterized by comprising a debugging connection module, a direct current power supply, a radio frequency signal source, a radio frequency signal analyzer, a debugging board and an upper computer, wherein the debugging connection module is welded on the debugging board and forms electric connection, the output end of the direct current power supply is electrically connected with the debugging board and is used for supplying power to the debugging board, and the upper computer is respectively electrically connected with the debugging connection module, the radio frequency signal source and the radio frequency signal analyzer; the radio frequency signal source is used for outputting radio frequency signals to the debugging board, and the radio frequency signal analyzer is used for collecting and analyzing the radio frequency signals;
the debugging connection module comprises a substrate and debugging PADs arranged on the substrate, wherein the first ends of the debugging PADs are electrically connected with the first ends of the debugging offset signals, the debugging offset signals comprise n, the debugging PADs comprise 2n, and n is a positive integer; two-by-two connection is carried out between 2n debugging PADs;
the debugging board comprises a plurality of analog switches, a plurality of adjustable linear stabilized voltage supplies and a current detection unit; the first ends of the analog switches are respectively connected with the upper computer and the adjustable linear stabilized power supplies, the second ends of the analog switches are respectively connected with the second ends of the debugging PADs, the first ends of the current detection units are connected with the adjustable linear stabilized power supplies, the second ends of the current detection units are connected with the analog switches, the adjustable linear stabilized power supplies are used for outputting current signals, and the radio frequency signal analyzer is used for detecting output radio frequency signals and feeding back the current signals and the radio frequency signals to the upper computer.
2. The radio frequency chip module debugging device according to claim 1, wherein the plurality of adjustable linear voltage-stabilized power supplies comprises a first adjustable linear voltage-stabilized power supply, a second adjustable linear voltage-stabilized power supply and a third adjustable linear voltage-stabilized power supply; the input end of the first adjustable linear voltage-stabilizing power supply, the input end of the second adjustable linear voltage-stabilizing power supply and the input end of the third adjustable linear voltage-stabilizing power supply are respectively connected with the upper computer and the direct current power supply; the output end of the first adjustable linear voltage-stabilizing power supply, the output end of the second adjustable linear voltage-stabilizing power supply and the output end of the third adjustable linear voltage-stabilizing power supply are respectively connected with a plurality of analog switches.
3. The device for debugging a radio frequency chip module according to claim 2, wherein the plurality of analog switches comprises a first analog switch, a second analog switch and a third analog switch, and the output end of the first adjustable linear voltage-stabilized power supply, the output end of the second adjustable linear voltage-stabilized power supply and the output end of the third adjustable linear voltage-stabilized power supply are respectively connected with the input end of the first analog switch, the input end of the second analog switch and the input end of the current detection unit; the output end of the current detection unit is connected with the third analog switch;
the input end of the radio frequency chip module comprises a first input end, a second input end, a third input end and a fourth input end, wherein the output end of the first analog switch, the output end of the second analog switch and the output end of the third analog switch are respectively connected with the first input end, the second input end and the third input end, and the fourth input end is connected with the radio frequency signal source;
and the output end of the radio frequency chip module is connected with the radio frequency signal analyzer.
4. The apparatus of claim 1, wherein the current detecting unit is a ammeter.
5. The device for debugging a radio frequency chip module according to claim 1, wherein the upper computer is connected with the plurality of analog switches in a GPIO control manner.
6. The device for debugging a radio frequency chip module according to claim 2, wherein the first adjustable linear voltage-stabilized power supply, the second adjustable linear voltage-stabilized power supply and the third adjustable linear voltage-stabilized power supply are respectively connected with the upper computer in an MIPI control mode.
7. The apparatus of claim 1, wherein the host computer is connected to the rf signal source via a data bus.
8. The radio frequency chip module debugging apparatus of claim 7, wherein the data bus comprises a GPIB line, a network line and a USB line.
9. A radio frequency chip module debugging method, characterized in that the radio frequency chip module debugging method is based on the radio frequency chip module debugging device according to any one of claims 1-8, the debugging method comprising the following steps:
s1, setting the debugging board to be in a disabled state; the debugging board receives GPIO instructions output by the upper computer, sets a plurality of analog switches and the radio frequency signal source to be in a disabled state, and the GPIO instructions comprise GPIO1, GPIO2 and GPIO3;
s2, the adjustable linear voltage-stabilized power supplies comprise a first adjustable linear voltage-stabilized power supply, a second adjustable linear voltage-stabilized power supply and a third adjustable linear voltage-stabilized power supply; the input end of the first adjustable linear voltage-stabilizing power supply, the input end of the second adjustable linear voltage-stabilizing power supply and the input end of the third adjustable linear voltage-stabilizing power supply are respectively connected with the upper computer and the direct current power supply; the output end of the first adjustable linear voltage-stabilizing power supply, the output end of the second adjustable linear voltage-stabilizing power supply and the output end of the third adjustable linear voltage-stabilizing power supply are respectively connected with a plurality of analog switches;
the plurality of analog switches comprise a first analog switch, a second analog switch and a third analog switch, and the output end of the first adjustable linear voltage-stabilizing power supply, the output end of the second adjustable linear voltage-stabilizing power supply and the output end of the third adjustable linear voltage-stabilizing power supply are respectively connected with the input end of the first analog switch, the input end of the second analog switch and the input end of the current detection unit; the output end of the current detection unit is connected with the third analog switch; the input end of the radio frequency chip module comprises a first input end, a second input end, a third input end and a fourth input end, wherein the output end of the first analog switch, the output end of the second analog switch and the output end of the third analog switch are respectively connected with the first input end, the second input end and the third input end, and the fourth input end is connected with the radio frequency signal source; the output end of the radio frequency chip module is connected with the radio frequency signal analyzer;
receiving an MIPI control instruction output by the upper computer through the adjustable linear voltage-stabilized power supply, and respectively adjusting output voltages of the first adjustable linear voltage-stabilized power supply, the second adjustable linear voltage-stabilized power supply and the third adjustable linear voltage-stabilized power supply;
s3, receiving a radio frequency signal sent by the radio frequency signal source through the debugging board; the radio frequency signal source receives a radio frequency instruction sent by the upper computer and completes signal source configuration according to the radio frequency instruction, and the radio frequency signal source outputs the radio frequency signal;
s4, setting the GPIO1 and the GPIO2 in a disabled state;
s5, acquiring the radio frequency signals output by the debugging connection module through the radio frequency signal analyzer; the radio frequency signal analyzer receives the command sent by the upper computer, so that the radio frequency signal analyzer is in a signal capturing state, and captures the radio frequency signal output by the debugging connection module in real time;
s6, according to the GPIO3 in an enabling state, the third analog switch is turned on to supply power to the debugging connection module;
s7, after a first preset time T0, receiving the GPIO2 sent by the upper computer through the debugging board, and controlling the first analog switch and the second analog switch to be opened for outputting bias voltage;
s8, after a second preset time T1, receiving a current measurement request sent by the upper computer through the debugging board, measuring a static current by a ammeter, and transmitting the static current to the upper computer;
s9, after a third preset time T2, receiving a specific radio frequency modulation signal through the debugging board; the specific radio frequency modulation signal is received by the radio frequency signal source and the GPIO3 enabled by the upper computer triggers the radio frequency signal source to send the specific radio frequency modulation signal;
s10, respectively acquiring radio frequency signal indexes and working currents output by the debugging board through the radio frequency signal analyzer and the ammeter, uploading the radio frequency signal indexes and the working currents to the upper computer, and outputting test results by the upper computer.
10. The method for debugging a radio frequency chip module according to claim 9, wherein the debugging method further comprises the steps of:
s11, receiving the GPIO instruction sent by the upper computer through the debugging board and performing all disabling;
s12, returning to the S6, and repeating the measurement process in the same state, and obtaining N pieces of statistical data after repeating the measurement for N times, wherein N is a positive integer;
s13, adjusting the output voltage of the first adjustable linear voltage-stabilized power supply and the output voltage of the second adjustable linear voltage-stabilized power supply according to preset output voltage, and returning to the S2;
s14, outputting a test result after all the preset output voltages are tested.
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| US8467735B2 (en) * | 2009-03-23 | 2013-06-18 | Apple Inc. | Methods and apparatus for testing and integration of modules within an electronic device |
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| CN1841971A (en) * | 2005-03-28 | 2006-10-04 | 大唐移动通信设备有限公司 | Method and system for debugging time-division duplex system power amplifier linearity |
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