CN116469973A - LED epitaxial wafer with high internal quantum efficiency, preparation method thereof and LED chip - Google Patents
LED epitaxial wafer with high internal quantum efficiency, preparation method thereof and LED chip Download PDFInfo
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- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
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- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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Abstract
The invention discloses an LED epitaxial wafer with high internal quantum efficiency, a preparation method thereof and an LED chip, wherein the epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active area luminous layer, an electron blocking layer and a P-type semiconductor layer which are sequentially laminated on the substrate; the N-type semiconductor device comprises an N-type semiconductor layer, an active region luminescent layer and an N-type semiconductor layer, wherein the N-type semiconductor layer is arranged in the N-type semiconductor layer, or the N-type semiconductor layer is arranged between the N-type semiconductor layer and the active region luminescent layer, and is of a periodically laminated superlattice structure, each period comprises a first insert sub-layer, a second insert sub-layer, a third insert sub-layer and a fourth insert sub-layer which are arranged in a laminated mode, the first insert sub-layer is an AlN layer, the second insert sub-layer and the fourth insert sub-layer are all AlGaN layers, and the third insert sub-layer is a GaN layer.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to an LED epitaxial wafer with high internal quantum efficiency, a preparation method thereof and an LED chip.
Background
Ultraviolet LEDs (UV LEDs) are mainly used in biomedical, anti-counterfeit, purification (water, air, etc.), computer data storage, military, etc. With the development of technology, new application can be continuously appeared to replace the original technology and products, and ultraviolet LEDs have wide market application prospects, for example, ultraviolet LED phototherapy instruments are popular medical instruments in the future, but the technology is still in a growing period.
The development of ultraviolet LEDs has faced a number of unique technical difficulties compared to GaN-based blue LEDs, such as: epitaxial growth of high Al composition AlGaN material is difficult, and in general, the higher the Al composition is, the lower the crystal quality is, and the dislocation density is generally 10 9 -10 10 /cm 2 Or even higher; compared with GaN, the AlGaN material is more difficult to dope, whether n-type doping or p-type doping is carried out, the conductivity of an epitaxial layer is rapidly reduced along with the increase of Al components, especially the doping of p-AlGaN is troublesome, the activation efficiency of a dopant Mg is low, and the defects of holes, the conductivity and the luminous efficiency are sharply reduced.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide an LED epitaxial wafer with high internal quantum efficiency, a preparation method thereof and an LED chip, and the LED epitaxial wafer can play roles in annihilation dislocation extension and defect reduction by arranging an N-type insertion layer, particularly a plurality of ALN/AlGaN/GaN/AlGaN periodic superlattice structures in or behind an N-type semiconductor, so that the internal quantum efficiency of the epitaxial wafer can be effectively improved, and finally the luminous efficiency is improved.
The first aspect of the present invention provides an LED epitaxial wafer with high internal quantum efficiency, including a substrate, the epitaxial wafer further including:
an N-type semiconductor layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially laminated on the substrate;
the N-type semiconductor device comprises an active region and an N-type semiconductor layer, wherein the N-type semiconductor layer is internally provided with an N-type insertion layer, or the N-type insertion layer is also arranged between the N-type semiconductor layer and the active region light-emitting layer, the N-type insertion layer is of a superlattice structure which is periodically laminated, each period of the N-type insertion layer comprises a first insertion sub-layer, a second insertion sub-layer, a third insertion sub-layer and a fourth insertion sub-layer which are laminated, the first insertion sub-layer is an AlN layer, the second insertion sub-layer and the fourth insertion sub-layer are all AlGaN layers, and the third insertion sub-layer is a GaN layer.
According to an aspect of the foregoing technical solution, in each period of the N-type insertion layer, thicknesses of the first insertion sub-layer and the third insertion sub-layer are 1nm to 5nm, and thicknesses of the second insertion sub-layer and the fourth insertion sub-layer are 5nm to 25nm.
According to an aspect of the above technical solution, the number of periods of the N-type insertion layer is 16, and the thickness of the N-type insertion layer is 50nm-1000nm.
According to an aspect of the above technical solution, the N-type insertion layer is doped with Si element at a doping concentration of 5×10 18 atoms/cm 3 -1x10 20 atoms/cm 3 。
According to an aspect of the above technical solution, the ratio of Al component in the second insert sub-layer to the ratio of Al component in the fourth insert sub-layer are both 40% -60%.
According to an aspect of the above technical solution, the epitaxial wafer further includes a high-temperature AlN layer and an AlN transition layer, the high-temperature AlN layer and the AlN transition layer are sequentially stacked on the substrate, and the N-type semiconductor layer is stacked on the AlN transition layer.
According to an aspect of the above technical solution, the Al composition in the AlN transition layer decreases from the high-temperature AlN layer to the N-type semiconductor layer, and the Al composition decreases from 100% to 50%.
According to an aspect of the above technical solution, the N-type semiconductor layer is N-type doped Al x Ga 1-x An N layer, wherein the electron blocking layer is Al y Ga 1-y An N layer, wherein the P-type semiconductor layer is P-type doped Al z Ga 1-z And an N layer, wherein the Al component in the P-type semiconductor layer is higher than the Al component in the active region light-emitting layer.
The second aspect of the present invention provides a method for preparing an LED epitaxial wafer with high internal quantum efficiency, where the method is used to prepare the LED epitaxial wafer in the above technical solution, and the method includes:
providing a substrate;
sequentially manufacturing a high-temperature AlN layer and an AlN transition layer on the substrate;
sequentially manufacturing an N-type semiconductor layer comprising an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer; or alternatively
Sequentially manufacturing an N-type semiconductor layer, an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer;
the N-type insertion layers are of periodically laminated superlattice structures, each period of the N-type insertion layers comprises a first insertion sub-layer, a second insertion sub-layer, a third insertion sub-layer and a fourth insertion sub-layer which are arranged in a laminated mode, the first insertion sub-layer is an AlN layer, the second insertion sub-layer and the fourth insertion sub-layer are all AlGaN layers, and the third insertion sub-layer is a GaN layer.
The third aspect of the present invention provides an LED chip, where the LED chip includes the LED epitaxial wafer described in the above technical solution.
Compared with the prior art, the LED epitaxial wafer with high internal quantum efficiency and the preparation method thereof, and the LED chip have the beneficial effects that:
through setting up N type inserted layer in N type semiconductor inside or afterwards, this N type inserted layer is the superlattice structure of a plurality of ALN/AlGaN/GaN/AlGaN cycle, can play the electric current extension, reduce electron migration efficiency, prevent the effect of electron overflow, thereby promote electron and hole's radiation recombination efficiency, ageing performance and reduction operating voltage can be improved simultaneously, material through three kinds of different lattice material constants carries out alternate growth, can fine control tensile stress and compressive stress's regulation and control, play good stress release effect, can play annihilation dislocation extension, reduce the effect of defect, thereby can effectually promote epitaxial wafer's internal quantum efficiency, finally promote luminous efficacy.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic structural diagram of an LED epitaxial wafer according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of an N-type semiconductor layer and an N-type insertion layer in an epitaxial wafer according to a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of an active region light emitting layer in an epitaxial wafer according to a first embodiment of the present invention;
fig. 4 is a flow chart of a method for manufacturing an LED epitaxial wafer according to the first embodiment of the present invention;
fig. 5 is a schematic structural diagram of an LED epitaxial wafer according to an eighth embodiment of the present invention;
fig. 6 is a schematic structural diagram of an N-type semiconductor layer and an N-type insertion layer in an epitaxial wafer according to an eighth embodiment of the present invention;
fig. 7 is a schematic flow chart of a method for preparing an LED epitaxial wafer according to an eighth embodiment of the present invention;
description of the drawings:
the semiconductor device comprises a substrate 100, a high-temperature AlN layer 200, an AlN transition layer 300, an N-type semiconductor layer 400, a first N-type semiconductor sublayer 401, a second N-type semiconductor sublayer 402, an N-type insertion layer 500, a first insertion sublayer 501, a second insertion sublayer 502, a third insertion sublayer 503, a fourth insertion sublayer 504, an active region light-emitting layer 600, an AlGaN quantum well layer 601, an AlGaN quantum barrier layer 602, an electron blocking layer 700 and a P-type semiconductor layer 800.
Detailed Description
In order to make the objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The first aspect of the present invention provides an LED epitaxial wafer with high internal quantum efficiency, including a substrate, the epitaxial wafer further including:
an N-type semiconductor layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially laminated on the substrate;
the N-type semiconductor device comprises an active region and an N-type semiconductor layer, wherein the N-type semiconductor layer is internally provided with an N-type insertion layer, or the N-type insertion layer is also arranged between the N-type semiconductor layer and the active region light-emitting layer, the N-type insertion layer is of a superlattice structure which is periodically laminated, each period of the N-type insertion layer comprises a first insertion sub-layer, a second insertion sub-layer, a third insertion sub-layer and a fourth insertion sub-layer which are laminated, the first insertion sub-layer is an AlN layer, the second insertion sub-layer and the fourth insertion sub-layer are all AlGaN layers, and the third insertion sub-layer is a GaN layer.
Further, in each period of the N-type insertion layer, the thicknesses of the first insertion sub-layer and the third insertion sub-layer are 1nm-5nm, and the thicknesses of the second insertion sub-layer and the fourth insertion sub-layer are 5nm-25nm.
Further, the number of cycles of the N-type insertion layer is 16, and the thickness of the N-type insertion layer is 50nm-1000nm.
Further, the N-type insertion layer is doped with Si element with doping concentration of 5x10 18 atoms/cm 3 -1x10 20 atoms/cm 3 。
Further, the second insert sub-layer and the fourth insert sub-layer both have an Al composition of 40% -60%.
Furthermore, the epitaxial wafer further comprises a high-temperature AlN layer and an AlN transition layer, the high-temperature AlN layer and the AlN transition layer are sequentially laminated on the substrate, and the N-type semiconductor layer is laminated on the AlN transition layer.
Further, the Al component in the AlN transition layer is gradually decreased from the high-temperature AlN layer to the N-type semiconductor layer, and the Al component is gradually decreased from 100% to 50%.
Further, the N-type semiconductor layer is N-type doped Al x Ga 1-x An N layer, wherein the electron blocking layer is Al y Ga 1-y An N layer, wherein the P-type semiconductor layer is P-type doped Al z Ga 1-z And an N layer, wherein the Al component in the P-type semiconductor layer is higher than the Al component in the active region light-emitting layer.
The second aspect of the present invention provides a method for preparing an LED epitaxial wafer with high internal quantum efficiency, where the method is used to prepare the LED epitaxial wafer in the above technical solution, and the method includes:
providing a substrate;
sequentially manufacturing a high-temperature AlN layer and an AlN transition layer on the substrate;
sequentially manufacturing an N-type semiconductor layer comprising an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer; or alternatively
Sequentially manufacturing an N-type semiconductor layer, an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer;
the N-type insertion layers are of periodically laminated superlattice structures, each period of the N-type insertion layers comprises a first insertion sub-layer, a second insertion sub-layer, a third insertion sub-layer and a fourth insertion sub-layer which are arranged in a laminated mode, the first insertion sub-layer is an AlN layer, the second insertion sub-layer and the fourth insertion sub-layer are all AlGaN layers, and the third insertion sub-layer is a GaN layer.
The third aspect of the present invention provides an LED chip, where the LED chip includes the LED epitaxial wafer described in the above technical solution.
Compared with the prior art, the LED epitaxial wafer with high internal quantum efficiency and the preparation method thereof, and the LED chip have the beneficial effects that:
through setting up N type inserted layer in N type semiconductor inside or afterwards, this N type inserted layer is the superlattice structure of a plurality of ALN/AlGaN/GaN/AlGaN cycle, can play the electric current extension, reduce electron migration efficiency, prevent the effect of electron overflow, thereby promote electron and hole's radiation recombination efficiency, ageing performance and reduction operating voltage can be improved simultaneously, material through three kinds of different lattice material constants carries out alternate growth, can fine control tensile stress and compressive stress's regulation and control, play good stress release effect, can play annihilation dislocation extension, reduce the effect of defect, thereby can effectually promote epitaxial wafer's internal quantum efficiency, finally promote luminous efficacy.
Example 1
The first embodiment of the present invention provides an LED epitaxial wafer with high internal quantum efficiency, referring to fig. 1 to 3, which includes a substrate 100, and a high temperature AlN layer 200, an AlN transition layer 300, an N-type semiconductor layer 400, an active region light emitting layer 600, an electron blocking layer 700, and a P-type semiconductor layer 800 sequentially stacked on the substrate 100.
Wherein, an N-type insertion layer 500 is disposed in the N-type semiconductor layer 400.
Specifically, the N-type insertion layer 500 is a superlattice structure with a plurality of ALN/AlGaN/GaN/AlGaN periods, and each period of the N-type insertion layer 500 includes a first insertion sub-layer 501, a second insertion sub-layer 502, a third insertion sub-layer 503 and a fourth insertion sub-layer 504, where the first insertion sub-layer 501 is an ALN layer, the second insertion sub-layer 502 and the fourth insertion sub-layer 504 are AlGaN layers, and the third insertion sub-layer 503 is a GaN layer.
In each period of the N-type insertion layer 500, the thicknesses of the first insertion sub-layer 501 and the third insertion sub-layer 503 are 5nm, the thicknesses of the second insertion sub-layer 502 and the fourth insertion sub-layer 504 are 25nm, and the total thickness of the N-type insertion layer 500 is 16x (5+25) x2=960 nm when the N-type insertion layer 500 includes 16 periods.
Wherein the N-type insertion layer 500 is doped with Si element with a doping concentration of 5x10 18 atoms/cm 3 . And the second insert sub-layer 502 and the fourth insert sub-layer 504 each have an Al composition of 50%.
Wherein the Al composition in the AlN transition layer 300 decreases from the high temperature AlN layer 200 to the N-type semiconductor layer 400, and the Al composition decreases from 100% to 50%.
Wherein the N-type semiconductor layer 400 is N-type doped Al x Ga 1-x N layer, electron blocking layer 700 is Al y Ga 1-y N layer and P type semiconductor layer 800 are P type doped Al z Ga 1-z An N layer, and an Al composition in the P-type semiconductor layer 800 is higher than that in the active region light emitting layer 600.
Referring to fig. 4, the method for preparing the LED epitaxial wafer with high internal quantum efficiency in the present embodiment includes the following steps S11-S13:
step S11, providing a substrate;
step S12, sequentially manufacturing a high-temperature AlN layer and an AlN transition layer on the substrate;
and S13, sequentially manufacturing an N-type semiconductor layer comprising an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer.
The preparation method of the LED epitaxial wafer with high internal quantum efficiency shown in the embodiment specifically comprises the following steps:
(1) A silicon substrate is provided and loaded into a MOCVD reactor.
(2) Growing a high-temperature AlN layer on a silicon substrate;
specifically, the high temperature AlN layer 200 was grown in MOCVD equipment at 1250℃under a growth pressure of 50mbar and a growth thickness of 1.5. Mu.m. In lifeIn the long process, TMAL and NH are introduced into the MOCVD reaction cavity 3 An AlN film is prepared by a chemical vapor deposition method to obtain an AlN layer, and the high-temperature AlN layer 200 is used to release lattice mismatch and thermal mismatch between the silicon substrate 100 and AlGaN material.
If the AlN layer is processed by a common growth method, cracks appear. Thus, in the present embodiment, the high temperature AlN layer 200 will NH in a low pressure and high temperature environment 3 Introducing MOCVD reaction chamber in pulse mode, i.e. continuously introducing MO source (TMAL source and TMGa source) while growing AlN layer, and NH 3 Intermittent introduction of pulses into the reaction chamber, in particular NH 3 The AlN layer with better crystal quality can be obtained by intermittently introducing the reaction cavity for 30s and 10 s.
(3) Growing an AlN transition layer on the high-temperature AlN layer;
specifically, when the AlN transition layer 300 is grown, the MOCVD reaction chamber keeps the same growth pressure of 50mbar and growth temperature of 1250 DEG, the AlN transition layer 300 is transited in a gradual change mode, the Al component is gradually decreased from 100% to 50%, and the thickness of the transition layer is 500nm.
(4) Growing an N-type semiconductor layer on the AlN transition layer;
specifically, the N-type semiconductor layer 400 is grown after the AlN transition layer 300. The dopant of the N-type semiconductor layer 400 may be Si to serve as an electron supply layer, and the doping concentration of the N-type semiconductor layer 400 may be 1×10 19 atoms/cm 3 . In the growth process of the N-type semiconductor layer 400, the temperature in the MOCVD reaction chamber is controlled to be reduced to 1100 ℃, and the Al composition is 50%, so that the N-type semiconductor layer 400 of 1.5um is grown. Note that the N-type semiconductor layer 400 has a partial structure, and is not the complete structure of the N-type semiconductor layer 400.
Further, after the N-type semiconductor layer 400 is grown to 1.5 μm, an N-type insertion layer 500 is grown, where the N-type insertion layer 500 includes a first insertion sub-layer 501, a second insertion sub-layer 502, a third insertion sub-layer 503, and a fourth insertion sub-layer 504, the first insertion sub-layer 501 is an AlN layer, the second insertion sub-layer 502 and the fourth insertion sub-layer 504 are AlGaN layers, and the third insertion sub-layer 503 is a GaN layer. During the growth of the N-type interposer 500, the first interposer sub-layer 501 isAlN layer growth temperature 1100 ℃, NH 3 The aeration rate was 10L/min and the growth pressure was 50mbar.
The specific growth mode of the N-type insertion layer 500 is as follows: closing a TMGa source of the MOCVD reaction cavity, wherein the reaction time is 5s, and growing to obtain a first insert sub-layer 501, namely an AlN layer, and the growth thickness is 5nm; then TMGa is introduced at the same temperature, and a second insert sub-layer 502, namely an AlGaN layer, is obtained through growth, the growth thickness is 50nm, and the components and the doping are consistent with those of the N-type semiconductor layer 400; closing TMGa and TMAL sources, cooling to 1000 ℃, then introducing the TMGa sources, and growing to obtain a third insert sub-layer 503, namely a GaN layer, wherein the growth thickness is 5nm; then turning on TMAL source and raising temperature to 1100 deg.C at the same time, growing to obtain fourth insert sub-layer 504, namely ALGaN layer, with thickness of 5nm, and composition and doping consistent with N-type semiconductor layer 400.
Further, the growth was continued for 15 cycles in accordance with the above-described growth method, to obtain an N-type insertion layer 500, for a total of 16 cycles, and the thickness of the N-type insertion layer 500 was 1um.
Further, the N-type semiconductor layer 400 of 0.5um is continuously grown according to the above-mentioned growth method, and the complete N-type semiconductor layer 400 is obtained.
In other words, in this embodiment, the N-type insertion layer 500 is disposed in the N-type semiconductor layer 400, and the N-type insertion layer 500 forms two sub-layers of the N-type semiconductor layer 400, namely, the first N-type semiconductor sub-layer 401 and the second N-type semiconductor sub-layer 402, and for convenience of description, the sub-layer adjacent to the AlN transition layer 300 is regarded as the first N-type semiconductor sub-layer 401, and the other is regarded as the second N-type semiconductor sub-layer 402, and the N-type insertion layer 500 is disposed between the first N-type semiconductor sub-layer 401 and the second N-type semiconductor sub-layer 402.
(5) Growing an active region light emitting layer on the N-type semiconductor layer;
specifically, the active light emitting layer is a periodic structure of an AlGaN quantum well layer 601 and an AlGaN quantum barrier layer 602 that are alternately grown, wherein an Al composition in the AlGaN quantum well layer 601 affects a light emitting wavelength of the epitaxial wafer, and the Al composition of the AlGaN quantum well layer 601 is lower than that of the AlGaN quantum barrier layer 602. In this embodiment, the active light emitting layer is grown in a cycle of 5 cycles, the growth temperature of the active light emitting layer is 1080 ℃, the thickness of the AlGaN quantum well layer 601 is 2nm, the al composition is 35%, the thickness of the AlGaN quantum barrier layer 602 is 12nm, and the al composition is 50%.
(6) Growing an electron blocking layer on the active region light emitting layer;
specifically, an electron blocking layer 700, i.e., an EBL layer, was grown on the active region light emitting layer 600, the electron blocking layer 700 was grown at 1100 ℃ and a thickness of 25nm, and the Al composition in the electron blocking layer 700 was 65%.
(7) Growing a P-type semiconductor layer on the light-emitting layer of the active region, and controlling the P-type semiconductor layer to cover the electron blocking layer;
specifically, the P-type semiconductor layer 800 is grown after the active layer. The dopant of the P-type semiconductor layer 800 is Mg, specifically P-AL z Ga 1-z The N material is prepared, the Al component accounts for 30% of the P-type semiconductor layer 800, the growth thickness is 200nm, and the doping concentration of Mg is 5x10 19 atoms/cm 3 。
In the present embodiment, in the preparation process of the LED epitaxial wafer with high internal quantum efficiency, trimethylgallium (TMGa) or Ga source is used to obtain high-purity ammonia (NH 3 ) As N source, high purity H 2 As carrier gas, trimethylaluminum (TMAL) is used as Al source, and silane (H) is used as N-type dopant 4 Si), the P-type dopant is magnesium Cyclopentadienyl (CP) 2 Mg）。
Example two
The LED epitaxial wafer with high internal quantum efficiency provided by the second embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the first embodiment, and is different from the first embodiment in that:
in this embodiment, in each period of the N-shaped insertion layer, the thicknesses of the first insertion sub-layer and the third insertion sub-layer are 3nm, the thicknesses of the second insertion sub-layer and the fourth insertion sub-layer are 15nm, and the total thickness of the N-shaped insertion layer is 16x (1+5) x2=192 nm.
Example III
The LED epitaxial wafer with high internal quantum efficiency provided by the third embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the first embodiment, and is different from the first embodiment in that:
in this embodiment, in each period of the N-shaped insertion layer, the thicknesses of the first insertion sub-layer and the third insertion sub-layer are 5nm, the thicknesses of the second insertion sub-layer and the fourth insertion sub-layer are 25nm, and the total thickness of the N-shaped insertion layer is 16x (3+15) x 2=576 nm.
Example IV
The LED epitaxial wafer with high internal quantum efficiency provided by the fourth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the first embodiment in that:
in the present embodiment, the Si doping concentration of the N-type insertion layer is 1×10 19 atoms/cm 3 。
Example five
The LED epitaxial wafer with high internal quantum efficiency provided by the fifth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the first embodiment in that:
in the present embodiment, the N-type insertion layer has a Si doping concentration of 5×10 19 atoms/cm 3 。
Example six
The LED epitaxial wafer with high internal quantum efficiency provided by the sixth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the first embodiment in that:
in this embodiment, in each period of the N-type insertion layer, the Al composition is 50% in the second insertion sub-layer and the fourth insertion sub-layer.
Example seven
The LED epitaxial wafer with high internal quantum efficiency provided by the seventh embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the first embodiment in that:
in this embodiment, in each period of the N-type insertion layer, the Al composition is 60% in the second insertion sub-layer and the fourth insertion sub-layer.
Example eight
An eighth embodiment of the present invention provides an LED epitaxial wafer with high internal quantum efficiency, referring to fig. 5 to 6, which includes a substrate 100, and a high temperature AlN layer 200, an AlN transition layer 300, an N-type semiconductor layer 400, an N-type insertion layer 500, an active region light emitting layer 600, an electron blocking layer 700, and a P-type semiconductor layer 800 sequentially stacked on the substrate 100.
The N-type insertion layer 500 is a superlattice structure with a plurality of ALN/AlGaN/GaN/AlGaN periods, and each period of the N-type insertion layer 500 includes a first insertion sub-layer 501, a second insertion sub-layer 502, a third insertion sub-layer 503 and a fourth insertion sub-layer 504, where the first insertion sub-layer 501 is an ALN layer, the second insertion sub-layer 502 and the fourth insertion sub-layer 504 are AlGaN layers, and the third insertion sub-layer 503 is a GaN layer.
In each period of the N-type insertion layer 500, the thicknesses of the first insertion sub-layer 501 and the third insertion sub-layer 503 are 1nm, the thicknesses of the second insertion sub-layer 502 and the fourth insertion sub-layer 504 are 5nm, and the total thickness of the N-type insertion layer 500 is 16x (5+25) x2=960 nm when the N-type insertion layer 500 includes 16 periods.
Wherein the N-type insertion layer 500 is doped with Si element with a doping concentration of 5x10 18 atoms/cm 3 . And the Al composition in the second insert sub-layer 502 and the fourth insert sub-layer 504 is 40%.
Wherein the Al composition in the AlN transition layer 300 decreases from the high temperature AlN layer 200 to the N-type semiconductor layer 400, and the Al composition decreases from 100% to 50%.
Wherein the N-type semiconductor layer 400 is N-type doped Al x Ga 1-x N layer, electron blocking layer 700 is Al y Ga 1-y N layer and P type semiconductor layer 800 are P type doped Al z Ga 1-z An N layer, and an Al composition in the P-type semiconductor layer 800 is higher than that in the active region light emitting layer 600.
Referring to fig. 7, the method for preparing the LED epitaxial wafer with high internal quantum efficiency in the present embodiment includes the following steps S21-S23:
step S21, providing a substrate;
step S22, sequentially manufacturing a high-temperature AlN layer and an AlN transition layer on the substrate;
step S23, an N-type semiconductor layer, an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer are sequentially manufactured on the AlN transition layer.
The preparation method of the LED epitaxial wafer with high internal quantum efficiency shown in the embodiment specifically comprises the following steps:
(1) A silicon substrate is provided and loaded into a MOCVD reactor.
(2) Growing a high-temperature AlN layer on a silicon substrate;
specifically, the high temperature AlN layer 200 was grown in MOCVD equipment at 1250℃under a growth pressure of 50mbar and a growth thickness of 1.5. Mu.m. In the growth process, TMAL and NH are introduced into the MOCVD reaction chamber 3 An AlN film is prepared by a chemical vapor deposition method to obtain an AlN layer, and the high-temperature AlN layer 200 is used to release lattice mismatch and thermal mismatch between the silicon substrate 100 and AlGaN material.
If the AlN layer is processed by a common growth method, cracks appear. Thus, in the present embodiment, the high temperature AlN layer 200 will NH in a low pressure and high temperature environment 3 Introducing MOCVD reaction chamber in pulse mode, i.e. continuously introducing MO source (TMAL source and TMGa source) while growing AlN layer, and NH 3 Intermittent introduction of pulses into the reaction chamber, in particular NH 3 The AlN layer with better crystal quality can be obtained by intermittently introducing the reaction cavity for 30s and 10 s.
(3) Growing an AlN transition layer on the high-temperature AlN layer;
specifically, when the AlN transition layer 300 is grown, the MOCVD reaction chamber keeps the same growth pressure of 50mbar and growth temperature of 1250 DEG, the AlN transition layer 300 is transited in a gradual change mode, the Al component is gradually decreased from 100% to 50%, and the thickness of the transition layer is 500nm.
(4) Growing an N-type semiconductor layer on the AlN transition layer;
specifically, the N-type semiconductor layer 400 is grown after the AlN transition layer 300. The dopant of the N-type semiconductor layer 400 may be Si to serve as an electron supply layer, and the doping concentration of the N-type semiconductor layer 400 may be 1×10 19 atoms/cm 3 . In the growth process of the N-type semiconductor layer 400, the temperature in the MOCVD reaction chamber is controlled to be reduced to 1100 ℃, the Al component is 50%, and the N-type semiconductor layer 400 is grown to obtain 2um N-type semiconductor layerAnd a semiconductor layer 400.
(5) Growing an N-type insertion layer on the N-type semiconductor layer;
specifically, the N-type insertion layer 500 includes a first insertion sub-layer 501, a second insertion sub-layer 502, a third insertion sub-layer 503 and a fourth insertion sub-layer 504, wherein the first insertion sub-layer 501 is an AlN layer, the second insertion sub-layer 502 and the fourth insertion sub-layer 504 are AlGaN layers, and the third insertion sub-layer 503 is a GaN layer. In the process of growing the N-type insertion layer 500, the first insertion sub-layer 501, i.e., the AlN layer, is grown at 1100 c, NH 3 The aeration rate was 10L/min and the growth pressure was 50mbar.
The specific growth mode of the N-type insertion layer 500 is as follows: closing a TMGa source of the MOCVD reaction cavity, wherein the reaction time is 5s, and growing to obtain a first insert sub-layer 501, namely an AlN layer, and the growth thickness is 5nm; then TMGa is introduced at the same temperature, and a second insert sub-layer 502, namely an AlGaN layer, is obtained through growth, the growth thickness is 50nm, and the components and the doping are consistent with those of the N-type semiconductor layer 400; closing TMGa and TMAL sources, cooling to 1000 ℃, then introducing the TMGa sources, and growing to obtain a third insert sub-layer 503, namely a GaN layer, wherein the growth thickness is 5nm; then turning on TMAL source and raising temperature to 1100 deg.C at the same time, growing to obtain fourth insert sub-layer 504, namely ALGaN layer, with thickness of 5nm, and composition and doping consistent with N-type semiconductor layer 400.
Further, the growth was continued for 15 cycles in accordance with the above-described growth method, to obtain an N-type insertion layer 500, for a total of 16 cycles, and the thickness of the N-type insertion layer 500 was 1um.
(6) Growing an active region light-emitting layer on the N-type insertion layer;
specifically, the active light emitting layer is an AlGaN quantum well layer 601 and an AlGaN quantum barrier layer 602 that are alternately grown, wherein the Al composition in the AlGaN quantum well layer 601 affects the light emitting wavelength of the epitaxial wafer, and the Al composition of the AlGaN quantum well layer 601 is lower than the Al composition of the AlGaN quantum barrier layer 602. In this embodiment, the active light emitting layer is grown in a cycle of 5 cycles, the growth temperature of the active light emitting layer is 1080 ℃, the thickness of the AlGaN quantum well layer 601 is 2nm, the al composition is 35%, the thickness of the AlGaN quantum barrier layer 602 is 12nm, and the al composition is 50%.
(7) Growing an electron blocking layer on the active region light emitting layer;
specifically, an electron blocking layer 700, i.e., an EBL layer, was grown on the active region light emitting layer 600, the electron blocking layer 700 was grown at 1100 ℃ and a thickness of 25nm, and the Al composition in the electron blocking layer 700 was 65%.
(8) Growing a P-type semiconductor layer on the light-emitting layer of the active region, and controlling the P-type semiconductor layer to cover the electron blocking layer;
specifically, the P-type semiconductor layer 800 is grown after the active layer. The dopant of the P-type semiconductor layer 800 is Mg, specifically P-AL z Ga 1-z The N material is prepared, the Al component accounts for 30% of the P-type semiconductor layer 800, the growth thickness is 200nm, and the doping concentration of Mg is 5x10 19 atoms/cm 3 。
In the present embodiment, in the preparation process of the LED epitaxial wafer with high internal quantum efficiency, trimethylgallium (TMGa) or Ga source is used to obtain high-purity ammonia (NH 3 ) As N source, high purity H 2 As carrier gas, trimethylaluminum (TMAL) is used as Al source, and silane (H) is used as N-type dopant 4 Si), the P-type dopant is magnesium Cyclopentadienyl (CP) 2 Mg）。
Example nine
The LED epitaxial wafer with high internal quantum efficiency provided by the ninth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the eighth embodiment, and is different from the LED epitaxial wafer with high internal quantum efficiency in that:
in this embodiment, in each period of the N-shaped insertion layer, the thicknesses of the first insertion sub-layer and the third insertion sub-layer are 3nm, the thicknesses of the second insertion sub-layer and the fourth insertion sub-layer are 15nm, and the total thickness of the N-shaped insertion layer is 16x (1+5) x2=192 nm.
Examples ten
The LED epitaxial wafer with high internal quantum efficiency according to the tenth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the eighth embodiment in that:
in this embodiment, in each period of the N-shaped insertion layer, the thicknesses of the first insertion sub-layer and the third insertion sub-layer are 5nm, the thicknesses of the second insertion sub-layer and the fourth insertion sub-layer are 25nm, and the total thickness of the N-shaped insertion layer is 16x (3+15) x 2=576 nm.
Example eleven
The LED epitaxial wafer with high internal quantum efficiency provided by the eleventh embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the eighth embodiment in that:
in the present embodiment, the Si doping concentration of the N-type insertion layer is 1×10 19 atoms/cm 3 。
Example twelve
The LED epitaxial wafer with high internal quantum efficiency provided in the twelfth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the eighth embodiment in that:
in the present embodiment, the N-type insertion layer has a Si doping concentration of 5×10 19 atoms/cm 3 。
Example thirteen
The LED epitaxial wafer with high internal quantum efficiency provided by the thirteenth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the eighth embodiment in that:
in this embodiment, in each period of the N-type insertion layer, the Al composition is 50% in the second insertion sub-layer and the fourth insertion sub-layer.
Examples fourteen
The LED epitaxial wafer with high internal quantum efficiency according to the fourteenth embodiment of the present invention is substantially identical to the LED epitaxial wafer with high internal quantum efficiency shown in the eighth embodiment in that:
in this embodiment, in each period of the N-type insertion layer, the Al composition is 60% in the second insertion sub-layer and the fourth insertion sub-layer.
Referring to table 1 below, the performance parameters corresponding to the above embodiments one to fourteen of the present invention are shown.
TABLE 1
As can be seen from the description of the embodiments one to fourteen and the table 1, the overall performance parameters of the LED epitaxial wafer according to the embodiments one to seventh of the present invention are better than those of the LED epitaxial wafer according to the embodiments eight to fourteen because the N-type insertion layer is disposed inside the N-type semiconductor layer, especially when the N-type insertion layer is disposed inside the N-type semiconductor layer, the N-type insertion layer has a thickness of 960nm and is close to 1um, the performance parameters of the LED chip are better, and the COW-IV and COW-yield are optimized.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention, and are described in detail, but are not to be construed as limiting the scope of the invention. It should be noted that it is possible for those skilled in the art to make several variations and modifications without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. An LED epitaxial wafer with high internal quantum efficiency comprises a substrate, and is characterized in that the epitaxial wafer further comprises:
an N-type semiconductor layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially laminated on the substrate;
the N-type semiconductor device comprises an active region and an N-type semiconductor layer, wherein the N-type semiconductor layer is internally provided with an N-type insertion layer, or the N-type insertion layer is also arranged between the N-type semiconductor layer and the active region light-emitting layer, the N-type insertion layer is of a superlattice structure which is periodically laminated, each period of the N-type insertion layer comprises a first insertion sub-layer, a second insertion sub-layer, a third insertion sub-layer and a fourth insertion sub-layer which are laminated, the first insertion sub-layer is an AlN layer, the second insertion sub-layer and the fourth insertion sub-layer are all AlGaN layers, and the third insertion sub-layer is a GaN layer.
2. The LED epitaxial wafer of claim 1, wherein the first and third insertion sublayers each have a thickness of 1nm to 5nm and the second and fourth insertion sublayers each have a thickness of 5nm to 25nm in each period of the N-type insertion layer.
3. The LED epitaxial wafer of claim 2, wherein the number of cycles of the N-type insertion layer is 16 and the thickness of the N-type insertion layer is 50nm to 1000nm.
4. The high internal quantum efficiency LED epitaxial wafer of claim 1, wherein the N-type insertion layer is doped with Si element at a doping concentration of 5x10 18 atoms/cm 3 -1x10 20 atoms/cm 3 。
5. The high internal quantum efficiency LED epitaxial wafer of claim 1, wherein the second and fourth intervening sublayers each have an Al composition of 40% -60%.
6. The LED epitaxial wafer of claim 1, further comprising a high temperature AlN layer and an AlN transition layer, wherein the high temperature AlN layer and AlN transition layer are sequentially laminated on the substrate, and wherein the N-type semiconductor layer is laminated on the AlN transition layer.
7. The LED epitaxial wafer of claim 6, wherein the Al composition in the AlN transition layer decreases from 100% to 50% from the high-temperature AlN layer toward the N-type semiconductor layer.
8. The high internal quantum efficiency LED epitaxial wafer of any one of claims 1-7, wherein the N-type semiconductor layer is N-type doped Al x Ga 1-x An N layer, wherein the electron blocking layer is Al y Ga 1-y An N layer, wherein the P-type semiconductor layer is P-type doped Al z Ga 1-z And an N layer, wherein the Al component in the P-type semiconductor layer is higher than the Al component in the active region light-emitting layer.
9. A method for preparing an LED epitaxial wafer with high internal quantum efficiency, which is characterized in that the method is used for preparing the LED epitaxial wafer according to any one of claims 1 to 8, and the method comprises the following steps:
providing a substrate;
sequentially manufacturing a high-temperature AlN layer and an AlN transition layer on the substrate;
sequentially manufacturing an N-type semiconductor layer comprising an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer; or alternatively
Sequentially manufacturing an N-type semiconductor layer, an N-type insertion layer, an active region light-emitting layer, an electron blocking layer and a P-type semiconductor layer on the AlN transition layer;
the N-type insertion layers are of periodically laminated superlattice structures, each period of the N-type insertion layers comprises a first insertion sub-layer, a second insertion sub-layer, a third insertion sub-layer and a fourth insertion sub-layer which are arranged in a laminated mode, the first insertion sub-layer is an AlN layer, the second insertion sub-layer and the fourth insertion sub-layer are all AlGaN layers, and the third insertion sub-layer is a GaN layer.
10. An LED chip, characterized in that the LED chip comprises the LED epitaxial wafer according to any one of claims 1 to 8.
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