CN116469956A - Ultraviolet photoelectric detector and preparation method thereof - Google Patents

Ultraviolet photoelectric detector and preparation method thereof Download PDF

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Publication number
CN116469956A
CN116469956A CN202310356611.9A CN202310356611A CN116469956A CN 116469956 A CN116469956 A CN 116469956A CN 202310356611 A CN202310356611 A CN 202310356611A CN 116469956 A CN116469956 A CN 116469956A
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layer
gan
thickness
notch
gate dielectric
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李京波
汪禹
王小周
韩理想
刘传凯
钱昊
刘航瓒
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Zhejiang Xinke Semiconductor Co Ltd
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Zhejiang Xinke Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/112—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
    • H01L31/113—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor
    • H01L31/1136—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor the device being a metal-insulator-semiconductor field-effect transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
    • H01L31/1848—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P comprising nitride compounds, e.g. InGaN, InGaAlN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1856—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising nitride compounds, e.g. GaN
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Junction Field-Effect Transistors (AREA)

Abstract

The application discloses an ultraviolet photoelectric detector and a preparation method thereof, wherein the ultraviolet photoelectric detector comprises: a substrate; a buffer layer positioned on the surface of the substrate; the high-resistance GaN layer is positioned on the surface of the buffer layer; the p-GaN buried layer is positioned on the surface of the high-resistance GaN layer; n is n ‑ -a GaN channel layer located on the surface of the p-GaN buried layer; an AlN insertion layer located at n ‑ -a GaN channel layer surface; al (Al) 0.25 Ga 0.75 An N isolation layer positioned on the surface of the AlN insertion layer; n-Al 0.25 Ga 0.75 N layer, located at Al 0.25 Ga 0.75 The surface of the N isolation layer; a p-GaN cap layer positioned on the n-Al 0.25 Ga 0.75 N layer surface, p-GaN cap layer, N-Al 0.25 Ga 0.75 N layer and Al 0.25 Ga 0.75 The N isolation layer is formed with a first notch; a gate dielectric layer positioned at n ‑ -upper surface of GaN channel layer, upper surface of p-GaN cap layer and surface of first recess, gate dielectric layer, p-GaN cap layern-Al 0.25 Ga 0.75 The N layer is formed with two second notches; a gate electrode located on the first recess; a drain electrode located on one of the second recesses; and a source electrode positioned on the other second notch. The dark state current can be reduced, the optical switching ratio of the device is increased, and the fast light response performance is excellent.

Description

Ultraviolet photoelectric detector and preparation method thereof
Technical Field
The invention relates to the field of semiconductors, in particular to an ultraviolet photoelectric detector and a preparation method thereof.
Background
High-efficiency uv photodetectors are in great demand in civilian and military applications such as fire alerting, space exploration, medical imaging, missile detection, and secure communications. The third generation wide band gap semiconductor material GaN is widely used for high voltage, high temperature and high frequency devices because of its outstanding properties. Recently, gaN-based uv photodetectors have been strongly pursued due to their high uv absorption efficiency, stable chemistry, and high carrier mobility. In the last two decades, gaN-based uv photodetectors such as pn, p-i-n, schottky, metal-semiconductor-metal (MSM), avalanche photodiodes, etc. have been extensively studied. Recently, alGaN/GaN high electron mobility transistor uv photodetectors have received increasing attention due to their wider band gap, better piezoelectric effect and spontaneous polarization phenomenon, enabling shorter response times and high sensitivity. Since the two-dimensional electron gas formed at the AlGaN/GaN hetero interface has a high saturation rate and a high electron mobility, a high photoelectric response speed and a large photocurrent are observed in a HEMT ultraviolet light detector (UVPT).
The above mentioned detectors of GaN-based pn, p-i-n, schottky, metal-semiconductor-metal (MSM), avalanche photodiodes, etc., have low responsivity and small current-to-switch ratios, which are all places to be optimized. In an AlGaN/GaN HEMT ultraviolet photodetector, two-dimensional electron gas also exists in an AlGaN/GaN conductive channel under dark conditions, so that dark current and current under illumination are in an order of magnitude, the detection rate is reduced, and the power consumption is increased. The high dark current limits the practical application of AlGaN/GaN HEMT UV photodetectors.
Disclosure of Invention
The invention aims at the problems and overcomes at least one defect, and provides an ultraviolet photoelectric detector and a preparation method thereof.
The technical scheme adopted by the invention is as follows:
an ultraviolet photodetector, comprising:
a substrate;
the buffer layer is positioned on the upper surface of the substrate;
the high-resistance GaN layer is positioned on the upper surface of the buffer layer;
a p-GaN buried layer positioned on the upper surface of the high-resistance GaN layer;
n - -a GaN channel layer on an upper surface of the p-GaN buried layer;
an AlN insertion layer located at the n - -an upper surface of the GaN channel layer;
Al 0.25 Ga 0.75 an N isolation layer positioned on the upper surface of the AlN insertion layer;
n-Al 0.25 Ga 0.75 an N layer located at the Al 0.25 Ga 0.75 The upper surface of the N isolation layer;
a p-GaN cap layer positioned on the n-Al 0.25 Ga 0.75 The upper surface of the N layer is provided with a p-GaN cap layer and N-Al 0.25 Ga 0.75 N layer and Al 0.25 Ga 0.75 The N isolation layer is formed with a first notch;
the gate dielectric layer is positioned on the upper surface of the high-resistance GaN layer, the upper surface of the p-GaN cap layer and the surface of the first notch,
the gate dielectric layer, the p-GaN cap layer and the n-Al 0.25 Ga 0.75 The N layers are provided with second notches, and two second notches are respectively positioned at two sides of the first notch;
the gate electrode is positioned on the gate dielectric layer and corresponds to the first notch;
a drain electrode located on one of the second recesses;
and a source electrode positioned on the other second notch.
Defects in the GaN film form deep level trap states which can capture and release photo-generated holes, so that the service life and recovery time of carriers are prolonged, and response time as long as milliseconds or even seconds is generated. When the ultraviolet photoelectric detector is switched from illumination to dark state, the photovoltaic effect disappears, and the depletion region below the p-GaN buried layer can be rapidly expanded. Under the action of a built-in electric field, holes can escape from deep level traps more quickly, and response time is greatly improved. The application provides a novel structure, namely a PN junction coupling normally-off HEMT ultraviolet photoelectric detector (UVPD), which can reduce dark state current, increase the optical switching ratio of a device and has excellent rapid optical response performance.
According to the method, the scattering of the P-type impurities on the two-dimensional electron gas can be reduced by doping Si in AlGaN, and the mobility of the two-dimensional electron gas is improved. In addition, ohmic contact between the source electrode and the drain electrode and AlGaN is also facilitated. AlGaN on the side close to GaN is undoped and serves as an isolation layer.
In one embodiment of the present invention, the substrate is sapphire, gaN, siC or Si.
In one embodiment of the present invention, the thickness of the high-resistance GaN layer is 2.5 μm to 3.5 μm; the thickness of the p-GaN buried layer is 100-600 nm.
In one embodiment of the present invention, the n - The GaN channel layer has a thickness of 50-200 nm and a carrier concentration range of 1×10 16 cm -3 ～1×10 17 cm -3 。
In one embodiment of the present invention, the thickness of the AlN insert layer is 1-2 nm.
In one embodiment of the present invention, the thickness of the gate dielectric layer is 40-60 nm.
In one embodiment of the present invention, the Al 0.25 Ga 0.75 The thickness of the N isolation layer is 3-10 nm; the n-Al 0.25 Ga 0.75 The thickness of the N layer is 10-20 nm, and the concentration range of the carrier is 5×10 17 cm -3 ～5×10 18 cm -3 。
In one embodiment of the present invention, the thickness of the p-GaN cap layer is 20-100 nm, and the carrier concentration range is 5×10 17 cm -3 ～1×10 18 cm -3 。
The application also discloses a preparation method of the ultraviolet photoelectric detector, which comprises the following steps:
s1, preparing a substrate, and sequentially depositing a buffer layer, a high-resistance GaN layer, a p-GaN buried layer and n on the substrate - GaN channel layer, alN insert layer, al 0.25 Ga 0.75 N isolation layer, N-Al 0.25 Ga 0.75 The epitaxial wafer is obtained by the N layer and the p-GaN cap layer;
s2, etching the table top of the epitaxial wafer to expose part of the high-resistance GaN layer of the epitaxial wafer;
s3, P-GaN cap layer and n-Al 0.25 Ga 0.75 N layer and Al 0.25 Ga 0.75 Etching the N isolation layer to obtain a first notch;
s4, depositing a gate dielectric layer on the outer surface of the epitaxial wafer;
s5, etching the part of the gate dielectric layer positioned on the p-GaN cap layer to obtain two first grooves, wherein the two second grooves are respectively positioned on two sides of the first notch;
s6, etching the p-GaN cap layer and the n-Al layer below the first groove 0.25 Ga 0.75 The N layer, the first groove and the etched space together form a second notch;
s7, evaporating at one of the second notches to obtain a drain electrode, evaporating at the other second notch to obtain a source electrode, and evaporating at the position, corresponding to the first notch, of the gate dielectric layer to obtain a gate electrode.
The preparation method has a complete and mature preparation process and can be used for large-scale mass production.
In one embodiment of the present invention, in the step S1, deposition is performed by MOCVD equipment, wherein ammonia gas is used as an N source, TMGa is used as a Ga source, TMAl is used as an Al source, and CP is used 2 Mg acts as a P-type impurity.
In one embodiment of the present invention, the substrate is sapphire, gaN, siC or Si;
the thickness of the high-resistance GaN layer is 2.5-3.5 mu m; the thickness of the p-GaN buried layer is 100-600 nm; said n - The GaN channel layer has a thickness of 50-200 nm and a carrier concentration in the range of 1X 10 16 cm -3 ～1×10 17 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the AlN insertion layer is 1-2 nm; the Al is 0.25 Ga 0.75 The thickness of the N isolation layer is 3-10 nm; the n-Al 0.25 Ga 0.75 The thickness of the N layer is 10-20 nm, and the concentration range of the carrier is 5 multiplied by 10 17 cm -3 ～5×10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the p-GaN cap layer is 20-100 nm, and the concentration range of carriers is 5 multiplied by 10 17 cm -3 ～1×10 18 cm -3 。
In one embodiment of the present invention, the source, drain and gate electrodes are fabricated with 30nm/300nm Ti/Al.
The beneficial effects of the invention are as follows: defects in the GaN film form deep level trap states which can capture and release photo-generated holes, so that the service life and recovery time of carriers are prolonged, and response time as long as milliseconds or even seconds is generated. When the ultraviolet photoelectric detector is switched from illumination to dark state, the photovoltaic effect disappears, and the depletion region below the p-GaN buried layer can be rapidly expanded. Under the action of a built-in electric field, holes can escape from deep level traps more quickly, and response time is greatly improved. The application provides a novel structure, namely a PN junction coupling normally-off HEMT ultraviolet photoelectric detector (UVPD), which can reduce dark state current, increase the optical switching ratio of a device and has excellent rapid optical response performance.
Drawings
Fig. 1 is a schematic diagram of an epitaxial wafer;
FIG. 2 is a schematic view of the epitaxial wafer after etching the mesa and the first recess;
FIG. 3 is a schematic diagram of an epitaxial wafer after deposition of a gate dielectric layer;
FIG. 4 is a schematic diagram after etching the gate dielectric layer;
FIG. 5 is a schematic illustration of etching to form a second recess;
FIG. 6 is a schematic diagram of an ultraviolet photodetector;
FIG. 7 is a wafer photograph of an ultraviolet photodetector array;
FIG. 8 is V DS IV characteristic of the device at-1V;
FIG. 9 is V DS IV characteristic of the device at 1V;
FIG. 10 is a graph of clock variation characteristics for a single cycle;
FIG. 11 is a light source at 365nm, V DS =1v, optical power 236.97mW cm -2 Stability test chart below.
The reference numerals in the drawings are as follows:
1. a substrate; 2. a buffer layer; 3. a high-resistance GaN layer; 4. a p-GaN buried layer; 5. n is n - -a GaN channel layer; 6. an AlN insertion layer; 7. al (Al) 0.25 Ga 0.75 An N isolation layer; 8. n-Al 0.25 Ga 0.75 An N layer; 9. a p-GaN cap layer; 10. a gate dielectric layer; 101. a first groove; 11. a first recess; 12. a second notch; 13. a gate electrode; 14. a drain electrode; 15. and a source electrode.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the embodiments described are some, but not all, of the embodiments of the present application. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.
In the description of the present application, it should be noted that, the azimuth or positional relationship indicated by the terms "inner", "outer", etc. are based on the azimuth or positional relationship shown in the drawings, or the azimuth or positional relationship that is commonly put when the product of the application is used, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element to be referred to must have a specific azimuth, be configured and operated in a specific azimuth, and therefore should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.
In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.
The present invention will be described in detail with reference to the accompanying drawings.
As shown in fig. 5, 6 and 7, an ultraviolet photodetector includes:
a substrate 1;
a buffer layer 2 located on the upper surface of the substrate 1;
the high-resistance GaN layer 3 is positioned on the upper surface of the buffer layer 2;
a p-GaN buried layer 4 positioned on the upper surface of the high-resistance GaN layer 3;
n - a GaN channel layer 5 on the upper surface of the p-GaN buried layer 4;
an AlN insertion layer 6 located at n - An upper surface of the GaN channel layer 5;
Al 0.25 Ga 0.75 an N isolation layer 7 located on the upper surface of the AlN insertion layer 6;
n-Al 0.25 Ga 0.75 n layer 8, located at Al 0.25 Ga 0.75 The upper surface of the N isolation layer 7;
a p-GaN cap layer 9 located on n-Al 0.25 Ga 0.75 The upper surface of the N layer 8, the p-GaN cap layer 9, and N-Al 0.25 Ga 0.75 N layer 8 and Al 0.25 Ga 0.75 The N-spacer 7 is formed with a first recess 11;
a gate dielectric layer 10 on the upper surface of the high-resistance GaN layer 3, the upper surface of the p-GaN cap layer 9 and the surface of the first recess 11, the gate dielectric layer 10, the p-GaN cap layer 9 and the n-Al 0.25 Ga 0.75 The N layer 8 is provided with second notches 12, and two second notches 12 are respectively positioned at two sides of the first notch 11;
a gate electrode 13 located on the gate dielectric layer 10 and corresponding to the first recess;
a drain electrode 14 located on one of the second recesses 12;
a source electrode 15 is located on the other second recess 12.
Defects in the GaN film form deep level trap states which can capture and release photo-generated holes, so that the service life and recovery time of carriers are prolonged, and response time as long as milliseconds or even seconds is generated. When the ultraviolet photoelectric detector is switched from illumination to dark state, the photovoltaic effect disappears, and the depletion region below the p-GaN buried layer can be rapidly expanded. Under the action of a built-in electric field, holes can escape from deep level traps more quickly, and response time is greatly improved. The application provides a novel structure, namely a PN junction coupling normally-off HEMT ultraviolet photoelectric detector (UVPD), which can reduce dark state current, increase the optical switching ratio of a device and has excellent rapid optical response performance.
According to the method, the scattering of the P-type impurities on the two-dimensional electron gas can be reduced by doping Si in AlGaN, and the mobility of the two-dimensional electron gas is improved. In addition, ohmic contact between the source electrode and the drain electrode and AlGaN is also facilitated. AlGaN on the side close to GaN is undoped and serves as an isolation layer.
In this embodiment, the substrate 1 is sapphire. In practical use, the material may be GaN, siC or Si.
In this embodiment, the thickness of the high-resistance GaN layer 3 is 2.5 μm to 3.5 μm; the thickness of the p-GaN buried layer 4 is 100-600 nm.
In the present embodiment, n - The GaN channel layer 5 has a thickness of 50 to 200nm and a carrier concentration in the range of 1X 10 16 cm -3 ～1×10 17 cm -3 。
In this example, the AlN intercalated layer 6 had a thickness of 1 to 2nm.
In the present embodiment, al 0.25 Ga 0.75 The thickness of the N isolation layer 7 is 3-10 nm; n-Al 0.25 Ga 0.75 The N layer 8 has a thickness of 10-20 nm and a carrier concentration of 5×10 17 cm -3 ～5×10 18 cm -3 。
In the present embodiment, the thickness of the p-GaN cap layer 9 is 20-100 nm, and the carrier concentration range is 5×10 17 cm -3 ～1×10 18 cm -3 。
The embodiment also discloses a preparation method of the ultraviolet photoelectric detector, which comprises the following steps:
s1, referring to FIG. 1, preparing a substrate 1, and sequentially depositing a buffer layer 2, a high-resistance GaN layer 3, a p-GaN buried layer 4 and an n on the substrate - GaN channel layer 5, alN insertion layer 6, al 0.25 Ga 0.75 N isolation layer 7, N-Al 0.25 Ga 0.75 The N layer 8 and the p-GaN cap layer 9 are used for obtaining an epitaxial wafer;
s2, referring to FIG. 2, etching the table top to the epitaxial wafer so that a part of the high-resistance GaN layer 3 of the epitaxial wafer is exposed;
s3, see FIG. 2, for p-GaN cap layer 9, n-Al 0.25 Ga 0.75 N layer 8 and Al 0.25 Ga 0.75 Etching the N isolation layer 7 to obtain a first notch 11;
s4, referring to FIG. 3, depositing a gate dielectric layer 10 on the outer surface of the epitaxial wafer; in this example, a 50nm layer of SiO was deposited using PECVD 2 As a gate dielectric layer.
S5, referring to FIG. 4, etching the part of the gate dielectric layer above the p-GaN cap layer to obtain two first grooves 101, wherein the two second grooves 101 are respectively positioned at two sides of the first notch; in practice, the first recess may be etched using a BOE solution.
S6, referring to FIG. 5, etching the p-GaN cap layer and the n-Al layer below the first groove 101 0.25 Ga 0.75 N layers, the first grooves and the etched spaces together form a second notch 12; in practical use, inductively coupled plasma can be used to etch the p-GaN cap layer and n-Al 0.25 Ga 0.75 An N layer;
s7, referring to FIGS. 6 and 7, evaporating at one of the second notches 12 to obtain a drain electrode 14, evaporating at the other of the second notches 12 to obtain a source electrode 15, and evaporating at the position of the gate dielectric layer corresponding to the first notch to obtain a gate electrode 13.
The preparation method has a complete and mature preparation process and can be used for large-scale mass production.
In this embodiment, in step S1, deposition is performed by MOCVD apparatus, with ammonia gas as N source, TMGa as Ga source, TMAL as Al source, and CP 2 Mg acts as a P-type impurity.
In this embodiment, in steps S2 and S3, the mesa and the first recess are etched using an inductively coupled plasma etcher (ICP).
In this example, the source electrode, drain electrode and gate electrode were prepared with 30nm/300nm Ti/Al.
The P-GaN buried layer and the lower high-resistance GaN layer of the ultraviolet photoelectric detector form a PN junction, the upper P-GaN/AlGaN/U-GaN is a normally-off HEMT, the HEMT has the advantage of quick response because of high two-dimensional electron mobility, and the two layers of PGaN can deplete electrons in UGAN and two-dimensional electron gas in a UGAN/AlGaN heterojunction surface channel, so that off-state current is low. In addition, holes can escape from deep level defects more quickly under the built-in electric field of the PN junction, so that the response time (Poole-Frenkel mechanism) is greatly increased. As shown in fig. 8 and 9, the device of the present application measured a minimum dark current of 1.07×10 in the dark state -13 A, under 365nm light source irradiation, recovering two-dimensional electron gas in the conductive channel, and applying V DS Increasing from-1V to 1V and increasing photocurrent to-2.30X10 -4 A, the highest energy of the light-dark current ratio reaches 2.14X10 9 . As shown in FIG. 10, the rise time and fall time of the extraction were 616.33. Mu.s/936.58. Mu.s, respectively. FIG. 11 is a light source at 365nm, V DS =1v, optical power 236.97mW cm -2 Stability test chart below.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention, but rather is intended to cover all equivalent structures as modifications within the scope of the invention, either directly or indirectly, as may be contemplated by the present invention.

Claims (10)

1. An ultraviolet photodetector, comprising:
a substrate;
the buffer layer is positioned on the upper surface of the substrate;
the high-resistance GaN layer is positioned on the upper surface of the buffer layer;
a p-GaN buried layer positioned on the upper surface of the high-resistance GaN layer;
n - -a GaN channel layer on an upper surface of the p-GaN buried layer;
an AlN insertion layer located at the n - -an upper surface of the GaN channel layer;
Al 0.25 Ga 0.75 an N isolation layer positioned on the upper surface of the AlN insertion layer;
n-Al 0.25 Ga 0.75 an N layer located at the Al 0.25 Ga 0.75 The upper surface of the N isolation layer;
a p-GaN cap layer positioned on the n-Al 0.25 Ga 0.75 The upper surface of the N layer is provided with a p-GaN cap layer and N-Al 0.25 Ga 0.75 N layer and Al 0.25 Ga 0.75 The N isolation layer is formed with a first notch;
the gate dielectric layer is positioned on the upper surface of the high-resistance GaN layer, the upper surface of the p-GaN cap layer and the surface of the first notch,
the gate dielectric layer, the p-GaN cap layer and the n-Al 0.25 Ga 0.75 The N layers are provided with second notches, and two second notches are respectively positioned at two sides of the first notch;
the gate electrode is positioned on the gate dielectric layer and corresponds to the first notch;
a drain electrode located on one of the second recesses;
and a source electrode positioned on the other second notch.
2. The uv photodetector of claim 1 wherein said substrate is sapphire, gaN, siC or Si.
3. The ultraviolet photodetector of claim 1 wherein said high-resistance GaN layer has a thickness of 2.5 μm to 3.5 μm; the thickness of the p-GaN buried layer is 100-600 nm.
4. As claimed in claim 1The ultraviolet photoelectric detector is characterized in that n is as follows - The GaN channel layer has a thickness of 50-200 nm and a carrier concentration in the range of 1X 10 16 cm -3 ～1×10 17 cm -3 。
5. The uv photodetector of claim 1, wherein said AlN interlayer has a thickness of 1-2 nm and said gate dielectric layer has a thickness of 40-60 nm.
6. The ultraviolet photodetector of claim 1 wherein said Al 0.25 Ga 0.75 The thickness of the N isolation layer is 3-10 nm; the n-Al 0.25 Ga 0.75 The thickness of the N layer is 10-20 nm, and the concentration range of the carrier is 5 multiplied by 10 17 cm -3 ～5×10 18 cm -3 。
7. The ultraviolet photodetector of claim 1, wherein said p-GaN cap layer has a thickness of 20-100 nm and a carrier concentration in the range of 5 x 10 17 cm -3 ～1×10 18 cm -3 。
8. The preparation method of the ultraviolet photoelectric detector is characterized by comprising the following steps of:
s1, preparing a substrate, and sequentially depositing a buffer layer, a high-resistance GaN layer, a p-GaN buried layer and n on the substrate - GaN channel layer, alN insert layer, al 0.25 Ga 0.75 N isolation layer, N-Al 0.25 Ga 0.75 The epitaxial wafer is obtained by the N layer and the p-GaN cap layer;
s2, etching the table top of the epitaxial wafer to expose part of the high-resistance GaN layer of the epitaxial wafer;
s3, P-GaN cap layer and n-Al 0.25 Ga 0.75 N layer and Al 0.25 Ga 0.75 Etching the N isolation layer to obtain a first notch;
s4, depositing a gate dielectric layer on the outer surface of the epitaxial wafer;
s5, etching the part of the gate dielectric layer positioned on the p-GaN cap layer to obtain two first grooves, wherein the two second grooves are respectively positioned on two sides of the first notch;
s6, etching the p-GaN cap layer and the n-Al layer below the first groove 0.25 Ga 0.75 The N layer, the first groove and the etched space together form a second notch;
s7, evaporating at one of the second notches to obtain a drain electrode, evaporating at the other second notch to obtain a source electrode, and evaporating at the position, corresponding to the first notch, of the gate dielectric layer to obtain a gate electrode.
9. The method of manufacturing an ultraviolet photodetector according to claim 8, wherein in said step S1, deposition is performed by MOCVD equipment, wherein ammonia gas is used as N source, TMGa is used as Ga source, TMAL is used as Al source, and CP is used 2 Mg acts as a P-type impurity.
10. The method of manufacturing an ultraviolet photodetector of claim 9, wherein said substrate is sapphire, gaN, siC or Si;
the thickness of the high-resistance GaN layer is 2.5-3.5 mu m; the thickness of the p-GaN buried layer is 100-600 nm; said n - The GaN channel layer has a thickness of 50-200 nm and a carrier concentration in the range of 1X 10 16 cm -3 ～1×10 17 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the AlN insertion layer is 1-2 nm; the thickness of the gate dielectric layer is 40-60 nm; the Al is 0.25 Ga 0.75 The thickness of the N isolation layer is 3-10 nm; the n-Al 0.25 Ga 0.75 The thickness of the N layer is 10-20 nm, and the concentration range of the carrier is 5 multiplied by 10 17 cm -3 ～5×10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the p-GaN cap layer is 20-100 nm, and the concentration range of carriers is 5 multiplied by 10 17 cm -3 ～1×10 18 cm -3 。
CN202310356611.9A 2023-04-04 2023-04-04 Ultraviolet photoelectric detector and preparation method thereof Pending CN116469956A (en)

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