CN116467132A - Terminal equipment security chip debugging method and system - Google Patents

Terminal equipment security chip debugging method and system Download PDF

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Publication number
CN116467132A
CN116467132A CN202310209983.9A CN202310209983A CN116467132A CN 116467132 A CN116467132 A CN 116467132A CN 202310209983 A CN202310209983 A CN 202310209983A CN 116467132 A CN116467132 A CN 116467132A
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China
Prior art keywords
log
debugging
debug
security chip
packet
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CN202310209983.9A
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Inventor
刘运发
林喆
王忠平
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Shanghai Sunmi Technology Group Co Ltd
Citaq Co Ltd
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Shanghai Sunmi Technology Group Co Ltd
Citaq Co Ltd
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Priority to CN202310209983.9A priority Critical patent/CN116467132A/en
Publication of CN116467132A publication Critical patent/CN116467132A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/10File systems; File servers
    • G06F16/17Details of further file system functions
    • G06F16/172Caching, prefetching or hoarding of files
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/10File systems; File servers
    • G06F16/18File system types
    • G06F16/1805Append-only file systems, e.g. using logs or journals to store data
    • G06F16/1815Journaling file systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G06F21/54Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by adding security routines or objects to programs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Data Mining & Analysis (AREA)
  • Databases & Information Systems (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention discloses a terminal equipment security chip debugging method and a terminal equipment security chip debugging system, wherein the method comprises the following steps: when detecting that the running of the ARM processor is abnormal, acquiring abnormal data of a related register and a stack of the ARM processor, and recording the abnormal data into a debugging log; copying the debug log into a log buffer area through an output interface to form a log packet, wherein the log packet of the log buffer area is refreshed in real time according to the latest generation time of the debug log; and sending the log packet to an AP application processor of the system by using a serial port, so that the AP application processor receives the log packet and writes the log file into a local file system and a log system of the terminal equipment, and the debugging terminal acquires the log file from the log system of the terminal equipment and debugs the security chip. According to the invention, the debugging log can be transmitted to the log system in real time when the security chip of the terminal equipment is abnormal, so that the effective log can be quickly obtained, and the debugging log is not lost.

Description

Terminal equipment security chip debugging method and system
Technical Field
The invention relates to the field of chip debugging, in particular to a terminal equipment security chip debugging method and system.
Background
The intelligent POS sale terminal is a POS sale terminal framework of a scheme of a security chip and a system-level chip capable of running, the communication of the double CPUs is realized through communication modes such as a universal asynchronous receiving/transmitting serial port, a command is set through a specific protocol, a corresponding data packet is built by a system and is sent to a security chip end through the communication modes such as the serial port, and the security chip end analyzes the data packet and executes a corresponding function interface, so that the functions of card reading, encryption and the like of the security chip are called by the system.
In the prior art, the debugging function of the intelligent POS sales terminal safety chip is imperfect, effective logs cannot be screened out in time, if the logs in the log cache area are not exported in time, the files in the log cache area are overlarge, old logs are erased, the effective logs cannot be obtained when the terminal has abnormal problems in the use process of a client, time and effort are consumed for searching key log information, and local reproduction problems are needed to search the root cause of the problems when the logs are lost.
However, when the problem of local reproduction is carried out, a debugging serial port machine disassembly hardware fly is required. The disadvantage of this is that: the machine disassembling flying line is too troublesome, the efficiency is low, and the POS sale terminal is triggered due to the existence of a hardware protection mechanism, so that some problems can be destroyed on-site environment, and the problem investigation is difficult.
Disclosure of Invention
In order to solve the technical problem of imperfect debugging function of the intelligent POS sale terminal safety chip, the invention provides a terminal equipment safety chip debugging method and system, and effective debugging log of the safety chip is not lost by automatically acquiring abnormal data and refreshing an uploading log packet in real time.
Specifically, the technical scheme of the invention is as follows:
in a first aspect, the invention discloses a method for debugging a security chip of a terminal device, which comprises the following steps:
detecting whether the operation of the safety chip is abnormal;
when detecting that the operation of the security chip is abnormal, acquiring abnormal data of a related register and a stack of the ARM processor, and recording the abnormal data into a debug log;
copying the debugging log to a log buffer area through an output interface to form a log packet, wherein the log packet of the log buffer area is refreshed in real time according to the latest generation time of the debugging log;
and sending the log packet to an AP application processor of the system by using a serial port, so that the AP application processor receives the log packet and writes a log file into a local file system and a log system of the terminal equipment, and a debugging terminal obtains the log file from the log system of the terminal equipment and debugs the security chip.
In some embodiments, further comprising:
receiving a debugging signal, and acquiring all data of a related register and a stack of an ARM processor in the debugging process; recording all the data into a debug log, adding a grade label to the debug log according to the content of log data, and dividing the debug log into a normal log and an abnormal log.
In some embodiments, the copying the debug log to a log buffer through an output interface forms a log packet; further comprises:
judging whether the file size of the debug log to be cached exceeds the size of the log cache region;
and if the file size exceeds the size of the log buffer area, processing the debugging log file in batches to form a plurality of log packets, and then sequentially sending the log packets.
In some embodiments, before the using the serial port to send the log packet to the AP application processor of the system, the method further includes the steps of:
detecting whether the log packet exists in the log buffer area;
and if the log packet exists, transmitting the log packet to the AP application processor by using a serial port.
In some embodiments, the debug terminal obtains the log file from the log system of the terminal device, and further includes the following steps:
exporting a log file in a log system by using an ADB debug bridge;
after log export, key log information is located by searching for log keywords or searching for log rank labels.
In a second aspect, the present invention also discloses a terminal device security chip debugging system, including:
the abnormality detection module is used for detecting whether the operation of the safety chip is abnormal;
the log recording module is used for acquiring abnormal data of the ARM processor related register and the stack when the operation abnormality of the safety chip is detected, and recording the abnormal data into a debugging log;
the log buffer module is used for copying the debugging log to a log buffer area through an output interface to form a log packet, wherein the log packet is refreshed in real time according to the latest generation time of the debugging log;
the log sending module is used for sending the log package to an AP application processor of the system by using a serial port, so that the AP application processor receives the log package and writes a log file into a local file system and a log system of the terminal equipment, and a debugging terminal obtains the log file from the log system of the terminal equipment and debugs the security chip.
In some embodiments, further comprising:
the debugging signal receiving module is used for receiving the debugging signal;
the log recording module is also used for receiving a debugging signal and acquiring all data of the ARM processor related register and the stack in the debugging process; recording all the data into a debug log, adding a grade label to the debug log according to the content of log data, and dividing the debug log into a normal log and an abnormal log.
In some embodiments, the log cache module is further configured to: judging whether the file size of the debug log to be cached exceeds the size of the log cache region; and if the file size exceeds the size of the log buffer area, processing the debugging log file in batches to generate a plurality of log packets, and then sequentially sending the log packets.
In some embodiments, the log sending module includes:
the detection submodule is used for detecting whether the log packet exists in the log buffer area or not;
and the sending submodule is used for sending the log packet to the AP application processor by using a serial port if the log packet exists.
In some embodiments, further comprising: the log export module is used for exporting log files in the log system by using the ADB debug bridge; after log export, key log information is located by searching for log keywords or searching for log rank labels.
Compared with the prior art, the invention has at least one of the following beneficial effects:
1. when the abnormal operation of the security chip is detected, abnormal data are acquired and recorded in real time, a log packet in a log buffer area is refreshed in real time according to the latest generation time of a debugging log, the log packet is sent to an AP application processor of a system by using a serial port after the log packet is generated, and the AP application processor receives the log packet and writes a log file into a local file system and a log system of the terminal equipment. The method can ensure that the debug log file is not lost, and the abnormal data of the security chip can be quickly found according to the debug log stored in the log system when the security chip is debugged, so that the debug efficiency is higher.
2. In the debugging process, acquiring all data of a related register and a stack of the RM processor in real time; and adding a grade label to the debugging log according to the log data content, and dividing the debugging log into a normal log and an abnormal log. By the aid of the method, the debugging progress can be observed rapidly and intuitively, and the debugging result is obtained.
Drawings
The above features, technical features, advantages and implementation of the present invention will be further described in the following description of preferred embodiments with reference to the accompanying drawings in a clear and easily understood manner.
FIG. 1 is a flow chart of one embodiment of a method for debugging a security chip of a terminal device according to the present invention;
FIG. 2 is a flowchart of another embodiment of a method for debugging a security chip of a terminal device according to the present invention;
FIG. 3 is a flowchart of another embodiment of a method for debugging a security chip of a terminal device according to the present invention;
FIG. 4 is a block diagram illustrating one embodiment of a secure chip debug system for a terminal device in accordance with the present invention;
FIG. 5 is a block diagram illustrating another embodiment of a secure chip debug system for a terminal device according to the present invention;
fig. 6 is a block diagram illustrating a configuration of another embodiment of a secure chip debug system for a terminal device according to the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
For simplicity of the drawing, only the parts relevant to the invention are schematically shown in each drawing, and they do not represent the actual structure thereof as a product. Additionally, in order to simplify the drawing for ease of understanding, components having the same structure or function in some of the drawings are shown schematically with only one of them, or only one of them is labeled. Herein, "a" means not only "only this one" but also "more than one" case.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
In this context, it should be noted that the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, unless explicitly stated or limited otherwise; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In particular implementations, the terminal devices described in embodiments of the present application include, but are not limited to, other portable devices such as mobile phones, laptop computers, home teaching machines, or tablet computers having a touch-sensitive surface (e.g., a touch screen display and/or a touch pad). It should also be appreciated that in some embodiments, the terminal device is not a portable communication device, but rather a desktop computer having a touch-sensitive surface (e.g., a touch screen display and/or a touch pad).
In addition, in the description of the present application, the terms "first," "second," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will explain the specific embodiments of the present invention with reference to the accompanying drawings. It is evident that the drawings in the following description are only examples of the invention, from which other drawings and other embodiments can be obtained by a person skilled in the art without inventive effort.
Referring to fig. 1 of the specification, an embodiment of a method for debugging a security chip of a terminal device provided by the present invention includes the following steps:
s100, detecting whether the operation of the security chip is abnormal.
Specifically, it is required to determine whether the security chip is being debugged before that, if the security chip debug instruction is not received or the debug end instruction is received, it is indicated that the security chip is in a non-debug state at this time, and in this state, we only need to detect the running state of the security chip.
S200, when the operation abnormality of the security chip is detected, acquiring abnormal data of a related register and a stack of the ARM processor, and recording the abnormal data into a debug log.
Specifically, when the security chip is in a non-debugging state, only abnormal data in the running process is recorded in a debugging log, so that key debugging data of the security chip can be quickly read during debugging; and simultaneously, the memory and the consumption required for recording the normal data are reduced.
And S300, copying the debugging log to a log buffer area through an output interface to form a log packet, wherein the log packet of the log buffer area is refreshed in real time according to the latest generation time of the debugging log.
Specifically, the refreshed log packet contains the latest debug log, and then the latest debug log is sent to the AP application processor in real time, and after the local file system of the terminal equipment receives the log packet, the historical log packet is saved, so that the debug log loss caused by the refreshing of the log packet in the log buffer area is avoided.
S400, the log packet is sent to an AP application processor of the system by using a serial port, so that the AP application processor receives the log packet and writes a log file into a local file system and a log system of the terminal equipment, and a debugging terminal obtains the log file from the log system of the terminal equipment and debugs the security chip.
Specifically, whether a log exists in a log buffer area is detected in a main loop of the SP safety processor, if the log exists, a log packet is sent to an AP by using a serial port, and the Android end has a serial port data monitoring service, and once log data is received, the log is written into a local file of a file system and is output to an Android log system by using an Android log interface. And in the development and debugging process, the ADB is used for reading the Android system locator log to obtain the debugging log of the security chip part.
Another embodiment of the method for debugging a security chip of a terminal device of the present invention, as shown in fig. 2 of the specification, further includes the following steps on the basis of one embodiment of the method:
s500, receiving a debugging signal.
Specifically, if a security chip debug instruction is received, it indicates that the security chip is in a debug state at this time, in this state, we need to detect the running state of the security chip to obtain abnormal data, and also need to obtain debug data in the debug process, which is also called normal data, to monitor the data change in the security chip debug process, and generate visual feedback to the debug process, thereby obtaining the effect.
S600, acquiring all data of the ARM processor related register and the stack in the debugging process. Recording all the data into a debug log, adding a grade label to the debug log according to the content of log data, and dividing the debug log into a normal log and an abnormal log.
Specifically, in the generation stage of data, the data is divided into two types according to the data grade and the content, one type is abnormal data, the other type is normal data, the grade of the abnormal data is high, and when the log is generated, the log is marked as an abnormal log and a normal log by the content of the data, so that the key data can be conveniently searched in the debugging process.
In another embodiment of the method for debugging a security chip of a terminal device, as shown in fig. 3 of the specification, based on any one embodiment of the above method, step S300 copies the debug log to a log buffer area through an output interface to form a log packet; the method also comprises the following steps:
s310, judging whether the file size of the debug log needing to be cached exceeds the size of the log cache region.
And S320, if the file size exceeds the size of the log buffer area, processing the debugging log file in batches to form a plurality of log packets, and then sequentially transmitting the log packets.
Specifically, if the file size does not exceed the size of the log buffer area, the packaging processing of the debug log file is performed normally.
Based on the same technical conception, the invention also discloses a terminal equipment security chip debugging system, which can be realized by adopting any one of the terminal equipment security chip debugging method embodiments, and specifically, the terminal equipment security chip debugging system embodiment of the invention, as shown in figure 4 of the specification, comprises the following steps:
the abnormality detection module 10 is used for detecting whether the operation of the security chip is abnormal.
Specifically, it is required to determine whether the security chip is being debugged before that, if the security chip debug instruction is not received or the debug end instruction is received, it is indicated that the security chip is in a non-debug state at this time, and in this state, we only need to detect the running state of the security chip.
And the log recording module 20 is used for acquiring abnormal data of the ARM processor related register and the stack when the operation abnormality of the security chip is detected, and recording the abnormal data into the debug log.
Specifically, when the security chip is in a non-debugging state, only abnormal data in the running process is recorded in a debugging log, so that key debugging data of the security chip can be quickly read during debugging; and simultaneously, the memory and the consumption required for recording the normal data are reduced.
The log buffer module 30 is configured to copy the debug log to a log buffer through an output interface to form a log packet, where the log packet is refreshed in real time according to the latest generation time of the debug log.
Specifically, the refreshed log packet contains the latest debug log, and then the latest debug log is sent to the AP application processor in real time, and after the local file system of the terminal equipment receives the log packet, the historical log packet is saved, so that the debug log loss caused by the refreshing of the log packet in the log buffer area is avoided.
And the log sending module 40 is configured to send the log packet to an AP application processor of the system by using a serial port, so that the AP application processor receives the log packet and writes a log file into a local file system and a log system of the terminal device, so that the debug terminal obtains the log file from the log system of the terminal device, and debugs the security chip.
Specifically, whether a log exists in a log buffer area is detected in a main loop of the SP safety processor, if the log exists, a log packet is sent to an AP by using a serial port, and the Android end has a serial port data monitoring service, and once log data is received, the log is written into a local file of a file system and is output to an Android log system by using an interface of an Android system log. And in the development and debugging process, the ADB is used for reading the Android system locator log to obtain the debugging log of the security chip part.
In another embodiment of the terminal equipment security chip debugging system provided by the present invention, as shown in fig. 5 of the specification, on the basis of the above system embodiment, the terminal equipment security chip debugging system further includes:
the debug signal receiving module 50 is configured to receive a debug signal.
Specifically, if a security chip debug instruction is received, it indicates that the security chip is in a debug state at this time, in this state, we need to detect the running state of the security chip to obtain abnormal data, and also need to obtain debug data in the debug process, which is also called normal data, to monitor the data change in the security chip debug process, and generate visual feedback to the debug process, thereby obtaining the effect.
The log record module 20 is further configured to receive a debug signal, and obtain all data of the related registers and stacks of the ARM processor in the debugging process; recording all the data into a debug log, adding a grade label to the debug log according to the content of log data, and dividing the debug log into a normal log and an abnormal log.
Specifically, in the generation stage of data, the data is divided into two types according to the data grade and the content, one type is abnormal data, the other type is normal data, the grade of the abnormal data is high, and when the log is generated, the log is marked as an abnormal log and a normal log by the content of the data, so that the key data can be conveniently searched in the debugging process.
In another embodiment of the system for debugging a security chip of a terminal device, as shown in fig. 6 of the specification, the log sending module 40 in the above system embodiment includes:
a detection sub-module 41, configured to detect whether the log packet exists in the log buffer.
Specifically, whether the log buffer area has the log needs to be detected in the main loop of the security chip, namely the SP security processor, and if the log exists in the log buffer area, a log packet is sent to the AP application server by using a serial port.
And the sending submodule 42 is configured to send the log packet to the AP application processor using a serial port if the log packet exists.
The invention provides another embodiment of a terminal equipment security chip debugging system, which further comprises, based on any one of the above system embodiments:
a log export module 60 for exporting log files in the log system using the ADB debug bridge; after log export, key log information is located by searching for log keywords or searching for log rank labels.
Specifically, in the development and debugging process, the ADB is used for reading the Android system locator log to obtain the debugging log of the SP safety processor part. If the problem occurs in the using process of the machine, a user can acquire a log from a local file system of the terminal and send the log to a relevant research and development department for analysis.
The method and the system for debugging the security chip of the terminal equipment have the same technical conception, and the technical details of the two embodiments are mutually applicable, so that repetition is reduced, and the repeated description is omitted.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (10)

1. The terminal equipment security chip debugging method is characterized by comprising the following steps of:
detecting whether the operation of the safety chip is abnormal;
when detecting that the operation of the security chip is abnormal, acquiring abnormal data of a related register and a stack of the ARM processor, and recording the abnormal data into a debug log;
copying the debugging log to a log buffer area through an output interface to form a log packet, wherein the log packet of the log buffer area is refreshed in real time according to the latest generation time of the debugging log;
and sending the log packet to an AP application processor of the system by using a serial port, so that the AP application processor receives the log packet and writes a log file into a local file system and a log system of the terminal equipment, and a debugging terminal obtains the log file from the log system of the terminal equipment and debugs the security chip.
2. The method for debugging a security chip of a terminal device according to claim 1, further comprising:
receiving a debugging signal, and acquiring all data of a related register and a stack of an ARM processor in the debugging process; recording all the data into a debug log, adding a grade label to the debug log according to the content of log data, and dividing the debug log into a normal log and an abnormal log.
3. The method for debugging a security chip of a terminal device according to claim 1, wherein the debug log is copied to a log buffer area through an output interface to form a log packet; further comprises:
judging whether the file size of the debug log to be cached exceeds the size of the log cache region;
and if the file size exceeds the size of the log buffer area, processing the debugging log file in batches to form a plurality of log packets, and then sequentially sending the log packets.
4. A method for debugging a security chip of a terminal device according to any one of claims 1-3, further comprising the steps of, before said using a serial port to send said log packet to an AP application processor of the system:
detecting whether the log packet exists in the log buffer area;
and if the log packet exists, transmitting the log packet to the AP application processor by using a serial port.
5. The method for debugging a security chip of a terminal device according to claim 1, wherein the debugging terminal obtains the log file from a log system of the terminal device, further comprising the steps of:
exporting a log file in a log system by using an ADB debug bridge;
after log export, key log information is located by searching for log keywords or searching for log rank labels.
6. A terminal device security chip debug system, comprising:
the abnormality detection module is used for detecting whether the operation of the safety chip is abnormal;
the log recording module is used for acquiring abnormal data of the ARM processor related register and the stack when the operation abnormality of the safety chip is detected, and recording the abnormal data into a debugging log;
the log buffer module is used for copying the debugging log to a log buffer area through an output interface to form a log packet, wherein the log packet is refreshed in real time according to the latest generation time of the debugging log;
the log sending module is used for sending the log package to an AP application processor of the system by using a serial port, so that the AP application processor receives the log package and writes a log file into a local file system and a log system of the terminal equipment, and a debugging terminal obtains the log file from the log system of the terminal equipment and debugs the security chip.
7. The terminal device security chip debug system of claim 6, further comprising:
the debugging signal receiving module is used for receiving the debugging signal;
the log recording module is also used for receiving a debugging signal and acquiring all data of the ARM processor related register and the stack in the debugging process; recording all the data into a debug log, adding a grade label to the debug log according to the content of log data, and dividing the debug log into a normal log and an abnormal log.
8. The terminal device security chip debug system of claim 6, wherein:
the log buffer module is further configured to: judging whether the file size of the debug log to be cached exceeds the size of the log cache region; and if the file size exceeds the size of the log buffer area, processing the debugging log file in batches to generate a plurality of log packets, and then sequentially sending the log packets.
9. The terminal device security chip debug system according to claim 6, wherein said log transmission module comprises:
the detection submodule is used for detecting whether the log packet exists in the log buffer area or not;
and the sending submodule is used for sending the log packet to the AP application processor by using a serial port if the log packet exists.
10. The terminal device security chip debug system of claim 6, further comprising:
the log export module is used for exporting log files in the log system by using the ADB debug bridge; after log export, key log information is located by searching for log keywords or searching for log rank labels.
CN202310209983.9A 2023-03-07 2023-03-07 Terminal equipment security chip debugging method and system Pending CN116467132A (en)

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