CN116455516A

CN116455516A - Encoding method, decoding method, apparatus, device, system, and readable storage medium

Info

Publication number: CN116455516A
Application number: CN202210114840.5A
Authority: CN
Inventors: 何向; 王心远; 任浩
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2022-01-05
Filing date: 2022-01-30
Publication date: 2023-07-18

Abstract

The application discloses an encoding method, a decoding method, a device, equipment, a system and a readable storage medium, and belongs to the technical field of communication. The coding method comprises the following steps: acquiring 2 including a control block and a data block ⁿ A group code stream block, n is an integer greater than 1; pair 2 ⁿ Performing first coding on the group code stream blocks to obtain target code blocks, wherein the target code blocks comprise 2-based code blocks ⁿ Type and 2-based control block determination for group code stream blocks ⁿ A control block of the group code stream block and a data unit determined by the data block. The decoding method comprises the following steps: obtaining a target code block, and performing first decoding on the target code block according to the type and the data unit of the target code block to obtain 2 ⁿ And the code stream blocks comprise control blocks and data blocks which are obtained based on the types and the data units.

Description

Encoding method, decoding method, apparatus, device, system, and readable storage medium

The present application claims priority from chinese patent application No. 202210005434.5 entitled "a coding method, apparatus and chip" filed on 1/5/2022, the entire contents of which are incorporated herein by reference in the examples of the present application.

Technical Field

The present disclosure relates to the field of communications technologies, and in particular, to an encoding method, a decoding method, an apparatus, a device, a system, and a readable storage medium.

Background

With the development of communication technology, the manner of transmitting messages through the ethernet is becoming more and more perfect. During transmission of the message, the message from the medium access control (media access control, MAC) layer is split into blocks of fixed length and enters the medium independent interface (media independent interface, MII) in parallel. For example, a message is split into blocks and then enters an 800 gigabit (G) MII in parallel, where 800GMII represents an MII with a transmission MAC rate of 800 gigabits/second (gigabit per second, gb/s). Is transmitted to the physical coding sublayer (physical coding sublayer, PCS) by MII. The code stream blocks received from the MII by the PCS include a data block (TXD) and a control block (TXC). The TXC and TXD are obtained by processing message flow contents from the MAC layer through an adaptation sublayer (reconciliation sublayer, RS). The TXC is a control word for identifying whether the content of the corresponding byte in the TXD is a control signal or a data signal, wherein the control signal includes information such as start, end, error, idle, etc. of the message. The PCS encodes according to the TXC/TXD content, reduces overhead, and can provide necessary synchronization and protection functions.

In the related art, the PCS encodes each group of code stream blocks from the MII with 64 bits (bit, B)/66B to obtain 66bit code blocks, where the 66bit code blocks are data blocks or control code blocks, and if they are control code blocks, the 66bit code blocks include fields with 4bit hamming distance protection. When the high-speed physical link is adopted for data transmission, every four 66-bit code blocks are transcoded into a 256B/257B coded code block with the length of 257 bits, forward error correction (forward error correction, FEC) coding is carried out on the 257-bit code blocks, and FEC code words obtained by FEC coding are transmitted.

When uncorrectable FEC code words exist, the number of error codes in the FEC code words is more, the positions of the error codes are not fixed, and the field with hamming distance protection in the 66bit code block cannot ensure the reliable identification of the error codes; and because the reliable identification of the error code can be realized through FEC error coding, the error code identification is not needed to be realized through a field with Hamming distance protection in a 66bit code block. On this basis, again, the 64B/66B encoding process is not necessary since most of the processing in the PCS is based on 257bit code blocks. If the 64B/66B encoding process is reserved, the subsequent transcoding process will bring unnecessary time delay, power consumption and chip area occupation.

Disclosure of Invention

The application provides an encoding method, a decoding method, a device, equipment, a system and a readable storage medium, which are used for improving encoding and decoding efficiency.

In a first aspect, there is provided a coding method, the method comprising: acquisition 2 ⁿ The system comprises a group of code stream blocks, wherein any group of code stream blocks comprises a control block and a data block, and n is an integer greater than 1; for said 2 ⁿ Performing first coding on the group code stream blocks to obtain target code blocks, wherein the target code blocks comprise 2 base on the code blocks ⁿ Type of control block determination of group code stream block and based on said 2 ⁿ A control block of the group code stream block and a data unit determined by the data block.

Due to the fact that the pair comprises a control block and a data block 2 ⁿ First encoding the group code stream blocks to obtain target code blocks without 2 ⁿ Each group of code stream blocks in the group of code stream blocks is subjected to 64B/66B coding to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ The 66-bit code blocks are transcoded to obtain target code blocks, so that the coding efficiency is improved, and the time delay, the power consumption and the chip area occupation caused by the coding process are reduced.

In a possible implementation manner, the type is used for indicating that the target code block is a data code block; the data unit is based on the 2 ⁿ The order of the group code stream blocks is to the 2 ⁿ And carrying out the first coding on the data blocks of the group code stream blocks.

In a possible implementation, the type is used to indicate that the target code block is a control codeA block; the data unit includes a type indication and code block content, the code block content based on the 2 ⁿ The control block and the data block of the group code stream block are determined to be in the sequence of 2 ⁿ The data blocks of the group code stream block are obtained by the first coding, and the type indication is based on the data blocks of the group code stream block 2 ⁿ The control blocks of the group code stream blocks are derived, and the type indication is used for indicating the type of each group code stream block.

In one possible implementation, the target code block is an error code block, and the error code block includes data for identifying an error. The encoding method can perform first encoding on different types of code stream blocks to obtain target code blocks, and has wider applicability.

In one possible implementation, the target code block pairs the 2 based on the error detection result ⁿ Processing the group code stream block to obtain the error detection result based on the step 2 ⁿ The control block and the data block of the group code stream block are obtained. The code stream blocks with errors are processed, and then the target code blocks are obtained, so that the data with errors can be distinguished from the correct data during the subsequent data transmission, and the reliability of the data is ensured.

In a possible implementation, the error detection result includes the 2 ⁿ Content order error or content error of group code stream block, the target code block is based on the 2 ⁿ The first coding is performed on the code stream blocks with correct content sequence and correct content and error blocks in the group code stream blocks, and the error blocks are based on the 2 ⁿ The code stream blocks with wrong content sequence or wrong content in the group code stream blocks are obtained.

In one possible implementation, the control block includes m bits, the data block includes 8m bits, and m is a positive integer.

In one possible implementation, the value of n is 2, the value of m is 8, and the target code block is 257 bits.

In one possible implementation, the method 2 ⁿ The group code stream blocks are all from the media independent interface MII.

In one possible implementation manner, after the obtaining the target code block, the method further includes: performing second coding on the target code block according to the FEC code pattern to obtain first data; and sending the first data. And performing second coding on the target code block according to the FEC code pattern to obtain first data, so that the receiving end can correct the received first data, and the accuracy of data transmission is ensured.

In a second aspect, there is provided a decoding method, the method comprising: obtaining a target code block, wherein the target code block comprises a type and a data unit; according to the type of the target code block and the data unit, performing first decoding on the target code block to obtain 2 ⁿ And the code stream blocks comprise control blocks and data blocks which are obtained based on the types and the data units, and n is an integer greater than 1.

Since the first decoding of the target code block can obtain 2 including the control block and the data block ⁿ The code stream blocks are assembled without transcoding the target code blocks to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ Decoding the 66 bit code blocks to obtain 2 ⁿ The decoding efficiency of the group code stream block is improved, and the time delay, the power consumption and the occupied chip area brought by the decoding process are reduced.

In a possible implementation manner, the type is used for indicating that the target code block is a data code block; said 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing the first decoding on the 8 m-length content corresponding to the ith group of code stream blocks in the data unit, wherein m is a positive integer, and i is 1 or more and 2 or less ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1.

In a possible implementation manner, the type is used for indicating the target code block as a control code block, the data unit includes a type indication and code block content, and the type indication includes 2 ⁿ A number of bits of 2 ⁿ 1 of the bits is used to indicate the 2 ⁿ The type of a group of code stream blocks corresponding to the bits in the group of code stream blocks, the content of the code block comprises 2 ⁿ A group of bits;

said 2 ⁿ The control block included in the ith group of code stream blocks in the group of code stream blocks is obtained based on the type, the bit corresponding to the ith group of code stream blocks in the type indication and the bit group corresponding to the ith group of code stream blocks in the code block content, wherein i is more than or equal to 1 and less than or equal to 2 ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1;

said 2 ⁿ And the data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing first decoding on the bit groups corresponding to the ith group of code stream blocks in the code block content based on the bits corresponding to the ith group of code stream blocks in the type indication.

In one possible implementation, the method 2 ⁿ The bit groups include a first bit group and 2 ⁿ -1 second group of bits, the first group of bits comprising a different number of bits than the second group of bits.

In one possible implementation, the data unit includes a type indication, the type and the type indication being used to indicate that the target code block is an error code block; said 2 ⁿ Each group of code stream blocks comprises a control block with a first value, wherein 2 is as follows ⁿ And the data blocks included in each group of code stream blocks in the group of code stream blocks are second values, and the first values and the second values are used for indicating that the code stream blocks are error code stream blocks.

Since the decoding method of the present application can perform the first decoding on different types of target code blocks to obtain 2 ⁿ The method has wider applicability.

In one possible implementation manner, the acquiring the target code block includes: receiving second data, the second data being obtained based on the first data encoded with a forward error correction, FEC, pattern; and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error correction processing.

In one possible implementation, the target code block is an error code block obtained by error correcting the second data but not successfully correcting the error. The target code block is obtained by correcting the second data but not correcting the second data successfully, so that the code block in the FEC code word is subjected to error marking, and the receiving end can determine that the data obtained based on the target code block is error data, so that the accuracy of the data is ensured.

In one possible implementation manner, the acquiring the target code block includes: receiving second data, the second data being obtained based on the first data encoded with a forward error correction, FEC, pattern; and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error detection but no error correction processing.

In one possible implementation, the target code block is an error code block obtained by detecting an error from the second data but not correcting the error.

For the decoding method provided herein, the second decoding operation may be error correction of the codeword, or error detection only but not error correction. When the error correction is performed on the codeword in the second decoding process, if it is determined that the error correction cannot be performed on the current codeword (for example, the number of errors exceeds the error correction capability), the error correction needs to be performed on all code blocks in the codeword; or in the case where only error detection but no error correction is performed on the codeword in the second decoding process, for the codeword in which an error is detected, it is necessary to perform error marking on all code blocks in the codeword.

In one possible implementation, the method 2 ⁿ The group code stream block is obtained by performing first decoding on the target code block according to an error detection result, the type of the target code block and a data unit, and the error detection result is obtained based on the type of the target code block and the data unit. The receiving end can distinguish error data and correct data by processing the target code block with error, so that the reliability of the data is ensured.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, the 2 ⁿ The group code stream block is obtained by performing first decoding on a second code block according to the type and the data unit of the second code block, wherein the second code block is obtained by performing first decoding on the target code blockAnd the code blocks which are obtained through conversion and have the same bit number as the target code blocks.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, the 2 ⁿ Group code stream block based on pair 2 ⁿ Converting the first code stream blocks of the group to obtain 2 ⁿ And the group first code stream block is obtained by performing first decoding on the target code block based on the type of the target code block and a data unit.

In one possible implementation, the method 2 ⁿ The group code stream blocks are all in the MII format of the media independent interface.

In a third aspect, there is provided an encoding apparatus, the apparatus comprising:

An acquisition module for acquiring 2 ⁿ The system comprises a group of code stream blocks, wherein any group of code stream blocks comprises a control block and a data block, and n is an integer greater than 1;

a first coding module for the 2 ⁿ Performing first coding on the group code stream blocks to obtain target code blocks, wherein the target code blocks comprise 2 base on the code blocks ⁿ Type of control block determination of group code stream block and based on said 2 ⁿ A control block of the group code stream block and a data unit determined by the data block.

In a possible implementation manner, the type is used for indicating that the target code block is a data code block; the data unit is based on the 2 ⁿ The control block and the data block of the group code stream block are determined to be in the sequence of 2 ⁿ And carrying out the first coding on the data blocks of the group code stream blocks.

In a possible implementation manner, the type is used for indicating that the target code block is a control code block; the data unit includes a type indication and code block content, the code block content based on the 2 ⁿ Control block and data for group code stream blockBlock determined order for said 2 ⁿ The data blocks of the group code stream block are obtained by the first coding, and the type indication is based on the data blocks of the group code stream block 2 ⁿ The control blocks of the group code stream blocks are derived, and the type indication is used for indicating the type of each group code stream block.

In one possible implementation, the target code block is an error code block, and the error code block includes data for identifying an error.

In one possible implementation, the target code block pairs the 2 based on the error detection result ⁿ Processing the group code stream block to obtain the error detection result based on the step 2 ⁿ The control block and the data block of the group code stream block are obtained.

In one possible implementation, the apparatus further includes:

the second coding module is used for carrying out second coding on the target code block according to the Forward Error Correction (FEC) code pattern to obtain first data; and the sending module is used for sending the first data.

In a fourth aspect, there is provided a decoding apparatus, the apparatus comprising:

the acquisition module is used for acquiring a target code block, wherein the target code block comprises a type and a data unit;

a decoding module, configured to perform a first decoding on the target code block according to the type and the data unit of the target code block to obtain 2 ⁿ And the code stream blocks comprise control blocks and data blocks which are obtained based on the types and the data units, and n is an integer greater than 1.

In a possible implementation manner, the type is used for indicating that the target code block is a control code block; the data unit includes a type indication and code block content, the type indication including 2 ⁿ A number of bits of 2 ⁿ 1 of the bits is used to indicate the 2 ⁿ The type of a group of code stream blocks corresponding to the bits in the group of code stream blocks, the content of the code block comprises 2 ⁿ A group of bits; said 2 ⁿ The control block included in the ith group of code stream blocks in the group of code stream blocks is obtained based on the type, the bit corresponding to the ith group of code stream blocks in the type indication and the bit group corresponding to the ith group of code stream blocks in the code block content, wherein i is more than or equal to 1 and less than or equal to 2 ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1; said 2 ⁿ And the data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing first decoding on the bit groups corresponding to the ith group of code stream blocks in the code block content based on the bits corresponding to the ith group of code stream blocks in the type indication.

In one possible implementation, the method 2 ⁿ The bit groups include a first bit group and 2 ⁿ -1 second group of bits, said first group of bits comprising the number of bits and said second group of bits The bit groups include different numbers of bits.

In one possible implementation, the acquiring module is configured to receive second data, where the second data is obtained based on the first data encoded with the FEC pattern; and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error correction processing.

In one possible implementation, the target code block is a code block obtained by error correcting the second data but not successfully correcting the error.

In one possible implementation, the acquiring module is configured to receive second data, where the second data is obtained based on the first data encoded with the FEC pattern; and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error detection but no error correction processing.

In one possible implementation, the method 2 ⁿ And the group code stream block is obtained by performing the first decoding on the target code block according to an error detection result, the type of the target code block and a data unit, and the error detection result is obtained based on the type of the target code block and the data unit.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, the 2 ⁿ The group code stream block is obtained by performing the first decoding on a second code block according to the type of the second code block and a data unit, and the second code blockThe block is obtained by converting the target code block and has the same bit number as the target code block.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, the 2 ⁿ Group code stream block based on pair 2 ⁿ Converting the first code stream blocks of the group to obtain 2 ⁿ And performing first decoding on the target code block by the group first code stream block based on the type of the target code block and a data unit.

In a fifth aspect, there is provided a network device comprising a processor coupled to a memory, the memory having stored therein at least one program instruction or code that is loaded and executed by the processor to cause the network device to implement the encoding method of any of the first aspects or to implement the decoding method of any of the second aspects.

In a sixth aspect, there is provided a computer readable storage medium having stored therein at least one program instruction or code which when loaded and executed by a processor causes a computer to implement the encoding method of any one of the first aspects or the decoding method of any one of the second aspects.

In a seventh aspect, a communication system is provided, the system comprising a first network device for performing the encoding method of any of the first aspects and a second network device for performing the decoding method of any of the second aspects.

In an eighth aspect, there is provided another communication apparatus comprising: a transceiver, a memory, and a processor. Wherein the transceiver, the memory, and the processor communicate with each other through an internal connection path, the memory is configured to store instructions, the processor is configured to execute the instructions stored by the memory to control the transceiver to receive signals and control the transceiver to transmit signals, and when the processor executes the instructions stored by the memory, the processor is caused to execute the encoding method of any one of the first aspects or the decoding method of any one of the second aspects.

Illustratively, the processor is one or more and the memory is one or more.

The memory may be integrated with the processor or may be separate from the processor, for example.

In a specific implementation process, the memory may be a non-transient (non-transitory) memory, for example, a Read Only Memory (ROM), which may be integrated on the same chip as the processor, or may be separately disposed on different chips, where the type of the memory and the manner of disposing the memory and the processor are not limited in this application.

In a ninth aspect, there is provided a computer program product comprising: computer program code which, when run by a computer, causes the computer to perform the encoding method of any of the first aspects or the decoding method of any of the second aspects.

In a tenth aspect, there is provided a chip comprising a processor for calling from a memory and executing instructions stored in the memory, such that a communication device on which the chip is mounted performs the encoding method of any one of the first aspects or performs the decoding method of any one of the second aspects.

In an eleventh aspect, there is provided another chip comprising: the device comprises an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected through an internal connection path, the processor is used for executing codes in the memory, and when the codes are executed, the processor is used for executing the encoding method of any one of the first aspects or executing the decoding method of any one of the second aspects.

Drawings

FIG. 1 is a schematic diagram of an implementation environment of an encoding method and a decoding method according to an embodiment of the present application;

FIG. 2 is a flow chart of an encoding method provided by an embodiment of the present application;

fig. 3 is a schematic diagram of a process for obtaining a target code block according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of a target code block according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of another target code block according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of another target code block according to an embodiment of the present application;

FIG. 7 is a flow chart of a decoding method provided in an embodiment of the present application;

fig. 8 is a schematic structural diagram of an encoding device according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of a decoding device according to an embodiment of the present application;

fig. 10 is a schematic structural diagram of a network device according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of another network device according to an embodiment of the present application;

fig. 12 is a schematic structural diagram of another network device according to an embodiment of the present application.

Detailed Description

The terminology used in the description of the embodiments of the present application is for the purpose of describing the examples of the present application only and is not intended to be limiting of the present application. Embodiments of the present application are described below with reference to the accompanying drawings.

As a local area network technology, ethernet has an increasingly wide application range. Since 100 Gigabit Ethernet (GE), data transmission has been performed using a single channel 25Gb/s transmission rate. In order to correct the error code in the received data, the physical layer introduces FEC coding, and further transmits the FEC codeword obtained by coding. For example, when using a 100G channel to perform data transmission, the transmitting end may use Reed-Solomon (RS) (528, 514) to perform FEC encoding on the original data, where an RS codeword block obtained by encoding includes a payload of 5140 bits and a check code of 140 bits. Due to the presence of the check code, the transmission rate required to transmit the FEC codeword is higher than the transmission rate required to transmit the original data for the transmission rate required to transmit the same payload in the same time.

In order to reduce the transmission rate required for transmitting FEC codewords, transcoding is employed on the ethernet standard to achieve a reduction in the transmission rate required for transmitting FEC codewords by reducing the overhead of the code blocks before FEC encoding. For example, every fourth 64B/66B encoded code block is transcoded into one 256B/257B encoded code block. Since the overhead of one 257-bit code block is lower than that of four 66-bit code blocks, the transmission rate required to transmit the FEC codeword obtained based on the 257-bit code block is relatively low. When using the 100G channel for data transmission, the transmission rate required for transmitting the FEC codeword based on the transcoded code block is 103.125Gb/s, which is the same as the transmission rate required for transmitting the 66-bit code block that is not FEC encoded.

After the receiving end obtains the FEC codeword, the receiving end may perform error correction on the FEC codeword. Since the error code identification can be achieved by FEC error coding and most of the processing in PCS is based on 257 bit code blocks, the 64B/66B encoding process and the corresponding transcoding process will result in unnecessary delay, power consumption and chip area occupation.

In this regard, the embodiments of the present application provide a data transmission method to solve the above-mentioned problems. In the embodiment of the application, for 2 including a control block and a data block ⁿ First encoding the group of code stream blocks (n is an integer greater than 1) to obtain target code blocks without having to encode 2 ⁿ Each group of code stream blocks in the group of code stream blocks is subjected to 64B/66B coding, and then 2 is subjected to ⁿ And transcoding the 66-bit code blocks to obtain target code blocks. Therefore, the coding efficiency is improved, and the time delay, the power consumption and the chip area occupation caused by the coding process are reduced.

Embodiments of the present application provideWhen the target code block is first decoded, the target code block can be directly first decoded to obtain 2 including control block and data block ⁿ The code stream blocks are assembled without transcoding the target code blocks to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ Decoding the 66 bit code blocks to obtain 2 ⁿ And (5) assembling code stream blocks. Therefore, the decoding efficiency is improved, and the time delay, the power consumption and the chip area occupation caused by the decoding process are reduced.

The encoding method and the decoding method provided by the embodiment of the application can be suitable for the current Ethernet interface or other scenes needing to transmit data. Taking the implementation scenario shown in fig. 1 as an example, the implementation scenario includes a plurality of chips, and information interaction can be performed between the chips, so as to realize data transmission. Illustratively, a chip 102 is provided in the first network device 101, a chip 104 is provided in the second network device 103, and both the chip 102 and the chip 104 support FEC encoding and FEC decoding, and a channel 105 between the first network device 101 and the second network device 103 is capable of transmitting FEC encoded data. The chip 102 may be pair 2 ⁿ The group code stream block is first encoded to obtain a target code block, the target code block is second encoded according to a first FEC code pattern to obtain first data, and the first data is sent to the chip 104 through the channel 105. Illustratively, errors may occur in the transmission of the first data in channel 105, and the received data is referred to as the second data. After receiving the second data, the chip 104 may perform second decoding on the second data using the first FEC code pattern to obtain a target code block, and perform first decoding on the target code block to obtain 2 ⁿ And (5) assembling code stream blocks. Where n is an integer greater than 1, the first FEC pattern includes, but is not limited to, any one or a concatenated combination of a RS code, a Bose-Chaudhuri-Hocquenghem (BCH) code, a Hamming code, an extended-BCH code, an extended-Hamming code, a fire code, a turbo (turbo) code, a turbo product code (turbo product code, TPC), a step (stage) code, and a low-density parity-check (LDPC) code.

It will be appreciated that the implementation scenario shown in fig. 1 may include a plurality of network devices, each of which may include at least one chip, and fig. 1 illustrates only two network devices, each of which includes one chip.

In connection with the implementation scenario shown in fig. 1, the encoding method provided in the embodiment of the present application is shown in fig. 2. Illustratively, the encoding method provided by the embodiments of the present application is performed by the chip 102 in fig. 1, including, but not limited to, step 201 and step 202.

Step 201, acquire 2 ⁿ And the code stream blocks comprise control blocks and data blocks, and n is an integer greater than 1.

In one possible implementation, 2 ⁿ The group code stream blocks are all from the MII. With respect to MII-based acquisition 2 ⁿ The manner of grouping the code stream blocks is not limited in this embodiment. For example, the MII may be 2 acquired using the institute of Electrical and electronics Engineers (the Institute of Electrical and Electronics Engineers, IEEE) 802.3 standard, such as defined by IEEE802.3-2018 and other versions of the IEEE802.3 standard ⁿ And (5) assembling code stream blocks. Illustratively, n has a value of 2, i.e., four groups of code stream blocks are acquired.

Illustratively, for 2 ⁿ Any one of the code stream blocks, the control block of any one of the code stream blocks comprises m bits, the data block of any one of the code stream blocks comprises 8m bits, and m is a positive integer. Wherein 8m represents 8 times of m and can also be represented as 8*m. Illustratively, m has a value of 8, i.e., for any set of code stream blocks, the control block of any set of code stream blocks includes 8 bits and the data block of any set of code stream blocks includes 64 bits. In one possible implementation, the control blocks include m bits that are control bits, i.e., the control blocks include m control bits; the 8m bits included in the data block are all data, that is, the 8m bits included in the data block are data.

Illustratively, a control block comprising 8 control bits is denoted as TXC <7:0>, a data block comprising 64 bits of data is denoted as TXD <63:0>, and the order of the respective bits of the control block and the data block is from most significant bit (most significant bit, MSB) to least significant bit (least significant bit, LSB).

Step 202, pair 2 ⁿ Performing first coding on the group code stream blocks to obtain target code blocks, wherein the target code blocks comprise 2-based code blocks ⁿ Type and 2-based control block determination for group code stream blocks ⁿ A control block of the group code stream block and a data unit determined by the data block.

For example, the control blocks of each group of code stream blocks are all 8 bits, the data blocks are all 64 bits, and the four groups of code stream blocks are subjected to first encoding to obtain a 257-bit target code block. In the embodiment of the present application, n=2 is taken as an example, and when n is other value, the first encoding process may be performed on every four groups of code stream blocks, so as to obtain a plurality of target code blocks. For example, n=3, that is, eight groups of code stream blocks are obtained, a target code block may be obtained by performing first encoding on the first four groups of code stream blocks, and a target code block may be obtained by performing first encoding on the second four groups of code stream blocks.

In one possible implementation, pair 2 ⁿ The group code stream block is first encoded to obtain a target code block including, but not limited to, the following coding mode one and coding mode two.

Coding mode one, based on 2 ⁿ The control block of the group code stream block determines the type of the target code block as a data code block; based on 2 ⁿ Sequential pair 2 of group code stream blocks ⁿ Performing first coding on the data blocks of the group code stream blocks to obtain data units; based on the type and the data unit, a target code block is obtained.

For example, for the target code block obtained by the first encoding mode, the type is used for indicating that the target code block is a data code block; the data unit is based on 2 ⁿ Sequential pair 2 of group code stream blocks ⁿ And performing first coding on the data blocks of the group code stream blocks to obtain the data blocks.

In one possible implementation, at 2 ⁿ And under the condition that the control blocks of the group code stream blocks are all of a first specified value, determining the type of the target code block as the data code block, wherein the first specified value is used for indicating that the type of the code stream block is the data code stream block. For example, the control blocks of each group of code stream blocks are denoted as TXC<7:0>For example, the first designated value is 0x00, and the TXC of each group of code stream blocks is described as<7:0>In the case of both being 0x00,the types of the code stream blocks of each group are data code stream blocks.

In one possible implementation, 2 is based on ⁿ Sequential pair 2 of group code stream blocks ⁿ Performing first coding on the data blocks of the group code stream blocks to obtain data units, wherein the first coding comprises the following steps: based on 2 ⁿ The sequence of the group code stream blocks is respectively 2 ⁿ The data blocks of the group code stream block include bits as bits of the data unit to obtain the data unit.

Illustratively, the sequence numbers of the four groups of code stream blocks are denoted by j, j=0, 1,2, or 3.TXD_j <63:0> represents a data block of a j-th group of code stream blocks, tx_coded <256:0> represents a target code block, wherein tx_coded <0> represents a type of the target code block, tx_coded < (64j+64): (64j+1) > represents (64j+64) -th to (64j+1) -th bits of the target code block, and respective bits of tx_coded <256:0> are expressed as follows in expression 1 and expression 2:

tx_coded <0> =1 (expression 1)

tx_coded < (64j+64): (64j+1) > = txd_j <63:0>, j = 0,1,2 or 3 (expression 2)

In expression 1, tx_coded <0> =1 indicates that the type is a data code block, and in expression 2, tx_coded < (64j+64): (64j+1) > =txd_j <63:0> indicates that a plurality of bits of the data block of each group of code stream blocks are respectively taken as a plurality of bits of the data unit.

For example, when j=0, tx_coded <64:1> =txd_0 <63:0>, indicating that the 63 th to 0 th bits of the data block of the 0 th group of code stream blocks are taken as the 64 th to 1 st bits of the target code block, respectively. When j=1, tx_coded <128:65> =txd_1 <63:0>, meaning that the 63 st to 0 th bits of the data block of the 1 st group of code stream blocks are respectively taken as the 128 th to 65 th bits of the target code block. When j=2, tx_coded <192:129> =txd_2 <63:0>, meaning that the 63 st to 0 th bits of the data block of the 2 nd group of code stream blocks are taken as the 192 st to 129 th bits of the target code block, respectively. When j=3, tx_coded <256:193> =txd_3 <63:0>, meaning that the 63 rd bit to the 0 th bit of the data block of the 3 rd group of code stream blocks are taken as the 256 th bit to the 193 rd bit of the target code block, respectively.

Illustratively, fig. 3 shows a schematic diagram of a process for obtaining a target code block. As shown in fig. 3, for the four obtained groups of code stream blocks, the control blocks of each group of code stream blocks are denoted as TXC <7:0>, and the data blocks are denoted as TXD <63:0>. The TXC <7:0> of the four groups of code stream blocks is 0x00, and the type of the target code block is a data code block. Illustratively, the type of the target code block corresponds to bit 0 of the target code block, and assigning bit 0 to 1 indicates that the type is a data code block. The embodiments of the present application are not limited with respect to the manner in which the 0 th bit is assigned to represent the type as a data code block. Based on the order of the four groups of code stream blocks, a plurality of bits of the data blocks of the four groups of code stream blocks are respectively used as a plurality of bits of the data unit, so as to obtain the data unit. Thus, the target bit can be obtained based on the type and the data unit.

Illustratively, the structure of the obtained target code block is shown in fig. 4, where the 0 th bit of the target code block is used to represent the type of the target code block, and the 0 th bit is assigned to 1 to represent that the type of the target code block is a data code block. Bits 1 to 256 of the target code block are used to represent the data unit of the target code block, where D0 represents 64 bits of the data block of the 0 th group of code stream blocks, D1 represents 64 bits of the data block of the 1 st group of code stream blocks, D2 represents 64 bits of the data block of the 2 nd group of code stream blocks, and D3 represents 64 bits of the data block of the 3 rd group of code stream blocks.

Coding mode two, based on 2 ⁿ The control block of the group code stream block determines the type of the target code block as a control code block; based on 2 ⁿ Control block of group code stream block, obtain 2 ⁿ The identification value of the group code stream block is used for indicating the type of the code stream block; will 2 ⁿ The identification value of the group code stream block is used as a type indication; based on 2 ⁿ Sequence pair 2 determined by control block and data block of group code stream block ⁿ Performing first coding on the data blocks of the group code stream blocks to obtain code block contents; a target code block is derived based on the type and the data unit, wherein the data unit includes a type indication and code block content.

Illustratively, the target code block obtained by the second encoding mode includes a type and a data unit. Wherein the method comprises the steps ofThe type is used for indicating the target code block as a control code block; the data unit includes a type indication and code block content, the code block content based on 2 ⁿ Sequence pair 2 determined by control block and data block of group code stream block ⁿ The data block of the group code stream block is obtained by first encoding, and the type indication is based on 2 ⁿ The control blocks of the group code stream blocks are obtained and the type indication is used for indicating the type of each group code stream block. Illustratively, 2 ⁿ The order of determination of the control blocks and the data blocks of the group code stream block is 2 ⁿ The order of reception of the group code stream blocks.

In one possible implementation, 2 ⁿ The control block of at least one of the group of code stream blocks is a second specified value by which the type of the target code block can be determined to be the control code block. The second specified value is used for indicating that the type of the code stream block is a control code stream block, and the second specified value is different from the first specified value. That is, at 2 ⁿ In the case that at least one group of code stream blocks is a control code stream block, the target code block is a control code block. For example, the control blocks of each group of code stream blocks are denoted as TXC<7:0>For example, the first specified value is 0x00, and the TXC of one group of code stream blocks in each group of code stream blocks<7:0>If the target code block is not 0x00, the target code block is a control code block.

Illustratively, for 2 ⁿ And a group of code stream blocks in the group of code stream blocks, wherein the identification value of the group of code stream blocks is a third appointed value under the condition that the type of the group of code stream blocks is a data code stream block, and the identification value of the group of code stream blocks is a fourth appointed value under the condition that the type of the group of code stream blocks is a control code stream block. For example, the third specified value is 1 and the fourth specified value is 0. Illustratively, will be 2 ⁿ The identification value of the group code stream block is used as a type indication, and comprises the following steps: according to 2 ⁿ The order of the control block and the data block of the group code stream block is determined, 2 ⁿ The identification values of the group code stream blocks are respectively used as various bits of the type indication to obtain the type indication.

Illustratively, based on 2 ⁿ Sequence pair 2 determined by control block and data block of group code stream block ⁿ Performing first coding on the data blocks of the group code stream blocks to obtain code block contents, wherein the first coding comprises the following steps: base groupAt 2 ⁿ Sequence pair 2 determined by control block and data block of group code stream block ⁿ And carrying out first coding on the data blocks of the group code stream blocks to obtain the content of each group of code stream blocks after the first coding, and taking the content of each group of code stream blocks after the first coding as the code block content.

In one possible implementation, for 2 ⁿ The type of the group code stream block is a data code stream block (TXC<7:0>=0x00), the content of the group of code stream blocks after the first encoding is the content of the data blocks of the group of code stream blocks. For 2 ⁿ The first encoded content of the group of code stream blocks includes, but is not limited to, the following cases A1 to a11, depending on the control blocks and data blocks of the group of code stream blocks.

In case A1, the control block is 0x01, and the 7 th bit to 0 th bit of the data block are 0xFB, where LSB is the bit transmitted first.

Illustratively, for case A1, the data block includes 1 control byte and 7 data bytes, where the data bytes are also referred to as octets (octets). In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are a Block Type Field (BTF) part, and the BTF part is 0x8. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0x78. In either case, the remaining 56 bits are each of the 7 data bytes that the data block comprises.

In case A2, the control block is 0xFF, the (k+7) th bit to the kth bit of the data block are at least one of 0x06,0x07 or 0xFE, k=0, 1,2,3,4,5,6 or 7, wherein LSB is the bit transmitted first.

Illustratively, for case A2, the data block includes 8 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0xE. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0x1E. In either case, the remaining 56 bits are the 0 th bit, 6 th bit of the 8 control bytes included in the data block.

In case A3, the control block is 0x01, and bits 7 to 0 of the data block are 0x9C, wherein LSB is a bit transmitted first.

Illustratively, for case A3, the data block includes 1 control byte and 7 data bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF portions, and the BTF portions are 0xB. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0x4B. In either case, the 24 bits after the BTF portion are the 31 st to 8 th bits of the data block. The 4 bits after the data byte are O codes (O codes) which are available according to the IEEE802.3 standard. The remaining 28 bits are illustratively a plurality of first stuff bits, wherein the plurality of first stuff bits may be derived based on the data bytes of the data block or the plurality of first stuff bits are all 0.

In case A4, the control block is 0xFF, and the 7 th bit to 0 th bit of the data block are 0xFD, where LSB is the bit transmitted first.

Illustratively, for case A4, the data block includes 8 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0x7. In the case where the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0x87. In either case, the 7 bits after the BTF portion are all 0, and the remaining 49 bits are the 6 th to 0 th bits of the last 7 control bytes included in the data block.

In case A5, the control block is 0xFE, and the 15 th bit to 8 th bit of the data block are 0xFD, where LSB is the bit sent first.

Illustratively, for case A5, the data block includes 1 data byte and 7 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0x9. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0x99. In either case, the 8 bits after the BTF portion are each bit of the data byte included in the data block, the 6 bits after the data byte are all 0, and the remaining 42 bits are the 6 th bit to the 0 th bit of the 6 th control byte included in the data block.

In case A6, the control block is 0xFC, and the 23 rd bit to 16 th bit of the data block are 0xFD, where LSB is the bit transmitted first.

Illustratively, for case A6, the data block includes 2 data bytes and 6 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0xA. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0xAA. In either case, the 16 bits after the BTF portion are each bits of 2 data bytes included in the data block, the 5 bits after the data byte are all 0, and the remaining 35 bits are the 6 th bit to the 0 th bit of the last 5 control bytes included in the data block.

In case A7, the control block is 0xF8, and the 31 st to 24 th bits of the data block are 0xFD, where LSB is the first transmitted bit.

Illustratively, for case A7, the data block includes 3 data bytes and 5 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0x4. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0xB4. In either case, the 28 bits after the BTF portion are each of the 3 data bytes included in the data block, the 4 bits after the data byte are all 0, and the remaining 28 bits are the 6 th bit to the 0 th bit of the last 4 control bytes included in the data block.

In case A8, the control block is 0xF0, and the 39 th to 32 th bits of the data block are 0xFD, where LSB is the bit transmitted first.

Illustratively, for case A8, the data block includes 4 data bytes and 4 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0xC. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0xCC. In either case, the 32 bits after the BTF portion are each of the 4 data bytes included in the data block, the 3 bits after the data byte are all 0, and the remaining 21 bits are the 6 th bit to the 0 th bit of the last 3 control bytes included in the data block.

In case A9, the control block is 0xE0, and the 47 th bit to 40 th bit of the data block are 0xFD, where LSB is the bit transmitted first.

Illustratively, for case A9, the data block includes 5 data bytes and 3 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0x2. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF portions, and the BTF portions are 0xD2. In either case, the 32 bits after the BTF portion are each bits of 5 data bytes included in the data block, the 2 bits after the data byte are all 0, and the remaining 12 bits are the 6 th bit to the 0 th bit of the last 2 control bytes included in the data block.

In case a10, the control block is 0xC0, and bits 55 to 48 of the data block are 0xFD, where LSB is a bit transmitted first.

Illustratively, for case a10, the data block includes 6 data bytes and 2 control bytes. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0x1. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0xE1. In either case, the 48 bits after the BTF portion are each of the 6 data bytes included in the data block, the 1 bit after the data byte is 0, and the remaining 7 bits are the 6 th bit to the 0 th bit of the last 1 control byte included in the data block.

In case a11, the control block is 0x80, and the 63 st to 56 th bits of the data block are 0xFD, where LSB is the first transmitted bit.

Illustratively, for case a11, the data block includes 7 data bytes and 1 control byte. In the case that the group of code stream blocks is the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 60 bits, the first 4 bits are BTF parts, and the BTF parts are 0xF. In the case that the group of code stream blocks is not the first group of control code stream blocks, the content of the group of code stream blocks after the first encoding is 64 bits, the first 8 bits are BTF parts, and the BTF parts are 0xFF. In either case, the remaining 56 bits are each of the 7 data bytes comprised by the data block.

Thus, based on 2 ⁿ The order of the control block and the data block of the group code stream block is determined, 2 ⁿ The first encoded content of the group code stream block is used as code block content. Thus, the target code block can be obtained based on the type, the type indication, and the code block content.

Illustratively, j represents the sequence number of the four groups of code stream blocks, j=0, 1,2, or 3.Txc_j <7:0> represents a control block of the j-th group of code stream blocks, tx_payload <251:0> represents the first encoded content of the four groups of code stream blocks, tx_coded <256:0> represents the target code block, wherein tx_coded <0> represents the type of the target code block, tx_coded < j+1> represents the type indication of the target code block, tx_coded <256:5> represents the code block content of the target code block, and the respective bits of tx_coded <256:0> are expressed as the following expressions 3 to 5:

tx_coded <0> =0 (expression 3)

tx_coded <256:5> = tx_payload <251:0> (expression 5)

In expression 3, tx_coded <0> =0 indicates that the type is a control code block. In expression 4, when txc_j <7:0> is not 0x00, the bit of the target code block corresponding to the j value is 0, and when txc_j <7:0> is 0x00, the bit of the target code block corresponding to the j value is 1. In expression 5, tx_coded <256:5> =tx_payload <251:0> means that a plurality of bits of the content of the first encoded four groups of code stream blocks are taken as a plurality of bits of the code block content, respectively.

Illustratively, the structure of the target code block is as shown in fig. 5, and 0 to 3 in fig. 5 represent the sequence numbers of the four groups of code stream blocks, respectively. The left side of fig. 5 shows the types of four groups of code stream blocks acquired, C shows the control code stream blocks, and D shows the data code stream blocks. The right side of fig. 5 shows the structure of the target code block obtained corresponding to different cases, where b represents a bit, for example, 1b represents 1 bit, and 4b represents 4 bits. For example, in case 1 in fig. 5, the types of the four groups of code stream blocks are control code stream blocks, and bits 0 to 1 of the target code block obtained by the first encoding are 0; bits 8 to 5 are denoted as f_0, and correspond to a BTF portion in the first encoded content of the 0 th group of code stream blocks, and bits 64 to 9 correspond to the rest of the first encoded content of the 0 th group of code stream blocks, that is, C0; bits 72 to 65 are represented as BTF1, correspond to a BTF portion in the first encoded content of the 1 st group of code stream blocks, and bits 128 to 73 correspond to the rest of the first encoded content of the 1 st group of code stream blocks, that is, C1; bits 136 to 129 are represented as BTF2, and correspond to BTF portions in the first encoded content of the 2 nd group of code stream blocks, and bits 192 to 137 correspond to the rest of the first encoded content of the 2 nd group of code stream blocks, that is, C2; bits 200 to 193 are denoted as BTF3, and correspond to the BTF portion of the first encoded content of the 3 rd group of code stream blocks, and bits 256 to 201 correspond to the rest of the first encoded content of the fourth group of code stream blocks, i.e., C3. The remaining cases in fig. 5 are the same as the principle of case 1 described above, for example, for case 2, the 68 th bit to the 5 th bit of the target code block are denoted as D0, the content of the first encoded group 0 code stream block is denoted as f_1, the 72 th bit to the 69 th bit are denoted as f_1, the BTF portion of the first encoded content of the 1 st group 1 code stream block is corresponded to the remaining content of the first encoded content of the 1 st group 1 code stream block, that is, C1, and the other cases in fig. 5 will not be repeated here.

In one possible implementation, the target code block is an error code block, and the error code block includes data for identifying an error. Illustratively, when 2 ⁿ When one of the group of code stream blocks does not belong to the data code stream block or any of the cases A1 to a11, determining that the target code block is an error code block; based on 2 ⁿ Control block of group code stream block, obtain 2 ⁿ Type of group code stream block based on 2 ⁿ The type of the group code stream block results in a type indication of the target code stream block, the type and type indication being the data in the error code block that is used to identify the error. For example, the 0 th bit corresponding type, 1 st bit to 4 th bit corresponding type indicate, the 0 th bit is assigned to 0, and the 1 st bit to 4 th bit are all assigned to 1.

Illustratively, when the target code block is an error code block, the structure of the target code block is as shown in fig. 6. The left side of fig. 6 shows the types of the four groups of code stream blocks acquired, and E shows the error code stream blocks. The right side of fig. 6 is the structure of the target code block. The 0 th bit to the 4 th bit of the target code block are 0, the 1 st bit to the 4 th bit are 1, the 5 th bit to the 64 th bit correspond to the filler content obtained based on the first group of code stream blocks, the 65 th bit to the 128 th bit correspond to the filler content obtained based on the second group of code stream blocks, the 129 th bit to the 192 th bit correspond to the filler content obtained based on the third group of code stream blocks, and the 193 rd bit to the 256 th bit correspond to the filler content obtained based on the fourth group of code stream blocks. Illustratively, each bit of the filler content is 0. Illustratively, the filler content based on the first set of code stream blocks is denoted as E0, the filler content based on the second set of code stream blocks is denoted as E1, the filler content based on the third set of code stream blocks is denoted as E2, and the filler content based on the fourth set of code stream blocks is denoted as E3.

The encoding method provided by the embodiment of the application can perform the first encoding on the code stream blocks of different types to obtain the target code block, and has wider applicability.

In one possible implementation, pair 2 ⁿ Performing first coding on the group code stream block to obtain a target code block, wherein the first coding comprises the following steps: based on 2 ⁿ The control block and the data block of the group code stream block obtain an error detection result; based on error detection result pair 2 ⁿ Processing the group code stream block, and processing the processed 2 ⁿ And performing first coding on the group code stream block to obtain a target code block. That is, the target code block is based on the error detection result pair 2 ⁿ The group code stream block is processed to obtain an error detection result based on 2 ⁿ The control block and the data block of the group code stream block are obtained.

Illustratively, based on 2 ⁿ The control block and the data block of the group code stream block obtain an error detection result, comprising: based on 2 ⁿ The control block and the data block of the group code stream block are obtained 2 ⁿ Content and content order of group code stream blocks based on 2 ⁿ The content and the content sequence of the group code stream block obtain an error detection result. For example, when 2 ⁿ When the content sequence of the group code stream block is at least one of the first error condition set, the method comprises the steps of 2 ⁿ The content of the group code stream block is in error order, when 2 ⁿ When the content order of the group code stream blocks is not any of the first error condition set, the method 2 ⁿ The content order of the group code stream blocks is correct. Also for example, when 2 ⁿ When the content of the group code stream block is at least one of the second set of error conditions, the 2 ⁿ Content error of group code stream block, when 2 ⁿ When the content of the group code stream block is not any one of the second error condition set, the method 2 ⁿ Group code stream blockIs correct.

In one possible implementation, two adjacent groups of code stream blocks are illustrated, and the first set of error conditions includes, but is not limited to, the following 4 conditions:

(1) Where the former group of code stream blocks includes a start control word (/ S /), the latter group of code stream blocks includes other content than data bytes.

(2) Where the former group of code stream blocks includes only data bytes, the latter group of code stream blocks includes other content than data bytes or termination control words (/ T /).

(3) Where the former group of code stream blocks includes termination control words, the latter group of code stream blocks includes other content than idle control words (/ I /) or sequential ordered set control words (/ O /).

(4) Where the former group of code stream blocks includes idle control words or sequence ordered set control words, the latter group of code stream blocks includes data bytes or termination control words.

In one possible implementation, illustrated as a group of code stream blocks, the second set of error conditions includes, but is not limited to, the following 4 conditions:

(1) For a code stream block comprising a start control word, the start control word is followed by other content than data bytes.

(2) For a code stream block comprising data bytes, the data bytes are followed by other content than data bytes or termination control words.

(3) For a code stream block comprising termination control words, the termination control words are followed by other content than idle control words or sequence ordered set control words.

(4) For a code stream block comprising idle control words or sequence ordered set control words, the idle control words or sequence ordered set control words are followed by data bytes or termination control words.

Illustratively, the error detection result includes 2 ⁿ Content order error or content error of group code stream block based on 2 ⁿ The code stream blocks with wrong content sequence or wrong content in the group code stream blocks obtain error blocks, for 2 ⁿ The content order in the group code stream block is correct and the content is correctAnd (3) performing first coding on the code stream block and the error block to obtain a target code block. That is, when the error detection result includes 2 ⁿ In case of a content order error or a content error of the group code stream block, the target code block is based on 2 ⁿ The code stream blocks with correct content sequence and correct content in the group code stream blocks and error blocks are obtained by first encoding, and the error blocks are based on 2 ⁿ The code stream blocks with wrong content sequence or wrong content in the group code stream blocks are obtained. Illustratively, the error block includes an error control word (error control character).

In one possible implementation, for a bitstream block whose content is in error order or in error, the content of the bitstream block is converted into an error control word to obtain an error block. For example, a content order error or a content error code stream block is a first group of code stream blocks, the content of which is converted into a first error control word of 60 bits, the first 4 bits being 0xE, and then 0x1E every 7 bits. For another example, the content sequence error or the content error of the code stream block is at least one of the second group of code stream blocks, the third group of code stream blocks or the fourth group of code stream blocks, and the content of the code stream block is converted into a second error control word, the second error control word is 64 bits, the first 8 bits are 0x1E, and then each 7 bits are 0x1E.

Illustratively pair 2 ⁿ Performing first coding on the code stream blocks and the error blocks with correct content sequence in the group code stream blocks to obtain target code blocks, wherein the first coding comprises the following steps: determining the type of the target code block as a control code block; acquisition 2 ⁿ Identification value of group code stream block, identification value is used for indicating type of code stream block, and 2 is added ⁿ The identification value of the group code stream block is used as a type indication; based on 2 ⁿ The order of determination of the control blocks and data blocks of the block code stream block is for error blocks and 2 ⁿ And performing first coding on the data blocks of the code stream blocks with correct content sequence and correct content in the group code stream blocks to obtain code block contents.

For example based on 2 ⁿ The order of the control block and the data block of the group code stream block, pair 2 ⁿ First coding is carried out on the data blocks of the code stream blocks with correct content sequence and correct content in the group code stream blocks, so as to obtain the code stream blocks with correct content sequence and correct contentAnd obtaining a target code block based on the first coded content and the error block of the code stream block with the correct content sequence and the correct content after the first coded content. Regarding the manner of performing the first encoding on the data blocks of the code stream blocks with the correct content sequence and the correct content, please refer to the related content of performing the first encoding on the code stream blocks with the type of the data code stream blocks and the code stream blocks with the type of the control code stream blocks in the foregoing, which will not be described herein.

Illustratively at 2 ⁿ When each of the group code stream blocks is a code stream block having a content order error or a content error, the method is based on 2 ⁿ Group code stream block gets 2 ⁿ Error blocks for the 2 ⁿ And performing first coding on the error blocks to obtain target code blocks, wherein the target code blocks are error code blocks.

By processing the code stream block with the error, the data with the error can be distinguished from the correct data when the data transmission is carried out later, and the reliability of the data is ensured.

Illustratively, after obtaining the target code block, the method further comprises: performing second coding on the target code block according to the FEC code pattern to obtain first data; the first data is transmitted. The embodiment of the present application is not limited with respect to the manner in which the target code block is second encoded according to the FEC code pattern. And performing second coding on the target code block according to the FEC code pattern to obtain first data, so that the receiving end can correct the received first data, and the accuracy of data transmission is ensured.

The encoding method provided by the embodiment of the application is applied to the 2 comprising a control block and a data block ⁿ First encoding the group code stream block to obtain a target code block without 2 ⁿ Each group of code stream blocks in the group of code stream blocks is subjected to 64B/66B coding to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ And transcoding the 66-bit code blocks to obtain target code blocks. Therefore, the coding efficiency is improved, and the time delay, the power consumption and the chip area occupation caused by the coding process are reduced.

The foregoing describes the encoding method provided by the embodiments of the present application, and the following describes the decoding method provided by the embodiments of the present application. In connection with the implementation scenario shown in fig. 1, the decoding method provided in the embodiment of the present application is shown in fig. 7. Illustratively, the decoding method provided by the embodiments of the present application is performed by the chip 104 of fig. 1, which includes, but is not limited to, step 701 and step 702.

In step 701, a target code block is obtained, the target code block comprising a type and a data unit.

Illustratively, in connection with the implementation scenario of fig. 1, the chip 102 sends first data encoded in the FEC code pattern to the chip 104 via the channel 105, and during data transmission, errors may occur in the first data, and the data with errors is referred to as second data, and the chip 104 receives the second data via the channel 105.

In one possible implementation, the target code block is obtained, including but not limited to the following manner a and manner B.

Mode a, receiving second data, the second data being obtained based on the first data encoded with the FEC pattern; and performing second decoding on the second data to obtain a target code block, wherein the second decoding is error correction processing.

Illustratively, the target code block is an error code block obtained by error correcting the second data but not successfully error correcting. For example, performing the second decoding on the second data to obtain the target code block includes: and processing the second data according to the FEC code pattern to obtain a first codeword, performing error correction processing on the first codeword, and acquiring a target code block based on the error correction processing result.

Illustratively, the chip 104 has the function of an FEC decoder, and marks all code blocks in a first codeword as error code blocks when the FEC decoder determines that the number of error codes exceeds the error correction capability of the FEC decoder, that is, when the FEC decoder determines that the first codeword cannot be corrected. Thus, in the case where the error correction processing results in marking all the code blocks in the first codeword as error code blocks, the obtained target code block is an error code block.

Illustratively, when the error correction processing results in successful error correction of the first codeword, the code block obtained based on the first codeword after error correction is taken as the acquired target code block, and the code block obtained based on the first codeword after error correction is the code block that is successful in error correction.

Mode B, receiving second data, the second data being obtained based on the first data encoded with the forward error correction FEC pattern; and performing second decoding on the second data to obtain a target code block, wherein the second decoding is error detection but no error correction processing.

Illustratively, the target code block is an error code block obtained by detecting an error from the second data without correcting the error. For example, performing the second decoding on the second data to obtain the target code block includes: processing the second data according to the FEC code pattern to obtain a first codeword, and performing error detection only but no error correction (bypass correction) on the first codeword; the target code block is acquired based on the result of the error detection but no error correction processing.

Illustratively, the chip 104 has the function of an FEC decoder, and when the FEC decoder detects that there is an error in a first codeword, marks all code blocks in the first codeword as error code blocks. Thus, in the case where the error detection but no error correction processing results in marking all code blocks in the first codeword as error code blocks, the acquired target code block is an error code block.

In an exemplary case where the first codeword is error-free as a result of the error detection but no error correction processing, the code block obtained based on the first codeword is taken as the acquired target code block, and the code block obtained based on the first codeword is an error-free code block.

Illustratively, the frame check sequence (frame check sequence, FCS) frame check performed based on the target code block fails. For example, the target code block is 257 bits, the first 5 bits are 01111, and the remaining 252 bits include, but are not limited to, the following three cases: (1) The first 4 bits are 0x1, and every 8 bits in the rest bits are 0x1E; (2) Every 8 bits in the first 248 bits are 0x1E, and the last 4 bits are 0x1; (3) each bit is 0.

Step 702, performing a first decoding on the target code block according to the type and the data unit of the target code block to obtain 2 ⁿ And the code stream blocks comprise control blocks and data blocks which are obtained based on types and data units, and n is an integer greater than 1.

Exemplary, the target code blocks are 257 bits, the control blocks of each group of code stream blocks are 8 bits, and the data blocks areIs 64 bits. Taking an example of first decoding one target code block to obtain four groups of code stream blocks (n=2) as an example, when a plurality of target code blocks are obtained, the first decoding process may be performed on each target code block to obtain 2 ⁿ And (5) assembling code stream blocks. For example, when two target code blocks are acquired, the two code blocks may be first decoded to obtain four groups of code stream blocks, that is, the two target code blocks may be first decoded to obtain eight groups of code stream blocks.

In one possible implementation, the target code block is first decoded according to the type and the data unit of the target code block to obtain 2 ⁿ The group code stream blocks include, but are not limited to, decoding mode one through decoding mode three as follows.

In the first decoding mode, the type of the target code block is determined to be a data code block based on the type of the target code block, and a data unit of the target code block comprises 2 ⁿ Content of 8m length, m is a positive integer; obtaining 2 based on the type of the target code block ⁿ Control block of group code stream block, 2 included in data unit ⁿ Respectively performing first decoding on 8 m-length content to obtain 2 ⁿ Data blocks of the group code stream block.

Illustratively, in the case of the type used for indicating that the target code block is a data code block, a first decoding is performed on the target code block by adopting a decoding mode to obtain 2 ⁿ And (5) assembling code stream blocks. The 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by first decoding 8 m-length content corresponding to the ith group of code stream blocks in a data unit, wherein i is greater than or equal to 1 and less than or equal to 2 ⁿ Or i is an integer of 0 or more and 2 or less ⁿ -an integer of 1.

In one possible implementation, the type of the target code block is 1, which is used to indicate that the target code block is a data code block, and the data unit of the target code block includes four 8 m-length contents, where one 8 m-length content corresponds to a set of code stream blocks. The 8m length is 64 bits, for example. The control blocks of the four groups of code stream blocks are all set to 0x00, and four 64-bit contents are respectively used as the contents of the data blocks of the four groups of code stream blocks.

Illustratively, j represents the sequence number of the four groups of code stream blocks, j=0, 1,2, or 3.RXC_j <7:0> represents a control block of a j-th group of code stream blocks, RXD_j <63:0> represents a data block of a j-th group of code stream blocks, rx_coded <256:0> represents a target code block, wherein rx_coded <0> represents a type of the target code block, rx_coded < (64j+64): (64j+1) > represents (64j+64) -th to (64j+1) -th bits of the target code block, and contents of RXC_j <7:0> and RXD_j <63:0> are as shown in the following expression 6 and expression 7:

rxc_j <7:0> =0x00, j=0, 1,2 or 3 (expression 6)

RXD_j <63:0> = rx_coded < (64j+64): (64j+1) >, j=0, 1,2 or 3 (expression 7)

In expression 6, rxc_j <7:0> =0x00 represents that the control blocks of each group of code stream blocks are all 0x00, and in expression 7, rxd_j <63:0> =rx_coded < (64j+64): (64j+1) > represents 64 bits of a data block having every 64 bits of a data unit as a group of code stream blocks.

For example, when j=0, rxd_0<63:0> =rx_coded <64:1>, indicating that the 64 th to 1 st bits of the target code block are respectively regarded as the 63 th to 0 th bits of the data block of the 0 th group of code stream blocks. When j=1, rxd_1<63:0> =rx_coded <128:65>, indicating that the 128 th bit to the 65 th bit of the target code block are respectively regarded as the 63 st bit to the 0 th bit of the data block of the 1 st group of code stream blocks. When j=2, rxd_2<63:0> =rx_coded <192:129>, meaning that the 192 th to 129 th bits of the target code block are respectively regarded as the 63 th to 0 th bits of the data block of the 2 nd group of code stream blocks. When j=3, rxd_3<63:0> =rx_coded <256:193>, meaning that the 256 th to 193 th bits of the target code block are respectively regarded as the 63 rd to 0 th bits of the data block of the 3 rd group of code stream blocks.

In the second decoding mode, the type of the target code block is determined to be a control code block based on the type of the target code block, a data unit of the target code block comprises a type indication and code block content, and the type indication comprises 2 ⁿ A number of bits of 2 ⁿ 1 of the bits is used to indicate 2 ⁿ A group of code stream blocks corresponding to the bit in the group of code stream blocksType, code block content includes 2 ⁿ A group of bits; based on type, type indication, and 2 ⁿ Bits corresponding to the group code stream blocks and bits corresponding to 2 in the code block content ⁿ Bit group corresponding to the group code stream block is 2 ⁿ Control block for group code stream block based on type indication and 2 ⁿ Bit pair code block content corresponding to group code stream block and 2 ⁿ Performing first decoding on bit groups corresponding to the group code stream blocks to obtain 2 ⁿ Data blocks of the group code stream block.

Illustratively, in the case where the type is used to indicate that the target code block is a control code block, the target code block is first decoded using the second decoding method to obtain 2 ⁿ And (5) assembling code stream blocks. The 2 ⁿ The control block included in the ith group of code stream blocks in the group of code stream blocks is obtained based on the type, the bit corresponding to the ith group of code stream blocks in the type indication and the bit group corresponding to the ith group of code stream blocks in the code block content, i is more than or equal to 1 and less than or equal to 2 ⁿ Or i is an integer of 0 or more and 2 or less ⁿ -an integer of 1; the 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing first decoding on the bit groups corresponding to the ith group of code stream blocks in the code block content based on the bits corresponding to the ith group of code stream blocks in the type indication. Illustratively, a group of bits is a set of a plurality of bits.

Illustratively, when one bit in the type indication is 1, the type of the code stream block obtained based on the bit is a data code stream block; when one bit in the type indication is 0, the type of the code stream block obtained based on the bit is the control code stream block.

In one possible implementation, 2 ⁿ The bit groups include a first bit group and 2 ⁿ -1 second group of bits, the first group of bits comprising a different number of bits than the second group of bits. Illustratively, one bit of the type indication corresponds to one bit group of the code block content. For example, the structure of the target code block shown in fig. 5 is described as an example. For case 1, the type indication includes four bits and the code block content includes four bit groups. Wherein the first bit of the type indication corresponds to a first bit group, the first bit group being a target code blockFrom bit 5 to bit 64; the second bit of the type indication corresponds to a second bit group, and the second bit group corresponding to the second bit is the 65 th bit to the 128 th bit of the target code block; the third bit of the type indication corresponds to a second bit group, and the second bit group corresponding to the third bit is the 129 th bit to 192 th bit of the target code block; the fourth bit of the type indication corresponds to a second bit group, and the second bit group corresponding to the fourth bit is from 193 rd bit to 256 th bit of the target code block. For case 2, the type indication includes four bits and the code block content includes four bit groups. Wherein, the first bit of the type indication corresponds to a second bit group, and the second bit group corresponding to the first bit is the 5 th bit to 67 th bit of the target code block; the second bit of the type indication corresponds to a first bit group, and the first bit group is 68 th bit to 128 th bit of the target code block; the third bit of the type indication corresponds to a second bit group, and the second bit group corresponding to the third bit is the 129 th bit to 192 th bit of the target code block; the fourth bit of the type indication corresponds to a second bit group, and the second bit group corresponding to the fourth bit is from 193 rd bit to 256 th bit of the target code block. The other cases are the same as the principle of the case 1 and the case 2 described above, and will not be described here again.

In one possible implementation manner, for a bit of the type indication, in a case that the bit is 1, a control block of a code stream block obtained based on the type, the bit and a bit group corresponding to the bit is 0x00, and a content of a data block of the code stream block obtained by performing first decoding on the bit group corresponding to the bit based on the bit is a content of the bit group. In the case where the bit is 0, the control block and the data block of the resultant code stream block include, but are not limited to, the following cases B1 to B11, depending on the position of the bit and the case of the bit group to which the bit corresponds.

Case B1, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x8; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x78.

Illustratively, for case B1, the BTF portion of the bit group to which the bit corresponds is followed by 7 data bytes. The control block of the code stream block is 0x01, and the data block of the code stream block is 64 bits. Bits 7 to 0 of the data block are 0xFB, and the remaining 56 bits are each bit of 7 data bytes of the bit group corresponding to the bit. Wherein, LSB is the bit sent first.

Case B2, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xE; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x1E.

Illustratively, for case B2, the BTF portion of the bit group to which the bit corresponds is followed by 8 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xFF, and the data block of the code stream block is 64 bits. The 64 bits of the data block are derived based on 8 control bit groups, wherein each 8 bits of the data block are based on one control bit group. As to the manner in which the individual bits of the data block are derived based on the individual control bit groups, embodiments of the present application are not limited thereto, e.g., derived according to the IEEE802.3 standard. Illustratively, the (k+7) th bit through the kth bit of the data block is at least one of 0x06,0x07, or 0xFE, k=0, 1,2,3,4,5,6, or 7. Wherein, LSB is the bit sent first.

Case B3, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xB; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x4B.

Illustratively, for case B3, the BTF portion of the bit group to which the bit corresponds is followed by 3 data bytes, 1 4 bits of O-code, and a plurality of first pad bits. The control block of the code stream block is 0x01, and the data block of the code stream block is 64 bits. Bits 7 to 0 of the data block are 0x9C, bits 31 to 8 of the data block are respective bits of 3 data bytes, and the remaining 32 bits are obtained based on a plurality of first stuff bits. Wherein, LSB is the bit sent first. The embodiment of the present application is not limited in terms of the manner in which the remaining 32 bits are derived based on the first plurality of padding bits.

Case B4, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x7; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x87.

Illustratively, for case B4, the BTF portion of the bit group to which the bit corresponds is followed by 1 termination control word of 7 bits and 7 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xFF, and the data block of the code stream block is 64 bits. The 7 th bit to 0 th bit of the data block are 0xFD, and the remaining 56 bits are obtained based on 7 control bit groups, wherein each 8 bits of the remaining 56 bits are obtained based on one control bit group. Wherein, LSB is the bit sent first.

Case B5, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x9; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x99.

Illustratively, for case B5, the BTF portion of the bit group to which the bit corresponds is followed by 1 data byte, 1 6-bit termination control word, and 6 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xFE, and the data block of the code stream block is 64 bits. Bits 7 to 0 of the data block are bits of the data byte, bits 15 to 8 of the data block are 0xFD, and the remaining 48 bits are obtained based on 6 control bit groups, wherein each 8 bits of the remaining 48 bits are obtained based on one control bit group. Wherein, LSB is the bit sent first.

Case B6, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xA; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xAA.

Illustratively, for case B6, the BTF portion of the bit group to which the bit corresponds is followed by 2 data bytes, 1 termination control word of 5 bits and 5 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xFC, and the data block of the code stream block is 64 bits. Bits 15 to 0 of the data block are obtained based on respective bits of 2 data bytes, 23 to 16 bits of the data block are 0xFD, and the remaining 40 bits are obtained based on 5 control bit groups, wherein each 8 bits of the remaining 40 bits are obtained based on one control bit group. Wherein, LSB is the bit sent first.

Case B7, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x4; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xB4.

Illustratively, for case B7, the BTF portion of the bit group to which the bit corresponds is followed by 3 data bytes, 1 4-bit termination control word, and 4 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xF8, and the data block of the code stream block is 64 bits. Bits 23 to 0 of the data block are obtained based on respective bits of 3 data bytes, bits 31 to 24 of the data block are 0xFD, and the remaining 32 bits are obtained based on 4 control bit groups, wherein each 8 bits of the remaining 32 bits are obtained based on one control bit group. Wherein, LSB is the bit sent first.

Case B8, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xC; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xCC.

Illustratively, for case B8, the BTF portion of the bit group to which the bit corresponds is followed by 4 data bytes, 1 3-bit termination control word and 3 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xF0, and the data block of the code stream block is 64 bits. Bits 31 to 0 of the data block are obtained based on respective bits of 4 data bytes, bits 39 to 32 of the data block are 0xFD, and the remaining 24 bits are obtained based on 3 control bit groups, wherein each 8 bits of the remaining 24 bits are obtained based on one control bit group. Wherein, LSB is the bit sent first.

Case B9, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x2; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xD2.

Illustratively, for case B9, the BTF portion of the bit group to which the bit corresponds is followed by 5 data bytes, 1 termination control word of 2 bits and 2 control bit groups, each control bit group comprising 7 bits. The control block of the code stream block is 0xE0, and the data block of the code stream block is 64 bits. Bits 39 to 0 of the data block are obtained based on respective bits of 5 data bytes, bits 47 to 40 of the data block are 0xFD, and the remaining 16 bits are obtained based on 2 control bit groups, wherein each 8 bits of the remaining 16 bits are based on one control bit group. Wherein, LSB is the bit sent first.

Case B10, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0x1; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xE1.

Illustratively, for case B10, the BTF portion of the bit group to which the bit corresponds is followed by 6 data bytes, 1 termination control word of 1 bit and 1 control bit group of 7 bits. The control block of the code stream block is 0xC0, and the data block of the code stream block is 64 bits. Bits 47 to 0 of the data block are obtained based on respective bits of 6 data bytes, bits 55 to 48 of the data block are 0xFD, and the remaining 8 bits are obtained based on the control bit group. Wherein, LSB is the bit sent first.

Case B11, where the bit is the first bit of 0, the first 4 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xF; or the bit is not the first bit of 0, the first 8 bits of the bit group corresponding to the bit are BTF parts, and the BTF parts are 0xFF.

Illustratively, for case B11, the BTF portion of the bit group to which the bit corresponds is followed by 7 data bytes. The control block of the code stream block is 0x80, and the data block of the code stream block is 64 bits. Bits 55 to 0 of the data block are obtained based on respective bits of 7 data bytes, and bits 63 to 56 of the data block are 0xFD. Wherein, LSB is the bit sent first.

In some embodiments, and 2 in the type, type indication based on ⁿ Bits corresponding to the group code stream blocks and bits corresponding to 2 in the code block content ⁿ Bit group corresponding to the group code stream block is 2 ⁿ Control block for group code stream block based on type indication and 2 ⁿ Bit pair code block content corresponding to group code stream block and 2 ⁿ Performing first decoding on bit groups corresponding to the group code stream blocks to obtain 2 ⁿ A data block of a group code stream block, comprising: based on 2 ⁿ Acquisition of groups of bits 2 ⁿ A third 64-bit group based on type, type indication and 2 ⁿ Bit sum 2 corresponding to group code stream block ⁿ The third bit group is 2 ⁿ Control block for group code stream block based on type indication and 2 ⁿ Bit pair 2 corresponding to group code stream block ⁿ The third bit group is subjected to first decoding to obtain 2 ⁿ Data blocks of the group code stream block.

Illustratively, for the first bit of 0, the bit set corresponding to the bit includes a 4-bit BTF portion, and an 8-bit BTF portion is obtained based on the 4-bit BTF portion, resulting in a third bit set. For example, the IEEE802.3 standard is queried based on the 4-bit BTF part to acquire an 8-bit BTF part, or a correspondence table of the 4-bit BTF part and the 8-bit BTF part is queried based on the 4-bit BTF part to acquire an 8-bit BTF part.

In case of successful inquiry, namely, the IEEE802.3 standard includes an 8-bit BTF part corresponding to the 4-bit BTF part, or the correspondence table includes an 8-bit BTF part corresponding to the 4-bit BTF part, the 8-bit BTF part is taken as the acquired 8-bit BTF part. In the case of a query failure, that is, the 8-bit BTF part corresponding to the 4-bit BTF part is not included in the IEEE802.3 standard, or the 8-bit BTF part corresponding to the 4-bit BTF part is not included in the correspondence table, the 4-bit BTF part is marked to acquire the 8-bit BTF part. Regarding the way to mark the 4-bit BTF part, the embodiment of the present application is not limited, and for example, the 4-bit BTF part is set to 3 rd to 0 th bits, and the 7 th to 4 th bits are all set to 0. Illustratively, in the case of a query failure, the control block of the code stream block obtained based on the third bit group is 0xFF, and the data block is 0 xfefefefefe.

In other embodiments, for a first bit that is 0, obtaining a control block of a code stream block based on a type, the bit, and a bit group corresponding to the bit, and performing first decoding on the bit group corresponding to the bit based on the bit to obtain a data block of the code stream block, including: and inquiring the 8-bit BTF part based on the 4-bit BTF part included in the bit group corresponding to the bit, setting a control block of the code stream block to 0xFF and setting a data block of the code stream block to 0xFEFEFEFE under the condition of inquiry failure. The principle of the query method based on the 4-bit BTF part and the 8-bit BTF part is the same as that of the query method in the related content, and is not repeated here.

A third decoding mode, based on the type of the target code block and the data unit, determining the type of the target code block as an error code block; obtain 2 ⁿ Control block and data block of group code stream block, 2 ⁿ The group code stream blocks are error code stream blocks.

Illustratively, the data unit includes a type indication, the type and type indication indicating that the target code block is an error code block; 2 ⁿ Each group of code stream blocks comprises a control block with a first value of 2 ⁿ The data blocks included in each group of code stream blocks in the group of code stream blocks are second values, and the first values and the second values are used for indicating that the code stream blocks are error code stream blocks. For example, the type of the target code block is 0, the type is 1111, the target code block is an error code block, and then the first decoded result is 2 ⁿ Each group of code stream blocks in the group of code stream blocks comprises a control block of 0xFF,2 ⁿ And the data blocks included in each group of code stream blocks are all 0 xFEFEFEFEFE.

Due to the solutions provided by embodiments of the present applicationThe code method can perform first decoding on different types of target code blocks to obtain 2 ⁿ The method has wider applicability.

In one possible implementation, the target code block is first decoded according to the type and the data unit of the target code block to obtain 2 ⁿ A group code stream block comprising: obtaining an error detection result based on the type of the target code block and the data unit; performing first decoding on the target code block according to the error detection result, the type of the target code block and the data unit to obtain 2 ⁿ And (5) assembling code stream blocks. That is, 2 ⁿ The group code stream block is obtained by performing first decoding on the target code block according to an error detection result, the type of the target code block and the data unit, and the error detection result is obtained according to the type of the target code block and the data unit.

Illustratively, deriving the error detection result based on the type of the target code block and the data unit includes: and obtaining the content and the content sequence of the target code block based on the type of the target code block and the data unit, and obtaining an error detection result based on the content and the content sequence of the target code block. For example, when the content order of the target code block is at least one of the third error condition set, the content order of the target code block is wrong, and when the content order of the target code block is not any of the third error condition set, the content order of the target code block is correct. For another example, when the content of the target code block is at least one of the fourth set of error conditions, the content of the target code block is erroneous, and when the content of the target code block is not any of the fourth set of error conditions, the content of the target code block is correct.

In one possible implementation, taking the target code block as the control code block, the target code block includes four bit groups as an example, and for two adjacent bit groups, the third set of error conditions includes, but is not limited to, the following 4 cases:

(1) In case the former bit group comprises a start control word (/ S /), the latter bit group comprises other contents than data bytes.

(2) In case the former bit group comprises only data bytes, the latter bit group comprises other contents than data bytes or termination control words (/ T /).

(3) In case the former bit group comprises a termination control word, the latter bit group comprises other content than an idle control word (/ I /) or a sequential ordered set control word (/ O /).

(4) In case the previous bit group comprises an idle control word or a sequence ordered set control word, the latter bit group comprises a data byte or a termination control word.

Specific meanings and values of control words in the embodiments of the present application may refer to specific references IEEE802.3-2018, and the embodiments of the present application are not repeated.

In one possible implementation, illustrated by way of example with one bit group, the fourth set of error conditions includes, but is not limited to, the following 4 conditions:

(1) For a group of bits that includes a start control word, the start control word is followed by other content than the data byte.

(2) For a group of bits comprising data bytes, the data bytes are followed by other content than data bytes or termination control words.

(3) For a group of bits comprising a termination control word, the termination control word is followed by other content than an idle control word or a sequence ordered set control word.

(4) For bit groups comprising idle control words or sequence ordered set control words, the idle control words or sequence ordered set control words are followed by data bytes or termination control words.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, and the target code block is first decoded according to the error detection result and the type and the data unit of the target code block to obtain 2 ⁿ A group code stream block comprising: converting the target code block to obtain a second code block, and performing first decoding on the second code block according to the type of the second code block and the data unit to obtain 2 ⁿ And (5) assembling code stream blocks. I.e. 2 ⁿ The group code stream block is obtained by performing first decoding on a second code block according to the type and the data unit of the second code block, wherein the second code block is a target code block The code blocks are obtained through conversion and have the same bit number as the target code blocks.

Illustratively, converting the target code block to obtain a second code block includes: converting the bit group with the content sequence error or the content error into an error control word for the bit group with the content sequence error or the content error in the target code block; and obtaining a second code block based on the error control word and the bit group with correct content sequence and correct content in the target code block. For example, a first bit group, which is a bit group with a wrong content order or a wrong content, is converted into a first error control word. For another example, a second set of bits, which is a set of bits with a wrong content order or a wrong content, is converted into a second error control word. In one possible implementation, the converted second code block is a control code block, and the second code block may be decoded in a decoding manner.

In another possible implementation, the error detection result includes a content order error or a content error of the target code block, and the first decoding is performed on the target code block according to the error detection result and the type and the data unit of the target code block to obtain 2 ⁿ A group code stream block comprising: performing first decoding on the target code block based on the type of the target code block and the data unit to obtain 2 ⁿ Group first code stream block, pair 2 ⁿ Converting the first code stream block to obtain 2 ⁿ And (5) assembling code stream blocks. That is, 2 ⁿ Group code stream block based on pair 2 ⁿ Converting the first code stream block of group 2 ⁿ The group first code stream block is obtained by performing first decoding on the target code block based on the type of the target code block and the data unit.

Illustratively pair 2 ⁿ Converting the first code stream block to obtain 2 ⁿ A group code stream block comprising: for 2 ⁿ And converting the code stream block into an error code stream block based on the code stream block obtained by the bit group with the wrong content sequence or the wrong content in the first code stream block. For example, the control block of the error stream block is 0xFF, and the data block is 0 xfefefefefefe. The receiving end can distinguish error data and correct data by processing the target code block with error, thereby ensuring the reliability of the data。

According to the decoding method provided by the embodiment of the application, the target code block is subjected to first decoding to obtain 2 comprising a control block and a data block ⁿ The code stream blocks are assembled without transcoding the target code blocks to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ Decoding the 66 bit code blocks to obtain 2 ⁿ And (5) assembling code stream blocks. Therefore, the decoding efficiency is improved, and the time delay, the power consumption and the chip area occupation caused by the decoding process are reduced.

The foregoing describes an encoding method provided by the embodiment of the present application, and corresponding to the foregoing method, the embodiment of the present application further provides an encoding apparatus. Fig. 8 is a schematic structural diagram of an encoding apparatus according to an embodiment of the present application, where the encoding apparatus is applied to a first network device, and the first network device is the first network device in the embodiment shown in fig. 1. The encoding apparatus shown in fig. 8 is capable of performing all or part of the operations performed by the first network device based on the plurality of modules shown in fig. 8. It should be understood that the apparatus may include additional modules than those shown or omit some of the modules shown therein, which is not limiting in this embodiment of the application. As shown in fig. 8, the apparatus includes:

acquisition module 801 for acquiring 2 ⁿ The code stream blocks comprise control blocks and data blocks, and n is an integer greater than 1;

a first encoding module 802 for pair 2 ⁿ Performing first coding on the group code stream blocks to obtain target code blocks, wherein the target code blocks comprise 2-based code blocks ⁿ Type and 2-based control block determination for group code stream blocks ⁿ A control block of the group code stream block and a data unit determined by the data block.

In one possible implementation, the type is used to indicate that the target code block is a data code block; the data unit is based on 2 ⁿ Sequential pair 2 of group code stream blocks ⁿ And performing first coding on the data blocks of the group code stream blocks to obtain the data blocks.

In one possible implementation, the type is used to indicate the target code block as a control code block; the data unit includes a type indication and code block content, the code block content based on 2 ⁿ Control block for group code stream blockAnd sequence pair 2 of data block determination ⁿ The data block of the group code stream block is obtained by first encoding, and the type indication is based on 2 ⁿ The control blocks of the group code stream blocks are obtained and the type indication is used for indicating the type of each group code stream block.

In one possible implementation, the target code block is based on error detection result pair 2 ⁿ The group code stream block is processed to obtain an error detection result based on 2 ⁿ The control block and the data block of the group code stream block are obtained.

In one possible implementation, the error detection result includes 2 ⁿ Content order error or content error of group code stream block, target code block is based on 2 ⁿ The code stream blocks with correct content sequence and correct content in the group code stream blocks and error blocks are obtained by first encoding, and the error blocks are based on 2 ⁿ The code stream blocks with wrong content sequence or wrong content in the group code stream blocks are obtained.

In one possible implementation, the control block comprises m bits, the data block comprises 8m bits, and m is a positive integer.

In one possible implementation, n has a value of 2, m has a value of 8, and the target code block has 257 bits.

In one possible implementation, 2 ⁿ The group code stream blocks are all from the media independent interface MII.

In one possible implementation, the apparatus further includes: a second encoding module 803, configured to perform second encoding on the target code block according to the FEC code pattern to obtain first data; a sending module 804, configured to send the first data.

The embodiment of the application provides a coding device, which comprises a control block and a data block 2 ⁿ First encoding the group code stream block to obtain a target code block without 2 ⁿ Each group of code stream blocks in the group of code stream blocks is subjected to 64B/66B coding to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ And transcoding the 66-bit code blocks to obtain target code blocks. Thereby, the coding efficiency is improved, and the code is codedThe time delay, the power consumption and the occupied chip area brought by the process are reduced.

The decoding method provided by the embodiment of the application is introduced above, and the embodiment of the application also provides a decoding device corresponding to the method. Fig. 9 is a schematic structural diagram of a decoding apparatus according to an embodiment of the present application, where the apparatus may be applied to a second network device, and the second network device is the second network device in the embodiment shown in fig. 1. The decoding apparatus shown in fig. 9 is capable of performing all or part of the operations performed by the second network device based on the plurality of modules shown in fig. 9. It should be understood that the apparatus may include additional modules than those shown or omit some of the modules shown therein, which is not limiting in this embodiment of the application. As shown in fig. 9, the apparatus includes:

an acquisition module 901, configured to acquire a target code block, where the target code block includes a type and a data unit;

a decoding module 902, configured to perform a first decoding on the target code block according to the type and the data unit of the target code block to obtain 2 ⁿ And the code stream blocks comprise control blocks and data blocks which are obtained based on types and data units, and n is an integer greater than 1.

In one possible implementation, the type is used to indicate that the target code block is a data code block; 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by first decoding 8 m-length content corresponding to the ith group of code stream blocks in a data unit, wherein m is a positive integer, and i is greater than or equal to 1 and less than or equal to 2 ⁿ Or i is an integer of 0 or more and 2 or less ⁿ -an integer of 1.

In one possible implementation, the type is used to indicate the target code block as a control code block, the data unit includes a type indication and code block content, and the type indication includes 2 ⁿ Bits, 2 ⁿ 1 of the bits is used to indicate 2 ⁿ The type of a group of code stream blocks corresponding to the bits in the group of code stream blocks, and the content of the code blocks comprises 2 ⁿ A group of bits; 2 ⁿ The control blocks included in the ith group of code stream blocks in the group of code stream blocks are based on type and typeThe bit corresponding to the ith group of code stream blocks in the instruction and the bit group corresponding to the ith group of code stream blocks in the code block content are obtained, i is more than or equal to 1 and less than or equal to 2 ⁿ Or i is an integer of 0 or more and 2 or less ⁿ -an integer of 1; 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing first decoding on the bit groups corresponding to the ith group of code stream blocks in the code block content based on the bits corresponding to the ith group of code stream blocks in the type indication.

In one possible implementation, 2 ⁿ The bit groups include a first bit group and 2 ⁿ -1 second group of bits, the first group of bits comprising a different number of bits than the second group of bits.

In one possible implementation, the data unit includes a type indication, the type and type indication being used to indicate that the target code block is an error code block; 2 ⁿ Each group of code stream blocks comprises a control block with a first value of 2 ⁿ The data blocks included in each group of code stream blocks in the group of code stream blocks are second values, and the first values and the second values are used for indicating that the code stream blocks are error code stream blocks.

In one possible implementation, the obtaining module is configured to receive second data, where the second data is obtained based on the first data encoded using a forward error correction FEC pattern; and performing second decoding on the second data to obtain a target code block, wherein the second decoding is error correction processing.

In a possible implementation, the obtaining module 901 is configured to receive second data, where the second data is obtained based on the first data encoded with the FEC pattern; and performing second decoding on the second data to obtain a target code block, wherein the second decoding is error detection but no error correction processing.

In one possible implementation, the target code block is a code block obtained by detecting an error from the second data but not correcting the error.

In one possible implementation, 2 ⁿ Group code stream block based on error detectionThe detection result, the type of the target code block and the data unit are obtained by performing first decoding on the target code block, and the error detection result is obtained based on the type of the target code block and the data unit.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, 2 ⁿ The group code stream block is obtained by performing first decoding on a second code block according to the type and the data unit of the second code block, wherein the second code block is obtained by converting a target code block and has the same bit number as the target code block.

In one possible implementation, the error detection result includes a content order error or a content error of the target code block, 2 ⁿ Group code stream block based on pair 2 ⁿ Converting the first code stream block of group 2 ⁿ The group first code stream block is obtained by performing first decoding on the target code block based on the type of the target code block and the data unit.

In one possible implementation, 2 ⁿ The group code stream blocks are all in the MII format of the media independent interface.

The decoding device provided by the embodiment of the application performs first decoding on the target code block to obtain 2 including a control block and a data block ⁿ The code stream blocks are assembled without transcoding the target code blocks to obtain 2 ⁿ 66 bit code blocks, 2 pairs ⁿ Decoding the 66 bit code blocks to obtain 2 ⁿ And (5) assembling code stream blocks. Therefore, the decoding efficiency is improved, and the time delay, the power consumption and the chip area occupation caused by the decoding process are reduced.

It should be understood that, in implementing the functions of the apparatus provided in fig. 8 and fig. 9, only the division of the functional modules is illustrated, and in practical application, the functional modules may be allocated to different functional modules according to needs, that is, the internal structure of the apparatus is divided into different functional modules to implement all or part of the functions described above. In addition, the apparatus and the method embodiments provided in the foregoing embodiments belong to the same concept, and specific implementation processes of the apparatus and the method embodiments are detailed in the method embodiments and are not repeated herein.

The specific hardware structure of the device in the above embodiment is shown in fig. 10 as a network device 1500, which includes a transceiver 1501, a processor 1502 and a memory 1503. The transceiver 1501, the processor 1502 and the memory 1503 are connected by a bus 1504. The transceiver 1501 is configured to receive a message and send the message, the memory 1503 is configured to store instructions or program codes, and the processor 1502 is configured to invoke the instructions or program codes in the memory 1503 to cause the device to perform the relevant processing steps of the first network device or the second network device in the above-described method embodiment. In a specific embodiment, the network device 1500 of the embodiment of the present application may correspond to the first network device or the second network device in the foregoing method embodiments, where the processor 1502 in the network device 1500 reads the instructions or the program code in the memory 1503, so that the network device 1500 shown in fig. 10 can perform all or part of the operations performed by the first network device or the second network device.

The network device 1500 may also correspond to the apparatus shown in fig. 8 and 9 described above, for example, the acquisition module 801 and the acquisition module 901 referred to in fig. 8 and 9 correspond to the transceiver 1501, the encoding module 802 and the decoding module 902, and the processor 1502.

Referring to fig. 11, fig. 11 is a schematic diagram illustrating a structure of a network device 2000 according to an exemplary embodiment of the present application. The network device 2000 shown in fig. 11 is configured to perform the operations related to the encoding method shown in fig. 2 and the operations related to the decoding method shown in fig. 7. The network device 2000 is, for example, a switch, a router, or the like.

As shown in fig. 11, the network device 2000 includes at least one processor 2001, a memory 2003, and at least one communication interface 2004.

The processor 2001 is, for example, a general central processing unit (central processing unit, CPU), a digital signal processor (digital signal processor, DSP), a network processor (network processer, NP), a graphics processor (graphics processing unit, GPU), a neural-network processor (neural-network processing units, NPU), a data processing unit (data processing unit, DPU), a microprocessor, or one or more integrated circuits for implementing the aspects of the present application. For example, the processor 2001 includes an application-specific integrated circuit (ASIC), a programmable logic device (programmable logic device, PLD) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. PLDs are, for example, complex programmable logic devices (complex programmable logic device, CPLD), field-programmable gate arrays (field-programmable gate array, FPGA), general-purpose array logic (generic array logic, GAL), or any combination thereof. Which may implement or perform the various logical blocks, modules, and circuits described in connection with the disclosure of embodiments of the invention. The processor may also be a combination that performs the function of a computation, e.g., including one or more microprocessors, a combination of a DSP and a microprocessor, and so forth.

Optionally, the network device 2000 also includes a bus. The bus is used to transfer information between the components of the network device 2000. The bus may be a peripheral component interconnect standard (peripheral component interconnect, PCI) bus or an extended industry standard architecture (extended industry standard architecture, EISA) bus, among others. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, only one thick line is shown in FIG. 11, but not only one bus or one type of bus. In fig. 11, the components of the network device 2000 may be connected by other manners besides bus connection, and the connection manner of the components is not limited in the embodiment of the present invention.

The Memory 2003 is, for example, but not limited to, a read-only Memory (ROM) or other type of static storage device that can store static information and instructions, as well as a random access Memory (random access Memory, RAM) or other type of dynamic storage device that can store information and instructions, as well as an electrically erasable programmable read-only Memory (electrically erasable programmable read-only Memory, EEPROM), compact disc read-only Memory (compact disc read-only Memory) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media, or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. The memory 2003 is, for example, independent and is connected to the processor 2001 via a bus. Memory 2003 may also be integrated with processor 2001.

The communication interface 2004 uses any transceiver-like device for communicating with other devices or communication networks, which may be ethernet, radio Access Network (RAN) or wireless local area network (wireless local area networks, WLAN), etc. Communication interface 2004 may include a wired communication interface, and may also include a wireless communication interface. Specifically, the communication interface 2004 may be an ethernet (FE) interface, a Fast Ethernet (FE) interface, a Gigabit Ethernet (GE) interface, an asynchronous transfer mode (asynchronous transfer mode, ATM) interface, a wireless local area network (wireless local area networks, WLAN) interface, a cellular network communication interface, or a combination thereof. The ethernet interface may be an optical interface, an electrical interface, or a combination thereof. In the present embodiment, the communication interface 2004 may be used for the network device 2000 to communicate with other devices.

In a particular implementation, as one embodiment, processor 2001 may include one or more CPUs, such as CPU0 and CPU1 shown in FIG. 11. Each of these processors may be a single-core (single-CPU) processor or may be a multi-core (multi-CPU) processor. A processor herein may refer to one or more devices, circuits, and/or processing cores for processing data (e.g., computer program instructions).

In a specific implementation, as an embodiment, the network device 2000 may include multiple processors, such as processor 2001 and processor 2005 shown in fig. 11. Each of these processors may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). A processor herein may refer to one or more devices, circuits, and/or processing cores for processing data (e.g., computer program instructions).

In a specific implementation, the network device 2000 may also include output devices and input devices, as one embodiment. The output device communicates with the processor 2001, which can display information in a variety of ways. For example, the output device may be a liquid crystal display (liquid crystal display, LCD), a light emitting diode (light emitting diode, LED) display device, a Cathode Ray Tube (CRT) display device, or a projector (projector), or the like. The input device(s) and processor 2001 are in communication and may receive input from a user in a variety of ways. For example, the input device may be a mouse, a keyboard, a touch screen device, a sensing device, or the like.

In some embodiments, memory 2003 is used to store program code 2010 for performing aspects of the present application, and processor 2001 may execute program code 2010 stored in memory 2003. That is, the network device 2000 can implement the encoding method or the decoding method provided by the method embodiment through the processor 2001 and the program code 2010 in the memory 2003. One or more software modules may be included in program code 2010. Optionally, the processor 2001 itself may also store program code or instructions for performing the present aspects.

In a specific embodiment, the network device 2000 of the embodiment of the present application may correspond to the first network device or the second network device in the above-described respective method embodiments, and the processor 2001 in the network device 2000 reads the program code 2010 in the memory 2003 or the program code or instructions stored by the processor 2001 itself, so that the network device 2000 shown in fig. 11 can perform all or part of the operations performed by the first network device or the second network device.

The network device 2000 may also correspond to the apparatus shown in fig. 8 and 9 described above, and each of the functional modules in the apparatus shown in fig. 8 and 9 is implemented using software of the network device 2000. In other words, the apparatus shown in fig. 8 and 9 includes functional modules generated after the processor 2001 of the network device 2000 reads the program code 2010 stored in the memory 2003. For example, the acquisition modules 801 and 901 referred to in fig. 8 and 9 correspond to the communication interface 2004, and the encoding module 802 and the decoding module 902 correspond to the processor 2001 and/or the processor 2005.

Wherein the steps of the methods shown in fig. 2 and 7 are performed by instructions in the form of integrated logic circuits of hardware or software in the processor of the network device 2000. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in the processor for execution. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory, and the processor reads information in the memory, and in combination with its hardware, performs the steps of the above method, which will not be described in detail here to avoid repetition.

Referring to fig. 12, fig. 12 is a schematic structural diagram of a network device 2100 according to another exemplary embodiment of the present application. The network device 2100 illustrated in fig. 12 is configured to perform all or part of the operations involved in the methods illustrated in fig. 2 and 7 described above. The network device 2100 is, for example, a switch, router, etc., and the network device 2100 may be implemented by a general bus architecture.

As shown in fig. 12, the network device 2100 includes: a main control board 2110 and an interface board 2130.

The main control board is also called a main processing unit (main processing unit, MPU) or a routing processing card (route processor card), and the main control board 2110 is used for controlling and managing various components in the network device 2100, including routing computation, device management, device maintenance, and protocol processing functions. The main control board 2110 includes: a central processor 2111 and a memory 2112.

The interface board 2130 is also referred to as a line interface unit card (line processing unit, LPU), line card, or service board. The interface board 2130 is used to provide various service interfaces and to enable forwarding of data packets. The service interfaces include, but are not limited to, ethernet interfaces, such as flexible ethernet service interfaces (flexible ethernet Clients, flexE Clients), POS (packet over SONET/SDH) interfaces, etc. The interface board 2130 includes: central processor 2131 network processor 2132, forwarding table entry memory 2134, and physical interface cards (physical interface card, PIC) 2133.

The central processor 2131 on the interface board 2130 is used to control and manage the interface board 2130 and communicate with the central processor 2111 on the main control board 2110.

The network processor 2132 is used to implement a message transmission process. The network processor 2132 may be in the form of a forwarding chip. The forwarding chip may be a network processor (network processor, NP). In some embodiments, the forwarding chip may be implemented by an application-specific integrated circuit (ASIC) or a field programmable gate array (field programmable gate array, FPGA). Specifically, the network processor 2132 is configured to forward the received message based on the forwarding table stored in the forwarding table entry memory 2134, and if the destination address of the message is the address of the network device 2100, upload the message to the CPU (e.g. the central processor 2131) for processing; if the destination address of the message is not the address of the network device 2100, the next hop and the egress interface corresponding to the destination address are found from the forwarding table according to the destination address, and the message is forwarded to the egress interface corresponding to the destination address. The processing of the uplink message may include: processing a message input interface and searching a forwarding table; the processing of the downlink message may include: forwarding table lookup, etc. In some embodiments, the central processor may also perform the function of a forwarding chip, such as implementing software forwarding based on a general purpose CPU, so that no forwarding chip is needed in the interface board.

The physical interface card 2133 is used to implement the docking function of the physical layer, from which the original traffic enters the interface board 2130, and from which processed messages are sent out from the physical interface card 2133. The physical interface card 2133, also referred to as a daughter card, may be mounted on the interface board 2130 and is responsible for converting the photoelectric signals into messages and forwarding the messages to the network processor 2132 for processing after performing validity check on the messages. In some embodiments, the central processor 2131 may also perform the functions of the network processor 2132, such as implementing software forwarding based on a general purpose CPU, such that the network processor 2132 is not required in the physical interface card 2133.

Optionally, the network device 2100 includes a plurality of interface boards, for example, the network device 2100 further includes an interface board 2140, the interface board 2140 including: central processor 2141, network processor 2142, forwarding table entry store 2144, and physical interface card 2143. The function and implementation of the various components in interface board 2140 are the same or similar to interface board 2130 and are not described in detail herein.

Optionally, network device 2100 also includes a switch web 2120. Switch board 2120 may also be referred to as a switch board unit (switch fabric unit, SFU). In the case of a network device having multiple interface boards, switch web 2120 is used to accomplish the data exchange between the interface boards. For example, interface board 2130 and interface board 2140 may communicate with each other via switch web 2120.

The main control board 2110 is coupled to the interface board. For example. Main control board 2110, interface board 2130 and interface board 2140 are connected to the system backplane via a system bus to achieve interworking between the switch fabric 2120 and the system backplane. In one possible implementation, an inter-process communication protocol (inter-process communication, IPC) channel is established between the main control board 2110 and the interface boards 2130 and 2140, and communication is performed between the main control board 2110 and the interface boards 2130 and 2140 through the IPC channel.

Logically, network device 2100 includes a control plane that includes a main control board 2110 and a central processor 2111, and a forwarding plane that includes various components that perform forwarding, such as a forwarding table entry memory 2134, a physical interface card 2133, and a network processor 2132. The control plane performs the functions of router, generating forwarding table, processing signaling and protocol messages, configuring and maintaining the state of the network device, etc., and the control plane issues the generated forwarding table to the forwarding plane, where the network processor 2132 forwards the message received by the physical interface card 2133 based on the forwarding table issued by the control plane. The forwarding table issued by the control plane may be stored in forwarding table entry memory 2134. In some embodiments, the control plane and the forwarding plane may be completely separate and not on the same network device.

It should be noted that the main control board may have one or more blocks, and the main control board and the standby main control board may be included when there are multiple blocks. The interface boards may have one or more, the more data processing capabilities the network device is, the more interface boards are provided. The physical interface card on the interface board may also have one or more pieces. The switching network board may not be provided, or may be provided with one or more blocks, and load sharing redundancy backup can be jointly realized when the switching network board is provided with the plurality of blocks. Under the centralized forwarding architecture, the network device may not need to exchange network boards, and the interface board bears the processing function of the service data of the whole system. Under the distributed forwarding architecture, the network device may have at least one switching fabric, through which data exchange between multiple interface boards is implemented, providing high-capacity data exchange and processing capabilities. Therefore, the data access and processing power of the network device of the distributed architecture is greater than that of the network device of the centralized architecture. Alternatively, the network device may have a configuration in which only one board card is provided, that is, there is no switching network board, the functions of the interface board and the main control board are integrated on the one board card, and the central processor on the interface board and the central processor on the main control board may be combined into one central processor on the one board card, so as to perform the functions after stacking the two, where the network device has low data exchange and processing capabilities (for example, network devices such as a low-end switch or a router). The specific architecture employed is not limited in any way herein, depending on the specific networking deployment scenario.

In a specific embodiment, the network device 2100 corresponds to the apparatus shown in fig. 8 and 9 described above. In some embodiments, the acquisition module 801 and the acquisition module 901 in the apparatus shown in fig. 8 and 9 correspond to the physical interface card 2133 or the physical interface card 2143 in the network device 2100. The encoding module 802 and the decoding module 902 in the apparatus shown in fig. 8 and 9 correspond to at least one of the central processor 2111, the network processor 2132, and the network processor 2142 in the network device 2100.

Based on the network devices shown in fig. 10, fig. 11 and fig. 12, the embodiment of the application further provides a communication system, which includes: the first network device and the second network device. Alternatively, the first network device is the network device 1500 shown in fig. 10 or the network device 2000 shown in fig. 11 or the network device 2100 shown in fig. 12, and the second network device is the network device 1500 shown in fig. 10 or the network device 2000 shown in fig. 11 or the network device 2100 shown in fig. 12.

The methods performed by the first network device and the second network device may be referred to the above description of the embodiments shown in fig. 1, fig. 2, and fig. 7, and will not be repeated here.

It is to be appreciated that the processor described above can be a central processing unit (central processing unit, CPU), but also other general purpose processors, digital signal processors (digital signal processing, DSP), application specific integrated circuits (application specific integrated circuit, ASIC), field-programmable gate arrays (field-programmable gate array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or any conventional processor or the like. It is noted that the processor may be a processor supporting an advanced reduced instruction set machine (advanced RISC machines, ARM) architecture.

Further, in an alternative embodiment, the memory may include read only memory and random access memory, and provide instructions and data to the processor. The memory may also include non-volatile random access memory. For example, the memory may also store information of the device type.

The memory may be volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. The volatile memory may be random access memory (random access memory, RAM) which acts as an external cache. By way of example, and not limitation, many forms of RAM are available. For example, static RAM (SRAM), dynamic RAM (dynamic random access memory, DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous DRAM (SLDRAM), and direct memory bus RAM (DR RAM).

There is also provided a computer readable storage medium having stored therein at least one program instruction or code which when loaded and executed by a processor causes a computer to implement the encoding method of fig. 2 or the decoding method of fig. 7.

The present application provides a computer program (product) which, when executed by a computer, can cause a processor or computer to perform the respective steps and/or flows corresponding to the above-described method embodiments.

There is provided a chip comprising a processor for calling from a memory and executing instructions stored in said memory, to cause a communication device on which said chip is mounted to perform the method of the above aspects.

Providing another chip, comprising: the system comprises an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected through an internal connection path, the processor is used for executing codes in the memory, and when the codes are executed, the processor is used for executing the method in each aspect.

An apparatus is also provided, comprising the chip. Optionally, the device is a network device. The device is illustratively a router or a switch or a server.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.

The foregoing embodiments have been provided for the purpose of illustrating the technical solution and advantageous effects of the present application in further detail, and it should be understood that the foregoing embodiments are merely illustrative of the present application and are not intended to limit the scope of the present application, and any modifications, equivalents, improvements, etc. made on the basis of the technical solution of the present application should be included in the scope of the present application.

Those of ordinary skill in the art will appreciate that the various method steps and modules described in connection with the embodiments disclosed herein may be implemented as software, hardware, firmware, or any combination thereof, and that the steps and components of the various embodiments have been generally described in terms of functionality in the foregoing description to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Those of ordinary skill in the art may implement the described functionality using different approaches for each particular application, but such implementation is not to be considered as beyond the scope of the present application.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, where the program may be stored in a computer readable storage medium, and the above storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer program instructions. By way of example, the methods of embodiments of the present application may be described in the context of machine-executable instructions, such as program modules, being included in devices on a real or virtual processor of a target. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, etc. that perform particular tasks or implement particular abstract data types. In various embodiments, the functionality of the program modules may be combined or split between described program modules. Machine-executable instructions for program modules may be executed within local or distributed devices. In a distributed device, program modules may be located in both local and remote memory storage media.

Computer program code for carrying out methods of embodiments of the present application may be written in one or more programming languages. These computer program code may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the computer or other programmable data processing apparatus, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the computer, partly on the computer, as a stand-alone software package, partly on the computer and partly on a remote computer or entirely on the remote computer or server.

In the context of embodiments of the present application, computer program code or related data may be carried by any suitable carrier to enable an apparatus, device or processor to perform the various processes and operations described above. Examples of carriers include signals, computer readable media, and the like.

Examples of signals may include electrical, optical, radio, acoustical or other form of propagated signals, such as carrier waves, infrared signals, etc.

A machine-readable medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination thereof. More detailed examples of a machine-readable storage medium include an electrical connection with one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical storage device, a magnetic storage device, or any suitable combination thereof.

It will be clearly understood by those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described system, apparatus and module may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, e.g., the division of the modules is merely a logical function division, and there may be additional divisions of actual implementation, e.g., multiple modules or components may be combined or integrated into another system, or some features may be omitted, or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices, or modules, or may be an electrical, mechanical, or other form of connection.

The modules illustrated as separate components may or may not be physically separate, and components shown as modules may or may not be physical modules, i.e., may be located in one place, or may be distributed over multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purposes of the embodiments of the present application.

In addition, each functional module in each embodiment of the present application may be integrated into one processing module, or each module may exist alone physically, or two or more modules may be integrated into one module. The integrated modules may be implemented in hardware or in software functional modules.

The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application is essentially or a part contributing to the prior art, or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method in the various embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The terms "first," "second," and the like in this application are used to distinguish between identical or similar items that have substantially the same function and function, and it should be understood that there is no logical or chronological dependency between the "first," "second," and "nth" terms, nor is it limited to the number or order of execution. It will be further understood that, although the following description uses the terms first, second, etc. to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another element. For example, a first network device may be referred to as a second network device, and similarly, a second network device may be referred to as a first network device, without departing from the scope of the various described examples. The first network device and the second network device may both be any type of network device and, in some cases, may be separate and distinct network devices.

It should also be understood that, in the embodiments of the present application, the sequence number of each process does not mean that the execution sequence of each process should be determined by the function and the internal logic of each process, and should not constitute any limitation on the implementation process of the embodiments of the present application.

The term "at least one" in this application means one or more, the term "plurality" in this application means two or more, for example, a plurality of second messages means two or more second messages. The terms "system" and "network" are often used interchangeably herein.

It is to be understood that the terminology used in the description of the various examples described herein is for the purpose of describing particular examples only and is not intended to be limiting. As used in the description of the various described examples and in the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that the terms "if" and "if" may be interpreted to mean "when" ("white" or "upon") or "in response to a determination" or "in response to detection. Similarly, the phrase "if determined" or "if [ a stated condition or event ] is detected" may be interpreted to mean "upon determination" or "in response to determination" or "upon detection of [ a stated condition or event ] or" in response to detection of [ a stated condition or event ] "depending on the context.

It should be appreciated that determining B from a does not mean determining B from a alone, but may also determine B from a and/or other information.

It should be further understood that reference throughout this specification to "one embodiment," "an embodiment," "one possible implementation," means that a particular feature, structure, or characteristic described in connection with the embodiment or implementation is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment," "one possible implementation" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

Claims

1. A method of encoding, the method comprising:

acquisition 2 ⁿ The system comprises a group of code stream blocks, wherein any group of code stream blocks comprises a control block and a data block, and n is an integer greater than 1;

for said 2 ⁿ Performing first coding on the group code stream blocks to obtain target code blocks, wherein the target code blocks comprise 2 base on the code blocks ⁿ Type of control block determination of group code stream block and based on said 2 ⁿ A control block of the group code stream block and a data unit determined by the data block.

2. The method of claim 1, wherein the type is used to indicate that the target code block is a data code block;

The data unit is based on the 2 ⁿ The order of the group code stream blocks is to the 2 ⁿ And carrying out the first coding on the data blocks of the group code stream blocks.

3. The method of claim 1, wherein the type is used to indicate that the target code block is a control code block;

the data unit includes a type indication and code block content, the code block content based on the 2 ⁿ The control block and the data block of the group code stream block are determined to be in the sequence of 2 ⁿ The data blocks of the group code stream block are obtained by the first coding, and the type indication is based on the type indicationSaid 2 ⁿ The control blocks of the group code stream blocks are derived, and the type indication is used for indicating the type of each group code stream block.

4. A method according to claim 3, wherein the target code block is an error code block comprising data identifying an error.

5. The method of any of claims 1-4, wherein the target code block pairs the 2 based on error detection results ⁿ Processing the group code stream block to obtain the error detection result based on the step 2 ⁿ The control block and the data block of the group code stream block are obtained.

6. The method of claim 5, wherein the error detection result comprises the 2 ⁿ Content order error or content error of group code stream block, the target code block is based on the 2 ⁿ The first coding is performed on the code stream blocks with correct content sequence and correct content and error blocks in the group code stream blocks, and the error blocks are based on the 2 ⁿ The code stream blocks with wrong content sequence or wrong content in the group code stream blocks are obtained.

7. The method according to any of claims 1-6, wherein the control block comprises m bits, the data block comprises 8m bits, and m is a positive integer.

8. The method of claim 7, wherein the value of n is 2, the value of m is 8, and the target code block is 257 bits.

9. The method according to any one of claims 1-8, wherein said 2 ⁿ The group code stream blocks are all from the media independent interface MII.

10. The method according to any one of claims 1-9, further comprising, after said obtaining the target code block:

performing second coding on the target code block according to a Forward Error Correction (FEC) code pattern to obtain first data;

and sending the first data.

11. A decoding method, the method comprising:

obtaining a target code block, wherein the target code block comprises a type and a data unit;

According to the type of the target code block and the data unit, performing first decoding on the target code block to obtain 2 ⁿ And the code stream blocks comprise control blocks and data blocks which are obtained based on the types and the data units, and n is an integer greater than 1.

12. The method of claim 11, wherein the type is used to indicate that the target code block is a data code block;

said 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing the first decoding on the 8 m-length content corresponding to the ith group of code stream blocks in the data unit, wherein m is a positive integer, and i is 1 or more and 2 or less ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1.

13. The method of claim 11, wherein the type is used to indicate the target code block is a control code block, wherein the data unit includes a type indication and code block content, and wherein the type indication includes 2 ⁿ A number of bits of 2 ⁿ 1 of the bits is used to indicate the 2 ⁿ The type of a group of code stream blocks corresponding to the bits in the group of code stream blocks, the content of the code block comprises 2 ⁿ A group of bits;

said 2 ⁿ The control block included in the ith group of code stream blocks in the group of code stream blocks is based on the type, the bit corresponding to the ith group of code stream blocks in the type indication, and the ith group of codes in the code block contentThe bit group corresponding to the stream block is obtained, wherein i is more than or equal to 1 and less than or equal to 2 ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1;

14. The method according to claim 13, wherein said 2 ⁿ The bit groups include a first bit group and 2 ⁿ -1 second group of bits, the first group of bits comprising a different number of bits than the second group of bits.

15. The method of claim 11, wherein the data unit includes a type indication, the type and the type indication indicating that the target code block is an error code block;

said 2 ⁿ Each group of code stream blocks comprises a control block with a first value, wherein 2 is as follows ⁿ And the data blocks included in each group of code stream blocks in the group of code stream blocks are second values, and the first values and the second values are used for indicating that the code stream blocks are error code stream blocks.

16. The method according to any one of claims 11-15, wherein the obtaining the target code block comprises:

receiving second data, the second data being obtained based on the first data encoded with a forward error correction, FEC, pattern;

and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error correction processing.

17. The method of claim 16, wherein the target code block is an error code block obtained by error correcting the second data but not successfully correcting the second data.

18. The method according to any one of claims 11-15, wherein the obtaining the target code block comprises:

and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error detection but no error correction processing.

19. The method of claim 18, wherein the target code block is an error code block obtained by detecting an error from the second data without correcting the error.

20. The method according to any one of claims 11-15, wherein said 2 ⁿ And the group code stream block is obtained by performing the first decoding on the target code block according to an error detection result, the type of the target code block and a data unit, and the error detection result is obtained based on the type of the target code block and the data unit.

21. The method of claim 20, wherein the error detection result comprises a content order error or a content error of the target code block, the 2 ⁿ And the group code stream block is obtained by performing first decoding on a second code block according to the type and the data unit of the second code block, wherein the second code block is obtained by converting the target code block and has the same bit number as the target code block.

22. The method of claim 20, wherein the error detection result comprises a content order error or a content error of the target code block, the 2 ⁿ Group code stream block based on pair 2 ⁿ Converting the first code stream blocks of the group to obtain 2 ⁿ And performing first decoding on the target code block by the group first code stream block based on the type of the target code block and a data unit.

23. The method according to any of claims 11-22, wherein the control block comprises m bits, the data block comprises 8m bits, and m is a positive integer.

24. The method of claim 23, wherein n has a value of 2, m has a value of 8, and the target code block has 257 bits.

25. The method according to any one of claims 11-24, wherein said 2 ⁿ The group code stream blocks are all in the MII format of the media independent interface.

26. An encoding apparatus, the apparatus comprising:

27. The apparatus of claim 26, wherein the type is used to indicate that the target code block is a data code block; the data unit is based on the 2 ⁿ The order of the group code stream blocks is to the 2 ⁿ And carrying out the first coding on the data blocks of the group code stream blocks.

28. The apparatus of claim 26, wherein the type is used to indicate the target code block is a control code block; the data unit includes a type indication and code block content, the code block content based on the 2 ⁿ The control block and the data block of the group code stream block are determined to be in the sequence of 2 ⁿ Data block access for group code stream blockThe first encoding is performed, the type indication is based on the 2 ⁿ The control blocks of the group code stream blocks are derived, and the type indication is used for indicating the type of each group code stream block.

29. The apparatus of claim 28, wherein the target code block is an error code block comprising data identifying an error.

30. The apparatus of any of claims 26-29, wherein the target code block is configured to encode the 2 based on an error detection result ⁿ Processing the group code stream block to obtain the error detection result based on the step 2 ⁿ The control block and the data block of the group code stream block are obtained.

31. The apparatus of claim 30, wherein the error detection result comprises the 2 ⁿ Content order error or content error of group code stream block, the target code block is based on the 2 ⁿ The first coding is performed on the code stream blocks with correct content sequence and correct content and error blocks in the group code stream blocks, and the error blocks are based on the 2 ⁿ The code stream blocks with wrong content sequence or wrong content in the group code stream blocks are obtained.

32. The apparatus of any of claims 26-31, wherein the control block comprises m bits, the data block comprises 8m bits, and m is a positive integer.

33. The apparatus of claim 31, wherein the value of n is 2, the value of m is 8, and the target code block is 257 bits.

34. The apparatus of any one of claims 26-33, wherein said 2 ⁿ The group code stream blocks are all from the media independent interface MII.

35. The apparatus according to any one of claims 26-34, wherein the apparatus further comprises:

the second coding module is used for carrying out second coding on the target code block according to the Forward Error Correction (FEC) code pattern to obtain first data;

and the sending module is used for sending the first data.

36. A decoding device, the device comprising:

37. The apparatus of claim 36, wherein the type is used to indicate that the target code block is a data code block; said 2 ⁿ The data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing the first decoding on the 8 m-length content corresponding to the ith group of code stream blocks in the data unit, wherein m is a positive integer, and i is 1 or more and 2 or less ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1.

38. The apparatus of claim 36, wherein the type is used to indicate the target code block is a control code block, wherein the data unit comprises a type indication and code block content, wherein the type indication comprises 2 ⁿ A number of bits of 2 ⁿ 1 of the bits is used to indicate the 2 ⁿ The type of a group of code stream blocks corresponding to the bits in the group of code stream blocks, the content of the code block comprises 2 ⁿ A group of bits; said 2 ⁿ The control block included in the ith group of code stream blocks is based on the type, the type indication and the typeBits corresponding to an ith group of code stream blocks and bit groups corresponding to the ith group of code stream blocks in the code block content, wherein i is more than or equal to 1 and less than or equal to 2 ⁿ Or the integer of i is 0 or more and 2 or less ⁿ -an integer of 1; said 2 ⁿ And the data blocks included in the ith group of code stream blocks in the group of code stream blocks are obtained by performing first decoding on the bit groups corresponding to the ith group of code stream blocks in the code block content based on the bits corresponding to the ith group of code stream blocks in the type indication.

39. The apparatus of claim 38, wherein the 2 ⁿ The bit groups include a first bit group and 2 ⁿ -1 second group of bits, the first group of bits comprising a different number of bits than the second group of bits.

40. The apparatus of claim 36, wherein the data unit includes a type indication, the type and the type indication indicating that the target code block is an error code block; said 2 ⁿ Each group of code stream blocks comprises a control block with a first value, wherein 2 is as follows ⁿ And the data blocks included in each group of code stream blocks in the group of code stream blocks are second values, and the first values and the second values are used for indicating that the code stream blocks are error code stream blocks.

41. The apparatus of any of claims 36-40, wherein the means for obtaining is configured to receive second data obtained based on the first data encoded with a forward error correction, FEC, pattern; and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error correction processing.

42. The apparatus of claim 41, wherein the target code block is an error code block obtained by error correcting the second data but not successfully correcting the second data.

43. The apparatus of any of claims 36-40, wherein the means for obtaining is configured to receive second data obtained based on the first data encoded with a forward error correction, FEC, pattern; and performing second decoding on the second data to obtain the target code block, wherein the second decoding is error detection but no error correction processing.

44. The apparatus of claim 43, wherein the target code block is an error code block obtained by detecting an error from the second data but not correcting the error.

45. The device of any one of claims 36-40, wherein said 2 ⁿ And the group code stream block is obtained by performing the first decoding on the target code block according to an error detection result, the type of the target code block and a data unit, and the error detection result is obtained based on the type of the target code block and the data unit.

46. The apparatus of claim 45, wherein the error detection result comprises a content order error or a content error of the target code block, the 2 ⁿ And the group code stream block is obtained by performing first decoding on a second code block according to the type and the data unit of the second code block, wherein the second code block is obtained by converting the target code block and has the same bit number as the target code block.

47. The apparatus of claim 45, wherein the error detection result comprises a content order error or a content error of the target code block, the 2 ⁿ Group code stream block based on pair 2 ⁿ Converting the first code stream blocks of the group to obtain 2 ⁿ And performing first decoding on the target code block by the group first code stream block based on the type of the target code block and a data unit.

48. The apparatus of any of claims 36-47, wherein the control block comprises m bits, the data block comprises 8m bits, and m is a positive integer.

49. The apparatus of claim 48, wherein n has a value of 2, m has a value of 8, and the target code block has 257 bits.

50. The device of any one of claims 36-49, wherein said 2 ⁿ The group code stream blocks are all in the MII format of the media independent interface.

51. A network device, the network device comprising: a processor coupled to a memory having stored therein at least one program instruction or code that is loaded and executed by the processor to cause the network device to implement the method of any of claims 1-25.

52. A communication system, characterized in that the system comprises a first network device for performing the method according to any of claims 1-10 and a second network device for performing the method according to any of claims 11-25.

53. A computer readable storage medium having stored therein at least one program instruction or code which when loaded and executed by a processor causes a computer to implement the method of any of claims 1-25.

54. A computer program product, characterized in that the computer program product comprises computer program code which, when run by a computer, causes the computer to implement the method as claimed in any one of claims 1-25.

55. A chip comprising a processor for calling from a memory and executing instructions stored in the memory, to cause a communication device on which the chip is mounted to perform the method of any of claims 1-25.

56. A chip, the chip comprising: the device comprises an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected through an internal connection path, the processor is used for executing codes in the memory, and when the codes are executed, the processor is used for executing the method of any one of claims 1-25.