CN116436287A - Voltage and current self-balancing method for staggered parallel three-level DCDC converter - Google Patents
Voltage and current self-balancing method for staggered parallel three-level DCDC converter Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/01—Resonant DC/DC converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/083—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
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- H—ELECTRICITY
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- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
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- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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Abstract
The invention discloses a voltage and current self-balancing method of an interleaved three-level DCDC converter, which is based on an n-phase interleaved three-level DCDC converter, namely, the three-level DCDC converter comprises n three-level bridge arms which are connected in parallel, each three-level bridge arm is formed by connecting switching tubes of an upper half bridge and a lower half bridge in series, and high-frequency capacitors are connected in parallel at two ends of the switching tubes or parasitic capacitors of the switching tubes are utilized; the carrier waves of the upper half bridge and the lower half bridge of the n three-level bridge arms are staggered and phase-shifted; the converter works in an approximate critical conduction mode through the control of the variable switching frequency and the variable duty ratio, so that zero-voltage soft switching is realized, and resonance transition time is generated; the effect of counteracting unbalanced components is achieved by utilizing the equivalent duty cycle of resonance transition time, so that self-balancing of capacitor voltage and inductor current is achieved. The invention solves the problems of large number and high cost of the voltage-sharing and current-sharing sensors of the traditional staggered parallel and three-level converter, and obviously reduces the number and cost of the sensors required by current-sharing and voltage-sharing.
Description
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a voltage and current self-balancing method of an interleaved three-level DCDC converter.
Background
The multi-level DCDC converter can be widely applied to various direct current energy storage systems, and the energy storage media comprise fuel cells, storage batteries and super capacitors, so that the multi-level DCDC converter is suitable for various scenes such as power systems, transportation and the like, and therefore, the research of the multi-level DCDC converter is popular. However, since the high-voltage side of the multilevel DCDC converter has a series capacitor structure, the filter capacitor voltage at the high-voltage side may be unbalanced due to the non-identical switching characteristics and the switching transistor driving circuit, and the switching transistor device may be damaged, so that the capacitor voltage balance becomes a key problem for researching the three-level topology. Three-level topology research is most common in view of the number of switches and the complexity of the system.
The three-level technology is often used for reducing the voltage stress of a switching tube, and a flying capacitor three-level topology is adopted as a DCDC converter, so that all load currents flow through the flying capacitor, the capacitor is large in size, and high-power application is not facilitated. The advantages of the staggered parallel connection technology and the three-level technology are combined, so that the method can be widely applied to high-voltage high-power occasions, the high-frequency current ripple and the inductance-capacitance volume are reduced, the power capacity is increased, and the efficiency is improved. However, the current imbalance problem is a key problem of the staggered parallel structure because of unavoidable differences among the staggered parallel phases.
The research focus of the staggered parallel three-level converter is that the current sharing and the voltage sharing are the problems, the conventional current sharing mode has active balanced control, and current sampling is carried out on each parallel branch to realize closed-loop current sharing control, but the number of sensors is large, so a control scheme for reducing the number of sensors is proposed, such as sampling by adopting a single direct current bus current sensor, generating high-frequency voltage sag by utilizing parasitic resistance of a high-voltage direct current bus capacitor, and the like; there are two types of schemes for voltage equalization: the first method utilizes a voltage sensor to collect capacitance voltage and adds the capacitance voltage into a closed-loop control system to actively adjust the capacitance voltage to an expected value, and the second method utilizes the characteristics of a converter to realize sensorless voltage equalization, such as a flying capacitor multi-level converter, to inhibit unbalanced voltage, but the capacitor volume is large and is not suitable for a high-power density converter due to the unbalanced voltage. It has been found by comparison that the above current and voltage balancing approach is not beneficial to achieve high power density and low cost of the converter, and is difficult to apply to a larger number of half-bridge parallel and series topologies for special case applications.
Disclosure of Invention
In order to solve the problems, the invention provides a voltage-current self-balancing method of a staggered parallel three-level DCDC converter, wherein a resonance network formed by an inductance component and a resonance capacitor is used for realizing soft switching of a main power circuit, only one total current sensor is utilized, the simultaneous self-balancing of voltage and current is realized by changing the switching frequency mode, the problem of unbalanced circuit caused by the influence of the precision, the temperature and the humidity of a plurality of sensors is avoided, the number of sensors is reduced, and the cost is reduced.
In order to achieve the above purpose, the invention adopts the following technical scheme: a voltage-current self-balancing method of an interleaved three-level DCDC converter is used for an n-phase interleaved three-level DCDC converter, and the n-phase interleaved three-level DCDC converter comprises: n three-level bridge arms are connected in parallel, each three-level bridge arm comprises a switching tube formed by connecting an upper half bridge and a lower half bridge in series, and two ends of the switching tube are connected with a capacitor in parallel; the output ends of the upper half bridge and the lower half bridge are respectively provided with a filter inductor, and the input ends of the upper half bridge and the lower half bridge are connected with an input filter capacitor in series;
based on the n-phase staggered parallel three-level DCDC converter, the voltage and current self-balancing method comprises the following steps: the carrier waves of the n three-level bridge arms and the upper half bridge and the lower half bridge of the three-level bridge arms are staggered and phase-shifted, and the switching frequency is regulated through a closed loop, so that the converter works in an approximate critical conduction mode, thereby realizing zero-voltage soft switching and generating resonance transition time; the effect of counteracting unbalanced components is achieved by utilizing the equivalent duty cycle of resonance transition time, so that self-balancing of capacitor voltage and inductor current is achieved.
Further, based on the n-phase staggered parallel three-level DCDC converter, the voltage-current self-balancing method comprises the following steps:
and step 1, sampling the output summarized current and the voltages of the input end and the output end of the staggered parallel three-level DCDC converter topology to obtain sampling values of the summarized current, the input voltage and the output voltage.
Step 2, giving an inductance current value opposite to the average current, and limiting dead time in the conduction process of the main power switching tube;
step 3, calculating the switching frequency and the duty ratio required by the converter working in the approximate critical conduction mode by using the input voltage, the output voltage and the summarized current which are obtained by sampling, a given reverse current value and the dead time of a switching tube;
step 4, utilizing the switching frequency of the PWM adjusting system and the duty ratio of the main power switching tube to realize the frequency conversion and duty ratio changing control of the converter;
step 5, after frequency conversion and duty ratio modulation, the inductance current of the converter system is enabled to keep a proper reverse current value, so that the operation of the converter system is kept in an approximate critical conduction mode, and zero-voltage soft switching operation of the switching tube is realized;
step 6, obtaining the resonance transition time of the switching tube according to the condition of zero-voltage soft switching operation of the switching tube, so that the converter generates an additional equivalent duty ratio; obtaining an inverse proportion relation between the equivalent duty ratio and the inductance current according to a duty ratio calculation formula, and automatically compensating an unbalanced component in a direct proportion relation with the capacitance voltage of an input end;
step 7, adjusting the switching frequency of the system to enable the converter to work in an approximate critical conduction mode to realize zero-voltage switching on, and enabling the generated soft switching transition time equivalent duty ratio to offset unbalance of the inductance current and the capacitance voltage of the input end, namely, a negative feedback mechanism generated by unbalanced components to automatically balance the inductance current and the capacitance voltage;
and 8, maintaining the inductance current to have positive and negative values in each switching period through variable switching frequency operation, obtaining an equivalent compensation duty ratio in an approximate critical conduction mode, generating an effect of self-balancing the inductance current and the capacitance voltage, and automatically correcting the equivalent duty ratio of each switch to enable the capacitance voltage and the inductance current to be self-balanced at the same time.
Further, four switching tubes are connected in series to form a three-level bridge arm in parallel, the upper half bridge of the three-level bridge arm is provided with two switching tubes which are a switching tube I and a switching tube II, the joint of the two switching tubes is used as an output end, and the lower half bridge of the three-level bridge arm is provided with two switching tubes which are a switching tube III and a switching tube IV, and the joint of the two switching tubes is used as an output end;
the two ends of each switching tube are connected with a high-frequency capacitor in parallel or parasitic capacitors of the switching tubes are utilized;
the output end of the upper half-bridge is provided with a first filter inductor, the output end of the lower half-bridge is provided with a second filter inductor, and the input ends of the upper half-bridge and the lower half-bridge are connected with two input filter capacitors which are connected in series.
Further, splitting the staggered parallel three-level topological structure into an upper half-bridge part and a lower half-bridge part, wherein the corresponding upper half-bridge and lower half-bridge are the staggered parallel two-level converter structure, and acquiring the relation between the actual equivalent duty ratio and unbalanced inductive current;
in the upper half bridge, a switching tube I is a main power switching tube, the switching states of the switching tube I and the switching tube II are complementary, and a gate electrode is driven to fix a control duty ratio under a given ideal state, and the switching tube I and the switching tube II work in an approximate critical conduction mode under a variable switching frequency to realize zero-voltage soft switching, so that the resonance transition time in the process can generate an additional equivalent duty ratio, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switching tube; when the switching tube I is turned off, the first filter inductor and the parallel capacitor of the switching tube I and the switching tube II form a resonant network to carry out energy transfer, in the process, the parallel capacitor of the switching tube I is charged to the voltage of the direct current bus capacitor at the input end, the parallel capacitor of the switching tube II is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, and when the current direction flowing through the anti-parallel diode is about to change, the switching tube II realizes the conduction of a zero-voltage soft switch and obtains the relation between the actual equivalent duty ratio and unbalanced inductance current;
or, in the lower half bridge, the switching tube III is a main power switching tube, the switching states of the switching tube III and the switching tube IV are complementary, and the gate electrode drives a fixed control duty ratio under a given ideal state, and the switching tube III and the switching tube IV work in an approximate critical conduction mode under a variable switching frequency to realize zero-voltage soft switching, so that the resonance transition time in the process can generate an additional equivalent duty ratio, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switching tube; when the switching tube III is turned off, the second filter inductor and the parallel capacitor of the switching tube III and the switching tube IV form a resonant network to transfer energy, in the process, the parallel capacitor of the switching tube III is charged to the voltage of the direct current bus capacitor at the input end, the parallel capacitor of the switching tube IV is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, and when the current direction flowing through the anti-parallel diode is about to change, the switching tube IV realizes zero-voltage soft switch conduction to acquire the relation between the actual equivalent duty ratio and unbalanced inductance current.
Further, splitting the staggered parallel three-level circuit topological structure into a plurality of discrete three-level topological structures to obtain the relation between the actual equivalent duty ratio and unbalanced capacitor voltage;
the switching tube I and the switching tube IV are main power switching tubes, the switching states are complementary, the switching tube II and the switching tube III are auxiliary switching tubes, and the gate electrode is driven to have a fixed control duty ratio under a given ideal state.
Furthermore, on the basis of a control mode of changing the switching frequency, the control operation of the switching tube is performed in an approximate critical conduction mode to realize zero voltage switching of the switching tube, and an equivalent duty ratio correction amount with an inhibition effect on unbalanced components is automatically generated, so that the unbalanced problem of the inductance current and the capacitance voltage is compensated, and the simultaneous self-equalization of the inductance current and the capacitance voltage is realized.
The beneficial effect of adopting this technical scheme is:
the invention is based on n-phase staggered parallel three-level DCDC converter, namely, the three-level DC converter comprises n three-level bridge arms which are connected in parallel, each three-level bridge arm is formed by connecting switching tubes of an upper half bridge and a lower half bridge in series, and high-frequency capacitors are connected in parallel at two ends of the switching tubes or parasitic capacitors of the switching tubes are utilized; n three-level bridge arms and carrier wave staggered phase shifting of an upper half bridge and a lower half bridge of the three-level bridge arms; the converter works in an approximate critical conduction mode through the control of the variable switching frequency and the variable duty ratio, so that zero-voltage soft switching is realized, and resonance transition time is generated; the effect of counteracting unbalanced components is achieved by utilizing the equivalent duty cycle of resonance transition time, so that self-balancing of capacitor voltage and inductor current is achieved. The invention solves the problems of large number and high cost of the voltage-sharing and current-sharing sensors of the traditional staggered parallel and three-level converter, and obviously reduces the number and cost of the sensors required by current-sharing and voltage-sharing.
The voltage and current self-balancing method of the staggered parallel three-level DCDC converter provided by the invention only needs to adopt one summarized current sensor to measure the current, and compared with the traditional current and voltage sharing control scheme which needs a plurality of sensors, the method remarkably reduces the cost and the volume of the sensors.
The invention is used for the topological structure of the n-phase staggered parallel three-level DCDC converter, and the resonance capacitors (the parallel high-frequency capacitors or the parasitic capacitors of the switching tubes) are connected in parallel at the two ends of the original switching tubes. The switch tube has the advantages that the capacitor of the switch tube directly forms a resonant network with the main inductor to realize resonance transition, no additional resonant inductor is needed, the control system works in a critical conduction mode, and zero-voltage soft switching of the switch tube is realized by utilizing an approximate critical conduction mode. The advantages of the staggered parallel connection, the three levels and the soft switching technology are combined, so that the efficiency of the converter is improved, the input/output current ripple and the volume of the inductance and the capacitance are reduced, and the switching loss is reduced.
The staggered parallel three-level DCDC converter maintains the reverse valley value of the inductance current through a control method of changing the switching frequency so as to maintain an approximate critical conduction mode, and in the process, the relation between the actual equivalent duty ratio, the inductance average current and the input capacitance voltage is utilized to automatically adjust the equivalent duty ratio, so that the simultaneous self-balancing of the voltage and the current is realized.
Drawings
Fig. 1 is a schematic flow chart of a voltage-current self-balancing method of an interleaved three-level DCDC converter according to the present invention;
FIG. 2 is a topology diagram of an interleaved three-level DCDC converter with resonant capacitors according to an embodiment of the present invention;
FIG. 3 is a graph showing the relationship between the actual equivalent duty cycle and the average inductor current in the interleaved two-level DCDC converter according to the embodiment of the present invention;
FIG. 4 is a graph showing the relationship between the actual equivalent duty cycle and the input capacitor voltage in a three-level DCDC converter according to an embodiment of the present invention;
FIG. 5 is a waveform diagram of the operation of the interleaved three-level DCDC converter according to the embodiment of the present invention when 1/3< D < 1/2;
fig. 6 is a control block diagram of a voltage-current self-balancing method of an interleaved three-level DCDC converter according to an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent.
In this embodiment, referring to fig. 1, the present invention provides a voltage-current self-balancing method of an interleaved three-level DCDC converter, for an n-phase interleaved three-level DCDC converter, where the n-phase interleaved three-level DCDC converter includes: n three-level bridge arms are connected in parallel, each three-level bridge arm comprises a switching tube formed by connecting an upper half bridge and a lower half bridge in series, and two ends of the switching tube are connected with a capacitor in parallel; the output ends of the upper half bridge and the lower half bridge are respectively provided with a filter inductor, and the input ends of the upper half bridge and the lower half bridge are connected with an input filter capacitor in series; as shown in fig. 2;
based on the n-phase staggered parallel three-level DCDC converter, the voltage and current self-balancing method comprises the following steps: the carrier waves of the n three-level bridge arms and the upper half bridge and the lower half bridge of the three-level bridge arms are staggered and phase-shifted, and the switching frequency is regulated through a closed loop, so that the converter works in an approximate critical conduction mode, thereby realizing zero-voltage soft switching and generating resonance transition time; the effect of counteracting unbalanced components is achieved by utilizing the equivalent duty cycle of resonance transition time, so that self-balancing of capacitor voltage and inductor current is achieved.
As an optimized implementation of the above example, based on the n-phase staggered parallel three-level DCDC converter, as shown in fig. 1, the voltage-current self-balancing method includes the steps of:
and step 1, sampling the output summarized current and the voltages of the input end and the output end of the staggered parallel three-level DCDC converter topology to obtain sampling values of the summarized current, the input voltage and the output voltage.
Step 2, giving an inductance current value opposite to the average current, and limiting dead time in the conduction process of the main power switching tube;
step 3, calculating the switching frequency and the duty ratio required by the converter working in the approximate critical conduction mode by using the input voltage, the output voltage and the summarized current which are obtained by sampling, a given reverse current value and the dead time of a switching tube;
step 4, utilizing the switching frequency of the PWM adjusting system and the duty ratio of the main power switching tube to realize the frequency conversion and duty ratio changing control of the converter;
step 5, after frequency conversion and duty ratio modulation, the inductance current of the converter system is enabled to keep a proper reverse current value, so that the operation of the converter system is kept in an approximate critical conduction mode, and zero-voltage soft switching operation of the switching tube is realized;
step 6, obtaining the resonance transition time of the switching tube according to the condition of zero-voltage soft switching operation of the switching tube, so that the converter generates an additional equivalent duty ratio; obtaining an inverse proportion relation between the equivalent duty ratio and the inductance current according to a duty ratio calculation formula, and automatically compensating an unbalanced component in a direct proportion relation with the capacitance voltage of an input end;
step 7, adjusting the switching frequency of the system to enable the converter to work in an approximate critical conduction mode to realize zero-voltage switching on, and enabling the generated soft switching transition time equivalent duty ratio to offset unbalance of the inductance current and the capacitance voltage of the input end, namely, a negative feedback mechanism generated by unbalanced components to automatically balance the inductance current and the capacitance voltage;
and 8, maintaining the inductance current to have positive and negative values in each switching period through variable switching frequency operation, obtaining an equivalent compensation duty ratio in an approximate critical conduction mode, generating an effect of self-balancing the inductance current and the capacitance voltage, and automatically correcting the equivalent duty ratio of each switch to enable the capacitance voltage and the inductance current to be self-balanced at the same time.
As an optimized implementation scheme of the embodiment, four switching tubes are connected in series to form a three-level bridge arm in parallel, the upper half bridge of the three-level bridge arm is provided with two switching tubes which are a switching tube I and a switching tube II, the joint of the two switching tubes is used as an output end, and the lower half bridge of the three-level bridge arm is provided with two switching tubes which are a switching tube III and a switching tube IV, and the joint of the two switching tubes is used as an output end;
the two ends of each switching tube are connected with a high-frequency capacitor in parallel or parasitic capacitors of the switching tubes are utilized;
the output end of the upper half-bridge is provided with a first filter inductor, the output end of the lower half-bridge is provided with a second filter inductor, and the input ends of the upper half-bridge and the lower half-bridge are connected with two input filter capacitors which are connected in series.
Specifically, splitting the staggered parallel three-level topological structure into an upper half-bridge part and a lower half-bridge part, wherein the corresponding upper half-bridge and lower half-bridge are staggered parallel two-level converter structures, and acquiring the relation between the actual equivalent duty ratio and unbalanced inductive current;
in the upper half bridge, a switching tube I is a main power switching tube, the switching states of the switching tube I and the switching tube II are complementary, and a gate electrode is driven to fix a control duty ratio under a given ideal state, and the switching tube I and the switching tube II work in an approximate critical conduction mode under a variable switching frequency to realize zero-voltage soft switching, so that the resonance transition time in the process can generate an additional equivalent duty ratio, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switching tube; when the switching tube I is turned off, the first filter inductor and the parallel capacitor of the switching tube I and the switching tube II form a resonant network to conduct energy transfer, in the process, the parallel capacitor of the switching tube I is charged to the voltage of the direct current bus capacitor at the input end, the parallel capacitor of the switching tube II is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, and when the current direction flowing through the anti-parallel diode is about to change, the switching tube II realizes zero-voltage soft switch conduction, and the relation between the actual equivalent duty ratio and unbalanced inductance current is obtained.
Or, in the lower half bridge, the switching tube III is a main power switching tube, the switching states of the switching tube III and the switching tube IV are complementary, and the gate electrode drives a fixed control duty ratio under a given ideal state, and the switching tube III and the switching tube IV work in an approximate critical conduction mode under a variable switching frequency to realize zero-voltage soft switching, so that the resonance transition time in the process can generate an additional equivalent duty ratio, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switching tube; when the switching tube III is turned off, the second filter inductor and the parallel capacitor of the switching tube III and the switching tube IV form a resonant network to transfer energy, in the process, the parallel capacitor of the switching tube III is charged to the voltage of the direct current bus capacitor at the input end, the parallel capacitor of the switching tube IV is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, and when the current direction flowing through the anti-parallel diode is about to change, the switching tube IV realizes zero-voltage soft switch conduction to acquire the relation between the actual equivalent duty ratio and unbalanced inductance current.
Specific examples: as shown in fig. 3. Analyzing the relationship between the equivalent duty cycle and the inductor current by the topological structure of the converter, taking the first phase as an example, S a1 Is a main power switch tube S a2 And S is equal to a1 The switch states are complementary, and the fixed control duty ratio of the gate drive under the given ideal state causes the switch tube S under the variable switch frequency a1 And S is equal to a2 Operating in near-CRM mode, a zero voltage soft switch is implemented, so the resonant transition time in the process will produce an additional equivalent duty cycle, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switch tube, when S a1 Turn-off, inductance L and capacitance C a1 、C a2 Forming a resonant network for energy transfer, C in the process a1 Is charged to the input DC bus capacitor electricityPressure V h1 ，C a2 Is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, when the direction of the current flowing through the anti-parallel diode is about to change, S a2 And realizing zero-voltage soft switch conduction. In this process, the actual equivalent duty cycle is inversely proportional to the inductor average current, which is shown in the graph of fig. 3.
Specifically, splitting a staggered parallel three-level circuit topological structure into a plurality of discrete three-level topological structures to obtain the relation between the actual equivalent duty ratio and unbalanced capacitor voltage;
the switching tube I and the switching tube IV are main power switching tubes, the switching states are complementary, the switching tube II and the switching tube III are auxiliary switching tubes, and the gate electrode is driven to have a fixed control duty ratio under a given ideal state.
In a specific embodiment, as shown in fig. 4, the relationship between the actual equivalent duty cycle and the unbalanced capacitor voltage is analyzed. Wherein S is a1 And S is equal to a4 Is a main power switch tube, the switch states are complementary, S a2 And S is equal to a3 For assisting the switching tube, the switching tube S is driven by a variable switching frequency given a fixed control duty ratio of the gate drive in an ideal state a1 、S a2 、S a3 、S a4 When working in the near-CRM mode, the zero-voltage soft switch is realized, the resonance transition time of the soft switch process can generate additional equivalent duty ratio, the invention discovers that the actual equivalent duty ratio is in direct proportion to the capacitance voltage, and the relationship between the capacitance voltage of the upper half bridge and the duty ratio is shown as a curve in fig. 4.
Specifically, on the basis of the control mode of the variable switching frequency, the relation between the equivalent duty ratio, the inductance current and the capacitance voltage in fig. 3 and fig. 4 can be utilized, the switching tube is controlled to work in the approximately critical conduction mode to realize zero voltage switching on of the switching tube, and the equivalent duty ratio correction quantity with the inhibition effect on unbalanced components is automatically generated, so that the unbalanced problem of the inductance current and the capacitance voltage is compensated, and the simultaneous self-equalization of the inductance current and the capacitance voltage is realized.
The working waveform of the staggered parallel three-level DCDC converter in the approximate critical conduction mode is shown in fig. 5, a waveform diagram is illustrated by 1/3< D <1/2, and the converter can work in the approximate critical conduction mode, so that the feasibility of a scheme for realizing simultaneous self-balancing of voltage and current is verified by utilizing the feedback balancing mechanism of fig. 3 and 4.
The control block diagram of the voltage-current self-balancing of the staggered parallel three-level DCDC converter is shown in fig. 6, when the switching frequency is calculated, the converter is enabled to work in an approximate critical conduction mode with high dynamic response by establishing the relation among the switching frequency, the duty ratio, the input voltage, the inductance value, the average current and the valley current variable, and the unbalanced components of the inductance current and the capacitance voltage are compensated by utilizing the resonance transition time generated in the soft switching process, namely, the additional equivalent duty ratio, so that the effect of the simultaneous self-balancing of the voltage and the current of the converter is realized.
The working waveform of the staggered parallel three-level DCDC converter in the approximate critical conduction mode is shown in fig. 5, a waveform diagram is illustrated by 1/3< D <1/2, and the converter can work in the approximate critical conduction mode, so that the feasibility of a scheme for realizing simultaneous self-balancing of voltage and current is verified by utilizing the feedback balancing mechanism of fig. 3 and 4.
The control block diagram of the voltage-current self-balancing of the staggered parallel three-level DCDC converter is shown in fig. 6, when the switching frequency is calculated, the converter is enabled to work in an approximate critical conduction mode with high dynamic response by establishing the relation among the switching frequency, the duty ratio, the input voltage, the inductance value, the average current and the valley current variable, and the unbalanced components of the inductance current and the capacitance voltage are compensated by utilizing the resonance transition time generated in the soft switching process, namely, the additional equivalent duty ratio, so that the effect of the simultaneous self-balancing of the voltage and the current of the converter is realized.
The foregoing has shown and described the basic principles and main features of the present invention and the advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (6)
1. The voltage and current self-balancing method for the staggered parallel three-level DCDC converter is characterized by comprising the following steps of: n three-level bridge arms are connected in parallel, each three-level bridge arm comprises a switching tube formed by connecting an upper half bridge and a lower half bridge in series, and two ends of the switching tube are connected with a capacitor in parallel; the output ends of the upper half bridge and the lower half bridge are respectively provided with a filter inductor, and the input ends of the upper half bridge and the lower half bridge are connected with an input filter capacitor in series;
based on the n-phase staggered parallel three-level DCDC converter, the voltage and current self-balancing method comprises the following steps: the carrier waves of the n three-level bridge arms and the upper half bridge and the lower half bridge of the three-level bridge arms are staggered and phase-shifted, and the switching frequency is regulated through a closed loop, so that the converter works in an approximate critical conduction mode, thereby realizing zero-voltage soft switching and generating resonance transition time; the effect of counteracting unbalanced components is achieved by utilizing the equivalent duty cycle of resonance transition time, so that self-balancing of capacitor voltage and inductor current is achieved.
2. The voltage-current self-balancing method of an interleaved three-level DCDC converter according to claim 1, wherein the voltage-current self-balancing method based on the n-phase interleaved three-level DCDC converter comprises the steps of:
and step 1, sampling the output summarized current and the voltages of the input end and the output end of the staggered parallel three-level DCDC converter topology to obtain sampling values of the summarized current, the input voltage and the output voltage.
Step 2, giving an inductance current value opposite to the average current, and limiting dead time in the conduction process of the main power switching tube;
step 3, calculating the switching frequency and the duty ratio required by the converter working in the approximate critical conduction mode by using the input voltage, the output voltage and the summarized current which are obtained by sampling, a given reverse current value and the dead time of a switching tube;
step 4, utilizing the switching frequency of the PWM adjusting system and the duty ratio of the main power switching tube to realize the frequency conversion and duty ratio changing control of the converter;
step 5, after frequency conversion and duty ratio modulation, the inductance current of the converter system is enabled to keep a proper reverse current value, so that the operation of the converter system is kept in an approximate critical conduction mode, and zero-voltage soft switching operation of the switching tube is realized;
step 6, obtaining the resonance transition time of the switching tube according to the condition of zero-voltage soft switching operation of the switching tube, so that the converter generates an additional equivalent duty ratio; obtaining an inverse proportion relation between the equivalent duty ratio and the inductance current according to a duty ratio calculation formula, and automatically compensating an unbalanced component in a direct proportion relation with the capacitance voltage of an input end;
step 7, adjusting the switching frequency of the system to enable the converter to work in an approximate critical conduction mode to realize zero-voltage switching on, and enabling the generated soft switching transition time equivalent duty ratio to offset unbalance of the inductance current and the capacitance voltage of the input end, namely, a negative feedback mechanism generated by unbalanced components to automatically balance the inductance current and the capacitance voltage;
and 8, maintaining the inductance current to have positive and negative values in each switching period through variable switching frequency operation, obtaining an equivalent compensation duty ratio in an approximate critical conduction mode, generating an effect of self-balancing the inductance current and the capacitance voltage, and automatically correcting the equivalent duty ratio of each switch to enable the capacitance voltage and the inductance current to be self-balanced at the same time.
3. The method for self-balancing voltage and current of the staggered parallel three-level DCDC converter according to claim 1, wherein four switching tubes are connected in series to form a three-level bridge arm in parallel, the upper half bridge of the three-level bridge arm is provided with two switching tubes which are a switching tube I and a switching tube II and are connected with each other to serve as an output end, and the lower half bridge of the three-level bridge arm is provided with two switching tubes which are a switching tube III and a switching tube IV and are connected with each other to serve as an output end;
the two ends of each switching tube are connected with a high-frequency capacitor in parallel or parasitic capacitors of the switching tubes are utilized;
the output end of the upper half-bridge is provided with a first filter inductor, the output end of the lower half-bridge is provided with a second filter inductor, and the input ends of the upper half-bridge and the lower half-bridge are connected with two input filter capacitors which are connected in series.
4. The method for self-balancing voltage and current of an interleaved three-level DCDC converter according to claim 3, wherein the interleaved three-level topology structure is split into an upper half-bridge part and a lower half-bridge part, and the corresponding upper half-bridge and lower half-bridge part are also the interleaved two-level converter structure, so as to obtain the relation between the actual equivalent duty ratio and the unbalanced inductive current;
in the upper half bridge, a switching tube I is a main power switching tube, the switching states of the switching tube I and the switching tube II are complementary, and a gate electrode is driven to fix a control duty ratio under a given ideal state, and the switching tube I and the switching tube II work in an approximate critical conduction mode under a variable switching frequency to realize zero-voltage soft switching, so that the resonance transition time in the process can generate an additional equivalent duty ratio, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switching tube; when the switching tube I is turned off, the first filter inductor and the parallel capacitor of the switching tube I and the switching tube II form a resonant network to carry out energy transfer, in the process, the parallel capacitor of the switching tube I is charged to the voltage of the direct current bus capacitor at the input end, the parallel capacitor of the switching tube II is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, and when the current direction flowing through the anti-parallel diode is about to change, the switching tube II realizes the conduction of a zero-voltage soft switch and obtains the relation between the actual equivalent duty ratio and unbalanced inductance current;
or, in the lower half bridge, the switching tube III is a main power switching tube, the switching states of the switching tube III and the switching tube IV are complementary, and the gate electrode drives a fixed control duty ratio under a given ideal state, and the switching tube III and the switching tube IV work in an approximate critical conduction mode under a variable switching frequency to realize zero-voltage soft switching, so that the resonance transition time in the process can generate an additional equivalent duty ratio, namely: the resonance transition is carried out on a resonance network formed by a capacitor and a main inductor which are connected in parallel at two ends of the switching tube; when the switching tube III is turned off, the second filter inductor and the parallel capacitor of the switching tube III and the switching tube IV form a resonant network to transfer energy, in the process, the parallel capacitor of the switching tube III is charged to the voltage of the direct current bus capacitor at the input end, the parallel capacitor of the switching tube IV is discharged to 0 until the voltage is clamped by the anti-parallel diode of the switch, and when the current direction flowing through the anti-parallel diode is about to change, the switching tube IV realizes zero-voltage soft switch conduction to acquire the relation between the actual equivalent duty ratio and unbalanced inductance current.
5. The method for self-balancing voltage and current of an interleaved parallel three-level DCDC converter of claim 4, wherein the interleaved parallel three-level circuit topology is split into a plurality of discrete three-level topologies to obtain a relationship between the actual equivalent duty cycle and the unbalanced capacitive voltage;
the switching tube I and the switching tube IV are main power switching tubes, the switching states are complementary, the switching tube II and the switching tube III are auxiliary switching tubes, and the gate electrode is driven to have a fixed control duty ratio under a given ideal state.
6. The method for self-balancing voltage and current of a staggered parallel three-level DCDC converter according to claim 5, wherein the relation between the obtained actual equivalent duty cycle and the unbalanced inductor current and the unbalanced capacitor voltage is based on a control mode of changing the switching frequency, the switching tube is controlled to be operated in an approximate critical conduction mode to realize zero voltage switching of the switching tube, and the equivalent duty cycle correction with the inhibition effect on the unbalanced component is automatically generated, so that the unbalanced problem of the inductor current and the capacitor voltage is compensated, and the simultaneous self-balancing of the inductor current and the capacitor voltage is realized.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116826761A (en) * | 2023-08-28 | 2023-09-29 | 武汉中楚柏泰智能科技有限公司 | Electromagnetic type electric energy quality unified controller |
| CN117118227A (en) * | 2023-08-22 | 2023-11-24 | 西南交通大学 | Three-level DCDC converter soft switch control method based on trapezoidal wave |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117118227A (en) * | 2023-08-22 | 2023-11-24 | 西南交通大学 | Three-level DCDC converter soft switch control method based on trapezoidal wave |
| CN116826761A (en) * | 2023-08-28 | 2023-09-29 | 武汉中楚柏泰智能科技有限公司 | Electromagnetic type electric energy quality unified controller |
| CN116826761B (en) * | 2023-08-28 | 2023-11-28 | 武汉中楚柏泰智能科技有限公司 | Electromagnetic type electric energy quality unified controller |
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