CN116435001A - Chip ion trap - Google Patents
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Abstract
Disclosed herein is a chip ion trap comprising: more than two photon ion information exchange areas and optical channels; wherein the photonic ion information exchange region is configured to: establishing photons and ion entanglement states in a photon ion information exchange area, and releasing the photons; the optical channel is connected with the photon ion information exchange area, collects and transmits released photons, and performs joint measurement on the released photons to establish entanglement states of ions in different photon ion information exchange areas. The embodiment of the invention realizes a scalable large-scale general ion quantum computer system based on the photon ion information exchange area and the optical channel.
Description
Technical Field
This document relates to, but is not limited to, quantum computer technology, and in particular to a chip ion trap.
Background
A quantum computer is a device that uses quantum logic for general purpose computing; the basic logic unit of a quantum computer is composed of quantum bits which obey quantum mechanics, and a large number of interacted quantum bits can physically realize the quantum computer. Compared with the traditional computer, the quantum computer can greatly reduce the operation time when solving some specific problems. The quantum computer has wide application prospects in the aspects of future basic scientific research, quantum communication, cryptography, artificial intelligence, financial market simulation, climate change prediction and the like, and is widely focused. An ion trap system (ion trap) is a physical device that confines charged ions in a confined space by an electromagnetic field and can isolate the charged ions from the external environment. In an ion trap quantum computer, quantum information is stored in the electron quantum states of ions, and the quantum information can be transferred through a collective interaction of coulomb interactions and quantization between charged ions. The quantum logic gate operation with various high fidelity can be realized under the experimental condition by utilizing the ion or atom quantum bit array trapped in the potential well. The ion quantum bit has excellent performance on key indexes such as interaction control, long coherence time, high-fidelity quantum logic gate operation, quantum error correction and the like for measuring quantum computing performance, and is one of platforms most likely to realize a quantum computer.
The core hardware of the ion quantum computer is an ion trap chip and is used for trapping and controlling quantum bits (ions stored with quantum information); briefly, an ion trap quantum chip is a chip with various electrodes for generating a controllable electromagnetic field, wherein the electrodes are largely divided into Radio Frequency (RF) electrodes and Direct Current (DC) electrodes. The experimenter builds a trapping potential well by applying radio frequency voltage to the RF electrode and electrostatic voltage to the DC electrode, so as to realize trapping and trapping of ion bits. For ion quantum computing, the electromagnetic field generated by the ion trap chip is a key factor in determining the success or failure of quantum computing operations.
The core problem faced at the present stage of quantum computing is how to realize large-scale expansion. The expansion schemes of the ion trap quantum computer in the prior art mainly comprise two types, namely a quantum charge coupled architecture (QCD) and a quantum computing network architecture based on photons; the QCD architecture realizes information transmission of different functional areas on the chip by transporting ions on the chip, and has the defects that the transportation speed and the information transmission fidelity have conflict, and the information transmission difficulty is high in rapidness and high quality; thus, qcd schemes are not scalable enough from the time consuming and fidelity perspective of quantum computation. The quantum computing network based on photons uses flying photons as messengers to construct entangled states among ions in different ion traps so as to realize information transfer among different ion trap systems, thereby constructing a distributed quantum computing network architecture. The number of ions in a single ion trap in the existing optical quantum network architecture is small, and the number of ion trap systems required for realizing large-scale expansion is huge, so that the cost is high. Therefore, from the viewpoint of cost, the current optical quantum network architecture is not sufficiently scalable.
In summary, how to realize large-scale expansion of ion trap quantum computers is a problem to be solved.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
The embodiment of the invention provides a chip ion trap which can realize large-scale expansion of quantum computation.
The embodiment of the invention provides a chip ion trap, which comprises: more than two photon ion information exchange areas and optical channels; wherein,,
the photon ion information exchange region is set as follows: establishing photons and ion entanglement states in a photon ion information exchange area, and releasing the photons;
the optical channel is connected with the photon ion information exchange area, collects and transmits released photons, and performs joint measurement on the released photons to establish entanglement states of ions in different photon ion information exchange areas.
The technical scheme of the application comprises the following steps: more than two photon ion information exchange areas and optical channels; wherein the photonic ion information exchange region is configured to: establishing photons and ion entanglement states in a photon ion information exchange area, and releasing the photons; the optical channel is connected with the photon ion information exchange area, collects and transmits released photons, and performs joint measurement on the released photons to establish entanglement states of ions in different photon ion information exchange areas. The embodiment of the invention realizes a scalable large-scale general ion quantum computer system based on the photon ion information exchange area and the optical channel.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate and do not limit the invention.
FIG. 1 is a block diagram of a chip ion trap in accordance with an embodiment of the present invention;
fig. 2 is a schematic diagram of the composition structure of a chiplet according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail hereinafter with reference to the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be arbitrarily combined with each other.
The steps illustrated in the flowchart of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, while a logical order is depicted in the flowchart, in some cases, the steps depicted or described may be performed in a different order than presented herein.
Fig. 1 is a block diagram of a chip ion trap according to an embodiment of the present invention, as shown in fig. 1, including: more than two photon ion information exchange areas (only three are shown in the figure) and optical channels; wherein,,
the photon ion information exchange region is set as follows: establishing an entangled state of photons and ions in a photon ion information exchange area, and releasing the photons;
the optical channel is connected with the photon ion information exchange area, collects and transmits released photons, and performs joint measurement on the released photons to establish entanglement states of ions in different photon ion information exchange areas.
The embodiment of the invention realizes large-scale expansion of ion quantum calculation based on the photon ion information exchange area and the optical channel.
In one illustrative example, the chip ion trap of the present invention further comprises a quantum computation region configured to: performing a quantum operation on ions in the quantum computation region;
wherein the quantum operation comprises any one or a combination of the following: atom ionization, ion capture, ion transport, quantum logic gate operation, quantum storage, ion state detection, laser cooling and ion initial state preparation.
In an exemplary embodiment, the quantum computing area of the chip ion trap of the embodiment of the invention can be divided into a plurality of functional modules, and can comprise an ion capturing area, a logic gate operation area, a quantum storage area, an ion transport channel and the like, and ions can be transported between different functional areas so as to realize short-distance information transfer.
According to the embodiment of the invention, the vibration mode of the ion crystal is used as a medium, and the modes of ion transportation and the like can realize information transmission between ions at a close range; information transfer between remote ions can be realized by utilizing photon ion information exchange and an optical channel; according to the embodiment of the invention, a quantum charge coupled (QCD) architecture and an optical quantum network architecture are fused in a single ion trap system, so that the large-scale expansion of ion quantum calculation is realized.
In one illustrative example, the photonic ion information exchange region, the quantum computing region, and the optical channel of embodiments of the present invention are integrated on the same chip.
The embodiment of the invention combines the photon ion information exchange area, the quantum computing area and the optical channel in the same chip, thereby realizing a scalable large-scale general ion quantum computer system.
In an exemplary embodiment, the photonic ion information exchange region of the present invention may have an opening below the chip electrode in the region, and optical micro-nano cavities, micro-lenses, micro-mirrors, gratings, etc. for collecting optical signals may be prepared, where the optical collecting structures are connected to the optical waveguide of the optical channel for transmitting photons.
In an illustrative example, the optical channel in embodiments of the present invention includes one or any combination of the following: the optical waveguide integrated on the substrate, the optical waveguide integrated on the chip, the beam splitter integrated on the chip, the photon detector integrated on the chip, the beam splitter located off the chip, and the photon detector located off the chip.
In one illustrative example, the chip of the chip ion trap of embodiments of the present invention may be fabricated based on micro-nano processing techniques. The micro-nano processing can process ion trap chips with preset configurations, and can integrate various micro-nano optical devices, such as an optical micro-nano cavity for collecting optical signals emitted by ions, an optical waveguide for transmitting laser and photon signals, a superconducting nanowire for realizing optical detection, an integrated photoelectric material, and the like.
In an exemplary embodiment, the direct current electrode and the radio frequency electrode are prepared on the surface of the chip to realize a quantum computing area and a photon ion information exchange area, and an optical channel is positioned below the surface electrode. In order to increase connectivity of an ion trap quantum computer, the embodiment of the invention can realize multi-layer wiring by utilizing a micro-nano processing technology, namely, optical waveguides are distributed on different layers.
In an exemplary embodiment, the photon ion information exchange areas of the embodiment of the invention can be connected in pairs through optical channels, or can be connected through a distribution bus structure, that is, the optical channels further comprise information transfer areas, photons of different photon ion information exchange areas are all transmitted to the information transfer areas, and photons from the photon ion information exchange areas needing information exchange are jointly measured in the information transfer areas, so that information transfer among ions of the corresponding photon ion information exchange areas is realized. The information transfer region may selectively connect different photonic ion information exchange regions.
It should be noted that the specific connection manner of the photon ion information exchange areas should not be construed as limiting the present invention, and may be directly connected in pairs, or may be connected through a distribution bus structure, or may be a combination of the two.
In an illustrative example, where the quantum computation region in an embodiment of the present invention is configured to perform a quantum operation on ions in the quantum computation region, including a quantum logic gate operation, the quantum logic gate operation includes: single bit logic gates and/or multi-bit logic gates;
wherein the multi-bit logic gate is constructed by activating a collective or local vibration mode of the ion crystal.
In an illustrative example, the chip ion trap in an embodiment of the invention further comprises a first laser device configured to: exciting a collective vibration mode or a local vibration mode of ions by irradiating the ions in the quantum computing region and/or in the photon ion information exchange region to realize quantum logic gates between the ions in the quantum computing region; and/or a quantum logic gate between ions in the quantum computation region and ions in the photonic ion information exchange region; and/or a quantum logic gate between ions in the photonic ion information exchange region.
In one illustrative example, ions in the photonic ion information exchange region in embodiments of the present invention may be transported to the quantum computing region.
In one illustrative example, ions in the quantum computing region of embodiments of the present invention may be transported to the photonic ion information exchange region.
The ion transport according to the embodiment of the present invention may include: the direct or indirect transport to the quantum computing region or the photonic ion information exchange region may include placing additional regions and ion transitions in between the two regions, e.g., from the quantum computing region to the storage region and then to the photonic ion information exchange region.
The ion transport according to the embodiment of the invention can comprise direct or indirect transport, wherein the indirect transport comprises indirect transport of ions per se, and information can be transferred to another ion for transport.
According to the embodiment of the invention, information transmission between ions in a close range can be realized by utilizing modes of vibration modes of the ion crystal, ion transport and the like; information transfer between remote ions can be achieved by photon ion information exchange and optical channels. The embodiment of the invention combines the QCD architecture and the optical quantum network architecture in a single ion trap system, and realizes the large-scale expansion of ion quantum computation.
In an exemplary embodiment, the ion trap of the chip in the embodiment of the present invention, the trapped ions may be the same kind of ions, or may include different kinds of ions.
In an exemplary embodiment, the chip ion trap in the embodiment of the present invention may include an external optical interface for transmitting optical signals to the outside of the chip, so that information transfer between different chips may be implemented, where the different chips may be placed in the same vacuum system or in different vacuum systems, so as to implement a distributed quantum computing architecture.
In an exemplary embodiment, the chip ion trap in the embodiment of the present invention may include an external optical interface for implementing the function of introducing an external optical signal onto the chip.
As shown in fig. 2, in an exemplary embodiment, the chip ion trap according to the present invention includes two or more sub-chips, each of which includes a corresponding sub-chip: more than one photonic ion information exchange region and/or quantum computation region;
the optical channel is set to: and connecting photon ion information exchange areas of different sub-chips.
The quantum computing region is configured to perform a quantum operation on ions in the quantum computing region, wherein the quantum operation comprises any one or a combination of: atom ionization, ion trapping, ion transport, quantum logic gate operation, quantum storage, ion state detection, laser cooling, ion initial state preparation and the like.
In one illustrative example, two or more chiplets in embodiments of the present invention are integrated on the same substrate.
In an illustrative example, the optical channel in embodiments of the present invention includes one or any combination of the following: a light collecting device integrated on the substrate, an optical waveguide integrated on the substrate, a beam splitter integrated on the substrate, a photon detector integrated on the substrate, a beam splitter external to the substrate, a photon detector external to the substrate. In an illustrative example, the photonic ion information exchange region and the quantum computing region in the embodiments of the present invention each include a dc electrode and a radio frequency electrode, the dc electrode and the radio frequency electrode being configured to: carrying out ion transport between adjacent sub-chips by receiving a preset voltage applied to the sub-chips so as to perform information transfer between the adjacent sub-chips; ion transport between the quantum computation region and the photonic ion information exchange region of the same chiplet is performed to perform information transfer between the quantum computation region and the photonic ion information exchange region.
In one illustrative example, information transfer between adjacent chiplets according to embodiments of the present invention can include photonic ion information exchange or/and ion transport and/or use of ion crystal vibrational modes as a medium.
Still referring to fig. 2, embodiments of the present invention include more than two chiplets, each chiplet including more than one photonic ion information exchange region and/or quantum computation region thereon; the quantum computing region is used for performing quantum operations including atom ionization, ion trapping, ion transport, quantum logic gate operation, quantum storage, ion state detection, laser cooling, ion initial state preparation and the like. Information transfer within the quantum computing region and between the quantum computing region and the photonic ion information exchange region may be accomplished by the vibrational mode of the ion crystal as a medium, or by means of ion transport. According to the distance between different sub-chips, the information transfer between the sub-chips can be realized by using the vibration mode of the ion crystal as a medium, or photon ion information exchange or ion transport. Therefore, the embodiment of the invention fuses a QCD architecture and an optical quantum network architecture, and realizes large-scale expansion of quantum computation in a single ion trap system.
It should be noted that, the photon ion information exchange region, the quantum computation region and the optical channel illustrated in the drawings are only schematic, and should not be construed as limiting the present invention. The arrangement of the sub-chips is also illustrative only and should not be construed as limiting the invention.
In an illustrative example, the chip ion trap of the embodiment of the present invention further comprises a second laser device configured to:
exciting a local vibration mode or a collective vibration mode by irradiating ions on different sub-chips so as to realize quantum logic gates among the ions on the different sub-chips;
exciting a collective vibration mode or a local vibration mode of ions by irradiating the ions in the quantum computing area and/or the photon ion information exchange area of the same sub-chip so as to realize a quantum logic gate between the ions in the quantum computing area of the same sub-chip; and/or a quantum logic gate between ions in the quantum computation region and ions in the photonic ion information exchange region of the same chiplet; and/or a quantum logic gate between ions in the same chiplet photonic ion information exchange region.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
Claims (13)
1. A chip ion trap comprising: more than two photon ion information exchange areas and optical channels; wherein,,
the photon ion information exchange region is set as follows: establishing an entangled state of photons and ions in a photon ion information exchange area, and releasing the photons;
the optical channel is connected with the photon ion information exchange area, collects and transmits released photons, and performs joint measurement on the released photons to establish entanglement states of ions in different photon ion information exchange areas.
2. The chip ion trap of claim 1, further comprising a quantum computation region configured to: performing a quantum operation on ions in the quantum computation region;
wherein the quantum operation comprises any one or a combination of the following: atom ionization, ion capture, ion transport, quantum logic gate operation, quantum storage, ion state detection, laser cooling and ion initial state preparation.
3. The chip ion trap of claim 2, wherein the photonic ion information exchange region, the quantum computation region, and the optical channel are integrated on the same chip.
4. A chip ion trap according to claim 3, wherein the optical channel comprises one or any combination of the following: the optical waveguide integrated on the chip, the beam splitter integrated on the chip, the photon detector integrated on the chip, the beam splitter outside the chip and the photon detector outside the chip.
5. The chip ion trap of claim 2, wherein the quantum computation region is configured to perform quantum operations on ions in the quantum computation region including the quantum logic gate operation when the quantum logic gate operation includes: single bit logic gates and/or multi-bit logic gates;
wherein the multi-bit logic gate is constructed by exciting a collective or local vibration mode of the ion crystal.
6. The chip ion trap of claim 2, further comprising a first laser device configured to: exciting collective or localized vibrational modes of ions by illuminating ions in the quantum computing region and/or in the photonic ion information exchange region to achieve quantum logic gates between ions in the quantum computing region; and/or a quantum logic gate between ions in the quantum computation region and ions in the photonic ion information exchange region; and/or a quantum logic gate between ions of the photonic ion information exchange region.
7. The chip ion trap of claim 2, wherein ions in the photonic ion information exchange region are transportable to the quantum computing region.
8. The chip ion trap of claim 2, wherein ions in the quantum computing region are transportable to the photonic ion information exchange region.
9. The chip ion trap of claim 2, wherein the chip ion trap comprises more than two sub-chips, each comprising a respective one of: one or more of the photonic ion information exchange regions and/or the quantum computation region;
the optical channel is configured to: and connecting the photon ion information exchange areas of different sub-chips.
10. The chip ion trap of claim 9, wherein the two or more sub-chips are integrated on the same substrate.
11. The chip ion trap of claim 10, wherein the optical channel comprises one or any combination of: the device comprises a light collecting device integrated on a substrate, an optical waveguide integrated on the substrate, a beam splitter integrated on the substrate, a photon detector integrated on the substrate, a beam splitter positioned outside the substrate and a photon detector positioned outside the substrate.
12. The chip ion trap of claim 9, wherein the photonic ion information exchange region and the quantum computing region each comprise a dc electrode and a radio frequency electrode, the dc electrode and radio frequency electrode configured to: carrying out ion transport between adjacent sub-chips by receiving a preset voltage applied to the sub-chips so as to execute information transfer between the adjacent sub-chips; ion transport between the quantum computation region and the photonic ion information exchange region of the same chiplet is performed to perform information transfer between the quantum computation region and the photonic ion information exchange region.
13. The chip ion trap of claim 9, further comprising a second laser device configured to:
exciting a local vibration mode or a collective vibration mode by irradiating ions on different sub-chips so as to realize quantum logic gates among the ions on the different sub-chips;
exciting a collective vibration mode or a local vibration mode of ions by irradiating the ions in the quantum computing area and/or the photon ion information exchange area of the same chiplet to realize a quantum logic gate between the ions in the quantum computing area of the same chiplet; and/or a quantum logic gate between ions in the quantum computation region and ions in the photonic ion information exchange region of the same chiplet; and/or a quantum logic gate between ions in the same chiplet photonic ion information exchange region.
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