CN116431545B - Communication rate self-adaptive adjusting method, device, computer equipment and storage medium - Google Patents
Communication rate self-adaptive adjusting method, device, computer equipment and storage medium Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The application discloses a communication rate self-adaptive adjusting method, a device, a computer device and a storage medium, wherein the communication rate self-adaptive adjusting method comprises the following steps: the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit; the target daughter board receives a plurality of detection signals and sends a plurality of response signals to the host based on the detection signals and the loop circuit; the host determines a first communication rate based on the plurality of detection signals and the plurality of response signals, and adaptively adjusts the communication rate of the host based on the first communication rate; the target daughter board determines a second communication rate based on the plurality of detection signals and adaptively adjusts its own communication rate based on the second communication rate. The embodiment of the application can avoid modifying the main system program and the sub-board program for multiple times, is beneficial to keeping the consistency of codes and parameters and is convenient for the maintenance of codes.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and apparatus for adaptively adjusting a communication rate, a computer device, and a storage medium.
Background
The electronic device with strong compatibility is generally composed of a host and a plurality of daughter boards, and the host and the plurality of daughter boards are connected through a communication bus. The daughter boards have different electromagnetic environments due to different functions, and in order to prevent noise interference between the daughter boards and the main board, a communication isolation chip is generally used to isolate buses of all parts. Different daughter boards may use different types of isolation chips, and when adding or replacing daughter board channels, the communication rates of the host and the daughter boards need to be respectively adapted to the communication rate of the isolation chips.
In the existing method, in order to adapt the communication rates of the host and the daughter board to the communication rates of the isolation chip respectively, the main system program and the daughter board program need to be modified for many times, which is not beneficial to keeping the consistency of codes and parameters, and parameter setting errors are easy to cause in the process of frequently modifying the programs.
Disclosure of Invention
The embodiment of the application provides a communication rate self-adaptive adjustment method, a device, computer equipment and a storage medium, wherein a main board and a sub-board can carry out self-adaptive adjustment on own communication rate, so that a main system program and a sub-board program are prevented from being modified for many times, the consistency of codes and parameters is maintained, and the code maintenance is facilitated.
In one aspect, the present application provides a communication rate adaptive adjustment method, where the communication rate adaptive adjustment method is applied to a communication rate adaptive adjustment device, where the communication rate adaptive adjustment device includes a host and a target daughter board, the host and the target daughter board are connected in communication through multiple groups of signal lines, the multiple groups of signal lines are isolated in communication through an isolation chip, and the multiple groups of signal lines are connected to form a loop circuit, where the communication rate adaptive adjustment method includes:
the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
the target daughter board receives the detection signals and sends response signals to the host based on the detection signals and the loop circuit;
the host determines a first communication rate based on the detection signals and the response signals, and adaptively adjusts the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
And the target daughter board determines a second communication rate based on the detection signals, and adaptively adjusts the communication rate of the target daughter board based on the second communication rate so as to adapt the communication rate of the target daughter board to the communication rate of the isolation chip.
In some embodiments of the application, the host determining a first communication rate based on the plurality of detection signals and the plurality of response signals comprises:
the host determines a first target signal from the plurality of detection signals, wherein the first target signal is a signal sent by the host to the target daughter board through the starting end of the loop circuit in the plurality of detection signals;
the host determines a second target signal from the plurality of response signals, wherein the second target signal is a signal sent by the target daughter board in the plurality of response signals to the host through the ending end of the loop circuit;
the host determines a first delay time based on the first target signal and the second target signal, the first delay time being used to characterize a delay time of the second target signal relative to the first target signal;
the host determines a first communication rate based on the first delay time and the number of sets of the plurality of sets of signal lines.
In some embodiments of the application, the host determining a first communication rate based on the first delay time and the number of sets of the plurality of sets of signal lines comprises:
the host determines a first delay parameter of the isolation chip based on the first delay time and the group number of the plurality of groups of signal lines;
the host determines the type of the isolation chip based on the first delay parameter;
the host determines a first communication rate based on the type of the isolated chip.
In some embodiments of the present application, the host determines a first delay parameter of the isolated chip based on the first delay time and the number of groups of the plurality of groups of signal lines, including:
the host determines a first target number of times based on the number of groups of the plurality of groups of signal lines, the first target number of times being used for representing the number of times the second target signal passes through the isolation chip relative to the first target signal;
the host determines a first delay parameter of the isolated chip based on the first target number of times and the first delay time.
In some embodiments of the present application, the target daughter board determining a second communication rate based on the plurality of detection signals includes:
The target daughter board determines a third target signal from the plurality of detection signals, wherein the third target signal is a first detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop-back line;
the target daughter board determines a fourth target signal from the plurality of detection signals, wherein the fourth target signal is the last detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop-back line;
the target daughter board determining a second delay time based on the third target signal and the fourth target signal, the second delay time being used to characterize a delay time of the fourth target signal relative to the third target signal;
the target daughter board determines a second communication rate based on the second delay time and the number of groups of the plurality of groups of signal lines.
In some embodiments of the present application, the target daughter board determining a second communication rate based on the second delay time and the number of sets of the plurality of sets of signal lines includes:
the target daughter board determines a second delay parameter of the isolation chip based on the second delay time and the group number of the plurality of groups of signal lines;
The target daughter board determines the type of the isolation chip based on the second delay parameter;
the target daughter board determines a second communication rate based on the type of the isolated chip.
In some embodiments of the present application, the target daughter board determines a second delay parameter of the isolated chip based on the second delay time and the number of groups of the plurality of groups of signal lines, including:
the target daughter board determines a second target number of times based on the number of groups of the plurality of groups of signal lines, the second target number of times being used for representing the number of times that the fourth target signal passes through the isolation chip relative to the third target signal;
and the target daughter board determines a second delay parameter of the isolation chip based on the second target times and the second delay time.
On the other hand, the application provides a communication rate self-adaptive regulating device, which comprises a host and a target sub-board, wherein the host and the target sub-board are in communication connection through a plurality of groups of signal wires, the plurality of groups of signal wires are in communication isolation through an isolation chip, and the plurality of groups of signal wires are connected to form a loop circuit;
the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
The target daughter board receives the detection signals and sends response signals to the host based on the detection signals and the loop circuit;
the host determines a first communication rate based on the detection signals and the response signals, and adaptively adjusts the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
and the target daughter board determines a second communication rate based on the detection signals, and adaptively adjusts the communication rate of the target daughter board based on the second communication rate so as to adapt the communication rate of the target daughter board to the communication rate of the isolation chip.
In some embodiments of the application, the host is specifically configured to:
determining a first target signal from the plurality of detection signals, wherein the first target signal is a signal sent by the host in the plurality of detection signals to the target daughter board through the starting end of the loop circuit;
determining a second target signal from the plurality of response signals, wherein the second target signal is a signal sent by the target daughter board in the plurality of response signals to the host through the ending end of the loop circuit;
Determining a first delay time based on the first target signal and the second target signal, the first delay time being used to characterize a delay time of the second target signal relative to the first target signal;
a first communication rate is determined based on the first delay time and the number of sets of the plurality of sets of signal lines.
In some embodiments of the application, the host is specifically further configured to:
determining a first delay parameter of the isolation chip based on the first delay time and the number of groups of the plurality of groups of signal lines;
determining the type of the isolation chip based on the first delay parameter;
a first communication rate is determined based on the type of the isolated chip.
In some embodiments of the application, the host is specifically further configured to:
determining a first target number of times based on the number of sets of the plurality of sets of signal lines, the first target number of times being used to characterize the number of times the second target signal passes through the isolation chip relative to the first target signal;
and determining a first delay parameter of the isolated chip based on the first target times and the first delay time.
In some embodiments of the present application, the target daughter board is specifically configured to:
Determining a third target signal from the plurality of detection signals, wherein the third target signal is a first detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop circuit;
determining a fourth target signal from the plurality of detection signals, wherein the fourth target signal is the last detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop circuit;
determining a second delay time based on the third target signal and the fourth target signal, the second delay time being used to characterize a delay time of the fourth target signal relative to the third target signal;
a second communication rate is determined based on the second delay time and the number of sets of the plurality of sets of signal lines.
In some embodiments of the present application, the target daughter board is specifically further configured to:
determining a second delay parameter of the isolation chip based on the second delay time and the number of groups of the plurality of groups of signal lines;
determining the type of the isolation chip based on the second delay parameter;
a second communication rate is determined based on the type of the isolated chip.
In some embodiments of the present application, the target daughter board is specifically further configured to:
Determining a second target number of times based on the number of sets of the plurality of sets of signal lines, the second target number of times being used to characterize the number of times the fourth target signal passes through the isolation chip relative to the third target signal;
and determining a second delay parameter of the isolated chip based on the second target times and the second delay time.
In another aspect, the present application also provides a computer apparatus, including:
one or more processors;
a memory; and
one or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the processor to implement the communication rate adaptation method of any of the first aspects.
In a fourth aspect, the present application also provides a computer readable storage medium having stored thereon a computer program, the computer program being loaded by a processor to perform the steps of the communication rate adaptation method according to any one of the first aspects.
The host and the target sub-board determine the communication rate based on the detection signals and the response signals, and adaptively adjust the communication rate based on the determined communication rate, so that the main system program and the sub-board program can be prevented from being modified for a plurality of times, the consistency of codes and parameters is maintained, and the code maintenance is facilitated; and a plurality of groups of signal lines are connected into a ring line, and signal transmission and reception are performed based on the ring line, so that the accuracy of the determined communication rate can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a communication rate adaptive adjustment device according to an embodiment of the present application;
FIG. 2 is a flow chart of one embodiment of a communication rate adaptive adjustment method provided in an embodiment of the present application;
FIG. 3 is a waveform diagram of a transmission signal and a reception signal corresponding to a waveform period greater than a delay time according to an embodiment of the present application;
FIG. 4 is a waveform diagram of a transmission signal and a reception signal corresponding to a waveform period less than a delay time according to an embodiment of the present application;
FIG. 5 is a schematic diagram of an embodiment of a computer device provided in an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application.
In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the drawings are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, features defining "first", "second", "third" may include one or more of the stated features, either explicitly or implicitly. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present application, the term "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described as "exemplary" in this disclosure is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the application. In the following description, details are set forth for purposes of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes have not been described in detail so as not to obscure the description of the application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
It should be noted that, because the method of the embodiment of the present application is executed in the computer device, the processing objects of each computer device exist in the form of data or information, for example, time, which is essentially time information, it can be understood that in the subsequent embodiment, if the size, the number, the position, etc. are all corresponding data, so that the computer device can process the data, which is not described herein in detail.
The inventor finds that the electronic device with stronger compatibility is generally composed of a host and a plurality of daughter boards, and the host and the plurality of daughter boards are connected through a communication bus. The daughter boards have different electromagnetic environments due to different functions, and in order to prevent noise interference between the daughter boards and the main board, a communication isolation chip is generally used to isolate buses of all parts. The existing method is to adapt the communication rate of the host and the daughter board to the communication rate of the isolated chip by modifying the host system program and the daughter board program multiple times, which is unfavorable for keeping consistency of codes and parameters, and easily causes parameter setting errors in the process of frequently modifying the programs.
In order to solve the above technical problems, an embodiment of the present application provides a communication rate adaptive adjustment method applied to a communication rate adaptive adjustment device, as shown in fig. 1, where the communication rate adaptive adjustment device includes a host and a target sub-board, the host and the target sub-board are connected in communication through multiple groups of signal lines, the multiple groups of signal lines are isolated in communication through an isolation chip, and the multiple groups of signal lines are connected to form a loop circuit.
With continued reference to fig. 1, when communication rate adaptation is required between the host and the target daughter board, the host sends a detection signal 1 to the target daughter board based on the loop circuit, after the target daughter board receives the detection signal 1, sends a response signal 1 to the host based on the detection signal 1, and after the host receives the response signal 1, sends a detection signal 2 to the host based on the response signal 1, so that the host reciprocates, sends a plurality of detection signals (for example, the detection signal 1, the detection signal 2, the detection signal 3 and the sending signal 4) to the target daughter board based on the loop circuit, and receives a plurality of response signals (for example, the response signal 1, the response signal 2, the response signal 3 and the response signal 4) returned by the target daughter board based on the plurality of detection signals and the loop circuit, and simultaneously receives a plurality of detection signals, and sends a plurality of response signals to the host based on the plurality of detection signals and the loop circuit, and then the host determines a first communication rate based on the plurality of detection signals and adjusts its own communication rate adaptively based on the first communication rate, so that the communication rate of the host and the communication rate of the communication chip are isolated from the target daughter board and the communication rate of the communication chip are adjusted based on the second communication rate. The main board and the target sub-board carry out self-adaptive adjustment on the communication rate of the main board and the target sub-board based on the communication rate determined by the main board and the target sub-board, so that the main system program and the sub-board program can be prevented from being modified for many times, the consistency of codes and parameters can be maintained, and the code maintenance is facilitated.
With reference to the foregoing, a method for adaptively adjusting a communication rate according to the present application will be described, and referring to fig. 2, a flowchart of an embodiment of a method for adaptively adjusting a communication rate according to an embodiment of the present application is shown, where the method for adaptively adjusting a communication rate includes:
301. the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit.
The plurality of detection signals are signals sent by the host to the target daughter board based on the loop circuit, and the number of the plurality of detection signals is the same as the number of groups of the plurality of groups of signal lines, for example, as shown in fig. 1, when the number of groups of the plurality of groups of signal lines is 4, the plurality of detection signals include detection signal 1, detection signal 2, detection signal 3 and detection signal 4. The waveforms and the periods of the waveforms of the plurality of detection signals are the same, and the plurality of detection signals are different in that: the delay time of the latter detection signal relative to the former detection signal is 2T, wherein T is the delay parameter of the isolation chip. For example, the delay parameter of the isolation chip is 4ns, the delay time of the detection signal 2 relative to the detection signal 1 is 8ns, the delay time of the detection signal 3 relative to the detection signal 2 is 8ns, and the delay time of the detection signal 4 relative to the detection signal 3 is 8ns.
In this embodiment, when the communication rates of the host and the target daughter board need to be adaptively adjusted, the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit, so that in a subsequent step, the host and the target daughter board respectively perform adaptive adjustment of the communication rate based on the plurality of detection signals and the plurality of response signals.
302. The target daughter board receives the plurality of detection signals and sends a plurality of response signals to the host based on the plurality of detection signals and the loop line.
The plurality of response signals are signals returned to the host by the target daughter board based on the plurality of detection signals and the loop circuit, and the number of the plurality of response signals is the same as the number of the groups of the plurality of groups of signal lines, for example, when the number of the groups of the plurality of groups of signal lines is 4 as shown in fig. 1, the plurality of response signals include a response signal 1, a response signal 2, a response signal 3, and a response signal 4. The waveforms and the periods of the waveforms of the plurality of response signals are the same, and the plurality of response signals are different in that: the delay time of the latter response signal relative to the former response signal is 2T, wherein T is the delay parameter of the isolation chip.
In this embodiment, the host sends a plurality of detection signals to the target daughter board based on the loop line, and the target daughter board receives the plurality of detection signals and sends a plurality of response signals to the host based on the plurality of detection signals and the loop line, so that in the subsequent step, the host and the target daughter board perform adaptive adjustment of the communication rate based on the plurality of detection signals and the plurality of response signals, respectively.
303. The host determines a first communication rate based on the detection signals and the response signals, and adaptively adjusts the communication rate of the host based on the first communication rate, so that the communication rate of the host is matched with the communication rate of the isolation chip.
The first communication rate is a communication rate which is determined by the host and is matched with the isolated chip based on a plurality of detection signals sent by the host and a plurality of response signals received by the host. In this embodiment, after receiving multiple response signals returned by the target daughter board based on multiple detection signals and the loop circuit, the host determines a first communication rate based on the multiple detection signals sent by the target daughter board and multiple response signals received by the target daughter board, and adaptively adjusts its own communication rate based on the first communication rate, so that the communication rate of the host is adapted to the communication rate of the isolation chip, thereby avoiding multiple modifications to the main system program, being beneficial to maintaining the consistency of codes and parameters, and facilitating code maintenance.
304. And the target daughter board determines a second communication rate based on the detection signals, and adaptively adjusts the communication rate of the target daughter board based on the second communication rate so as to adapt the communication rate of the target daughter board to the communication rate of the isolation chip.
The second communication rate is a communication rate which is determined by the target daughter board based on the received detection signals and is matched with the isolation chip. After the target sub-board receives the detection signals, the second communication rate is determined based on the received detection signals, and the communication rate of the target sub-board is adaptively adjusted based on the second communication rate, so that the communication rate of the target sub-board is adaptive to the communication rate of the isolation chip, multiple times of modification of the sub-board program can be avoided, the consistency of codes and parameters is maintained, and the code maintenance is facilitated.
In a specific embodiment, the determining, by the host in step 303, the first communication rate based on the plurality of detection signals and the plurality of response signals may include the following steps 401 to 404, which are specifically as follows:
401. the host determines a first target signal from the plurality of detection signals, wherein the first target signal is a signal sent by the host to the target daughter board through the starting end of the loop circuit in the plurality of detection signals;
402. The host determines a second target signal from the plurality of response signals, wherein the second target signal is a signal sent by the target daughter board in the plurality of response signals to the host through the ending end of the loop circuit;
403. the host determines a first delay time based on the first target signal and the second target signal, the first delay time being used to characterize a delay time of the second target signal relative to the first target signal;
404. the host determines a first communication rate based on the first delay time and the number of sets of the plurality of sets of signal lines.
The first target signal is a signal sent by the host to the target daughter board through the starting end of the loop circuit, as shown in fig. 1, the end a is the starting end of the loop circuit, and the detection signal 1 is the first target signal. The second target signal is a signal sent by the target daughter board received by the host to the host through the end of the loop circuit, and as shown in fig. 1, the end B is the end of the loop circuit, and the response signal returned by the target daughter board received by the host through the end B is the second target signal.
The first target signal is sent to the target daughter board from the A end, the second target signal is returned to the host from the B end, and as the signal passes through the isolation chip for many times, the output of the isolation chip and the corresponding input generate certain delay, the second target signal has delay relative to the first target signal, and the first delay time is used for representing the delay time of the second target signal relative to the first target signal.
When the host determines the first communication rate based on the plurality of detection signals and the plurality of response signals, the host may first determine a first target signal from the plurality of detection signals and determine a second target signal from the plurality of received response signals, then determine a first delay time based on the first target signal and the second target signal, and then determine the first communication rate based on the first delay time and the number of groups of the plurality of groups of signal lines.
In a specific implementation manner, when determining the first delay time based on the first target signal and the second target signal, timing may be started from a certain rising edge of the first target signal until the rising edge of the second target signal is timed to end, where the timing time is the delay time of the second target signal relative to the first target signal. For example, as shown in fig. 3, the time from the rising edge of the transmission signal to the rising edge of the reception signal is t, where t is the delay time of the reception signal relative to the transmission signal.
When the delay time is determined according to the rising edge of the transmission signal and the rising edge of the reception signal, it is necessary to ensure that the periods of the waveforms of the transmission signal and the reception signal are longer than the delay time, otherwise, a delay time judgment error occurs because the points of the transmission signal and the reception signal used for determining the delay time span a plurality of periods. For example, as shown in fig. 4, the periods of waveforms of the transmission signal and the reception signal are smaller than the delay time, the delay time of the reception signal with respect to the transmission signal is t, and the delay time determined in accordance with the rising edge of the transmission signal and the rising edge of the reception signal is not t.
In a specific embodiment, the determining, by the host in step 404, the first communication rate based on the first delay time and the number of groups of the plurality of groups of signal lines may include the following steps 501 to 503, which are specifically as follows:
501. the host determines a first delay parameter of the isolation chip based on the first delay time and the group number of the plurality of groups of signal lines;
502. the host determines the type of the isolation chip based on the first delay parameter;
503. the host determines a first communication rate based on the type of the isolated chip.
The first delay parameter is a delay parameter of the isolated chip, which is determined by the host based on the first delay time and the group number of the plurality of groups of signal lines. In this embodiment, when the host determines the first communication rate based on the first delay time and the number of groups of the plurality of groups of signal lines, the host first determines a first delay parameter of the isolation chip based on the first delay time and the number of groups of the plurality of groups of signal lines, then determines a type of the isolation chip based on the first delay parameter, and finally determines the first communication rate based on the type of the isolation chip.
In a specific implementation manner, the host determines the type of the isolated chip based on the first delay parameter, and may directly determine the type of the isolated chip based on the first delay parameter and a predetermined correspondence between the delay parameter and the type of the isolated chip. For example, the propagation delay of type B isolation chips typically has a value of 4ns, with a maximum value of 4.5ns, supporting a signal transmission rate of 1Ghz. After the first delay parameter of the isolation chip is determined to be 4ns, the type of the isolation chip can be determined to be the type B isolation chip.
Of course, when the host determines the type of the isolated chip based on the first delay parameter, the first delay parameter may be input into a pre-trained classification model, and the type of the isolated chip may be determined through the classification model.
In a specific implementation manner, when determining the first communication rate based on the type of the isolation chip, the first communication rate may be determined based on the type of the isolation chip and a predetermined correspondence between the type of the isolation chip and the signal transmission rate. For example, the type of the isolation chip is determined to be a type B isolation chip, and the signal transmission rate supported by the type B isolation chip is 1Ghz, i.e., the first communication rate can be determined to be 1Ghz.
In a specific embodiment, the determining, by the host in step 501, the first delay parameter of the isolated chip based on the first delay time and the number of the groups of the plurality of groups of signal lines may include the following steps 601 to 602, which are specifically as follows:
601. the host determines a first target number of times based on the number of groups of the plurality of groups of signal lines, the first target number of times being used for representing the number of times the second target signal passes through the isolation chip relative to the first target signal;
602. the host determines a first delay parameter of the isolated chip based on the first target number of times and the first delay time.
The first target number is used to characterize the number of times the second target signal passes through the isolated chip relative to the first target signal. Because the output of the isolation chip generates certain delay relative to the input, when the host determines the first delay parameter of the top isolation chip based on the first delay time and the group number of the plurality of groups of signal lines, the host determines the first target number of times based on the group number of the plurality of groups of signal lines first, and then determines the first delay parameter of the isolation chip based on the first target number of times and the first delay time. In this embodiment, a plurality of groups of communication lines are used to form a loop, and the delay time is determined based on the loop formed by the plurality of groups of communication lines, so that the delay difference between signals can be increased, and the detection accuracy of the delay parameters of the isolation chip can be improved.
For example, referring to fig. 1, when the number of sets of signal lines is 4 sets, the first target number of times is 8, and if the first delay time is 32ns, the first delay parameter of the isolated chip is determined to be 4ns.
In a specific embodiment, the determining, by the target daughter board in step 304, the second communication rate based on the plurality of detection signals may include the following steps 405 to 408, which are specifically as follows:
405. the target daughter board determines a third target signal from the plurality of detection signals, wherein the third target signal is a first detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop-back line;
406. The target daughter board determines a fourth target signal from the plurality of detection signals, wherein the fourth target signal is the last detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop-back line;
407. the target daughter board determining a second delay time based on the third target signal and the fourth target signal, the second delay time being used to characterize a delay time of the fourth target signal relative to the third target signal;
408. the target daughter board determines a second communication rate based on the second delay time and the number of groups of the plurality of groups of signal lines.
The third target signal is the first detection signal that the target daughter board receives and the host sends to the target daughter board through the loop-back line, the fourth target signal is the last detection signal that the target daughter board receives and the host sends to the target daughter board through the loop-back line, for example, referring to fig. 1, the third target signal is the detection signal 1 that the target daughter board receives and the fourth target signal is the detection signal 4 that the target daughter board receives.
The detection signal is sent to the target daughter board from the A end, and finally returned to the host from the B end, and as the signal passes through the isolation chip for multiple times, the output of the isolation chip corresponds to the input and generates certain delay, the fourth target signal has delay relative to the third target signal, and the second delay time is used for representing the delay time of the fourth target signal relative to the third target signal.
When the target daughter board determines the second communication rate based on the plurality of detection signals, the target daughter board may first determine a third target signal and a fourth target signal from the plurality of received detection signals, then determine a second delay time based on the third target signal and the fourth target signal, and then determine the second communication rate based on the second delay time and the number of groups of the plurality of groups of signal lines.
In a specific implementation manner, when determining the second delay time based on the third target signal and the fourth target signal, timing may be started from a certain rising edge of the third target signal until the rising edge of the fourth target signal is timed to end, where the timing time is the delay time of the fourth target signal relative to the third target signal.
In a specific embodiment, the determining, by the target daughter board in step 408, the second communication rate based on the second delay time and the number of the groups of the plurality of groups of signal lines may include the following steps 504 to 506, which are specifically as follows:
504. the target daughter board determines a second delay parameter of the isolation chip based on the second delay time and the group number of the plurality of groups of signal lines;
505. the target daughter board determines the type of the isolation chip based on the second delay parameter;
506. The target daughter board determines a second communication rate based on the type of the isolated chip.
The second delay parameter is a delay parameter of the isolated chip, which is determined by the target daughter board based on the second delay time and the group number of the plurality of groups of signal lines. In this embodiment, when the target daughter board determines the second communication rate based on the second delay time and the number of groups of the plurality of groups of signal lines, the target daughter board determines the second delay parameter of the isolation chip based on the second delay time and the number of groups of the plurality of groups of signal lines, then determines the type of the isolation chip based on the second delay parameter, and finally determines the second communication rate based on the type of the isolation chip.
In a specific implementation manner, the target daughter board determines the type of the isolation chip based on the second delay parameter, and may directly determine the type of the isolation chip based on the second delay parameter and a predetermined correspondence between the delay parameter and the type of the isolation chip. For example, the propagation delay of type a isolated chips is typically 17ns, with a maximum of 25ns, supporting a signal transmission rate of 100Mhz. After the second delay parameter of the isolation chip is determined to be 17ns, the type of the isolation chip can be determined to be the type A isolation chip.
Of course, when the target daughter board determines the type of the isolation chip based on the second delay parameter, the second delay parameter may be input into a pre-trained classification model, and the type of the isolation chip may be determined through the classification model.
In a specific implementation manner, when determining the second communication rate based on the type of the isolation chip, the second communication rate may be determined based on the type of the isolation chip and a predetermined correspondence between the type of the isolation chip and the signal transmission rate. For example, the type of the isolation chip is determined to be a type a isolation chip, and the signal transmission rate supported by the type a isolation chip is 100Mhz, i.e., the second communication rate can be determined to be 100Mhz.
In a specific embodiment, the determining, by the target daughter board in step 504, the second delay parameter of the isolated chip based on the second delay time and the number of the groups of signal lines may include the following steps 603 to 604, which are specifically as follows:
603. the target daughter board determines a second target number of times based on the number of groups of the plurality of groups of signal lines, the second target number of times being used for representing the number of times that the fourth target signal passes through the isolation chip relative to the third target signal;
604. and the target daughter board determines a second delay parameter of the isolation chip based on the second target times and the second delay time.
The second target number is used to characterize the number of times the fourth target signal passes through the isolated chip relative to the third target signal. Because the output of the isolation chip generates certain delay relative to the input, when the target daughter board of the embodiment determines the second delay parameter of the isolation chip based on the first delay time and the group number of the plurality of groups of signal lines, the target daughter board first determines the second delay parameter of the isolation chip based on the group number of the plurality of groups of signal lines, and then determines the second delay parameter of the isolation chip based on the second target number and the second delay time.
For example, as shown in fig. 1, when the number of sets of the plurality of sets of signal lines is 4 sets, the second target number of times is 6, and if the second delay time is 112ns, the second delay parameter of the isolated chip is 17ns.
In order to better realize the communication rate self-adaptive adjustment method in the embodiment of the application, on the basis of the communication rate self-adaptive adjustment method, the embodiment of the application also provides a communication rate self-adaptive adjustment device, as shown in fig. 1, wherein the communication rate self-adaptive adjustment device comprises a host and a target sub-board, the host and the target sub-board are in communication connection through a plurality of groups of signal lines, the plurality of groups of signal lines are in communication isolation through an isolation chip, and the plurality of groups of signal lines are connected to form a loop circuit;
the host is used for sending a plurality of detection signals to the target daughter board based on the loop circuit and receiving a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
the target daughter board is used for receiving the detection signals and sending response signals to the host based on the detection signals and the loop circuit;
the host is used for determining a first communication rate based on the detection signals and the response signals, and adaptively adjusting the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
The target daughter board is used for determining a second communication rate based on the detection signals, and adaptively adjusting the communication rate of the target daughter board based on the second communication rate so as to enable the communication rate of the target daughter board to be matched with the communication rate of the isolation chip.
In the embodiment of the application, the host and the target daughter board determine the communication rate based on a plurality of detection signals and a plurality of response signals, and carry out self-adaptive adjustment on the communication rate of the host and the target daughter board based on the determined communication rate, so that the host and the target daughter board can avoid modifying the host system program and the daughter board program for a plurality of times, thereby being beneficial to keeping the consistency of codes and parameters and facilitating the maintenance of the codes; and a plurality of groups of signal lines are connected into a ring line, and signal transmission and reception are performed based on the ring line, so that the accuracy of the determined communication rate can be improved.
In some embodiments of the application, the host is specifically configured to:
determining a first target signal from the plurality of detection signals, wherein the first target signal is a signal sent by the host in the plurality of detection signals to the target daughter board through the starting end of the loop circuit;
determining a second target signal from the plurality of response signals, wherein the second target signal is a signal sent by the target daughter board in the plurality of response signals to the host through the ending end of the loop circuit;
Determining a first delay time based on the first target signal and the second target signal, the first delay time being used to characterize a delay time of the second target signal relative to the first target signal;
a first communication rate is determined based on the first delay time and the number of sets of the plurality of sets of signal lines.
In some embodiments of the application, the host is specifically further configured to:
determining a first delay parameter of the isolation chip based on the first delay time and the number of groups of the plurality of groups of signal lines;
determining the type of the isolation chip based on the first delay parameter;
a first communication rate is determined based on the type of the isolated chip.
In some embodiments of the application, the host is specifically further configured to:
determining a first target number of times based on the number of sets of the plurality of sets of signal lines, the first target number of times being used to characterize the number of times the second target signal passes through the isolation chip relative to the first target signal;
and determining a first delay parameter of the isolated chip based on the first target times and the first delay time.
In some embodiments of the present application, the target daughter board is specifically configured to:
Determining a third target signal from the plurality of detection signals, wherein the third target signal is a first detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop circuit;
determining a fourth target signal from the plurality of detection signals, wherein the fourth target signal is the last detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop circuit;
determining a second delay time based on the third target signal and the fourth target signal, the second delay time being used to characterize a delay time of the fourth target signal relative to the third target signal;
a second communication rate is determined based on the second delay time and the number of sets of the plurality of sets of signal lines.
In some embodiments of the present application, the target daughter board is specifically further configured to:
determining a second delay parameter of the isolation chip based on the second delay time and the number of groups of the plurality of groups of signal lines;
determining the type of the isolation chip based on the second delay parameter;
a second communication rate is determined based on the type of the isolated chip.
In some embodiments of the present application, the target daughter board is specifically further configured to:
Determining a second target number of times based on the number of sets of the plurality of sets of signal lines, the second target number of times being used to characterize the number of times the fourth target signal passes through the isolation chip relative to the third target signal;
and determining a second delay parameter of the isolated chip based on the second target times and the second delay time.
The embodiment of the application also provides a computer device, which integrates any of the communication rate self-adaptive adjusting devices provided by the embodiment of the application, and the computer device comprises:
one or more processors;
a memory; and
one or more applications, wherein the one or more applications are stored in the memory and configured to perform the steps of the communication rate adaptation method described in any of the communication rate adaptation method embodiments described above by the processor.
The embodiment of the application also provides computer equipment which integrates any of the communication rate self-adaptive adjusting devices provided by the embodiment of the application. As shown in fig. 5, a schematic structural diagram of a computer device according to an embodiment of the present application is shown, specifically:
The computer device may include one or more processors 701 of a processing core, memory 702 of one or more computer readable storage media, power supply 703, and input unit 704, among other components. Those skilled in the art will appreciate that the computer device structure shown in FIG. 5 is not limiting of the computer device and may include more or fewer components than shown, or may be combined with certain components, or a different arrangement of components. Wherein:
the processor 701 is a control center of the computer device, connects various parts of the entire computer device using various interfaces and lines, and performs various functions of the computer device and processes data by running or executing software programs and/or modules stored in the memory 702, and calling data stored in the memory 702, thereby performing overall monitoring of the computer device. Optionally, processor 701 may include one or more processing cores; preferably, the processor 701 may integrate an application processor and a modem processor, wherein the application processor primarily handles operating systems, user interfaces, applications, etc., and the modem processor primarily handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 701.
The memory 702 may be used to store software programs and modules, and the processor 701 executes various functional applications and data processing by executing the software programs and modules stored in the memory 702. The memory 702 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like; the storage data area may store data created according to the use of the computer device, etc. In addition, the memory 702 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory 702 may also include a memory controller to provide access to the memory 702 by the processor 701.
The computer device further comprises a power supply 703 for powering the various components, preferably the power supply 703 is logically connected to the processor 701 by a power management system, whereby the functions of managing charging, discharging, and power consumption are performed by the power management system. The power supply 703 may also include one or more of any component, such as a direct current or alternating current power supply, a recharging system, a power failure detection circuit, a power converter or inverter, a power status indicator, etc.
The computer device may further comprise an input unit 704, which input unit 704 may be used for receiving input numerical or character information and generating keyboard, mouse, joystick, optical or trackball signal inputs in connection with user settings and function control.
Although not shown, the computer device may further include a display unit or the like, which is not described herein. In particular, in this embodiment, the processor 701 in the computer device loads executable files corresponding to the processes of one or more application programs into the memory 702 according to the following instructions, and the processor 701 executes the application programs stored in the memory 702, so as to implement various functions, as follows:
the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
the target daughter board receives the detection signals and sends response signals to the host based on the detection signals and the loop circuit;
the host determines a first communication rate based on the detection signals and the response signals, and adaptively adjusts the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
And the target daughter board determines a second communication rate based on the detection signals, and adaptively adjusts the communication rate of the target daughter board based on the second communication rate so as to adapt the communication rate of the target daughter board to the communication rate of the isolation chip.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of the various methods of the above embodiments may be performed by instructions, or by instructions controlling associated hardware, which may be stored in a computer-readable storage medium and loaded and executed by a processor.
To this end, an embodiment of the present application provides a computer-readable storage medium, which may include: read Only Memory (ROM), random access Memory (RAM, random Access Memory), magnetic or optical disk, and the like. On which a computer program is stored, which computer program is loaded by a processor for performing the steps of any of the communication rate adaptation method provided by the embodiments of the present application. For example, the loading of the computer program by the processor may perform the steps of:
the host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
The target daughter board receives the detection signals and sends response signals to the host based on the detection signals and the loop circuit;
the host determines a first communication rate based on the detection signals and the response signals, and adaptively adjusts the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
and the target daughter board determines a second communication rate based on the detection signals, and adaptively adjusts the communication rate of the target daughter board based on the second communication rate so as to adapt the communication rate of the target daughter board to the communication rate of the isolation chip.
In the foregoing embodiments, the descriptions of the embodiments are focused on, and the portions of one embodiment that are not described in detail in the foregoing embodiments may be referred to in the foregoing detailed description of other embodiments, which are not described herein again.
In the implementation, each unit or structure may be implemented as an independent entity, or may be implemented as the same entity or several entities in any combination, and the implementation of each unit or structure may be referred to the foregoing method embodiments and will not be repeated herein.
The specific implementation of each operation above may be referred to the previous embodiments, and will not be described herein.
The foregoing describes in detail a communication rate adaptive adjustment method, apparatus, computer device and storage medium provided by the embodiments of the present application, and specific examples are applied to illustrate the principles and embodiments of the present application, where the foregoing examples are only used to help understand the method and core idea of the present application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, the present description should not be construed as limiting the present application.
Claims (10)
1. The communication rate self-adaptive adjustment method is characterized in that the communication rate self-adaptive adjustment method is applied to a communication rate self-adaptive adjustment device, the communication rate self-adaptive adjustment device comprises a host and a target daughter board, the host is in communication connection with the target daughter board through a plurality of groups of signal wires, the plurality of groups of signal wires are in communication isolation through an isolation chip, the plurality of groups of signal wires are connected to form a loop circuit, and the communication rate self-adaptive adjustment method comprises the following steps:
The host sends a plurality of detection signals to the target daughter board based on the loop circuit, and receives a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
the target daughter board receives the detection signals and sends response signals to the host based on the detection signals and the loop circuit;
the host determines a first communication rate based on the detection signals and the response signals, and adaptively adjusts the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
and the target daughter board determines a second communication rate based on the detection signals, and adaptively adjusts the communication rate of the target daughter board based on the second communication rate so as to adapt the communication rate of the target daughter board to the communication rate of the isolation chip.
2. The communication rate adaptive adjustment method of claim 1, wherein the host determining a first communication rate based on the plurality of detection signals and the plurality of response signals comprises:
The host determines a first target signal from the plurality of detection signals, wherein the first target signal is a signal sent by the host to the target daughter board through the starting end of the loop circuit in the plurality of detection signals;
the host determines a second target signal from the plurality of response signals, wherein the second target signal is a signal sent by the target daughter board in the plurality of response signals to the host through the ending end of the loop circuit;
the host determines a first delay time based on the first target signal and the second target signal, the first delay time being used to characterize a delay time of the second target signal relative to the first target signal;
the host determines a first communication rate based on the first delay time and the number of sets of the plurality of sets of signal lines.
3. The communication rate adaptive adjustment method according to claim 2, wherein the host determines a first communication rate based on the first delay time and the number of sets of the plurality of sets of signal lines, comprising:
the host determines a first delay parameter of the isolation chip based on the first delay time and the group number of the plurality of groups of signal lines;
The host determines the type of the isolation chip based on the first delay parameter;
the host determines a first communication rate based on the type of the isolated chip.
4. The communication rate adaptive adjustment method according to claim 3, wherein the host determining the first delay parameter of the isolated chip based on the first delay time and the number of the plurality of sets of signal lines comprises:
the host determines a first target number of times based on the number of groups of the plurality of groups of signal lines, the first target number of times being used for representing the number of times the second target signal passes through the isolation chip relative to the first target signal;
the host determines a first delay parameter of the isolated chip based on the first target number of times and the first delay time.
5. The communication rate adaptive adjustment method according to claim 1, wherein the target sub-board determining a second communication rate based on the plurality of detection signals, comprises:
the target daughter board determines a third target signal from the plurality of detection signals, wherein the third target signal is a first detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop-back line;
The target daughter board determines a fourth target signal from the plurality of detection signals, wherein the fourth target signal is the last detection signal which is received by the target daughter board and sent to the target daughter board by the host through the loop-back line;
the target daughter board determining a second delay time based on the third target signal and the fourth target signal, the second delay time being used to characterize a delay time of the fourth target signal relative to the third target signal;
the target daughter board determines a second communication rate based on the second delay time and the number of groups of the plurality of groups of signal lines.
6. The communication rate adaptive adjustment method according to claim 5, wherein the target sub-board determines a second communication rate based on the second delay time and the number of sets of the plurality of sets of signal lines, comprising:
the target daughter board determines a second delay parameter of the isolation chip based on the second delay time and the group number of the plurality of groups of signal lines;
the target daughter board determines the type of the isolation chip based on the second delay parameter;
the target daughter board determines a second communication rate based on the type of the isolated chip.
7. The communication rate adaptive adjustment method according to claim 6, wherein the target daughter board determining the second delay parameter of the isolated chip based on the second delay time and the number of the plurality of sets of signal lines, comprises:
the target daughter board determines a second target number of times based on the number of groups of the plurality of groups of signal lines, the second target number of times being used for representing the number of times that the fourth target signal passes through the isolation chip relative to the third target signal;
and the target daughter board determines a second delay parameter of the isolation chip based on the second target times and the second delay time.
8. The communication rate self-adaptive regulating device is characterized by comprising a host and a target daughter board, wherein the host is in communication connection with the target daughter board through a plurality of groups of signal wires, the plurality of groups of signal wires are in communication isolation through an isolation chip, and the plurality of groups of signal wires are connected to form a loop circuit;
the host is used for sending a plurality of detection signals to the target daughter board based on the loop circuit and receiving a plurality of response signals returned by the target daughter board based on the plurality of detection signals and the loop circuit;
The target daughter board is used for receiving the detection signals and sending response signals to the host based on the detection signals and the loop circuit;
the host is used for determining a first communication rate based on the detection signals and the response signals, and adaptively adjusting the communication rate of the host based on the first communication rate so as to adapt the communication rate of the host to the communication rate of the isolation chip;
the target daughter board is used for determining a second communication rate based on the detection signals, and adaptively adjusting the communication rate of the target daughter board based on the second communication rate so as to enable the communication rate of the target daughter board to be matched with the communication rate of the isolation chip.
9. A computer device, the computer device comprising:
one or more processors;
a memory; and
one or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the processor to implement the communication rate adaptation method of any one of claims 1 to 7.
10. A computer-readable storage medium, having stored thereon a computer program, the computer program being loaded by a processor to perform the steps of the communication rate adaptation method of any of claims 1 to 7.
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| WO2018196406A1 (en) * | 2017-04-24 | 2018-11-01 | 深圳市道通智能航空技术有限公司 | Multi-string battery pack management system |
| CN111339018A (en) * | 2020-02-18 | 2020-06-26 | 济南浪潮高新科技投资发展有限公司 | System and method for high-speed data transmission with adjustable speed between FPGA (field programmable Gate array) board cards |
| CN215451504U (en) * | 2020-11-19 | 2022-01-07 | 延锋伟世通电子科技（南京）有限公司 | Wireless and wired compatible distributed signal transmission device |
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| US7161956B2 (en) * | 2001-12-28 | 2007-01-09 | Lucent Technologies Inc. | Adapative quality control loop for link rate adaptation in data packet communications |
| US10509762B2 (en) * | 2018-04-30 | 2019-12-17 | Intel IP Corporation | Data rate-adaptive data transfer between modems and host platforms |
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| WO2018196406A1 (en) * | 2017-04-24 | 2018-11-01 | 深圳市道通智能航空技术有限公司 | Multi-string battery pack management system |
| CN111339018A (en) * | 2020-02-18 | 2020-06-26 | 济南浪潮高新科技投资发展有限公司 | System and method for high-speed data transmission with adjustable speed between FPGA (field programmable Gate array) board cards |
| CN215451504U (en) * | 2020-11-19 | 2022-01-07 | 延锋伟世通电子科技（南京）有限公司 | Wireless and wired compatible distributed signal transmission device |
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