CN116408722A - Polishing pad, polishing apparatus, and method of manufacturing semiconductor device - Google Patents
Polishing pad, polishing apparatus, and method of manufacturing semiconductor device Download PDFInfo
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- CN116408722A CN116408722A CN202111634111.4A CN202111634111A CN116408722A CN 116408722 A CN116408722 A CN 116408722A CN 202111634111 A CN202111634111 A CN 202111634111A CN 116408722 A CN116408722 A CN 116408722A
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Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/22—Lapping pads for working plane surfaces characterised by a multi-layered structure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The invention discloses a polishing pad, a grinding device and a method for manufacturing a semiconductor device, which relate to the technical field of chemical mechanical polishing of semiconductors. The polishing pad is provided with a polishing surface, and at least a first annular polishing unit group, a second annular polishing unit group and a third annular polishing unit group are sequentially arranged on the polishing surface from the center of the polishing surface to the outer peripheral direction; the polishing area ratio of the second annular unit group is larger than the polishing area ratio of the first annular polishing unit group, and the polishing area ratio of the second annular unit group is larger than the polishing area ratio of the third annular polishing unit group. The polishing pad provided by the invention can be used for polishing a wafer, and can obtain a wafer with excellent polishing rate, low polishing rate non-uniformity and low surface defect.
Description
Technical Field
The present invention relates to the field of chemical mechanical polishing of semiconductors, and more particularly, to polishing pads, polishing apparatuses, and methods of manufacturing semiconductor devices.
Background
Chemical mechanical planar polishing or Chemical Mechanical Polishing (CMP) is currently the most common technique for polishing the surface of a workpiece. CMP is a composite technique obtained by combining chemical attack and mechanical removal, and is also the most commonly used technique for planarization of semiconductor wafers and the like.
Currently, in conventional CMP processes, a wafer is mounted on a carrier assembly of an abrasive apparatus, and the position at which the wafer contacts a polishing pad during polishing is set by adjusting relevant parameters. During polishing, the wafer is pressed against the polishing pad by a controlled pressure, and the polishing pad is rotated in the same or opposite direction as the wafer by an external drive force. In the relative rotation process, the polishing liquid is continuously dripped on the polishing pad, so that the surface of the wafer is subjected to planarization grinding through the mechanical action of the surface of the polishing pad and the chemical action of the polishing liquid, and the polishing of the wafer is realized.
The shape and size of the surface grooves of the polishing pad, which are one of the key parameters determining the performance of the polishing pad, have an important effect on the chemical and mechanical processes of polishing: in the chemical oxidation process, the surface grooves of the polishing pad can influence the transportation and uniform distribution of the polishing liquid, thereby influencing the chemical reaction speed, the product and the concentration thereof; during the mechanical removal process, the surface grooves of the polishing pad change the contact area, friction and film thickness between the polishing pad and the wafer, thereby affecting the mechanical removal rate and processing quality, and also having an important effect on the average residence time of the polishing solution.
During the relative rotation of the polishing pad and the wafer, the polishing rate at each position of the wafer is affected by the grooves on the polishing pad and the distribution of the polishing liquid, which has a problem that whether the flatness of the wafer is satisfied or not. With the increase of integrated circuit integration, the planarization degree of the wafer can directly affect the substrate utilization rate, thereby affecting the process yield of the integrated circuit. Thus, obtaining a wafer with high flatness is one of the problems faced by the integrated circuit manufacturing industry.
For manufacturers of chemical mechanical polishing pads, the polishing rate and wafer surface defects are one of the important indicators for evaluating the performance of the polishing pad, the polishing rate is also an indicator for the production efficiency of polishing the wafer by the polishing pad, and the wafer surface defects are an indicator for evaluating the polishing effect of the polishing pad. Therefore, the basic indexes such as the grinding rate and the surface defects of the wafer are not sacrificed on the basis of improving the grinding flatness of the wafer.
Disclosure of Invention
The object of the present invention is to solve the above-mentioned technical problems, and to provide a polishing pad, an abrasive apparatus and a method of manufacturing a semiconductor device.
The first aspect of the present invention provides a polishing pad having a polishing surface, from a center of the polishing surface to an outer peripheral edge, on which at least a first annular polishing unit group, a second annular polishing unit group, and a third annular polishing unit group are sequentially provided; the polishing area ratio of the second annular unit group is larger than the polishing area ratio of the first annular polishing unit group, and the polishing area ratio of the second annular unit group is larger than the polishing area ratio of the third annular polishing unit group.
Further, the polishing area ratio of the first annular polishing unit group, the second annular polishing unit group and the third annular polishing unit group is 0.60-0.95, preferably 0.7-0.9; wherein the polishing area ratio of the first annular polishing unit group and the third annular polishing unit group is equal or unequal.
Further, the width R of the second annular grinding unit group 2 Diameter D of the ground material W 0.33 to 0.67, preferably 0.55 to 0.65. Further, the width R of the first annular polishing unit group 1 Width R of the third annular polishing unit group 3 Equal or unequal.
Further, the adjacent annular groove spacing D of the first annular grinding unit group 1 Adjacent annular groove spacing D of second annular grinding unit group 2 Third, thirdAdjacent annular groove spacing D of annular grinding unit group 3 Adjacent annular groove spacing D of second annular grinding unit group 2 Wherein D is 1 And D 3 Equal or unequal.
Still further, the D 2 For D 1 1.2 to 3 times, preferably 1.5 to 2.5 times, more preferably 2 times; the D is 2 For D 3 1.2 to 3 times, preferably 1.5 to 2.5 times, more preferably 2 times.
Further, the depth of the annular groove of the first annular polishing unit group is denoted as H 1 The depth of the annular groove of the second annular grinding unit group is denoted as H 2 The depth of the annular groove of the third annular grinding unit group is denoted as H 3 The method comprises the steps of carrying out a first treatment on the surface of the Wherein H is 1 、H 2 And H 3 The thickness of the polishing layer is 0.02 to 0.8 times, preferably 0.15 to 0.6 times. Further, the H 1 、H 2 And H 3 Equal or unequal, preferably H 1 ＞H 2 And/or H 3 ＞H 2 。
Further, the polishing pad is used for polishing a metal layer or an oxide layer, wherein the metal layer comprises any one of a copper layer, a tungsten layer and an aluminum layer.
A second aspect of the present invention provides an abrasive apparatus having a polishing pad in contact with a workpiece to be abraded, the polishing pad being provided in the first aspect of the present invention.
A third aspect of the present invention provides a method of manufacturing a semiconductor device, comprising the step of polishing a surface of a semiconductor wafer using a polishing pad, the polishing pad being provided in the first aspect of the present invention.
Compared with the prior art, the invention has the following beneficial effects: the polishing pad provided by the invention can be used for polishing a wafer, and can obtain a wafer with excellent polishing rate, low polishing rate non-uniformity and low surface defect.
Drawings
FIG. 1 is a schematic illustration of a surface groove structure of a polishing pad in accordance with a preferred embodiment of the present invention;
fig. 2 is a front view of the invention as seen in section A-A of fig. 1.
Detailed Description
The present invention provides a polishing pad, an abrasive apparatus, and a method of manufacturing a semiconductor device, and the present invention will be described below with reference to specific embodiments. It should be noted that the terms "first," "second," "third," and the like as used herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The following examples are illustrative of the present invention and are not intended to limit the invention. Other combinations and various modifications within the spirit of the invention may be made without departing from the spirit or scope of the invention.
< polishing pad >
The first aspect of the present invention provides a polishing pad having a polishing surface, on which at least a first annular polishing unit group, a second annular polishing unit group, and a third annular polishing unit group are sequentially provided in a direction from a center of the polishing surface toward an outer peripheral edge. The polishing surface is the contact surface between the polishing pad and the wafer.
In a specific embodiment of the present invention, as shown in fig. 1, a polishing surface of the polishing pad is further provided with a central blank space in the center of the polishing surface, an edge blank space is further provided at an edge position of the polishing surface, and a first annular polishing unit group, a second annular polishing unit group and a third annular polishing unit group are sequentially provided between the central blank space and the edge blank space from inside to outside. In the present invention, the first annular polishing unit group, the second annular polishing unit group and the third annular polishing unit group are regions that are grooved at equal intervals to form annular polishing units, respectively.
The central blank area is circular, the edge blank area is annular, and grooves are not engraved in the central blank area and the edge blank area. The radius of the polishing pad is defined as R, and the radius of the central blank area is defined as R 0 The width of the margin area is defined as e, the width of the first annular grinding unit group is R 1 The width of the second annular grinding unit group is R 2 The width of the third annular grinding unit group is R 3 Then r=r 0 + R 1 + R 2 + R 3 +e。
In a particular embodiment of the invention, the radius R of the central whitespace zone 0 5 to 15mm, such as 7.5mm, 11.7mm, 12.2mm, 12.7mm, 13.2mm, 14mm, etc. The width e of the edge margin area is 0.2 mm-4.0 mm, such as 0.24mm, 0.32mm, 0.36mm, 0.40mm, 0.50mm, 0.60mm, 1.0mm, 2.0mm, 3.0mm, 3.8mm and the like. The polishing layer has a diameter of 50-100 cm and can be used for polishing 8 inch wafers, i.e. the diameter D of the wafers w 203.2mm; can also be used for polishing 12 inch wafers, i.e. diameter D of wafers w 304.8mm; and 18 inch wafers, i.e. diameter D of wafers w Is a 457.2mm wafer. The thickness of the polishing layer is 1.1-3.6 mm, and the thickness is 1.27mm and 2.032mm compared with the common thickness.
In the process of polishing a wafer by using the polishing pad, the wafer is positioned in the radius area of the polishing surface, the contact part of the wafer and the polishing pad comprises a second annular grinding unit group, a part of the first annular grinding unit group and a part of the third annular grinding unit group, namely, the center area of the wafer is ground by the second annular grinding unit group in the process of rotating the polishing pad and the wafer in the same or opposite directions. According to the wafer size, the widths of the polishing pad and the second annular polishing unit group are adjusted, and in the invention, the width R of the second annular polishing unit group 2 For the material to be ground, i.e. the wafer diameter D W 0.33 to 0.67, preferably 0.55 to 0.65. Preferably, the center of the wafer coincides with any position at 1/2 of the width of the second annular polishing unit group, i.e., the area of the wafer polished on the first annular polishing unit group and the third annular polishing unit group is equal in width.
Further, the width R of the first annular polishing unit group of the invention 1 Width R of the third annular polishing unit group 3 The first annular grinding unit group and the third annular grinding unit group are equal or unequal in width, and the first annular grinding unit group and the third annular grinding unit group can be used for completely grinding the wafer.
In a specific embodiment of the present invention, the groove size on the first annular polishing unit group is defined, and the annular groove width on the first annular polishing unit group is denoted as W 1 Adjacent annular groovesThe distance is denoted as D 1 The depth of the annular groove is recorded as H 1 The number of the annular grooves is recorded as n 1 The number R of grooves on the first annular polishing unit group is equal in width and interval 1 = n 1 *（W 1 +D 1 ）。
In a specific embodiment of the present invention, the annular grooves on the first annular polishing unit group have equal widths and equal intervals. The area S of the innermost annular groove on the first annular grinding unit group from the center of the polishing surface to the outer peripheral direction 1 innermost =π*(R 0 +W 1 ) 2 -π*R 0 2 =π*W 1 *(W 1 +2R 0 ) The method comprises the steps of carrying out a first treatment on the surface of the Area S of outermost annular groove 1 outermost =π*[R 0 +n 1 W 1 +(n 1 -1)D 1 ] 2 -π*[R 0 +(n 1 -1)W 1 +(n 1 -1)D 1 ] 2 =π* W 1 *[2 R 0 +(2n 1 -1) W 1 +(2n 1 -2)D 1 ]The method comprises the steps of carrying out a first treatment on the surface of the The area of each annular groove is equal difference array, and the tolerance is pi W 1 *(2W 1 +2D 1 )。
The sum S of the groove areas of the first annular polishing unit group 1 =(S 1 innermost +S 1 outermost ) *n 1 /2=π* W 1 *[4 R 0 +2n 1 *W 1 +(2n 1 -2)D 1 ] *n 1 2; polishing area ratio RS of the first annular polishing unit group 1 =[π(R 0 +R 1 ) 2 -πR 0 2 -S 1 ]/ [π(R 0 +R 1 ) 2 -πR 0 2 ]。
In a specific embodiment of the present invention, the groove size on the second annular polishing unit group is defined, and the annular groove width on the second annular polishing unit group is denoted as W 2 The distance between adjacent annular grooves is denoted as D 2 The depth of the annular groove is recorded as H 2 Number of annular grooves n 2 The number R of grooves on the second annular polishing unit group is equal in width and interval 2 = n 2 *（W 2 + D 2 ）。
In a specific embodiment of the present invention, the annular grooves on the second annular polishing unit group have equal widths and equal intervals. The area S of the innermost annular groove on the second annular grinding unit group from the center of the polishing surface to the outer peripheral direction 2 innermost =π*(R 0 +R 1 +W 2 ) 2 -π*(R 0 +R 1 ) 2 =π*W 2 *[W 2 +2(R 0 +R 1 )]The method comprises the steps of carrying out a first treatment on the surface of the Area S of outermost annular groove 2 outermost =π*[R 0 +R 1 +n 2 W 2 +(n 2 -1)D 2 ] 2 -π*[R 0 +R 1 +(n 2 -1)W 2 +(n 2 -1)D 2 ] 2 =π*W 2 *[2(R 0 +R 1 )+(2n 2 -1) W 2 +(2n 2 -2)D 2 ]The method comprises the steps of carrying out a first treatment on the surface of the The area of each annular groove is equal difference array, and the tolerance is pi W 2 *(2W 2 +2D 2 )。
The sum S of the groove areas of the second annular polishing unit group 2 =(S 2 innermost +S 2 outermost ) *n 2 /2=π*W 2 *[4 (R 0 +R 1 )+2n 2 *W 2 +(2n 2 -2)D 2 ] *n 2 2; polishing area ratio RS of the second annular polishing unit group 2 =[π(R 0 +R 1 +R 2 ) 2 -π(R 0 +R 1 ) 2 -S 2 ]/ [π(R 0 +R 1 +R 2 ) 2 -π(R 0 +R 1 ) 2 ]。
In a specific embodiment of the present invention, the groove size on the third annular polishing unit group is defined, and the annular groove width on the third annular polishing unit group is denoted as W 3 The distance between adjacent annular grooves is denoted as D 3 The depth of the annular groove is recorded as H 3 The number of the annular grooves is recorded as n 3 The grooves on the third annular polishing unit group have equal widths and equal spacing, R 3 =(n 3 -1)*(W 3 + D 3 )+W 3 。
At the bookIn the embodiment of the invention, the annular grooves on the second annular polishing unit group have equal widths and equal intervals. The area S of the innermost annular groove on the third annular grinding unit group from the center of the polishing surface to the outer peripheral direction 3 innermost =π*(R 0 +R 1 +R 2 +W 3 ) 2 -π*(R 0 +R 1 +R 2 ) 2 =π*W 3 *[W 3 +2(R 0 +R 1 +R 2 )]；
Area S of outermost annular groove on third annular polishing unit group 3 outermost =π*[R 0 +R 1 +R 2 +n 3 W 3 +(n 3 -1)D 3 ] 2 -π*[R 0 +R 1 +R 2 +(n 3 -1)W 3 +(n 3 -1)D 3 ] 2 =π*W 3 *[2(R 0 +R 1 +R 2 )+(2n 3 -1) W 3 +(2n 3 -2)D 3 ]The method comprises the steps of carrying out a first treatment on the surface of the The area of each annular groove is equal difference array, and the tolerance is pi W 3 *(2W 3 +2D 3 )。
The sum S of the groove areas of the third annular polishing unit group 3 =(S 3 innermost +S 3 outermost ) *n 3 /2=π*W 3 *[4 (R 0 +R 1 +R 2 )+2n 3 *W 3 +(2n 3 -2)D 3 ] *n 3 2; polishing area ratio RS of the third annular polishing unit group 3 =[π(R 0 +R 1 +R 2 +R 3 ) 2 -π(R 0 +R 1 +R 2 ) 2 -S 3 ]/ [π(R 0 +R 1 +R 2 +R 3 ) 2 -π(R 0 +R 1 +R 2 ) 2 ]。
In order to obtain a wafer with high flatness, the polishing area ratio RS of the second annular unit group of the invention 2 Polishing area ratio RS of > first annular polishing unit group 1 Polishing area ratio RS of the second annular unit group 2 Polishing area ratio RS of > third annular polishing unit group 3 . Preferably, RS 1 、RS 2 And RS (reed-solomon) 3 And 0.60 to 0.95, preferably 0.7 to 0.9, such as 0.72, 0.74, 0.76, 0.78, 0.80, 0.82, 0.84, 0.86, 0.88, 0.90. Wherein RS 1 And RS (reed-solomon) 3 Equal or unequal.
Further, the annular groove width W of the first annular polishing unit group of the invention 1 Width W of annular groove on second annular polishing unit group 2 Width W of annular groove on third annular polishing unit group 3 Equal or unequal, preferably W 1 、W 2 And W is 3 Equal. Wherein W is 1 、W 2 And W is 3 0.2 to 0.6mm, preferably 0.36 to 0.55mm; examples may be given: 0.22mm, 0.28mm, 0.32mm, 0.35mm, 0.39mm, 0.42mm, 0.44mm, 0.46mm, 0.48mm, 0.50mm, 0.52mm, 0.54mm, 0.56mm, 0.58mm. W (W) 1 、W 2 And W is 3 Too small, is unfavorable for the rapid and uniform dispersion of the polishing solution; w (W) 1 、W 2 And W is 3 Too large, aggregation of polishing liquid easily occurs, and chemical polishing aggregation is unfavorable for uniform polishing.
Further, the annular groove spacing D of the first annular polishing unit group of the invention 1 Annular groove spacing D on the second annular polishing unit group 2 Annular groove spacing D on third annular polishing unit group 3 All of them are 1.0 to 4mm, preferably 1.2 to 3.2mm, and examples of the above-mentioned materials include 1.1mm, 1.2mm, 1.3mm, 1.4mm, 1.5mm, 1.6mm, 1.8mm, 2.0mm, 2.2mm, 2.4mm, 2.6mm, 2.8mm, 3.0mm, 3.2mm, 3.4mm, 3.6mm and 3.8 mm. To achieve the technical effect of the invention, the distance D between adjacent annular grooves of the first annular grinding unit group 1 Adjacent annular groove spacing D of second annular grinding unit group 2 Adjacent annular groove spacing D of third annular grinding unit group 3 Adjacent annular groove spacing D of second annular grinding unit group 2 Wherein D is 1 And D 3 Equal or unequal. Specifically, the D 2 For D 1 1.2 to 3 times, preferably 1.5 to 2.5 times, more preferably 2 times; the D is 2 For D 3 1.2 to 3 times, preferably 1.5 to 2.5 times, more preferably 2 times.
Further, for each annular polishing unit groupDepth of groove H 1 、H 2 And H 3 The thickness H of the polishing layer is 0.02 to 0.8 times, preferably 0.15 to 0.6 times. Specifically H 1 、H 2 And H 3 Equal or unequal. From the viewpoint of improving the wafer flatness, H is preferred 1 ＞H 2 And/or, preferably, H 3 ＞H 2 . More preferably H 1 And H 3 Equal.
Further, the polishing pad is used for polishing a metal layer or an oxide layer, wherein the metal layer comprises any one of a copper layer, a tungsten layer and an aluminum layer.
In the invention, the diameter of the polishing layer is 50-100 cm, preferably 50-90 cm; the thickness of the polishing layer is 1.1-3.6 mm, and the thickness is 1.27mm and 2.032mm compared with the common thickness. In the example of the present invention, the polishing layer had a diameter of 77.47cm and a thickness of 2.032mm.
< preparation of polishing pad >
The polishing pad of the invention comprises a polishing layer and may also comprise a buffer layer. The polishing layer and the buffer layer can be self-made by the following methods, or can be directly purchased as a commercial product. The method of bonding the polishing layer and the buffer layer to each other to prepare the polishing pad is not particularly limited, and there may be mentioned a method of laminating an adhesive layer made of a polyester-based hot-melt adhesive on the buffer layer, melting the adhesive layer by heating with a heater, and then laminating and pressing the polishing layer on the melted adhesive layer.
As the polishing layer, the polishing layer of the invention can be prepared by adopting the known prepolymer method, one-step method and the like, and the method selected by the skilled in the art according to the need does not influence the conception and the protection scope of the invention as long as the polishing layer related to the invention can be prepared.
The polishing layer is made of materials conventionally used in the art, such as polyurethane, which refers to a product derived from difunctional or polyfunctional isocyanate, for example, one or more of polyether urea, polyisocyanurate, polyurethane, polyurea and polyurethane urea, and also a copolymer of two or more of polyether urea, polyisocyanurate, polyurethane, polyurea and polyurethane urea. Preferably, the polyurethane is prepared from an isocyanate-terminated prepolymer obtained by reacting an isocyanate and a polyol and then reacting with a curing agent, or from an isocyanate-terminated prepolymer obtained by reacting an isocyanate and a polyol and then reacting with a mixture of a curing agent and hollow microspheres.
The isocyanate may be, for example, an aromatic isocyanate and/or an aliphatic isocyanate, which are known in the polyurethane field. The isocyanate may be, for example, one or more of an aromatic diisocyanate compound, an aliphatic diisocyanate compound, and an alicyclic diisocyanate compound. The aromatic diisocyanate is preferably one or more of 2, 4-toluene diisocyanate, 2, 6-toluene diisocyanate, 2' -diphenylmethane diisocyanate, 2,4' -diphenylmethane diisocyanate, 4' -diphenylmethane diisocyanate, 1, 5-naphthalene diisocyanate, p-phenylene diisocyanate, m-phenylene diisocyanate, p-phenylene diisocyanate and m-phenylene diisocyanate. The aliphatic diisocyanate is preferably one or more of ethylene diisocyanate, 2, 4-trimethylhexamethylene diisocyanate and 1, 6-hexamethylene diisocyanate. The alicyclic diisocyanate is preferably one or more of 1, 4-cyclohexane diisocyanate, 4' -dicyclohexylmethane diisocyanate, isophorone diisocyanate and norbornane diisocyanate.
The polyol is not particularly limited, and may be any compound known in the polyurethane field, for example, polyether polyol and/or polyester polyol. Preferably, the polyol is one or more of polytetramethylene ether glycol, polyethylene glycol, polypropylene glycol, polybutylene glycol, ethylene adipate and butylene adipate, or a copolymer of two or more of the above six substances.
The prepolymer is preferably of the type Adiprene ® L325、Adiprene ® LF750 and Adiprene ® LF700D.
The curing agent may be, for example, one or more of a polyol, a polyamine and an alcohol amine, which are known in the polyurethane art, and the polyamine may be used, for example, without particular limitation. Preferably, the curing agent is one or more of 4,4 '-methylene-bis-o-chloroaniline, 4' -methylenebis (3-chloro-2, 6-diethylaniline), dimethylthiotoluenediamine, 1, 3-propanediol di-p-aminobenzoate, diethyltoluenediamine, 5-t-amyl-2, 4-and 3-t-amyl-2, 6-toluenediamine and chlorotoluenediamine. More preferably, the curing agent is preferably MOCA which is 3, 3-dichloro-4, 4-diaminodiphenylmethane and/or MCDEA which is 4, 4-methylenebis (3-chloro-2, 6-diethylaniline).
A polishing layer comprising hollow microspheres, the hollow microspheres being uniformly dispersed in the polishing layer. The hollow microspheres have a capsule-like structure of outer walls of polyacrylonitrile or a polyacrylonitrile copolymer. More preferably, the hollow microsphere is of the Expancel series hollow microsphere or the Sorbon microsphere F series. Even more preferably, the hollow microsphere is of the model Expancel ® 551DE20d42. The hollow microspheres are controlled to be uniformly distributed in the polishing layer in the different areas in a weight percent content.
The content of the curing agent and the content of the microspheres control the physical parameters such as different hardness, density, compressibility and the like of the polishing layer through the prepolymer of different components. And pouring the composition into a mould to form a cylinder, slicing the cylinder to obtain a sheet, and grooving the sheet to obtain the polishing layer with the groove pattern.
Examples of the buffer layer include a fibrous nonwoven fabric such as a polyester nonwoven fabric, a nylon nonwoven fabric, and an acrylic nonwoven fabric; resin-impregnated nonwoven fabrics such as polyurethane-impregnated polyester nonwoven fabrics; polymer resin foams such as polyurethane foam and polyethylene foam; rubber resins such as butadiene rubber and isoprene rubber; photosensitive resins, and the like.
The density, hardness and compressibility of the buffer layer can be adjusted by using different nonwoven fabrics and polyurethane DMF solutions of different viscosities. After soaking for a period of time, forming and attaching TPU on non-woven fabrics through a solidification tank of DMF with low concentration and solution exchange, then placing into a water washing tank of clean water, washing off solvent, then drying in a tunnel furnace at 150 ℃, forming, and polishing to the required thickness.
< grinding apparatus >
A second aspect of the present invention provides an abrasive apparatus having a polishing pad in contact with a workpiece to be abraded, the polishing pad being provided in the first aspect of the present invention.
< method of manufacturing semiconductor device >
A third aspect of the present invention provides a method of manufacturing a semiconductor device, comprising the step of polishing a surface of a semiconductor wafer using a polishing pad, the polishing pad being provided in the first aspect of the present invention.
The above and other advantages of the present invention will be better understood by the following examples, which are not intended to limit the scope of the present invention.
Example code explanation:
r: polishing pad radius, unit: mm;
R 0 : radius of central white space, unit: mm;
R 1 : width of the first annular polishing unit group, unit: mm;
R 2 : width of the second ring-shaped polishing unit group, unit: mm;
R 3 : width of the third annular polishing unit group, unit: mm;
e: width of the margin, unit: mm;
W 1 : annular groove width on the first annular polishing unit group, unit: mm;
D 1 : adjacent annular groove spacing on the first annular grinding unit group, unit: mm;
H 1 : annular groove depth on the first annular polishing unit group, unit: mm;
RS 1 : polishing area ratio of the first annular polishing unit group；
W 2 : annular groove width on the second annular grinding unit group, unit: mm;
D 2 : adjacent annular groove spacing on the second annular grinding unit group, unit: mm;
H 2 : annular groove depth on the second annular grinding unit group, unit: mm;
RS 2 : a polishing area ratio of the second annular polishing unit group;
W 3 : annular groove width on the third annular polishing unit group, unit: mm;
D 3 : adjacent annular groove spacing on the third annular grinding unit group, unit: mm;
H 3 : annular groove depth on the third annular polishing unit group, unit: mm;
RS 3 : a polishing area ratio of the third annular polishing unit group;
in examples 1-12 and comparative examples 1-4, the polishing pad radius R was 387.35mm and the polishing layer thickness was 2.032mm. The polishing pads of examples 1 to 12 and comparative examples 1 to 4 comprise a polishing layer made of polyurethane obtained by reacting an isocyanate-terminated prepolymer obtained by reacting an isocyanate with a polyol with a mixture of a curing agent and hollow microspheres, and a buffer layer bonded to the polishing pad and made of polyurethane-impregnated nonwoven fabric. The preparation method of the polishing pad comprises the following steps:
(1) Preparing a polishing layer: 23.0 parts by mass of TDI, toluene diisocyanate, 46.3 parts by mass of PTMEG, polytetramethylene ether glycol (molecular weight 701.0), and 30.7 parts by mass of MOCA, 3 '-dichloro-4, 4' -diaminodiphenylmethane were used; the microspheres are manufactured by Akzo Nobel, the trade name of the microspheres is Expancel 551DE40D42, the mass of the microspheres accounts for 1.2% of the total mass of the polishing layer, the materials are added into a casting head, the materials are quickly mixed, the mixing speed is 5000rpm, the materials are cast into a mould to form a cylinder, then the cylinder is sliced to obtain a sheet, and finally the sheet is grooved to obtain the polishing layer with the groove patterns.
(2) And (3) attaching the polishing layer obtained in the step (1) to the buffer layer of the polyurethane-impregnated non-woven fabric to obtain the polishing pad.
The method for preparing the polishing pad according to the embodiment of the present invention is not limited to this invention, and other polishing pads obtained by methods known in the art are suitable for use in the present invention.
The groove structure parameters on the polishing surface of the polishing pads of examples 1-12 and comparative examples 1-4 are shown in Table 1, following Table 1:
table 1 parameters of groove structure on polishing surface of polishing pad of examples 1-12 and comparative examples 1-4
Table 1, examples 1-12 and comparative examples 1-4, the groove structure parameters on the polishing surface of the polishing pad
Polishing pad evaluation method:
grinding conditions: a silica slurry (SS 25E, manufactured by CABOT corporation) was added as a slurry at a flow rate of 250 ml/min during polishing. The polishing load was set at 3.5 psi, the polishing platen speed was set at 110 rpm, and the wafer speed was set at 108 rpm. In the test, the average polishing rate, the polishing rate non-uniformity, and the number of scratches were measured as an index of the quality characteristics of the polishing pad.
Average grinding rate: under the above conditions, a thermal oxide film having a thickness of 8500 a was deposited on a 12-inch test wafer, the resulting wafer was polished for 1 minute, and the average polishing rate in (a/min) was determined from the abrasion loss.
Polishing rate non-uniformity: the thickness of the polishing object was measured before and after the polishing experiment, respectively. 49 positions were selected in advance on the surface of the polishing object for measurement, and a standard deviation value (STDEV) and an AVERAGE Value (AVERAGE) of the polishing rate at the selected positions were calculated. The polishing rate non-uniformity can be calculated by the following formula (1).
Polishing rate non-uniformity = 100% standard deviation/average formula (1)
Table 2 shows the polishing performance, i.e., polishing effect, evaluation of the polishing pads of examples 1 to 12 and comparative examples 1 to 4.
Table 2 polishing pad grinding performance of examples 1-12 and comparative examples 1-4
Claims (10)
1. The polishing pad is characterized by comprising a polishing surface, wherein the polishing surface is provided with at least a first annular polishing unit group, a second annular polishing unit group and a third annular polishing unit group in sequence from the center of the polishing surface to the outer peripheral direction; the polishing area ratio of the second annular unit group is larger than the polishing area ratio of the first annular polishing unit group, and the polishing area ratio of the second annular unit group is larger than the polishing area ratio of the third annular polishing unit group.
2. The polishing pad of claim 1, wherein the polishing area ratio of the first, second, and third annular polishing units is 0.60-0.95, preferably 0.7-0.9; wherein the polishing area ratio of the first annular polishing unit group and the third annular polishing unit group is equal or unequal.
3. The polishing pad of claim 1, wherein the width R of the second population of annular polishing elements 2 Diameter D of the ground material W 0.33 to 0.67, preferably 0.55 to 0.65; width R of the first annular polishing unit group 1 Width R of the third annular polishing unit group 3 Equal or unequal.
4. The polishing pad of claim 1, wherein adjacent annular groove spacing D of the first annular polishing unit group 1 Adjacent annular groove spacing D of second annular grinding unit group 2 A third annular polishing unit groupAdjacent annular groove spacing D of (2) 3 Adjacent annular groove spacing D of second annular grinding unit group 2 Wherein D is 1 And D 3 Equal or unequal.
5. The polishing pad of claim 4, wherein D 2 For D 1 1.2 to 3 times, preferably 1.5 to 2.5 times, more preferably 2 times; the D is 2 For D 3 1.2 to 3 times, preferably 1.5 to 2.5 times, more preferably 2 times.
6. The polishing pad of claim 1, wherein the annular groove depth of the first annular polishing unit group is denoted as H 1 The depth of the annular groove of the second annular grinding unit group is denoted as H 2 The depth of the annular groove of the third annular grinding unit group is denoted as H 3 The method comprises the steps of carrying out a first treatment on the surface of the Wherein H is 1 、H 2 And H 3 The thickness of the polishing layer is 0.02 to 0.8 times, preferably 0.15 to 0.6 times.
7. The polishing pad of claim 6, wherein the H 1 、H 2 And H 3 Equal or unequal, preferably H 1 ＞H 2 And/or H 3 ＞H 2 。
8. The polishing pad of any one of claims 1-7, wherein the polishing pad is used to polish a metal layer or an oxide layer, the metal layer comprising any one of a copper layer, a tungsten layer, and an aluminum layer.
9. An abrasive apparatus having a polishing pad in contact with a workpiece to be abraded, the polishing pad being as claimed in any one of claims 1 to 8.
10. A method of manufacturing a semiconductor device, characterized by comprising a step of polishing a surface of a semiconductor wafer using a polishing pad according to any one of claims 1 to 8.
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