CN116403930A - Semiconductor processing equipment - Google Patents

Abstract

The invention discloses a semiconductor processing device, which comprises: at least two semiconductor processing modules disposed adjacent to each other; an equipment front end assembly disposed proximate a first side of the semiconductor processing module; a fluid carrying module positioned below the semiconductor processing module for carrying various unused fluids and/or used fluids; and at least two valve modules disposed proximate a second side of the semiconductor processing modules opposite the first side, one valve module for each semiconductor processing module. The semiconductor processing equipment provided by the invention consists of a plurality of modules, has the characteristics of simple structure, convenience and flexibility in assembly, compact structure and the like, and can also improve the processing efficiency of wafers.

Description

Semiconductor processing equipment

[ field of technology ]

The present invention relates to the field of semiconductor processing, and more particularly, to a semiconductor processing apparatus for processing a semiconductor wafer.

[ background Art ]

In semiconductor manufacturing processes, semiconductor wafers are subjected to numerous processes to meet high standards in the semiconductor industry. In advanced processes for semiconductor wafers, the edges of the wafer are required to be uniform, flat, atraumatic and smooth. The high requirement that the wafer edge surfaces be uniformly and precisely etched presents a significant challenge to the semiconductor wafer process.

Fig. 1a is a top view of a semiconductor wafer 100. The semiconductor wafer 100 includes a substrate layer 101 and a thin film layer 102 deposited on the substrate layer 101. Fig. 1b is a cross-sectional view of A-A of fig. 1 a. The measurement points 1-8 are locations where relevant data of the semiconductor wafer in operation is measured. As shown in fig. 1b, the etch width is the difference in radius of the substrate layer 101 and the thin film layer 102. The corrosion width should be substantially the same at each measurement point 1-8. The smaller the difference between the maximum etch width and the minimum etch width, the higher the uniformity, e.g., when the edge width is designed to be 0.7mm, many high-end process technologies require the difference between the maximum etch width and the minimum etch width to be no greater than 0.1mm, which would otherwise cause non-uniformity in the etch width. If the difference between the maximum etching width and the minimum etching width exceeds 0.1mm, the effect of the subsequent processing operation is directly affected, and finally, the performance of the integrated circuit chip is poor, and the chip manufacturing yield is affected.

The semiconductor wafer wet processing technology has the advantages of simple principle, flexible technology, low cost and the like. There are several conventional methods of wet etching the edge of a semiconductor wafer, such as polishing the edge region of a semiconductor wafer, spinning the semiconductor wafer, and removing a thin film layer from a substrate layer using a combination of physical friction and chemical etching. The polishing method is mainly used for manufacturing semiconductor wafers with lower precision requirements because the remained film layer and the substrate layer are easy to damage. Edge damage can cause misplacement of the wafer edge during hot processing, ultimately leading to wafer scrap. Yet another common method is to vacuum-adsorb the semiconductor wafer. The vacuum adsorption method uses a vacuum suction head to suck a wafer, the vacuum suction head has the function of sucking the wafer to protect the part of the film to be kept in the vacuum suction head, exposing the part of the film to be removed outside the vacuum suction head, and then soaking the vacuum suction head and the wafer together in a chemical etching solution to etch away the part of the film exposed outside the vacuum suction head. However, the vacuum adsorption method results in uneven removal of the thin layer and uneven etching width. Another common method is a film coating method, which adopts pure and corrosion-proof plastic films such as PTFE, PE and the like to protect the part of the film to be retained, and then the whole is exposed to a chemical corrosive gas environment or soaked in a chemical corrosive liquid to corrode the exposed part. The film-coating method often causes uneven etching width because the center of the precut film may not be aligned with the substrate center of the wafer; and the process steps are more, and various equipment is needed to be used for completion, wherein the equipment comprises film sticking, wet etching, cleaning, film removing and the like. The new spraying method has the working principle that a special spray head is adopted to accurately spray the fluid for corrosion to the area where the edge of the rotating wafer needs to be corroded, so that accurate, uniform, smooth and damage-free corrosion is realized. Although the spraying method can achieve higher corrosion effect, the requirements on the design of equipment and the machining precision of parts are extremely high, the equipment cost is extremely high, the requirements on process conditions are also more severe, and the process cost is high. There is a need for a new type of semiconductor wafer edge processing apparatus that addresses the above-described issues.

In addition, chinese patent application number 201610446274.2, filing date 2016, 06, 21 discloses a modular semiconductor processing apparatus. However, such semiconductor processing equipment can only process one wafer at a time, and the processing power and efficiency are low. For applications requiring processing of a large number of wafers, the processing efficiency of such modular semiconductor processing equipment is clearly unsatisfactory.

Therefore, there is a need to propose a solution to solve the above-mentioned problems.

[ invention ]

The invention aims to solve the technical problem of providing semiconductor processing equipment, which has the characteristics of simple structure, convenient and flexible assembly, compact structure and the like, and can also improve the processing efficiency of wafers.

In order to solve the above-described problems, according to an aspect of the present invention, there is provided a semiconductor processing apparatus comprising: at least two semiconductor processing modules are adjacently arranged, each semiconductor processing module is internally provided with a semiconductor processing device, and the semiconductor processing device comprises: a first chamber portion, a second chamber portion, and a driving portion that drives the second chamber portion to be movable between an open position and a closed position with respect to the first chamber portion, wherein a micro chamber is formed between the first chamber portion and the second chamber portion when the second chamber portion is located at the closed position with respect to the first chamber portion, a semiconductor wafer can be accommodated in the micro chamber, the semiconductor wafer can be taken out or put in when the second chamber portion is located at the open position with respect to the first chamber portion, one or more through holes communicating with the micro chamber are provided in the first chamber portion and/or the second chamber portion, and the through holes are used for introducing or extracting fluid into the micro chamber; an equipment front end assembly disposed proximate a first side of the semiconductor processing module, comprising a wafer carrier and a wafer handling device, the wafer handling device placing a semiconductor wafer in the wafer carrier between a first chamber portion and a second chamber portion of the semiconductor processing device by a robot, withdrawing the semiconductor wafer from between the first chamber portion and the second chamber portion of the semiconductor processing device and handling the semiconductor wafer to the wafer carrier; a fluid carrying module positioned below the semiconductor processing module for carrying various unused fluids and/or used fluids; and at least two valve modules disposed proximate a second side of the semiconductor processing module opposite the first side, each valve module comprising a plurality of controlled valves through which fluid provided by the fluid carrying module is controllably transferred into the microcavity through the lines and the through-holes, and through which fluid in the microcavity is controllably transferred into the fluid carrying module through the lines and the through-holes.

Compared with the prior art, the semiconductor processing equipment provided by the invention consists of a plurality of modules, has the characteristics of convenience and flexibility in assembly and compact structure, and can improve the processing efficiency of wafers.

Other objects, features and advantages of the present invention will be described in the following detailed description of the embodiments with reference to the accompanying drawings.

[ description of the drawings ]

The invention will be more readily understood by reference to the following detailed description in conjunction with the accompanying drawings, wherein like reference numerals designate like structural elements, and in which:

FIG. 1a is a schematic diagram of a semiconductor wafer;

FIG. 1b is a cross-sectional view A-A of FIG. 1 a;

fig. 2 is a perspective view showing a structure of a semiconductor processing apparatus in a first embodiment of the present invention;

FIG. 3 is a schematic block diagram of the semiconductor processing apparatus of FIG. 2;

FIG. 4 is a schematic perspective view of a fan filter module according to the present invention;

FIG. 5 is a schematic perspective view of a semiconductor processing module according to the present invention;

FIG. 6 is a schematic perspective view of a fluid carrying module according to the present invention;

FIG. 7 is a schematic perspective view of a combined module including a plurality of modules according to the present invention;

FIG. 8 is a schematic perspective view of two control modules according to the present invention;

FIG. 9 is a schematic perspective view of a factory docking module according to the present invention;

FIG. 10 is a schematic perspective view of another control module according to the present invention;

fig. 11 is a perspective view showing a structure of a semiconductor processing apparatus in a second embodiment of the present invention;

FIG. 12 is a schematic cross-sectional view of a semiconductor processing apparatus of the present invention in one embodiment;

FIG. 13 is an enlarged schematic view of circle A in FIG. 12;

fig. 14 is a bottom view of a first chamber portion of the semiconductor processing apparatus of fig. 12;

fig. 15 is a top view of a second chamber portion of the semiconductor processing apparatus of fig. 12;

FIG. 16 is a schematic cross-sectional view of a semiconductor processing apparatus of the present invention in another embodiment;

FIG. 17 is an enlarged schematic view of circle B in FIG. 16;

fig. 18 is a bottom view of a first chamber portion of the semiconductor processing apparatus of fig. 16;

fig. 19 is a plan view of a second chamber portion of the semiconductor processing apparatus of fig. 16.

[ detailed description ] of the invention

In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.

Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one implementation of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. The terms "plurality" and "a plurality" as used herein mean two or more. "and/or" in the present invention means "and" or ".

First embodiment of a semiconductor processing apparatus

Fig. 2 is a perspective view of a semiconductor processing apparatus in accordance with the present invention in a first embodiment. Fig. 3 is a schematic block diagram of a semiconductor processing apparatus according to the present invention.

As shown in fig. 2, the semiconductor processing apparatus includes: a plurality of semiconductor processing modules 40 positioned adjacent one another, an equipment front end assembly 10 disposed proximate a first side of the semiconductor processing modules 40, a fluid carrying module 70 positioned below the semiconductor processing modules 40, a plurality of valve modules 80 disposed proximate a second side of the semiconductor processing modules 40 opposite the first side, a control module 90 disposed above the valve modules 80, a blower filtration module 30 disposed above the semiconductor processing modules 40.

Fig. 5 is a schematic perspective view of a semiconductor processing module 40 according to the present invention. In fig. 5, two semiconductor processing modules 40 are shown, the two semiconductor processing modules 40 being laterally placed side by side, each semiconductor processing module comprising a support frame and a semiconductor processing device 41 arranged within the support frame. The outside of the support frame can be shielded by the baffle plate, so that the appearance is more attractive, and the external environment is also isolated. The support frames of two laterally adjacent semiconductor processing modules 40 are integrally connected. As shown in fig. 2, the total of four semiconductor processing modules 40 is a stack of two laterally adjacent semiconductor processing modules vertically above two other laterally adjacent semiconductor processing modules. In other embodiments, more semiconductor processing modules 40 may be provided, such as 6, 8, so that the semiconductor processing modules 40 disposed laterally side by side may become 3 or four, etc.

Each semiconductor processing apparatus 41 comprises a first chamber portion, a second chamber portion and a drive portion for driving the second chamber portion to be movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is located at the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, a semiconductor wafer can be accommodated in the micro chamber, and when the second chamber portion is located at the open position relative to the first chamber portion, the semiconductor wafer can be taken out or put in, and one or more through holes communicated with the micro chamber are arranged on the first chamber portion and/or the second chamber portion, and the through holes are used for introducing or extracting fluid into the micro chamber. The driving part can be an air bag, and the opening and the closing of the upper cavity part and the lower cavity part are realized by inflating and deflating the air bag. The detailed structure of each semiconductor processing apparatus will be described in detail later, and will not be described in detail here.

As shown in fig. 2, the apparatus front end assembly 10 includes a wafer carrier and a wafer carrier, wherein the wafer carrier is configured to insert a semiconductor wafer in the wafer carrier between a first chamber portion and a second chamber portion of the semiconductor processing apparatus by a robot, and to remove the semiconductor wafer from between the first chamber portion and the second chamber portion of the semiconductor processing apparatus and to carry the semiconductor wafer to the wafer carrier. The equipment front-end module 10 can simultaneously transfer semiconductor wafers for four semiconductor processing apparatuses 41, so that the processing efficiency of the semiconductor processing equipment can be greatly improved, and the processing capacity of the semiconductor wafers can be improved. The equipment front end assembly 10 includes an enclosed housing within which the wafer carrier and wafer handling device are disposed so as to provide a relatively enclosed space.

The fluid carrying module 70 is used to carry various unused fluids and/or used fluids. Fig. 6 is a schematic perspective view of a fluid carrying module 70 according to the present invention. The fluid carrying module 70 includes a support frame and a plurality of containers 71 placed within the support frame, the containers 71 containing various unused fluids required for processing the semiconductor wafers and/or various used fluids processed the semiconductor wafers. The fluid carrying module 70 further comprises a faceplate (not shown) mounted on the support frame. Fig. 6 illustrates two fluid carrying modules 70 that are integrally connected. The container 71 may be a storage bottle, in which an unused solution, ultrapure water, chemical liquid, or the like may be stored, a recovered waste liquid may be stored, or various gases may be started. The storage bottle can comprise a chemical liquid bottle, an air bottle, a vacuum bottle, a waste liquid bottle and the like. A vacuum pump 72 may also be disposed in the fluid carrying module 70, the vacuum pump 72 may provide driving power.

Fig. 7 is a schematic perspective view of a combined module including a plurality of modules according to the present invention. Fig. 7 shows two combined modules, each comprising two valve modules 80 vertically stacked above. Each of the semiconductor processing modules 40 corresponds to one of the valve modules 80, and each of the valve modules 80 includes a plurality of controlled valves 81, the controlled valves 81 including rotary valves and pneumatic valves. The fluid provided by the fluid carrying module 70 is controllably transferred into the microcavity through the pipeline 82 and the through hole by the controlled valve 81, and the fluid in the microcavity is controllably transferred into the container 71 of the fluid carrying module 70 through the pipeline 82 and the through hole by the controlled valve 81. As shown in fig. 7, each combination module also includes a fluid carrying module 70 positioned below.

Fig. 4 is a schematic perspective view of a fan filter module according to the present invention. As shown in fig. 4, the blower filter module 30 includes a support frame and a blower filter module 31 disposed in the support frame, and the blower filter module 31 supplies clean air to the direction of the semiconductor processing module 40. One fan filter module 31 is shown only schematically in fig. 4, and the other fan filter module 31 is not shown.

In this embodiment, as shown in FIG. 2, the control modules 90 are three. Fig. 8 is a schematic perspective view of two control modules 90a and 90b according to the present invention; fig. 10 is a schematic perspective view of another control module 90c according to the present invention. Each control module comprises a support frame and a control unit 91, as shown in fig. 3, the control unit 91 is electrically connected with the semiconductor processing device 41 and the controlled valve 81 through a cable 92, the control unit 91 controls the opening and closing of the semiconductor processing device 41 by controlling the driving part, and the control unit 91 controls the controlled valve 81 in the valve module 80. The control unit 91 is electrically connected to the vacuum pump via a cable 92, the control unit 91 controls the vacuum pump 72 in the fluid carrying module 70, and the vacuum pump 72 is used for providing negative pressure to drive the fluid in the container 71 of the fluid carrying module into the micro chamber and/or to drive the fluid in the micro chamber out and into the container 71 of the fluid carrying module 70. In other embodiments, the number of the control modules 90 may be one or two, and several control modules may be determined according to the volume of the control units 91 required, and the respective control units 91 may be electrically connected to each other or may be independent of each other.

Alternatively, the container may be pressurized to drive the fluid in the container to flow out, and the fluid flowing out of the semiconductor processing apparatus 41 may be pressurized by a gas such as nitrogen gas to drive the fluid out into the container through a controlled valve, a pipeline, and into the semiconductor processing apparatus 41.

As shown in fig. 2, the semiconductor processing apparatus further includes a human-machine interaction console 20 mounted on the apparatus front end assembly 10. The man-machine interaction console 20 may be connected to the control unit 91, or may be connected to a wafer carrier and a wafer handling device in the front end module 10, so that the wafer carrier, the wafer handling device, and the control unit 91 may be configured and controlled. Man-machine interaction of the semiconductor processing apparatus can be achieved through the man-machine interaction console 20.

As shown in fig. 2, the semiconductor processing apparatus further includes a factory docking module 95 disposed on a second side of the semiconductor processing module 40. Fig. 9 is a schematic perspective view of a factory docking module according to the present invention. The factory docking modules 95 are placed between the vertically stacked valve modules 80 in a laterally spaced arrangement. Various valves, filters, etc. related to the factory docking may be disposed in the factory docking module 95, the gas related components are typically disposed on the upper two layers of the factory docking module 95, and the liquid related components are typically disposed on the lowest layers of the factory docking module 95. Various types of chemicals supplied by the plant will thus be connected to the equipment.

As shown in fig. 2, the semiconductor processing apparatus further includes a ventilation assembly 60 located between the valve module 80 and the semiconductor processing module 40. The ventilation assembly includes one or more ventilation ducts 61. As shown in fig. 7, each combined module includes a ventilation pipe 61. Two additional ventilation pipes 61 are provided between the factory docking module 95 and the semiconductor processing module 40. The gas enters from the bottom and side of the ventilation pipe 61 and exits from the top of the ventilation pipe 62. Of course, more or fewer ventilation ducts 61 may be provided as desired. The fan filter module 30 and the ventilation assembly 60 cooperate to keep the inside of the semiconductor processing apparatus clean, and various volatile chemical liquid gases can be timely taken away.

The operation of the semiconductor processing apparatus will now be described.

In use, the equipment front-end assembly 10 may provide semiconductor wafers to, or remove wafers from, four semiconductor processing modules simultaneously. Thus, the four semiconductor processing modules can synchronously process the semiconductor wafer, and the processing efficiency is improved. For each semiconductor processing device there is its own corresponding controlled valve 81, control unit 91, cable 92, line 82 and vessel 71. The control unit 91 feeds the fluid in the container 71 into the micro chamber of the semiconductor processing apparatus by controlling the controlled valve 81 to perform surface treatment on the semiconductor wafer using the fluid. The control unit 91 draws out the fluid in the micro chamber of the semiconductor processing apparatus into the container 71 by controlling the controlled valve 81 to perform recovery of the fluid.

Specifically, the semiconductor processing apparatus of the present invention may perform edge etching on a semiconductor wafer, and a detailed process of etching will be described in detail below.

Second embodiment of semiconductor processing apparatus

Fig. 11 is a perspective view showing a structure of a semiconductor processing apparatus in a second embodiment of the present invention. In the second embodiment, the semiconductor processing apparatus in the first embodiment is further expanded. That is, the semiconductor processing apparatus includes the expansion module 97 in addition to the related modules in the first embodiment. The expansion assembly 97 includes an expansion valve module 80', an expansion control module 90', and an expansion fluid carrying module 70'. An ozone generator, a pneumatic valve, etc. are provided in the extension fluid carrying module 70'.

One embodiment of a semiconductor processing apparatus

Referring to fig. 12 to 15, there is shown a schematic structural diagram of a semiconductor processing apparatus 100 according to an embodiment of the present invention, wherein: FIG. 12 is a schematic cross-sectional view of a semiconductor processing apparatus of the present invention in one embodiment; FIG. 13 is an enlarged schematic view of circle A in FIG. 12; fig. 14 is a bottom view of a first chamber portion of the semiconductor processing apparatus of fig. 12; fig. 15 is a plan view of a second chamber section of the semiconductor processing apparatus of fig. 12. The semiconductor processing apparatus 100 herein may be used as the semiconductor processing apparatus 41 above.

Referring to fig. 12 to 15, the semiconductor processing apparatus 100 includes a first chamber portion 110, a second chamber portion 120, and a driving portion for driving the second chamber portion 120 to move between an open position and a closed position with respect to the first chamber portion 110. The first chamber portion 110 includes a first chamber plate 119 and a flange 118 extending from a periphery of the first chamber plate 119. The second chamber portion 120 includes a second chamber plate 129 and a flange 128 extending around the periphery of the second chamber plate 129. Here, the driving part is not shown, and in one embodiment, the driving part may be an airbag.

The first chamber portion 110 is movable relative to the second chamber portion 120 between an open position and a closed position. It should be noted that the movement of the first chamber portion 110 and the second chamber portion 120 are opposite, the first chamber portion 110 may be fixed so that the second chamber portion 120 is moved relatively, the second chamber portion 120 may be fixed so that the first chamber portion 110 is moved relatively, and both the first chamber portion 110 and the second chamber portion 120 may be moved at the same time, as long as the first chamber portion 110 and the second chamber portion 120 are able to move relatively. With the first chamber portion 110 in a closed position relative to the second chamber portion 120, the flange 118 cooperates with the flange 128 to form a micro chamber 140 between the first chamber plate 118 and the second chamber plate 128, and a semiconductor wafer 400 to be processed can be accommodated within the micro chamber 140 awaiting subsequent processing. The flange 118 is separated from the flange 128 when the first chamber portion 110 is in an open position relative to the second chamber portion 120, and the semiconductor wafer 400 to be processed can be removed from or placed into the micro-chamber 140.

An annular first channel 116 is formed on the side of the first chamber portion 110 facing the micro chamber 140, and a second channel 126 is formed on the side of the second chamber portion 120 facing the micro chamber 140. When the second chamber portion 120 is in the closed position relative to the first chamber portion 110 and the semiconductor wafer 400 is received in the micro-chamber, the first channel 116 and the second channel 126 together form an edge micro-processing space 130, and an outer edge of the semiconductor wafer 400 received in the micro-chamber protrudes into the edge micro-processing space 130.

As shown in fig. 12 to 15, in this embodiment, the first channel 116 and the second channel 126 are annular channels. When the second chamber portion 120 is located at the closed position relative to the first chamber portion 110 and the semiconductor wafer 400 is accommodated in the micro chamber, the wall surface 117 of the first chamber portion 110 located inside the first channel 116 abuts against the first edge surface of the semiconductor wafer 400 to be processed, the wall surface 127 of the second chamber portion 120 located inside the second channel 126 abuts against the second edge surface of the semiconductor wafer 400 to be processed, the first channel 116 and the second channel 126 are surrounded to form a closed, annular outer edge micro processing space 130, and the outer edge portion of the semiconductor wafer 400 to be processed is accommodated in the outer edge micro processing space 130.

Therefore, in the present embodiment, the edge micro-process space 130 can implement selective processing of the entire outer edge portion of the semiconductor wafer 400 to be processed.

Of course, the first channel 116 and the second channel 126 may be configured as arc-shaped channels having an arc less than 360 degrees. At this time, the first channel 116 and the second channel 126 form the closed outer edge micro-processing space 130 having an arc shape with an arc less than 360 degrees. Accordingly, a partial arc of the outer edge of the semiconductor wafer 400 to be processed is accommodated in the edge micro-processing space 130. Thus, the edge micro-processing space 130 only enables selective processing of a portion of the arc segment of the outer edge of the semiconductor wafer 400 to be processed at this time.

The first chamber part 110 has at least two edge processing through holes 112 penetrating the first chamber part 110 from the outside to communicate with the edge micro-processing space 130, wherein: at least one edge-treated through-hole serves as a fluid inlet and at least one edge-treated through-hole serves as a fluid outlet. In this embodiment, 4 edge processing through holes are provided. Of course, an edge processing through hole communicating with the edge micro-processing space 130 may be provided in the second chamber 120.

In use, a processing fluid can enter the edge micro-processing space 130 from within the container of the fluid carrying module 70 through the controlled valve, the pipeline and one edge processing through-hole 112, the fluid entering the edge micro-processing space 130 can flow within the edge micro-processing space 130, at this time, the processing fluid can contact and process the semiconductor wafer 400 to be processed and is contained in the outer edge portion of the edge micro-processing space 130, the fluid processed by the semiconductor wafer 400 can flow out through another edge processing through-hole 112, or flow out through an edge processing through-hole provided on the second chamber portion 120 and communicating with the edge micro-processing space 130, and the flowing fluid flows into the container of the fluid carrying module 70 through the pipeline and the controlled valve. During processing, processing fluid may be introduced into the edge micro-processing space 130 continuously or at intervals through an edge processing through-hole 112, and the fluid in the edge micro-processing space 130 may flow during processing, thereby increasing the processing speed.

Of course, the treatment may be etching treatment of the outer edge of the semiconductor wafer 400 to remove the thin film layer of the outer edge portion of the semiconductor wafer 400, selective cleaning of only the outer edge of the semiconductor wafer 400, or the like.

Taking as an example the etching removal of the thin film layer at the outer edge portion of the semiconductor wafer 400 to be processed. Referring to fig. 1a through 1b and 12 through 15 in combination, when it is desired to etch away the thin film layers of the first and second sides of the outer edge of the semiconductor wafer 400 to be processed. Only the corresponding processing fluid having an etching effect on the thin film layer from the container of the fluid carrying module 70 is introduced into the edge micro-process space 130 through the pipeline, the controlled valve, and one edge processing through-hole 112, and the processing fluid flows in the edge micro-process space 130 and directly contacts the outer edge portion of the semiconductor wafer 400 to be processed. The processing fluid flows along the edge of the semiconductor wafer 400 to be processed, and chemically or physically reacts with the wafer surface of the wafer to be processed which is accommodated in the edge micro-processing space, so that the first edge surface, the second edge surface and the thin film layer on the bevel edge of the outer edge of the semiconductor wafer 400 to be processed are continuously etched and removed. After the process is completed, the thin film layer of the portion of the outer edge of the semiconductor wafer 400 accommodated in the edge micro-process space 130 is etched away, and the first edge surface, the second edge surface, and the outer bevel edge of the substrate layer of the outer edge of the semiconductor wafer 400 are exposed. The fluid processed by the semiconductor wafer 400 is flowed out through other edge processing holes, and the flowed fluid flows into the container of the fluid carrying module 70 through a pipeline and a controlled valve.

It can be seen that, based on the edge micro-processing space 130, the semiconductor processing apparatus 100 in this embodiment consumes only a small amount of processing fluid to achieve selective etching treatment on the outer edge of one piece of the semiconductor wafer 400 to be processed, which greatly reduces the processing cost and the amount of production waste liquid. In addition, the semiconductor processing apparatus 100 in the present embodiment has the remarkable advantages of simple structure, convenient use, and low requirement on the operation skills of operators, as compared with the dry process apparatus in the related art.

It can be seen that the semiconductor processing apparatus 100 provided in this embodiment can implement selective processing on the outer edge of the semiconductor wafer 400 to be processed. In addition, by controlling the flow rate of the processing fluid within the semiconductor wafer 400 to be processed, the amount of processing fluid can be saved while ensuring the processing effect. With continued reference to fig. 12 to 13, in the present embodiment, the first chamber portion 110 further has a first recess portion 115 formed on an inner wall surface of the first chamber portion 110 facing the micro chamber, the first recess portion being located inside the first channel 116, and the second chamber portion 120 further has a second recess portion 125 formed on an inner wall surface of the second chamber portion 120 facing the micro chamber, the second recess portion being located inside the second channel 126. The first recess 115 and the second recess 125 are also annular. When the second chamber portion 120 is located at the closed position relative to the first chamber portion 110 and the semiconductor wafer 400 to be processed is accommodated in the micro-chamber, a partial area of the second edge surface of the semiconductor wafer 400 to be processed covers the top of the second recess 125 to form a second inner micro-space, a partial area of the first edge surface of the semiconductor wafer 400 to be processed covers the top of the first recess 115 to form a first inner micro-space, and the first inner micro-space and the second inner micro-space are located inside the edge micro-processing space 130.

Correspondingly, the first chamber portion 110 has a first inner processing through hole communicating with the first recess portion 115, and the second chamber portion 120 has a second inner processing through hole communicating with the second recess portion 125. When the edge of the semiconductor wafer 400 is etched using the edge micro-process space 130, a liquid or gas, such as water or nitrogen, may be introduced into the first recess 115 and the second recess 125, that is, into the first inner micro-space and the second inner micro-space, to prevent the liquid in the edge micro-process space 130 from penetrating inward.

Likewise, the first recess 115 and the second recess 125 may be arc-shaped.

With continued reference to fig. 12 to 13, in the present embodiment, when the second chamber portion 120 and the first chamber portion 110 are in the closed position, the micro chamber 140 is further formed in the middle thereof, the second chamber portion 120 has a middle process through hole 123 communicating with the micro chamber 140, and the first chamber portion 110 has a middle process through hole 113 communicating with the micro chamber 140.

Referring to fig. 13, the first chamber portion 110 has a sealing engagement portion 210 thereon located outside the first channel 116, and the second chamber portion 120 has an engagement groove 122 thereon corresponding to the sealing engagement portion 210. The sealing joint 210 includes a guide surface 211 at the distal end and an inner side surface 212 at the inner side. When the second chamber portion 120 is located at the closed position with respect to the first chamber portion 110, the tip end of the seal engaging portion 210 protrudes into the engaging groove 122, the tip end portion of the inner side surface 212 thereof is in seal engagement with the groove wall of the engaging groove 122, and the upper end portion of the inner side surface 212 thereof forms the outer side surface of the outer-edge micro-processing space 130. Further, the sealing surface of the distal end portion of the inner side surface 212 of the seal joint 210 and the groove wall of the joint groove 122 is located below the outer edge micro processing space 130 and perpendicular to the extending direction of the semiconductor wafer 400, and this arrangement makes it possible to make the wall surface 117 of the first chamber portion 110 located inside the first groove 116 abut against the first edge surface of the semiconductor wafer 400 to be processed more closely, and the wall surface 127 of the second chamber portion 120 located inside the second groove 126 abuts against the second edge surface of the semiconductor wafer 400 to be processed more closely, avoiding the penetration of the etching liquid inward.

In the embodiment of fig. 13, the inner side surface 212 of the sealing joint 210 may achieve centering of the semiconductor wafer 400 during closing of the second chamber portion 120 relative to the first chamber portion 110, i.e. if the center of the semiconductor wafer 400 is offset from the desired center when placed, the inner edge surface 212 of the sealing joint 210 may also be corrected to the desired center by pressing against the semiconductor wafer 140. In one example, when edge processing is performed, it is required that the center deviation of the semiconductor wafer 400 does not exceed 0.2mm, and in this way, the center deviation can be adjusted to within 0.1 mm. The guide surface 211 may guide the sealing engagement portion 210 into the engagement groove 122 when the first and second chamber portions 110 and 120 are closed. The sealing engagement portion 210 may be caught in the engagement groove 122.

Referring to fig. 12, the first chamber portion 110 includes a positioning groove 114 and the second chamber portion 120 includes a positioning post 124, so that the first chamber portion 110 and the second chamber portion 120 can be properly positioned when closed. During the closing process of the first chamber portion 110 and the second chamber portion 120, the positioning post 124 is first engaged with the positioning groove 114 to achieve the initial positioning, and then the end of the sealing engagement portion 210 protrudes into the engagement groove 122.

In one embodiment, the silicon oxide wafer edge etching process performed using the semiconductor processing apparatus 100 of the present invention may include a closed chamber, an HF acid etch, a DIW rinse, an IPA rinse, a nitrogen gas dry, and an open chamber. The specific processes in which the HF acid etch, DIW (deionized water) rinse, and IPA (isopropyl alcohol) rinse are all operated with reference to the above-described procedure. In particular, during the HF acid etching, a liquid or gas, such as water or nitrogen, may be introduced into the first recess 115 and the second recess 125 to prevent the liquid in the edge micro-process space 130 from penetrating inward.

Another embodiment of a semiconductor processing apparatus

Referring to fig. 16 to 19, there is shown a schematic structural diagram of a semiconductor processing apparatus 200 according to another embodiment of the present invention, wherein: FIG. 16 is a schematic cross-sectional view of a semiconductor processing apparatus of the present invention in another embodiment; FIG. 17 is an enlarged schematic view of circle B in FIG. 16; fig. 19 is a bottom view of a first chamber portion of the semiconductor processing apparatus of fig. 16; fig. 19 is a plan view of a second chamber portion of the semiconductor processing apparatus of fig. 16. The semiconductor processing apparatus 200 herein may be used as the semiconductor processing apparatus 41 above.

The semiconductor processing apparatus 200 is largely identical in structure to the semiconductor processing apparatus 100, and therefore identical parts are denoted by the same reference numerals, and the differences are mainly: the seal joint 310 of the semiconductor processing apparatus 200 and the seal joint 210 of the semiconductor processing apparatus 100 are somewhat different in structure.

As shown in fig. 16, the first chamber portion 110 has the seal engaging portion 310 located outside the first channel 116, and the second chamber portion 120 has the engaging groove 122 corresponding to the seal engaging portion 210.

The seal joint 310 includes a guide surface 311 at the distal end, an inner side surface 312 at the inner side upper end, and a projection 313 at the inner side distal end. When the second chamber portion 120 is located at the closed position relative to the first chamber portion 110, the tip of the seal engaging portion 310 protrudes into the engaging groove 122, the projection 313 thereof is in sealing engagement with the groove wall of the engaging groove 122, and the inner side surface 312 thereof forms the outer side surface of the outer-edge micro-processing space 130. The inner side surface 312 is spaced a distance from the outer edge of the semiconductor wafer 400.

The sealing surface formed by the protrusion 313 of the sealing joint 310 and the groove wall of the joint groove 122 is located below the outer edge micro-processing space 130 and perpendicular to the extending direction of the semiconductor wafer 400, and this arrangement can make the wall surface 117 of the first chamber portion 110 located inside the first groove 116 abut against the first side surface of the semiconductor wafer 400 to be processed more tightly, and the wall surface 127 of the second chamber portion 120 located inside the second groove 126 abuts against the second side surface of the semiconductor wafer 400 to be processed more tightly, so that the etching liquid is prevented from penetrating inward.

In the embodiment of fig. 16, the bump 313 of the sealing joint 310 may achieve centering of the semiconductor wafer 140 during closing of the second chamber portion 120 with respect to the first chamber portion 110, i.e. if the center of the semiconductor wafer 140 is offset from the desired center when placed, the bump 313 of the sealing joint 310 may also be corrected to the desired center by pressing against the semiconductor wafer 140.

There is still a distance between the inner side surface 312 and the outer edge of the semiconductor wafer 400. Such that the semiconductor wafer 400 may not be easily pinched by the seal joint 310 when the second chamber portion 120 is disengaged from the first chamber portion 110.

In another embodiment, the bump 313 may not be used to center the semiconductor wafer 400, i.e., the bump 313 does not contact the edge of the semiconductor wafer 400. While the centering of the semiconductor wafer 400 may be achieved with the wall edges of the first channel 116.

The foregoing description has fully disclosed specific embodiments of this invention. It should be noted that any modifications to the specific embodiments of the invention may be made by those skilled in the art without departing from the scope of the invention as defined in the appended claims. Accordingly, the scope of the claims of the present invention is not limited to the foregoing detailed description.

Claims (12)

1. A semiconductor processing apparatus, comprising:

at least two semiconductor processing modules are adjacently arranged, each semiconductor processing module is internally provided with a semiconductor processing device, and the semiconductor processing device comprises: a first chamber portion, a second chamber portion, and a driving portion that drives the second chamber portion to be movable between an open position and a closed position with respect to the first chamber portion, wherein a micro chamber is formed between the first chamber portion and the second chamber portion when the second chamber portion is located at the closed position with respect to the first chamber portion, a semiconductor wafer is receivable in the micro chamber, and the semiconductor wafer is capable of being taken out or put in when the second chamber portion is located at the open position with respect to the first chamber portion;

an equipment front end assembly disposed proximate a first side of the semiconductor processing module, comprising a wafer carrier and a wafer handling device, the wafer handling device placing a semiconductor wafer in the wafer carrier between a first chamber portion and a second chamber portion of the semiconductor processing device by a robot, withdrawing the semiconductor wafer from between the first chamber portion and the second chamber portion of the semiconductor processing device and handling the semiconductor wafer to the wafer carrier;

A fluid carrying module positioned below the semiconductor processing module for carrying various unused fluids and/or used fluids; and

at least two valve modules disposed proximate a second side of the semiconductor processing module opposite the first side, each valve module including a plurality of controlled valves.

2. The semiconductor processing apparatus of claim 1, wherein the fluid carrying module is also disposed below the valve module, the fluid carrying module comprising a support frame and a plurality of containers disposed within the support frame, the containers containing various unused fluids required for processing the semiconductor wafers and/or various used fluids processed the semiconductor wafers,

one for each semiconductor processing module,

the controlled valves include rotary valves and pneumatic valves.

3. The semiconductor processing apparatus of claim 2, wherein there are two vertical stacks in the semiconductor processing module, two vertical stacks in the valve module,

the semiconductor processing apparatus further includes:

the fan filter module is arranged above the semiconductor processing module and comprises a fan filter module assembly, and the fan filter module assembly provides clean air to the direction of the semiconductor processing module;

The control module is arranged above the valve module and comprises a supporting frame and a control unit, the control unit is electrically connected with the semiconductor processing device and the controlled valve through cables, the control unit controls the opening and closing of the semiconductor processing device, and the control unit controls the controlled valve in the valve module.

4. A semiconductor processing apparatus according to claim 3, further comprising:

a plenum assembly between the valve module and the semiconductor processing module, the plenum assembly including one or more plenums, gas entering from the bottom, sides of the plenums and exiting from the top of the plenums.

5. A semiconductor processing apparatus according to claim 3, further comprising:

the man-machine interaction control console is arranged on the front end component of the equipment;

the front end assembly of the device comprises a closed shell, and the wafer carrying device are arranged in the closed shell.

6. The semiconductor processing apparatus of claim 3, further comprising a factory docking module disposed on a second side of the semiconductor processing module,

The number of the semiconductor processing modules is four, wherein two laterally adjacent semiconductor processing modules are vertically stacked above the other two laterally adjacent semiconductor processing modules, each two laterally adjacent semiconductor processing modules have a common bracket,

the valve modules are four, two vertically stacked valve modules and the other two vertically stacked valve modules are transversely arranged at intervals,

the plant butt-joint modules are arranged between the vertically stacked valve modules which are arranged at intervals in the transverse direction,

the number of the fluid bearing modules is four, wherein two fluid bearing modules are respectively arranged below two transversely adjacent semiconductor processing modules, two fluid bearing modules are respectively arranged below two valve modules which are arranged at intervals,

the number of the fan filter modules is two, the two fan filter modules are respectively arranged above the two semiconductor processing modules which are adjacent transversely,

the number of the control modules is three, and the three control modules are transversely arranged above the plant butt joint module and the valve module.

7. A semiconductor processing apparatus according to claim 3, further comprising:

the expansion assembly comprises an expansion valve module, an expansion control module and an expansion fluid bearing module, wherein at least one expansion fluid bearing module is provided with an ozone generator.

8. The semiconductor processing apparatus of claim 3, wherein,

one or more through holes communicated with the micro-chamber are arranged on the first chamber part and/or the second chamber part, the through holes are used for leading in or leading out fluid into the micro-chamber, the fluid provided by the fluid bearing module is controllably transmitted into the micro-chamber through the pipeline and the through holes by the controlled valve, the fluid in the micro-chamber is controllably transmitted into the fluid bearing module through the pipeline and the through holes by the controlled valve,

at least one fluid bearing module is provided with a vacuum pump, the control unit is electrically connected with the vacuum pump through a cable to control the vacuum pump, and the vacuum pump is used for providing negative pressure to drive fluid in a container of the fluid bearing module into the micro-chamber and/or drive fluid in the micro-chamber to flow out and into the container of the fluid bearing module.

9. The semiconductor processing apparatus according to claim 1, wherein in each semiconductor processing device, the first chamber portion has a first channel, the second chamber portion has a second channel, when the second chamber portion is located at the closed position with respect to the first chamber portion and the semiconductor wafer is accommodated in the micro chamber, the first channel and the second channel communicate and form an edge micro-processing space together with an edge of the semiconductor wafer, an outer edge of the semiconductor wafer accommodated in the micro chamber extends into the edge micro-processing space, the edge micro-processing space communicates with the outside through the edge processing through hole, a fluid from a container of the fluid-carrying module enters the edge micro-processing space through a controlled valve, a pipeline, the edge processing through hole, and the fluid in the edge micro-processing space is led out into the container of the fluid-carrying module through the edge processing through hole, the pipeline, the controlled valve, the first chamber portion has a sealing joint located outside the first channel, and the second chamber portion has a joint groove corresponding to the sealing joint.

10. The semiconductor processing apparatus of claim 9, wherein in each semiconductor processing device, the first edge surface, the second edge surface, and the outer end bevel surface of the outer edge of the semiconductor wafer are exposed to the edge micro-processing space, one or more of the edge processing through holes serve as fluid inlets, one or more of the edge processing through holes serve as fluid outlets,

the edge micro-processing space is annular or arc-shaped, the outer edge of the semiconductor wafer stretches into the edge micro-processing space, and the edge micro-processing space is a closed space and is communicated with the outside through an edge processing through hole;

the top surface of the inner side wall portion of the first channel is abutted against the first edge surface of the semiconductor wafer near the first chamber portion, the top surface of the inner side wall portion of the second channel is abutted against the second edge surface of the semiconductor wafer near the second chamber portion,

the first chamber portion further has a first recess formed in an inner wall surface of the first chamber portion facing the micro chamber, the first recess is located at an inner side of the first channel, the second chamber portion further has a second recess formed in an inner wall surface of the second chamber portion facing the micro chamber, the second recess is located at an inner side of the second channel, when the second chamber portion is located at the closed position with respect to the first chamber portion and the semiconductor wafer is accommodated in the micro chamber, a partial region of a second edge surface of the semiconductor wafer covers a top of the second recess to form a second inner micro-space, a partial region of a first edge surface of the semiconductor wafer covers a top of the first recess to form a first inner micro-space, the first inner micro-space and the second inner micro-processing space are located at an inner side of the edge micro-processing space, the first chamber portion has a first inner side processing through hole communicating with the first recess, and the second chamber portion has a second inner side processing through hole communicating with the second recess.

11. The semiconductor processing apparatus according to claim 10, wherein in each of the semiconductor processing devices, the first recess and the second recess are formed in a ring shape or an arc shape, and when etching the edge of the semiconductor wafer using the edge micro-processing space, a liquid or a gas is introduced into the first recess and the second recess to prevent the liquid in the edge micro-processing space from penetrating inward,

the sealing joint comprises an inner edge surface positioned on the inner side, when the second chamber part is positioned at the closed position relative to the first chamber part, the tail end of the sealing joint stretches into the joint groove, the tail end part of the inner edge surface is in sealing fit with the groove wall of the joint groove, the upper end part of the inner edge surface forms the outer side surface of the outer edge micro-processing space,

a sealing surface of a distal end portion of an inner edge surface of the seal joint and a groove wall of the joint groove is located below the outer edge micro-processing space, and the sealing surface is perpendicular to an extending direction of the semiconductor wafer.

12. The semiconductor processing apparatus according to claim 10, wherein an inner edge surface of the sealing joint achieves centering of the semiconductor wafer during closing of the second chamber portion with respect to the first chamber portion, and if the center of the semiconductor wafer when placed deviates from a desired center, the inner edge surface of the sealing joint is corrected to the desired center by pressing against the semiconductor wafer so that the center thereof is centered.

Images