CN116403200A - License plate real-time identification system based on hardware acceleration - Google Patents

Abstract

The invention relates to a license plate real-time identification system based on hardware acceleration, belongs to the technical field of computer vision, and is used for solving the problems that in a complex environment such as a foggy weather, etc., for a lens with a large view field, the data volume required to be processed in the license plate image identification process is extremely huge, so that the detection time is long, and the real-time detection of high-frame-rate and high-resolution images is difficult to realize. After image defogging processing and license plate number region positioning are carried out by adopting the FPGA processing board, the system provided by the invention carries out number recognition by the license plate recognition module in the upper computer software, so that not only is the license plate number recognition precision improved, but also the real-time processing speed of image data is improved.

Description

Real-time license plate recognition system based on hardware acceleration

technical field

The invention relates to the technical field of computer vision, in particular to a real-time license plate recognition system based on hardware acceleration.

Background technique

License plate recognition and detection is an important research topic in the field of intelligent transportation. Nowadays, vehicles have become a part of our lives. While it is very convenient to travel, there are also many problems. License plate recognition plays an important role in traffic detection, congestion control, violation monitoring, suspicious vehicle detection, etc. However, in foggy weather, the visibility is very low, and the detailed information of the vehicle is seriously lost, which brings great difficulties to the license plate recognition. Moreover, for a lens with a large field of view, the license plate image only occupies a small part of the entire image. Using It is difficult to guarantee the recognition accuracy of a whole image for license plate recognition. In the process of recognition, the amount of data that needs to be processed is also extremely large, which directly leads to long detection time, and it is difficult to realize real-time detection of high frame rate and high resolution images. . Focusing on the development trend of the field of computer vision in the new era, there is an urgent need for a real-time license plate detection method that can adapt to complex environments, large field of view, high frame rate, and high-resolution video.

Contents of the invention

In complex environments such as foggy weather, for a lens with a large field of view, the license plate image only accounts for a small part of the entire image, and the entire image is used for license plate recognition. In the process of recognition, the amount of data processed is also extremely large. , resulting in a long time-consuming detection, and it is difficult to realize real-time detection of high frame rate and high-resolution images. For the foregoing problems, the present invention proposes a real-time license plate recognition system based on hardware acceleration. After using an FPGA processing board to perform image defogging processing and license plate number area positioning, the license plate recognition module in the upper computer software performs number recognition, which not only improves The recognition accuracy of the license plate number is improved, and the real-time processing speed of image data is improved.

The technical scheme of the present invention is: a kind of license plate real-time recognition system based on hardware acceleration, described system comprises FPGA processing board, license plate recognition module;

According to the video image input source, the FPGA processing board uses the defogging module to perform hardware defogging processing on the image, and transmits the defogged image to the license plate positioning module to pre-select the license plate position;

The location coordinates and the area image centered on the coordinates are transmitted to the license plate recognition module in the host computer software, and the license plate characters are recognized by the license plate recognition module.

In the above technical solution, the FPGA processing board includes 1 HDMI input interface, 2 optical fiber input/output interfaces, 1 HDMI output interface, 1 Gigabit Ethernet output interface, 1 FPGA processing chip, and 4 DDR3 particles;

in:

HDMI input interface, used to connect HDMI cable, used to input computer equipment projection;

Optical fiber input/output interface, connect the optical fiber cable to the camera end, input the video image of the camera through the input interface, and send instructions to the camera through the output interface, for example: adjust camera parameters such as exposure and resolution;

HDMI output interface, output the defogged video image to the monitor to view the defogged effect;

The Ethernet output interface is used to upload the position coordinates and the image of the designated area to the host computer software, and use the license plate recognition module in the host computer software to recognize the license plate characters;

FPGA processing chip, used to complete the calculation required for fog removal processing and license plate position preselection;

DDR3 particles, used to cache images and calculate data.

In the above technical solution, the specified area image is specifically: take the geometric center of the license plate area as the origin of the coordinates, take the Cartesian coordinate system as the reference coordinate system, and expand X1 and Y1 in the positive and negative directions of the X axis and the positive and negative directions of the Y axis. A rectangular area surrounded by pixels, the setting values of X1 and Y1 are related to the computing power of the FPGA processing chip.

In the above technical solution, the defogging module includes the following processing:

By splitting each pixel of the input image into three 8-bit data, using a comparator to compare the three data, the minimum value is used as the pixel value of the dark channel image of the input video image, and output according to the original image timing;

The pixel value of the output dark channel image is used to construct a 9×9 filter window as the basic template using BRAM resources, and the basic template is traversed with a 5×5 sub-window, and the pixel mean value of each sub-region is calculated first, and then the mean value and the center are calculated. Then select the sub-area with the smallest difference to perform minimum value filtering to obtain the processed dark channel map, which is used to calculate the transmittance;

Perform an accumulation operation on the dark channel pixel values, and the accumulation results are stored in each address of the BRAM. Each address corresponds to a histogram statistical result of a gray value, and the statistical histogram is used to estimate the top 0.1% pixels of the dark channel image of the previous frame. The average value of the pixel is used as the threshold, and the data of the previous frame and the current frame are cached in the DDR unit, and then the three channels of the current frame are linearly adjusted according to the difference between the pixel and the threshold to estimate the atmospheric light value;

Based on the transmittance and atmospheric light value, the foggy imaging model is used to obtain the dehazed image.

In the above technical solution, the license plate positioning module includes the following processing:

Convert the RGB image after dehazing to the YCbCr color space;

Use FPGA parallel processing to extract the grayscale image of its Cb and Cr components at the same time, and then obtain the grayscale image with enhanced target information;

The grayscale image enhanced with target information is binarized and segmented, and then morphologically processed to restore the geometric size of the target area and filter out speckle interference.

In the above technical solution, the grayscale image acquisition step of target information enhancement includes:

The Cr component grayscale image is traversed pixel by pixel according to the line and field timing, and two registers are respectively set to store the target pixel range value and pixel mean value;

After the traversal, in the Cr component, the difference between the pixel mean value and the target pixel range value is used as the threshold C, and the threshold C is compared with the Cr component to obtain the processed Cr component grayscale image, and the processed Cr component grayscale The degree map is stored in DDR;

Read out the Cb component grayscale image and the processed Cr component grayscale image in the same frame from the DDR cache unit, and use DSP resources to perform difference operation pixel by pixel to obtain a grayscale image with enhanced target information.

In the above technical solution, the morphological treatment includes:

First, expand the binary segmented grayscale image, connect the holes in the license plate area, and use BRAM to build a line cache structure; after completing the three-line data cache, read the image into the register array of the required scale Build a convolution unit, the size of the convolution kernel constructed by the register is fixed 9×9;

Then, two erosions are performed, and the erosion convolution kernels are respectively 9×9 and 3×3 in size to complete the reduction of the geometric size of the target area and the filtering of speckle interference.

In the above technical solution, after the binary segmentation, the improved bounding box target detection algorithm is used to identify the binary image containing the license plate area:

First, a BRAM memory is defined, and the lines with overlapping areas in the DDR readout image are accumulated in a row-by-row manner, and the accumulation results are stored in the smallest storage unit in the BRAM address in turn, and the closed area is searched during the search process. Marking, the marking result is placed in the register, and the area of the closed area and the coordinate information of the vertices on both sides are recorded. At the end of the image search, the area of all closed areas is sent to the comparator for comparison, and the area range and aspect ratio are set. As a filter condition, this condition refers to the actual license plate length and width ratio, so as to filter out the closed area with the highest probability as the target license plate;

Then, smooth the output of the target license plate coordinates. The smoothing operation is to set a fixed limit difference between the two detected results, perform subtraction on the two results through DSP, and compare the subtraction result with the limit difference. If the result is within the set limit range, the original result will be used, and if it exceeds the range, the limit difference will be assigned to the final result.

In the above technical solution, the filter condition is stored in the ROM resource of the FPGA.

In the above technical solution, the license plate recognition module includes the following processing:

Based on the accepted position coordinates, the coordinate offset processing is performed on the license plate coordinates to obtain the actual position information;

Construct a rectangular structural element on the license plate image, corrode and expand the binarized image in turn, and subtract the constructed structural element from the processed binarized image to obtain an image with redundant parts removed;

For the image from which the redundant part is removed, traverse each pixel to obtain the number of target pixels in each column of the image;

Step S: compare the number of target pixels in each column with the set threshold A to determine whether the column is a character;

If it is not a character, compare the number of consecutive columns with the number of target pixels greater than the set threshold A with the set threshold B to update the character position information;

If it is a character, the character width is accumulated. When the character width is no longer accumulated, the positioning of the current character position ends and the positioning of the next character begins;

Return to step S until all 8 character positions on the license plate are positioned;

Use template matching for character recognition, create an affine transformation target image, calculate the affine transformation matrix, perform affine transformation operation on the loaded image, compare it with the character library, and output the recognized license plate number.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, other drawings can also be obtained based on these drawings without any creative effort.

Fig. 1, the schematic diagram of license plate real-time recognition system under the complex environment based on hardware acceleration provided by the embodiment of the present invention;

Fig. 2 is a schematic diagram of the workflow of the license plate real-time recognition system under the complex environment based on hardware acceleration provided by the embodiment of the present invention;

Fig. 3, FPGA processing board provided for the embodiment of the present invention is to the schematic flow chart of license plate area location algorithm under complex environment;

FIG. 4 is a schematic diagram of network data transmission content provided by an embodiment of the present invention;

Fig. 5 is a schematic diagram of the effect of the host computer software provided by the embodiment of the present invention.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them.

The composition of the real-time license plate recognition system based on hardware acceleration in a complex environment is shown in Figure 1, which mainly includes video image source, FPGA processing board, computer equipment, display and host computer software. The video image sources are divided into camera image screens, computer equipment projection screens and test images generated inside the FPGA processing board, mainly providing video input for the FPGA processing board.

As shown in Figure 2, the FPGA processing board integrates multiple modules and input/output interfaces. During the work process, the input status of the video image source is first judged, and the priorities of camera input, HDMI projection and test images are decremented. Selectively input the input video source in the same way. The camera image is transmitted from the optical fiber interface to the FPGA processing board through the optical fiber. The optical fiber transmission bandwidth is 5Gbps, which can carry out two-way data transmission. While receiving the video picture, the camera parameters of the camera can also be remotely configured. The HDMI projection of the computer equipment is connected to the HDMI input interface through the HDMI cable and transmitted to the FPGA processing board. The test image is connected through FPGA internal traces, no external physical connection is required. The image size of the above video image source is 4096×2160, and the frame rate is about 100 frames per second.

After the FPGA completes the selection of the image input source, it implements the hardware defogging algorithm for the image. The clear image after defogging is displayed on the HDMI output and sent to the next-level algorithm module. The license plate positioning module realizes the pre-selection of the license plate position on the FPGA. And the location coordinates and the area image centered on the coordinates are uploaded to the computer through the network, and the software completes the subsequent license plate character recognition and user interface work.

The FPGA processing board is connected to the video image source for real-time defogging of the input image or video image. In order to improve the recognition speed, this case adopts the dark channel image defogging algorithm, and combines the FPGA processing board to carry out targeted algorithm improvement design. The steps include:

(1) Find the dark channel image for the input video image

Split each pixel of the input image into three 8-bit data, representing the three channels of R, G, and B respectively. Use a comparator to compare the three data to find the minimum value; and use the minimum value as the pixel value of the dark channel image, and output it according to the original image timing.

(2) Estimate the transmittance value t(x) and atmospheric light value A according to the dark channel image

(2.1) Transmittance value t(x)

The input video image is filtered using the dual-scale minimum difference filtering algorithm, and a 9×9 filtering window is constructed using BRAM resources. The filtering window is used as a basic template, and the basic template is traversed with 5×5 sub-windows.

The traversal method mainly completes basic mathematical operations by calling the DSP resources inside the FPGA. First, calculate the mean value of each sub-region pixel, and then calculate the difference between the mean value and the pixel value of the center point, and then select the sub-region with the smallest difference to perform minimum value filtering to obtain a refined dark channel map. The refined dark channel is used To calculate the transmittance, the transmittance can be obtained according to the general fog imaging model.

(2.2) Estimated atmospheric light value A

The pixel value of the dark channel is accumulated, and the accumulated result is stored in each address of the BRAM, and each address corresponds to a histogram statistical result of a gray value. Through the statistical histogram, the average value of the first 0.1% pixels of the dark channel image in the previous frame is used as the threshold, and the data of the previous frame and the current frame are cached in the DDR unit; value, a linear adjustment is made to estimate the atmospheric light value A.

(3) Substitute the estimated parameters into the fog imaging model to obtain the image after fog removal.

The FPGA processing board searches the image after defogging, and determines the coordinate position of the license plate in the whole image in the frame image.

The workflow of the license plate location algorithm is shown in Figure 3, and the implementation is as follows:

First, the RGB image processed by the dehazing algorithm is converted into the YCbCr color space.

Secondly, using the parallel processing capability of FPGA to simultaneously extract grayscale images for its Cb and Cr components, compared with software implementation, the processing speed can be doubled.

Next, the Cr component grayscale image is traversed pixel by pixel according to the line and field timing, and two registers are respectively set to store the target pixel range value and the pixel average value. The maximum gray value of the image and 0.85 times the gray value are used as the range boundary value. Since the range of the target information contains the minimum value of the pixel, this range is defined as the target pixel range value. After the traversal, the design idea of background suppression is adopted, and the minimum value obtained from the Cr component gray image is nonlinearly compensated. The difference between the pixel mean value and the target pixel range value is used as the threshold value C, and the threshold value C is compared with the Cr component to obtain the processed Cr component grayscale image, and the processed Cr component grayscale image is stored in the DDR. If the Cr component is greater than or equal to the threshold C, the threshold C is used as the processed Cr component grayscale image; if it is smaller, the Cr component is used as the processed Cr component grayscale image. Then read the grayscale image of Cb component and the processed grayscale image of Cr component in the same frame from the DDR cache unit, and use DSP resources to perform difference calculation pixel by pixel to obtain a grayscale image with enhanced target information, so as to realize the suppression of vehicle body The background interference brought by the color achieves the purpose of suppressing redundant noise.

Subsequently, through the adaptive binarization module, the above-mentioned grayscale image is binarized and segmented, and then morphological processing is performed. Specifically: first, expand the grayscale image after binary segmentation, connect the holes in the license plate area, and use BRAM to build a line cache structure; after completing the three-line data cache, read the image to the desired scale. The convolution unit is built in the register array. The size of the convolution kernel constructed by the register is fixed 9×9, and then two corrosions are performed. The corroded convolution kernels are respectively 9×9 and 3×3 in size, and the geometric size of the target area is completed. reduction and filtering of speckle interference.

Next, the binarized image containing the license plate area is recognized, and an improved bounding box target detection algorithm is used. Specifically, a BRAM memory is first defined, and then the lines in the DDR readout image with overlapping areas are accumulated and accumulated in a progressive scanning manner, and the accumulation results are sequentially stored in the smallest storage unit in the BRAM address. During the search process, the closed area is marked, and the marked result is placed in the register, and the area of the closed area and the coordinate information of the vertices on both sides are recorded. At the end of the image search, the areas of all closed areas are sent to the comparator for comparison, and the area range and aspect ratio are set as filter conditions. This condition refers to the actual license plate aspect ratio, and the specific data is stored in the on-chip ROM resource. Based on this, the closed area with the highest probability is selected as the target license plate, and then the coordinates of the target license plate are smoothed with a smoothing step of 50 pixels. The smoothing operation is to set a fixed limit difference between the two detected results, perform subtraction on the two results through DSP, and send the subtraction result and the limit difference to the comparator. If the comparison result is within the set limit range, the coordinate result of the detected license plate is used; if it exceeds the range, the limit difference is assigned to the coordinate result. Then the RGB image of the corresponding frame is read from the DDR3 buffer area, and the coordinate information of the license plate and the geometric center of the license plate area as the coordinate origin and the Cartesian coordinate system as the reference coordinate system are transferred to the positive and negative directions of the X axis and the Y axis through the network port. The rectangular area surrounded by 370 and 300 pixels expanded in the positive and negative directions is uploaded to the host computer software of the computer equipment. The transmission format adopts a custom encoding method, uses the FPGA logic unit to construct the Ethernet frame format and fills the valid data into the data segment, and after sending it to the MAC layer with the RGMII interface, the onboard PHY chip completes the subsequent network communication, as shown in Figure 4.

After the host computer software receives the video stream data sent by the FPGA processing board through the Ethernet interface, it will do the following two tasks at the same time:

1. Display the received video screen in the video display area of the upper computer software in real time.

2. After receiving the license plate coordinate information, the upper computer software performs coordinate offset processing on the license plate coordinates due to the difference between the license plate coordinates on the FPGA processing board and the reference coordinate system of the uploaded screen, and obtains the actual position information of the license plate coordinates in the uploaded video image.

After the license plate coordinate information is obtained, the license plate image is binarized, and the following operations are performed on it: construct a rectangular structural element, corrode and expand the binarized image in turn, combine the constructed structural element with the processed binary The valued images are subtracted to obtain a graph with redundant parts removed. Further locate the characters, traverse each pixel of the license plate number image, and obtain the target pixel number of each column of the image. Compare the number of target pixels in each column with the set threshold A to determine whether the column is a character. If it is not a character, compare the number of consecutive columns with the number of target pixels greater than the threshold A with the threshold B for Update the character position information; if it is a character, the character width is accumulated. When the character width is no longer accumulated, the current character position positioning is completed, and the next character is positioned, and the operation steps of character positioning are repeated until there are 8 characters on the license plate All positions are located. Finally, use template matching for character recognition, create an affine transformation target image, calculate the affine transformation matrix, perform an affine transformation operation on the loaded image, compare it with the character library, and output the recognized license plate characters to the upper computer software license plate character display area , as shown in Figure 5.

Although the embodiments of the present invention have been described above in conjunction with the accompanying drawings, the present invention is not limited to the above-mentioned specific embodiments and application fields, and the above-mentioned specific embodiments are only illustrative, instructive, and not restrictive . Under the enlightenment of this specification and without departing from the protection scope of the claims of the present invention, those skilled in the art can also make many forms, which all belong to the protection of the present invention.

Claims (10)

1. The license plate real-time identification system based on hardware acceleration is characterized by comprising an FPGA processing board and a license plate identification module;

the FPGA processing board performs hardware defogging processing on the image by using the defogging module according to the video image input source, and transmits the defogged image to the license plate positioning module for license plate position preselection;

transmitting the position coordinates and the region image with the coordinates as the center to a license plate recognition module in the upper computer software, and recognizing license plate characters through the license plate recognition module.

2. The method of claim 1, wherein the FPGA processing board comprises 1 HDMI input interface, 2 fiber input/output interfaces, 1 HDMI output interface, 1 gigabit ethernet output interface, 1 FPGA processing chip, 4 DDR3 particles;

wherein:

the HDMI input interface is used for connecting an HDMI wire and inputting computer equipment projection;

an optical fiber input/output interface connected to the camera end through an optical fiber line;

the HDMI output interface is used for outputting the defogged video image to a display to check defogging effects;

the Ethernet output interface is used for uploading the position coordinates and the specified area images to the upper computer, and identifying license plate characters by utilizing a license plate identification module in the upper computer;

the FPGA processing chip is used for completing defogging processing and calculation required by license plate position preselection;

DDR3 particles, which are used to buffer images and computation data.

3. The system according to claim 2, wherein the specified area image is specifically: and the geometric center of the positioned license plate region is taken as a coordinate origin, a Cartesian coordinate system is taken as a reference coordinate system, rectangular regions surrounded by X1 and Y1 pixels are respectively expanded towards the positive and negative directions of the X axis and the positive and negative directions of the Y axis, and the set values of the X1 and Y1 are related to the computing capacity of the FPGA processing chip.

4. The system of claim 1, wherein the defogging module comprises the following:

splitting each pixel of an input image into 3 pieces of 8-bit data, comparing the 3 pieces of data by using a comparator, taking the minimum value as a pixel value of a dark channel image of the input video image, and outputting according to an original image time sequence;

constructing a 9 multiplied by 9 filter window by using BRAM resources as a basic template, traversing the basic template by using a 5 multiplied by 5 sub-window, calculating the pixel mean value of each sub-region, calculating the difference between the mean value and the pixel value of a central point, and selecting the sub-region with the minimum difference value for minimum value filtering to obtain a processed dark channel diagram for calculating the transmissivity;

accumulating the dark channel pixel values, storing the accumulated result in each address of the BRAM, wherein each address corresponds to a histogram statistical result of one gray value, estimating the mean value of about the first 0.1% pixel of the dark channel map of the previous frame as a threshold value through the statistical histogram, buffering the data of the previous frame and the current frame in the DDR unit, and carrying out linear adjustment on three channels of the current frame according to the difference value between the pixel and the threshold value to estimate the atmospheric light value;

and obtaining defogging images by using a foggy imaging model based on the transmissivity and the atmospheric light value.

5. The system of claim 1, wherein the license plate location module comprises the following:

performing color space conversion on the defogging RGB image, and converting the RGB image into a YCbCr color space;

extracting gray images from Cb and Cr components of the target information by utilizing FPGA parallel processing, so as to obtain a gray image with enhanced target information;

and carrying out binarization segmentation on the gray level image enhanced by the target information, and then carrying out morphological treatment to complete the reduction of the geometric dimension of the target area and the filtering of speckle interference.

6. The system of claim 5, wherein the target information enhanced gray scale image acquisition step comprises:

traversing pixel points of the Cr component gray level image according to a line field time sequence, and respectively setting two registers to store a target pixel range value and a pixel mean value;

after traversing, taking the difference value between the pixel mean value and the target pixel range value in the Cr component as a threshold C, comparing the threshold C with the Cr component to obtain a processed Cr component gray scale map, and storing the processed Cr component gray scale map in the DDR;

and reading the Cb component gray level image and the processed Cr component gray level image in the same frame from the DDR buffer unit, and performing difference operation pixel by using DSP resources to obtain the gray level image with enhanced target information.

7. The system of claim 5, wherein the morphological processing comprises:

firstly, performing expansion processing on a binary-segmented gray level image, communicating holes of a license plate region, and constructing a line cache structure by using BRAM; after three data caching is completed, reading the image to a register array with a required size to construct a convolution unit, wherein the size of a convolution kernel constructed by the register is 9 multiplied by 9;

then, two corrosions are carried out, the corrosions are respectively 9×9 and 3×3, and the reduction of the geometric dimension of the target area and the filtering of speckle interference are completed.

8. The system of claim 5, wherein the improved bounding box object detection algorithm is used to identify the binary image containing license plate regions after the binary segmentation:

firstly, defining a BRAM memory, carrying out area accumulation on lines with overlapping areas in DDR read-out images in a progressive scanning mode, sequentially storing accumulation results in a minimum storage unit in BRAM addresses, marking a closed area in a searching process, placing the marking results in a register, recording the area of the closed area and coordinate information of vertexes at two sides, and sending the areas of all the closed areas into a comparator for comparison at the end of image searching, wherein the area range and the aspect ratio are set as filtering conditions, and the conditions refer to the aspect ratio of actual license plates, so that the closed area with the largest probability is screened out as a target license plate;

and then, carrying out output smoothing on the coordinates of the target license plate, wherein the smoothing operation is to set a fixed limit difference value between the detected two results, carry out subtraction operation on the two results through a DSP, send the subtraction result and the limit difference value to a comparator, adopt the original result if the result is within a set limit range, and assign the limit difference value to the final result if the result exceeds the range.

9. The system of claim 8, wherein the filter criteria is stored in a ROM resource of the FPGA.

10. The system of claim 1, wherein the license plate recognition module comprises the following:

performing coordinate offset processing on license plate coordinates based on the received position coordinates to obtain actual position information;

constructing rectangular structural elements for the license plate image, sequentially corroding and expanding the binarized image, and subtracting the constructed structural elements from the processed binarized image to obtain an image with redundant parts removed;

traversing each pixel point of the image with the redundant part removed to obtain the number of target pixels of each column of the image;

step S: comparing the number of target pixels in each column with a set threshold A, and judging whether the column is a character or not;

if the character is not used, comparing the number of continuous columns with the number of target pixels being larger than the set threshold A with the set threshold B to update character position information;

if the character is the character, accumulating the character width, and when the character width is not accumulated any more, ending the positioning of the current character position and starting to position the next character;

returning to the step S until all 8 character positions on the license plate are positioned;

and performing character recognition by using template matching, creating an affine transformation target image, calculating an affine transformation matrix, performing affine transformation operation on the loaded graph, comparing with a character library, and outputting the recognized license plate number.

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