CN116401192B - Detection circuit and terminal equipment - Google Patents

Detection circuit and terminal equipment Download PDF

Info

Publication number
CN116401192B
CN116401192B CN202310675201.0A CN202310675201A CN116401192B CN 116401192 B CN116401192 B CN 116401192B CN 202310675201 A CN202310675201 A CN 202310675201A CN 116401192 B CN116401192 B CN 116401192B
Authority
CN
China
Prior art keywords
output
detection circuit
current
amplitude
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202310675201.0A
Other languages
Chinese (zh)
Other versions
CN116401192A (en
Inventor
张宁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niuxin Semiconductor Shenzhen Co ltd
Original Assignee
Niuxin Semiconductor Shenzhen Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Niuxin Semiconductor Shenzhen Co ltd filed Critical Niuxin Semiconductor Shenzhen Co ltd
Priority to CN202310675201.0A priority Critical patent/CN116401192B/en
Publication of CN116401192A publication Critical patent/CN116401192A/en
Application granted granted Critical
Publication of CN116401192B publication Critical patent/CN116401192B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

Abstract

The application relates to the field of detection circuits, and discloses a detection circuit and terminal equipment. The detection circuit comprises an amplitude detection circuit, a feedback circuit and a current adjustment circuit; wherein: the amplitude detection circuit is used for detecting the amplitude of the signal to be detected and outputting voltage representing the amplitude of the signal to be detected through the output end; the feedback circuit is used for generating a feedback signal indicating the current output by the adjustment output end according to the voltage output by the output end; wherein, the voltage output by the output end is positively correlated with the current output by the adjusted output end; and the current adjusting circuit is used for adjusting the current output by the output end according to the feedback signal so as to adjust the voltage output by the output end. The feedback circuit generates a corresponding feedback signal to adjust the current of the output end according to the voltage output by the output end, and the voltage output by the output end is positively correlated with the current output by the adjusted output end, so that the voltage output by the output end can be timely adjusted, and the nonlinear distortion problem of the detection circuit is improved.

Description

Detection circuit and terminal equipment
Technical Field
The application relates to the field of detection circuits, and particularly discloses a detection circuit and terminal equipment.
Background
In the course of signal processing or the like, it is generally necessary to detect the amplitude of a signal, for example, in a high-speed SerDes system, an amplitude detection circuit is required to detect the amplitude of a voltage signal and compare it with a reference voltage, and then return the comparison result to the system to confirm whether or not transmission of data can be started.
The detection precision of the existing detection circuit is not high, when the input signal is in a triangular waveform, the output voltage cannot linearly change along with the amplitude change of the input voltage, and particularly the larger the amplitude of the input signal is, the more obvious the nonlinearity is, so that the actual output voltage is lower, and the detection precision of the detection circuit is lower, namely the problem of nonlinear distortion occurs.
Disclosure of Invention
In order to solve the above technical problems, embodiments of the present application provide a detection circuit and a terminal device, respectively, so as to improve the nonlinear distortion problem of the detection circuit.
Other features and advantages of the application will be apparent from the following detailed description, or may be learned by the practice of the application.
According to an aspect of an embodiment of the present application, there is provided a detection circuit including an amplitude detection circuit, a feedback circuit, and a current adjustment circuit; wherein: the amplitude detection circuit is used for detecting the amplitude of the signal to be detected and outputting voltage representing the amplitude of the signal to be detected through an output end; the feedback circuit is used for generating a feedback signal indicating to adjust the current output by the output end according to the voltage output by the output end; wherein the voltage output by the output end is positively correlated with the adjusted current output by the output end; the current adjusting circuit is used for adjusting the current output by the output end according to the feedback signal so as to adjust the voltage output by the output end.
In this embodiment, the feedback circuit generates a feedback signal indicating the current output by the adjustment output end according to the voltage output by the output end, so as to adjust the current intensity of the output end.
In another exemplary embodiment of the present application, a manner in which a feedback circuit generates a feedback signal is provided, specifically: and the feedback circuit is used for generating a feedback signal representing increasing the current output by the output end if the voltage output by the output end is detected to be increased.
In this embodiment, since the voltage output by the output terminal is positively correlated with the current output by the adjusted output terminal, a feedback signal representing the current output by the output terminal is generated by the feedback circuit, and the voltage output by the output terminal is subsequently increased in a manner of adjusting the net current of the output terminal.
In another exemplary embodiment of the present application, elements in the current adjustment circuit are described, specifically: the current adjusting circuit comprises a current source connected with the output end and is used for adjusting the current output to the output end according to the feedback signal so as to adjust the current output by the output end.
The present embodiment describes a specific composition structure of the current adjusting circuit, so as to adjust the current output from the output terminal according to the current output from the current source in the current adjusting circuit.
In another exemplary embodiment of the present application, a specific operation of the current source in the current adjustment circuit is described, specifically: the direction of the current output by the current source is opposite to the direction of the current output by the output end; the current source is configured to decrease the current output to the output terminal to increase the current output by the output terminal if a feedback signal indicating that the current output by the output terminal is increased is received.
According to the embodiment, the current output by the current source to the output end of the amplitude detection circuit is reduced, and the current output by the output end is increased in a simple and feasible mode, so that the effect of quickly adjusting the current output by the output end is achieved.
In another exemplary embodiment of the present application, the amplitude detection circuit of the present application is described in detail, specifically: the amplitude detection circuit comprises a first field effect tube and a second field effect tube, wherein the source electrode of the first field effect tube is connected with the source electrode of the second field effect tube, the grid electrodes of the first field effect tube and the second field effect tube are used for receiving the signal to be detected, and the source electrodes of the first field effect tube and the second field effect tube are the output ends.
The embodiment specifically describes specific components of the amplitude detection circuit, namely the amplitude detection circuit comprises a first field effect transistor and a second field effect transistor, and simultaneously describes the connection relation between the first field effect transistor and the second field effect transistor so as to realize the effect of detecting the amplitude of a signal to be detected.
In another exemplary embodiment of the present application, specific types of the first field effect transistor and the second field effect transistor are described, specifically: the first field effect transistor and the second field effect transistor are deep N-well field effect transistors.
The use of the deep N-well type NMOS transistor of the present embodiment can eliminate the body effect of the fet itself.
In another exemplary embodiment of the present application, a connection manner of the first fet itself and a connection manner of the second fet itself are specifically described, which is specifically: the body end of the first field effect tube is connected with the source electrode, and the body end of the second field effect tube is connected with the source electrode.
In the embodiment, the body in the field effect transistor is connected to the source electrode, so that the body effect of the NMOS transistor is eliminated, the threshold voltage is reduced, the nonlinear problem of output voltage caused by the voltage change of the source electrode and the body terminal is eliminated, and the detection precision of the amplitude detection circuit is improved.
In another exemplary embodiment of the present application, a tank circuit is introduced into the detection circuit, specifically, the detection circuit further includes a tank circuit connected to the output terminal, for storing the current output by the output terminal.
The detection circuit in the embodiment introduces the energy storage circuit to convert the current output by the output end into electric energy for storage so as to reduce the ripple wave of the voltage output by the output end.
In another exemplary embodiment of the present application, a specific configuration of the tank circuit is described, specifically, the tank circuit includes a capacitor, and one end of the capacitor is connected to the output terminal, and the other end of the capacitor is grounded.
The embodiment further illustrates a connection mode of the capacitor in the energy storage circuit, and the capacitor is connected between the output end of the amplitude detection circuit and the ground in a bridging manner, so as to eliminate the ripple of the voltage output by the output end of the amplitude detection circuit.
According to another aspect of an embodiment of the present application, there is provided a terminal device including a voltage comparing circuit, a communication module, and a detecting circuit as set forth in any one of the above; wherein: the voltage comparison circuit is used for comparing the voltage which is output by the detection circuit and represents the amplitude of the signal to be detected with a set voltage value and outputting a comparison result to the communication module; and the communication module is used for transmitting data according to the voltage comparison result.
The terminal device in this embodiment is equipped with any one of the above detection circuits, so as to improve the detection capability of the voltage waveform of the terminal device, i.e. to detect the voltage waveform with high linearity and high accuracy. In particular to a high-speed SerDes system, the terminal equipment is utilized, a detection circuit is arranged in the terminal equipment to detect the amplitude of a voltage signal to be detected, then a voltage comparison circuit compares the voltage to be detected with a reference voltage, and a communication module returns the comparison result to the system to confirm whether data transmission can be started or not. In the technical scheme provided by the embodiment of the application, the feedback circuit generates the feedback signal indicating the current output by the adjusting output end according to the voltage output by the output end so as to adjust the current intensity of the output end, and the voltage output by the output end is positively correlated with the current output by the adjusted output end, so that the voltage output by the output end can be timely adjusted, the nonlinear distortion problem of the detection circuit is improved, and the detection precision of the detection circuit is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application as claimed.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic diagram of a prior art amplitude detection circuit.
Fig. 2 is a schematic diagram of the corresponding variation of the output voltage and the input signal.
Fig. 3 is a schematic diagram of a detection circuit according to an exemplary embodiment of the present application.
Fig. 4 is a schematic diagram of a configuration of an amplitude detection circuit according to an exemplary embodiment of the present application.
FIG. 5 is a schematic diagram of the structure of a common PMOS and NMOS transistor.
Fig. 6 is a schematic diagram of a detection circuit according to an exemplary embodiment of the present application.
Fig. 7 is a schematic diagram of corresponding changes of output voltage and input signal in an exemplary embodiment of the application.
Fig. 8 is a schematic structural view of a terminal device according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the application. Rather, they are merely examples of apparatus and methods consistent with aspects of the application as detailed in the accompanying claims.
The block diagrams depicted in the figures are merely functional entities and do not necessarily correspond to physically separate entities. That is, the functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
The flow diagrams depicted in the figures are exemplary only, and do not necessarily include all of the elements and operations/steps, nor must they be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the order of actual execution may be changed according to actual situations.
The application is described in further detail below with reference to the drawings and examples. It is specifically noted that the following examples are only for illustrating the present application, but do not limit the scope of the present application. Likewise, the following examples are only some, but not all, of the examples of the present application, and all other examples, which a person of ordinary skill in the art would obtain without making any inventive effort, are within the scope of the present application.
The terms first, second and the like in the description and in the claims and in the above-described figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the application described herein may be implemented, for example, in sequences other than those illustrated or otherwise described herein. Furthermore, in the embodiments shown in the drawings, indications of directions (such as up, down, left, right, front and rear) are used to explain the structure and movement of the various elements of the application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the position of these elements changes, the indication of these directions changes accordingly. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In the present application, the term "plurality" means two or more. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., a and/or B may represent: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
The detection accuracy of the existing detection circuit is not high, and the main reason is that the linear distortion problem is obvious. Referring to fig. 1, fig. 1 is a schematic diagram of a conventional amplitude detection circuit. Wherein, MOS (Metal Oxide Semiconductor ) transistor is used as rectifying device to detect the amplitude of the input signal to be detected. In some embodiments the MOS transistor employs a CMOS (Complementary Metal Oxide Semiconductor ) transistor as the rectifying device. Because of the limited current density of the CMOS circuit, when an input signal to be detected has a relatively obvious peak, the current detection circuit has a limited voltage rise, so that a great distortion is generated when the peak value is detected.
vip (non-inverting terminal) and vim (inverting terminal) are differential input signals, ibias is a constant current source, and when the vip voltage drops, the vim voltage rises to turn off the PMOS (P-type field effect transistor), and the current of ibias flows all through the left transistor. At this time, the PMOS is used as a source follower, and the vout voltage follows vip; at another voltage phase, the vout voltage follows vim. Throughout the period vout will follow the change in signal amplitude.
When the input signal waveform is a triangular wave, the output voltage does not linearly follow the amplitude variation of the input voltage. When the input signal waveform is a triangular wave, the relationship between the output voltage and the input voltage amplitude is as follows:
；
wherein ,for inputting the amplitude of the triangular wave signal +.>Is the technological constant of the field effect transistor, +.>For the width of the field effect transistor->For the length of the field effect transistor->Is the threshold voltage of the field effect transistor, +.>Is the tail current; the last term in the equation represents the nonlinear relationship of the output voltage vout and the input signal amplitude va. As shown in fig. 2, fig. 2 is a schematic diagram of the corresponding variation of the output voltage and the input signal. The larger the input signal amplitude, the more nonlinear the output voltage is, resulting in a lower than ideal output voltage. So that the amplitude detection precision of the detection circuit is higherLow, i.e. nonlinear distortion problems occur.
To this end, an exemplary embodiment of the present application provides a detection circuit that follows the improved principle of reducing ibias as va increases such thatBecomes an amount which is hardly changed with va so that the nonlinear term of the last term in the above formula is converted into a constant value to improve the linearity and accuracy of the detection circuit. Referring specifically to fig. 3, fig. 3 is a schematic diagram of a detection circuit according to an exemplary embodiment of the application. The detection circuit comprises an amplitude detection circuit, a feedback circuit and a current adjustment circuit. The following describes each module circuit in detail:
the amplitude detection circuit is used for detecting the amplitude of the signal to be detected and outputting voltage representing the amplitude of the signal to be detected through the output end, namely the amplitude of the signal to be detected is related to the voltage output by the output end.
The feedback circuit is used for generating a feedback signal indicating the current output by the adjustment output end according to the voltage output by the output end; wherein the voltage output by the output end is positively correlated with the current output by the adjusted output end.
And the current adjusting circuit is used for adjusting the current output by the output end according to the feedback signal so as to adjust the voltage output by the output end. For example, if the feedback signal indicates that the current output by the output terminal needs to be adjusted, the current adjustment signal adjusts the current output by itself to adjust the current of the output terminal of the amplitude detection circuit.
The application introduces the feedback circuit to dynamically adjust the current according to the amplitude of the voltage corresponding to the signal to be detected, enhances the current density of the peak part of the signal to be detected, can effectively improve the distortion problem of the voltage output by the output end and enhances the linearity of the detection circuit.
In this embodiment, the feedback circuit generates a feedback signal indicating the current output by the adjustment output end according to the voltage output by the output end, so as to adjust the current intensity of the output end.
If the voltage output by the output terminal is detected to be raised, the feedback circuit generates a corresponding feedback signal, specifically, in another exemplary embodiment of the present application, a manner in which the feedback circuit generates the feedback signal is further described, and a precondition for generating the feedback signal representing the current output by the output terminal is described as follows:
and the feedback circuit is used for generating a feedback signal representing the current output by the output end when the voltage output by the output end is detected to be increased.
For example, if the voltage output by the output terminal increases, the amplitude of the input signal to be detected increases, the feedback circuit generates a feedback signal for increasing the current output by the output terminal, and outputs the feedback signal to the current adjustment circuit, so that the current adjustment circuit adjusts the output current.
The more obvious the problem of nonlinear distortion is due to the rise of the voltage output by the output end, in this embodiment, because the voltage output by the output end is positively correlated with the current output by the adjusted output end, a feedback signal representing the current output by the output end is generated by the feedback circuit, and the voltage output by the output end is subsequently increased in a mode of adjusting the net current of the output end.
In another exemplary embodiment of the present application, elements in the current adjusting circuit are described, which are described in detail below:
the current adjusting circuit comprises a current source connected with the output end and is used for adjusting the current output to the output end according to the feedback signal so as to adjust the current output by the output end.
The present embodiment describes a specific composition structure of the current adjusting circuit, so as to adjust the current output from the output terminal according to the current output from the current source in the current adjusting circuit.
In another exemplary embodiment of the present application, a specific operation of the current source in the current adjustment circuit is described in detail below:
the direction of the current source output current is opposite to the direction of the output end output current.
And the current source is used for reducing the current output to the output end so as to increase the current output by the output end if receiving a feedback signal representing the current output by the output end.
For example, with the current direction output by the output terminal being the positive direction and the current output by the current source in the current adjustment circuit being the negative direction, the actual current output by the output terminal (i.e. the net current) =the positive current-the negative current, and if the current output by the output terminal needs to be increased, the current output by the current source to the output terminal is decreased.
According to the embodiment, the current output by the current source to the output end of the amplitude detection circuit is reduced, and the current output by the output end is increased in a simple and feasible mode, so that the effect of quickly adjusting the current output by the output end is achieved.
In another exemplary embodiment of the present application, the amplitude detection circuit of the present application is described in detail, and a MOS transistor is used as a main component of the amplitude detection circuit, so that the amplitude detection circuit can operate at an extremely high frequency. Referring specifically to fig. 4, fig. 4 is a schematic diagram of an amplitude detection circuit according to an exemplary embodiment of the present application. The following describes it in detail:
the amplitude detection circuit comprises a first field effect tube and a second field effect tube, wherein the source electrode of the first field effect tube is connected with the source electrode of the second field effect tube, the grid electrodes of the first field effect tube and the second field effect tube are used for receiving signals to be detected, and the source electrode of the first field effect tube and the source electrode of the second field effect tube are output ends.
The drains of the first field effect transistor and the second field effect transistor are respectively connected with a common power supply, the drains of the first field effect transistor and the second field effect transistor are not necessarily connected, and the drains can be respectively connected with a resistor in series and then connected with the common power supply.
The embodiment clarifies specific components of the amplitude detection circuit, namely the amplitude detection circuit comprises a first field effect transistor and a second field effect transistor, and simultaneously clarifies the connection relation between the first field effect transistor and the second field effect transistor so as to realize the function of detecting the amplitude of a signal to be detected.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a common PMOS transistor and NMOS transistor. Where D (Drain) represents the Drain, S (source) represents the source, and G (Gate) represents the Gate.
And when the grid electrode is negative voltage, the conducting channel is established.
And when the grid electrode is positive voltage, a conducting channel is established.
Further, in another exemplary embodiment of the present application, specific types of the first field effect transistor and the second field effect transistor are described, and the existing detection circuit generally adopts PMOS transistors, but unlike the field effect transistor in this embodiment, NMOS is adopted, where NMOS is turned on by a gate high level |vgs| > Vt (G potential is higher than S potential), and turned off by a low level, so that the conduction with ground can be controlled. The high level is off and can be used to control the conduction with the power supply. The following describes the NMOS in this embodiment in detail:
the first field effect transistor and the second field effect transistor are deep N-well field effect transistors. The use of the deep N-well NMOS transistor of this embodiment can eliminate the body effect of the fet itself, and reduce the ripple of the voltage output from the output terminal of the amplitude detection circuit.
Further, the field effect transistor includes three poles, namely, a source, a drain and a gate, respectively, and their connection modes are different, so that the functions thereof are also different, and in order to eliminate the body effect of the field effect transistor, in another exemplary embodiment of the present application, the connection mode of the first field effect transistor and the connection mode of the second field effect transistor are specifically described, and the following details are described:
the body end of the first field effect tube is connected with the source electrode, and the body end of the second field effect tube is connected with the source electrode.
In the embodiment, the body end and the source electrode in the field effect transistor are connected, so that the body effect of the NMOS transistor is eliminated, the threshold voltage is reduced, the nonlinear problem of output voltage caused by the voltage change of the source electrode and the body end is eliminated, and the detection precision of the amplitude detection circuit is improved.
In order to reduce the ripple of the voltage output by the output terminal, in another exemplary embodiment of the present application, the detection circuit incorporates an energy storage circuit, which is described in detail below:
the detection circuit also comprises a storage circuit connected with the output end and used for storing the current output by the output end.
Illustratively, the tank circuit converts the current output at the output terminal into electrical energy and stores the converted electrical energy, thereby reducing ripple of the voltage output at the output terminal. The tank circuit includes, but is not limited to, a storage capacitor, etc., and the embodiment is not limited to the specific configuration of the tank circuit.
In the embodiment, the energy storage circuit is introduced to convert the current output by the output end into electric energy for storage so as to reduce the ripple wave of the voltage output by the output end.
Further, in another exemplary embodiment of the present application, a specific configuration of the tank circuit is exemplarily described, and the following detailed description will be given:
the energy storage circuit comprises a capacitor, one end of the capacitor is connected with the output end, and the other end of the capacitor is grounded. Referring specifically to fig. 6, fig. 6 is a schematic diagram of a detection circuit according to an exemplary embodiment of the present application. Wherein a capacitor c1 is connected across the output terminal and ground.
In some embodiments, the deep N well and the body are connected together in a layout stage, and parasitic capacitance of the deep N well and the silicon chip substrate can be equivalent to the storage capacitance c1, so that the storage capacitance value is increased, and ripple waves of output voltage are reduced.
The embodiment further illustrates a connection mode of the capacitor in the energy storage circuit, and the capacitor is connected between the output end of the amplitude detection circuit and the ground in a bridging manner, so as to eliminate the ripple of the voltage output by the output end of the amplitude detection circuit.
In another exemplary embodiment of the present application, the function of the current adjusting circuit introduced in the present application will be described in detail with reference to fig. 6, where the current adjusting circuit introduced in the present embodiment can adjust the current output by the output terminal according to the voltage variation condition output by the output terminal of the amplitude detecting circuit. The following is a detailed description:
the whole detection circuit comprises an amplitude detection circuit formed by two deep N-well NMOS (N-channel metal oxide semiconductor) tubes, a feedback circuit, a current adjusting circuit comprising a current source and a storage capacitor c1. The output end of the amplitude detection circuit is a vout node, the output end of a current source in the current regulation circuit is connected with the vout node, and the storage capacitor c1 is connected between the vout node and the ground in a bridging way.
Due to the limited current density of CMOS circuits, when an input signal has a relatively significant spike, the voltage rise is limited for existing detection circuits, and a relatively large distortion is generated when detecting the peak. According to the embodiment, the feedback circuit is introduced to dynamically adjust the current according to the voltage amplitude of the input signal to be detected, so that the charging current density of the peak part of the input signal to be detected is enhanced, the distortion of the output voltage can be effectively relieved, and the linearity of the circuit is enhanced. The specific detection process is as follows:
the amplitude of the input signal to be detected is increased, the grid voltage of the input field effect transistor is increased, more current is injected to the vout node, the capacitor c1 converts the current into electric energy for storage, the voltage of the vout node is increased, the feedback circuit generates a feedback signal indicating the net current output by the increased vout node to the current adjusting circuit, the current source in the current adjusting circuit reduces the current output by the current source, and the net current output by the vout node is increased in a phase-changing manner because the current is opposite to the direction of the current output by the vout node, so that the voltage output by the vout node is obviously improved compared with the output voltage in the prior art. As shown in fig. 7, fig. 7 is a schematic diagram of corresponding changes of the output voltage and the input signal in the exemplary embodiment of the application. The calculation formula of the voltage output by the vout node is as follows:
；
wherein ,for inputting the amplitude of the triangular wave signal (i.e. the signal to be detected in the present application), a signal is input>Is the technological constant of the field effect transistor, +.>For the width of the field effect transistor->For the length of the field effect transistor->Is the threshold voltage of the field effect transistor, +.>Is the tail current; the last term in the equation represents the nonlinear relationship of the output voltage vout and the input signal amplitude va. In this embodiment, when va increases, the ibias is reduced so that +.>Becomes an amount which is hardly changed with va so that the nonlinear term of the last term in the formula is converted into a constant value to improve the linearity and accuracy of the detection circuit.
When the waveform amplitude of the signal to be detected is particularly large, the output signal of the existing detection circuit is severely distorted compared with the ideal state. According to the application, under the cooperation of the feedback circuit and the current adjusting circuit, when the waveform amplitude of the signal to be detected is increased, the tail current is reduced, the output voltage is improved, and better linearity and accuracy are obtained, namely, the problem of nonlinear distortion of the detecting circuit is solved, so that the detecting accuracy of the detecting circuit is improved.
In high-speed SerDes systems, a detection circuit is required to detect the amplitude of the voltage signal, then compare it with a reference voltage, and return the comparison result to the system to confirm whether the transmission of data can begin. In practical application, the output error of the existing detection circuit can cause the voltage which is output by the detection circuit and represents the amplitude of the signal to be detected to generate an error result when compared with the reference voltage, so that the working state of the system is affected. In particular, the existing detection circuit has nonlinear distortion problem, which reduces the accuracy of the voltage representing the amplitude of the signal to be detected, so that a terminal device for detecting the voltage waveform with high linearity and high precision is needed to improve the detection capability of the voltage waveform.
To this end, another aspect of the present application further provides a terminal device, as shown in fig. 8, and fig. 8 is a schematic structural diagram of the terminal device according to an exemplary embodiment of the present application. Wherein the terminal device comprises a voltage comparison circuit, a communication module and a detection circuit according to any one of the above; wherein:
and the voltage comparison circuit is used for comparing the voltage which is output by the detection circuit and represents the amplitude of the signal to be detected with a set voltage value and outputting the comparison result to the communication module.
And the communication module is used for transmitting data according to the voltage comparison result.
The terminal device in this embodiment is equipped with any one of the above detection circuits, so as to improve the detection capability of the voltage waveform of the terminal device, i.e. to detect the voltage waveform with high linearity and high accuracy.
The foregoing is merely illustrative of the preferred embodiments of the present application and is not intended to limit the embodiments of the present application, and those skilled in the art can easily make corresponding variations or modifications according to the main concept and spirit of the present application, so that the protection scope of the present application shall be defined by the claims.

Claims (7)

1. The detection circuit is characterized by comprising an amplitude detection circuit, a feedback circuit and a current adjustment circuit; wherein:
the amplitude detection circuit is used for detecting the amplitude of a signal to be detected and outputting voltage representing the amplitude of the signal to be detected through an output end, wherein if the amplitude of the signal to be detected is increased, the voltage output by the output end of the amplitude detection circuit is increased;
the feedback circuit is connected with the output end of the amplitude detection circuit and is used for generating a feedback signal for indicating the current output by the output end of the amplitude detection circuit to be increased if the voltage output by the output end of the amplitude detection circuit is detected to be increased;
the current adjusting circuit comprises a current source, wherein the output end of the current source is connected with the output end of the amplitude detection circuit and is used for reducing the current output to the output end of the amplitude detection circuit according to the feedback signal for indicating to increase the current output by the output end of the amplitude detection circuit so as to increase the current output by the output end of the amplitude detection circuit, so that the voltage which is output by the output end of the amplitude detection circuit and represents the amplitude of the signal to be detected is increased; the direction of the current output by the current source is opposite to the direction of the current output by the output end of the amplitude detection circuit;
wherein the current source reduces the current output to the output of the amplitude detection circuit according to the following formula:
wherein ,for the voltage output by the output of the amplitude detection circuit,/or->For the amplitude of the signal to be detected,for the amplitude checkMeasuring threshold voltage of field effect transistor contained in circuit, < ->、/>、/>The process constant, width and length of the field effect transistor contained in the amplitude detection circuit are respectively +.>For the current of the current source output to the output of the amplitude detection circuit, +.>Is a constant value.
2. The detection circuit of claim 1, wherein the amplitude detection circuit comprises a first field effect transistor and a second field effect transistor, a source electrode of the first field effect transistor is connected with a source electrode of the second field effect transistor, a gate electrode of the first field effect transistor and a gate electrode of the second field effect transistor are used for receiving the signal to be detected, and a source electrode of the first field effect transistor and a source electrode of the second field effect transistor are output ends of the amplitude detection circuit.
3. The detection circuit of claim 2, wherein the first fet and the second fet are deep N-well fets.
4. The detection circuit of claim 3, wherein the body terminal of the first fet is connected to the source terminal and the body terminal of the second fet is connected to the source terminal.
5. The detection circuit according to any one of claims 1 to 4, further comprising a tank circuit connected to an output of the amplitude detection circuit for storing a current output by the output of the amplitude detection circuit.
6. The detection circuit of claim 5, wherein the tank circuit comprises a capacitor having one end connected to the output of the amplitude detection circuit and the other end grounded.
7. A terminal device comprising a voltage comparison circuit, a communication module, and a detection circuit according to any one of claims 1 to 6; wherein:
the voltage comparison circuit is used for comparing the voltage which is output by the detection circuit and represents the amplitude of the signal to be detected with a set voltage value and outputting a comparison result to the communication module;
and the communication module is used for transmitting data according to the voltage comparison result.
CN202310675201.0A 2023-06-08 2023-06-08 Detection circuit and terminal equipment Active CN116401192B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310675201.0A CN116401192B (en) 2023-06-08 2023-06-08 Detection circuit and terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310675201.0A CN116401192B (en) 2023-06-08 2023-06-08 Detection circuit and terminal equipment

Publications (2)

Publication Number Publication Date
CN116401192A CN116401192A (en) 2023-07-07
CN116401192B true CN116401192B (en) 2023-09-29

Family

ID=87012776

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310675201.0A Active CN116401192B (en) 2023-06-08 2023-06-08 Detection circuit and terminal equipment

Country Status (1)

Country Link
CN (1) CN116401192B (en)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002335677A (en) * 2001-05-08 2002-11-22 Yaskawa Electric Corp Linear voltage output inverter
TW200514478A (en) * 2003-10-03 2005-04-16 Beyond Innovation Tech Co Ltd Non-linear loading boost circuit
CN101304212A (en) * 2007-05-11 2008-11-12 联咏科技股份有限公司 Voltage conversion apparatus capable of hoisting voltage conversion efficiency
US7576570B1 (en) * 2006-08-22 2009-08-18 Altera Corporation Signal amplitude detection circuitry without pattern dependencies for high-speed serial links
CN103066838A (en) * 2013-02-05 2013-04-24 深圳市华星光电技术有限公司 Power system and control method thereof
JP2015023609A (en) * 2013-07-16 2015-02-02 ローム株式会社 Ac-dc converter and control circuit thereof, power adapter, and electronic apparatus
US9209809B1 (en) * 2014-12-17 2015-12-08 Xilinx, Inc. Circuits for and methods of controlling output swing in a current-mode logic circuit
CN109213708A (en) * 2017-06-29 2019-01-15 华为技术有限公司 A kind of driver for the link transmitters that serially unstring
CN109842416A (en) * 2018-12-31 2019-06-04 武汉芯动科技有限公司 Sending device
CN111208347A (en) * 2020-03-16 2020-05-29 成都纳能微电子有限公司 High-speed differential signal amplitude detection circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7486114B2 (en) * 2006-05-17 2009-02-03 International Business Machines Corporation Signal detector with calibration circuit arrangement

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002335677A (en) * 2001-05-08 2002-11-22 Yaskawa Electric Corp Linear voltage output inverter
TW200514478A (en) * 2003-10-03 2005-04-16 Beyond Innovation Tech Co Ltd Non-linear loading boost circuit
US7576570B1 (en) * 2006-08-22 2009-08-18 Altera Corporation Signal amplitude detection circuitry without pattern dependencies for high-speed serial links
CN101304212A (en) * 2007-05-11 2008-11-12 联咏科技股份有限公司 Voltage conversion apparatus capable of hoisting voltage conversion efficiency
CN103066838A (en) * 2013-02-05 2013-04-24 深圳市华星光电技术有限公司 Power system and control method thereof
JP2015023609A (en) * 2013-07-16 2015-02-02 ローム株式会社 Ac-dc converter and control circuit thereof, power adapter, and electronic apparatus
US9209809B1 (en) * 2014-12-17 2015-12-08 Xilinx, Inc. Circuits for and methods of controlling output swing in a current-mode logic circuit
CN109213708A (en) * 2017-06-29 2019-01-15 华为技术有限公司 A kind of driver for the link transmitters that serially unstring
CN109842416A (en) * 2018-12-31 2019-06-04 武汉芯动科技有限公司 Sending device
CN111208347A (en) * 2020-03-16 2020-05-29 成都纳能微电子有限公司 High-speed differential signal amplitude detection circuit

Also Published As

Publication number Publication date
CN116401192A (en) 2023-07-07

Similar Documents

Publication Publication Date Title
US8519762B2 (en) Adjusting circuit of duty cycle and its method
CN101605114B (en) Demodulator
CN101741373B (en) Low voltage differential signal driver adaptive to various IO power supplies
US6842063B2 (en) Analog switch circuit
US7239176B2 (en) Voltage tolerant protection circuit for input buffer
CN108536206A (en) A kind of voltage regulator and voltage adjusting method
EP2824835B1 (en) Impedance component having low sensitivity to power supply variations
CN116401192B (en) Detection circuit and terminal equipment
CN108566182A (en) A kind of hysteresis comparator circuit applied to adjustable threshold voltage
US11936375B2 (en) Buffer apparatus, chip and electronic device
CN101976949B (en) Anti-interference rapid current sampling circuit based on difference structure
US20040145401A1 (en) Timing signal generating circuit and receiver circuit designed to speed up signal transmission
EP3282581B1 (en) Buffer stage and control circuit
US6894574B2 (en) CR oscillation circuit
CN103365328B (en) Voltage buffer
CN117767923A (en) Delay circuit and semiconductor device
CN108919875B (en) Enable generating circuit and its enabling control method
US10038549B1 (en) Clock and data recovery circuit
GB2327162A (en) CMOS Integrated circuit
CN106559060B (en) Process-voltage-temperature (PVT) constant continuous-time equalizer
CN106708149A (en) Buffer circuit and voltage generator using same
US20230238928A1 (en) Chopper stabilized amplifier
CN114448451B (en) Transmitter with controllable slew rate
US9065433B2 (en) Capacitor charging circuit with low sub-threshold transistor leakage current
CN113014240B (en) Control circuit of signal switch tube and analog switch circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant