CN116390635A - Nonvolatile phase-change ferroelectric transistor with multi-value storage characteristic and preparation method thereof - Google Patents
Nonvolatile phase-change ferroelectric transistor with multi-value storage characteristic and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a nonvolatile phase-change ferroelectric transistor with multi-value storage characteristic and a preparation method thereof, wherein the transistor comprises a substrate, a source electrode, a drain electrode, a dielectric layer, a ferroelectric layer, a phase-change material layer and a gate electrode layer, wherein the source electrode and the drain electrode are respectively embedded in the left side and the right side of the upper surface of the substrate; the dielectric layer, the ferroelectric layer, the phase change material layer and the gate electrode layer are sequentially arranged on the upper surface of the dielectric layer between the source electrode and the drain electrode from bottom to top; the ferroelectric layer is made of ferroelectric material with nonvolatile polarization inversion characteristic. The invention can realize nonvolatile multi-value storage through ferroelectric polarization and phase change of the material under the condition of not generating high power consumption.
Description
Technical Field
The invention belongs to the technical field of semiconductor solid-state memories, and particularly relates to a nonvolatile phase-change ferroelectric transistor with a multi-value storage characteristic and a preparation method thereof, which can realize nonvolatile multi-value storage through ferroelectric polarization and phase change of materials under the condition of not generating high power consumption.
Background
At present, artificial Intelligence (AI) is in a key stage of high-speed development in the aspects of scientific research such as neural network, brain-like calculation and the like, and has higher requirements on storage density, power consumption, speed and the like as a memory for technical support. However, conventional von neumann computing architecture systems require a hierarchical storage structure of different memories to achieve a balance of performance and capacity, but the difference in performance between different memories causes a decrease in computing power, causing a series of problems.
In the conventional binary storage scheme, each memory cell is represented by a logical value of "0" or "1", and the information storage capacity of each memory cell is 1bit. The multi-value storage is represented by two or more logical values on each storage bit. For example, 4-value storage, each of which is represented by one of logical values "00", "01", "10", and "11", in which case the information storage capacity per storage bit is 2 bits; for example, 8-value storage is performed, and each storage bit is represented by one of the logical values "000", "001", "010", "011", "100", "101", "110" and "111", and the information storage capacity per storage bit is 3 bits. Therefore, according to the actual requirement, the information storage capacity of each storage unit can be improved by 1 time or 2 times, even N times under the condition that the manufacturing process is unchanged. The multi-level memory characteristics can be realized by the multi-layer stacked phase-change films, the heterojunction structure, the change of the voltage input direction and the special programming operation mode.
The Flash memory utilizes different programming voltages or programming time to change the quantity of stored charges on the memory layer, and a plurality of different threshold voltages are obtained. The threshold voltage range of the cell can be determined by reading the current value of the memory cell, and thus the stored multi-bit value can be determined. In order to accurately read information stored in a multi-valued cell, there should be a sufficient spacing between threshold voltages of different program states.
The ferroelectric gate field effect transistor can induce threshold voltage drift through polarization of the ferroelectric layer, and information '0' and '1' are stored. While different remnant polarization states are achieved with different pulse widths and amplitudes at different gates. At present, a layer of uniform ferroelectric film is formed on a channel, and under different gates, the ferroelectric film has different domain inversion numbers and different threshold voltages of transistors, so that multi-value storage is realized.
The multi-value storage is realized through a plurality of storage modes, and the material with two storage performances or the composite material formed by the two materials with the storage performances has the potential of multi-value storage. For example, a multi-value memory device made of a magnetoelectric composite material, the working principle of which is to realize writing of signals '0', '1' by changing the magnetization state of a ferromagnetic layer, and meanwhile, ferroelectric materials can maintain stable polarization states after an applied electric field is removed, and the remnant polarization can realize storage of '0', '1' information. The two storage modes are coupled to realize multi-bit information writing through an external voltage, so that the multi-value storage characteristic is achieved.
As is known, there are mainly two methods for obtaining a high density memory device: (1) The size of the device is further reduced, more device units are integrated in a unit volume, so that the storage density is improved, but the method has higher requirements on the preparation process of the device, and meanwhile, the process cost is greatly increased, and the current chip enterprises mainly adopt the method to update; (2) By adopting a multi-value storage method, a unit device can store a plurality of data, so that the storage density can be doubled.
In Flash memory applications, although the amount of charge stored on the memory layer can be changed by using different programming voltages and times to obtain a plurality of threshold voltages to realize multi-value storage, the distribution range allowed by each threshold voltage is narrow and the allowable spacing between different threshold voltages is small when multi-value storage of 3 bits or more is realized due to the limitation of the total threshold voltage distribution range of the memory cell, so that overlapping easily occurs between the plurality of threshold voltages of the multi-value cell, and the read-out circuit can hardly distinguish stored bits.
In the prior art, the ferroelectric gate field effect transistor is used for realizing multi-value storage by applying different gates, the number of domain inversion in a ferroelectric film is different, and the threshold voltages of the transistors are different. Due to the increase of the gate voltage, the polarization state is also continuous, when the storage state is increased, the difference between each state is inevitably small, when the device is tired or is interfered by other factors, the problem of data reading error can occur, and the reliability of the device is reduced.
For the mode of realizing multi-value storage through a plurality of storage modes, for the magnetoelectric composite material, a larger working voltage is required to change the magnetization state of the ferromagnetic layer, and the power consumption is larger. Meanwhile, when the ferroelectric material is in a fatigue state, the preparation process is not stable enough and disturbance factors appear in the working environment, the multi-value storage reliability of the device can be affected by uncontrollable factors, and reading errors are caused.
Disclosure of Invention
In order to solve the above-mentioned problems existing in the prior art, the present invention provides a nonvolatile phase-change ferroelectric transistor having a multi-value memory characteristic. The technical problems to be solved by the invention are realized by the following technical scheme:
an aspect of the present invention provides a nonvolatile phase-change ferroelectric transistor having a multi-value storage characteristic, including a substrate, a source electrode, a drain electrode, a dielectric layer, a ferroelectric layer, a phase-change material layer, and a gate electrode layer, wherein,
the source electrode and the drain electrode are respectively embedded in the left side and the right side of the upper surface of the substrate;
the dielectric layer, the ferroelectric layer, the phase change material layer and the gate electrode layer are sequentially arranged on the upper surface of the dielectric layer between the source electrode and the drain electrode from bottom to top;
the ferroelectric layer is made of ferroelectric material with nonvolatile polarization inversion characteristic.
In one aspect of the inventionIn an embodiment, the material of the phase change material layer is VO 2 、V 2 O 5 Synthetic material of germanium, antimony, tellurium (GST) or antimony ditelluride (Sb) 2 Te 3 )。
In one embodiment of the invention, the phase change material layer has a thickness of 0.5-50nm.
In one embodiment of the present invention, the ferroelectric layer is made of SrBi 2 Ta 2 O 9 Ferroelectric phase HfO 2 、BaTiO 3 、PbZr x Ti 1-x O 3 。
In one embodiment of the invention, the ferroelectric layer has a thickness of 1-50nm.
In one embodiment of the invention, the material of the dielectric layer is Al 2 O 3 、SiO 2 、HfO 2 Or ZrO(s) 2 The thickness is 0.3-5nm, and the material of the gate electrode layer is doped polysilicon, tiN, taN, ni, ti, cu, W, au or Pt.
Another aspect of the present invention provides a method for manufacturing a nonvolatile phase-change ferroelectric transistor having a multi-value storage characteristic, for manufacturing the nonvolatile phase-change ferroelectric transistor according to any one of the above embodiments, the method comprising:
selecting a substrate;
forming a channel on the substrate, and forming a source electrode and a drain electrode on two sides of the upper surface of the channel respectively;
forming a dielectric layer on the upper surface of the channel between the source electrode and the drain electrode;
forming a ferroelectric layer on the dielectric layer;
forming a phase change material layer on the ferroelectric layer;
a metal gate electrode formed on the phase change material layer;
the ferroelectric layer and the phase change material layer are formed into a microstructure having ferroelectric properties and phase change properties by rapid thermal annealing.
A further aspect of the present invention provides a method for reading from and writing to a nonvolatile phase change ferroelectric transistor having multi-valued memory characteristics as in any one of the above embodiments, comprising:
when the gate voltage V of the ferroelectric transistor GS ＞V p1 The phase change material layer is phase-changed from high resistance state to low resistance state, and when the phase change material layer is in low resistance state, the gate voltage V GS Respectively at V f1 、V f2 The ferroelectric layer is polarized in the directions of the channel and the gate electrode respectively, and the threshold voltages corresponding to the transistors are V respectively th1 、V th2 Wherein V is p1 A first threshold voltage for phase-changing the phase-change material layer; v (V) f1 And V f2 Respectively two states of the grid voltage when the phase change material layer is in a low resistance state; v (V) th1 And V th2 Threshold voltages when the ferroelectric layer is polarized up and down respectively;
when the ferroelectric transistor gate voltage V GS ＜V p2 The phase change material changes phase from low resistance state to high resistance state, and when the phase change material layer is in the high resistance state, the gate voltage V GS Respectively at V f3 、V f4 The ferroelectric layer is polarized in the directions of the channel and the gate electrode respectively, and the threshold voltages corresponding to the transistors are V respectively th3 、V th4 Wherein V is p2 A second threshold voltage for phase-changing the phase-change material layer; v (V) f3 And V f4 Respectively two states of the grid voltage when the phase change material layer is in a low resistance state; v (V) th3 And V th4 The threshold voltages at which the ferroelectric layer is polarized up and down, respectively.
In one embodiment of the invention, the threshold voltage V of the transistor corresponds to th1 ＜V th2 ＜V th3 ＜V th4 And do not overlap each other.
In one embodiment of the invention, V p1 ＞V f1 、V f2 、V f3 、V f4 And V is p2 ＜V f1 、V f2 、V f3 、V f4 。
Compared with the prior art, the invention has the beneficial effects that:
1. compared with other ferroelectric transistor technologies, the nonvolatile phase-change ferroelectric transistor with the polymorphic storage characteristic provided by the invention has the advantages that pulse voltage is applied to a heterostructure formed by a ferroelectric layer and a phase-change material layer, spontaneous polarization of the ferroelectric material is nonvolatile, the ferroelectric material can be maintained at an interface after an external electric field is removed, when the external electric field exceeds a coercive field, the polarization state of a ferroelectric single crystal substrate can be modulated, and further, the concentration of carriers in the phase-change layer is regulated and controlled, so that a larger change rate between high resistance state and low resistance state is obtained. The multi-value storage function is realized, and meanwhile, the power consumption and the production cost can be reduced.
2. According to the invention, the phase-change ferroelectric heterostructure is constructed by combining the ferroelectric material and the phase-change material, so that the ferroelectric interface can be improved to a certain extent compared with other ferroelectric film technologies, the interface defect is reduced, and the performance of the ferroelectric material is improved.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic structural diagram of a nonvolatile phase-change ferroelectric transistor with multi-value storage characteristics according to an embodiment of the present invention;
FIG. 2 is a flowchart of a method for fabricating a nonvolatile phase-change ferroelectric transistor with multi-valued memory characteristics according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a process for fabricating a nonvolatile phase change ferroelectric transistor with multi-valued memory characteristics according to an embodiment of the present invention;
FIG. 4 is an I-V curve test chart of a phase change material according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a read-write principle of a nonvolatile phase-change ferroelectric transistor with multi-value storage characteristics according to an embodiment of the present invention.
Reference numerals illustrate:
1-a substrate; 2-source electrode; 3-drain electrode; 4-a dielectric layer; a 5-ferroelectric layer; 6-a phase change material layer; 7-gate electrode layer.
Detailed Description
In order to further explain the technical means and effects adopted by the invention to achieve the preset aim, the following describes a nonvolatile phase-change ferroelectric transistor with multi-value storage characteristic according to the invention in detail with reference to the attached drawings and the detailed description.
The foregoing and other features, aspects, and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments when taken in conjunction with the accompanying drawings. The technical means and effects adopted by the present invention to achieve the intended purpose can be more deeply and specifically understood through the description of the specific embodiments, however, the attached drawings are provided for reference and description only, and are not intended to limit the technical scheme of the present invention.
It should be noted that in this document relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises the element.
Example 1
Referring to fig. 1, fig. 1 is a schematic structural diagram of a nonvolatile phase-change ferroelectric transistor with multi-value memory characteristics according to an embodiment of the present invention. The nonvolatile phase-change ferroelectric transistor comprises a substrate 1, a source electrode 2, a drain electrode 3, a dielectric layer 4, a ferroelectric layer 5, a phase-change material layer 6 and a gate electrode layer 7, wherein the source electrode 2 and the drain electrode 3 are respectively embedded in the left side and the right side of the upper surface of the substrate 1; the dielectric layer 4, the ferroelectric layer 5, the phase change material layer 6 and the gate electrode layer 7 are sequentially arranged on the upper surface of the dielectric layer 4 between the source electrode 2 and the drain electrode 3 from bottom to top; the ferroelectric layer 5 is made of a ferroelectric material having a nonvolatile polarization inversion characteristic.
The substrate 1 of this embodiment is made of p-type silicon material, and the source electrode 2 and the drain electrode 3 are formed by ion implantation on the left and right sides of the upper surface of the substrate 1. The material of the dielectric layer 4 is Al 2 O 3 、HfO 2 Or ZrO, etc. The ferroelectric layer 5 is required to be made of a ferroelectric material having a nonvolatile polarization inversion property, and has a thickness of 1-50nm, including but not limited to SrBi 2 Ta 2 O 9 Ferroelectric phase HfO 2 、BaTiO 3 、PbZr x Ti 1-x O 3 Etc.
Further, the phase change material layer 6 of the present embodiment is VO 2 The thickness of the phase change material layer 6 is 0.5-50nm; the material mainly focuses on that the electrical properties of the material can be greatly changed before and after phase change, including but not limited to VO 2 、V 2 O 5 Synthetic material of germanium, antimony and tellurium (GST), antimony ditelluride (Sb) 2 Te 3 ) Etc. The ferroelectric layer 5 and the phase change material layer 6 are in a crystalline state.
The material of the gate electrode layer 7 is a high conductive material such as doped polysilicon, tiN, taN, ni, ti, cu, W, au or Pt.
By applying pulse voltage to the grid electrode (heterostructure) of the transistor, spontaneous polarization of the ferroelectric layer material is nonvolatile, the ferroelectric layer material can be kept at the interface of the ferroelectric layer material and the phase change material of the phase change material layer after the external electric field is removed, when the external electric field exceeds the ferroelectric coercive field, the polarization state of the ferroelectric single crystal substrate can be modulated, and further the carrier concentration in the phase change material layer is regulated and controlled, so that a larger change rate between high resistance state and low resistance state is obtained.
The specific read-write mode is as follows:
when the gate voltage V of the ferroelectric transistor GS ＞V p1 The phase change material layer is phase-changed from high resistance state to low resistance state, and when the phase change material layer is in low resistance state, the gate voltage V GS Respectively at V f1 、V f2 The ferroelectric layer is polarized in the directions of the channel and the gate electrode respectively, and the threshold voltages corresponding to the transistors are V respectively th1 、V th2 Wherein V is p1 To cause the phase change material layer to undergo a phase changeA first threshold voltage; v (V) f1 And V f2 Respectively two states of the grid voltage when the phase change material layer is in a low resistance state; v (V) th1 And V th2 Threshold voltages when the ferroelectric layer is polarized up and down respectively;
when the ferroelectric transistor gate voltage V GS ＜V p2 The phase change material changes phase from low resistance state to high resistance state, and when the phase change material layer is in the high resistance state, the gate voltage V GS Respectively at V f3 、V f4 The ferroelectric layer is polarized in the directions of the channel and the gate electrode respectively, and the threshold voltages corresponding to the transistors are V respectively th3 、V th4 Wherein V is p2 A second threshold voltage for phase-changing the phase-change material layer; v (V) f3 And V f4 Respectively two states of the grid voltage when the phase change material layer is in a low resistance state; v (V) th3 And V th4 Respectively, threshold voltages of ferroelectric layers when polarized up and down, where V th1 ＜V th2 ＜V th3 ＜V th4 And do not overlap each other. V (V) p1 ＞V f1 、V f2 、V f3 、V f4 And V is p2 ＜V f1 、V f2 、V f3 、V f4 。
Compared with other ferroelectric heterojunction technologies, the nonvolatile phase change ferroelectric heterojunction with the polymorphic storage characteristic provided by the invention has the advantages that pulse voltage is applied to the heterostructure, spontaneous polarization of a ferroelectric material is nonvolatile, the ferroelectric material can be maintained at an interface after an external electric field is removed, when the external electric field exceeds a coercive field, the polarization state of a ferroelectric single crystal substrate can be modulated, and further, the concentration of carriers in a phase change layer is regulated and controlled, so that a larger change rate between high resistance state and low resistance state is obtained. The multi-value storage function is realized, and meanwhile, the power consumption and the production cost can be reduced.
Example two
On the basis of the first embodiment, the present embodiment provides a method for preparing a nonvolatile phase-change ferroelectric transistor with multi-value storage characteristics, for preparing the nonvolatile phase-change ferroelectric transistor according to the first embodiment, referring to fig. 2 and 3, the method includes:
s1: selecting a substrate
Specifically, a P-type Si (100) substrate 1 is selected and the surface of the substrate 1 is cleaned, as shown in fig. 3 (a).
S2: a channel is formed on the substrate, ion implantation is performed on two sides of the upper surface of the channel, and a source electrode 2 and a drain electrode 3 are respectively formed.
Preferably, the ion implantation has an energy of 100keV and a dose of 1×10 14 cm -2 As shown in fig. 3 (b). In other embodiments, the substrate may be a semiconductor substrate, and the upper surface of the substrate may be a channel.
S3: a dielectric layer 4 is formed on the upper surface of the substrate between the source electrode 2 and the drain electrode 3, and the material of the dielectric layer 4 is Al 2 O 3 、HfO 2 Or ZrO, etc., as shown in fig. 3 (c).
S4: forming a ferroelectric layer 5 on the dielectric layer 4
The ferroelectric layer 5 needs to be made of a ferroelectric material having a nonvolatile polarization inversion characteristic. Specifically, hf is formed on the dielectric layer 4 with a thickness of 1-50nm by atomic layer deposition 0.5 Zr 0.5 O 2 Ferroelectric layer 5, as shown in FIG. 3 (d), wherein the metallic hafnium organic source, the metallic zirconium organic source and the oxygen source are respectively TDMA-Hf, TDMA-Zr and H 2 O, deposition temperature was 270 ℃. In other embodiments, the ferroelectric layer 5 material is selected from the group consisting of, but not limited to, srBi 2 Ta 2 O 9 Ferroelectric phase HfO 2 、BaTiO 3 、PbZr x Ti 1-x O 3 Etc.
In practice, the state of carriers in the phase change material layer is regulated and controlled through polarization of the ferroelectric layer, so that the phase change behavior of the phase change material layer is regulated and controlled, and meanwhile, the multi-value storage function is achieved. The formation and disappearance of defects, such as interfacial oxygen vacancies, at the ferroelectric/phase change heterostructure interface, which inevitably have an effect on the polarization of the ferroelectric layer to some extent.
S5: forming a phase change material layer 6 on the ferroelectric layer 5
In particular, on the ferroelectric layer 5An atomic layer deposition process forms a phase-change material layer VO with the thickness of 0.5-50 2 As shown in FIG. 3 (e), wherein the metal vanadium source and the water source are triisopropoxylated vanadium oxide and H, respectively 2 O. The material of the phase change material layer 6 mainly focuses on that the electrical properties of the material can be changed greatly before and after phase change, including but not limited to VO 2 、V 2 O 5 Synthetic material of germanium, antimony and tellurium (GST), antimony ditelluride (Sb) 2 Te 3 ) Etc.
It should be noted that, the basic principles of the methods for preparing the ferroelectric layer 5 and the phase change material layer 6 may be pulse laser deposition, sol-gel method, chemical vapor deposition, atomic layer deposition, magnetron sputtering, etc. as the growth mode that makes the material self-limit.
S6: performing rapid thermal annealing in a protective atmosphere to crystallize the ferroelectric layer 5 and the phase change material layer 6;
specifically, at N 2 Annealing is performed in an atmosphere at a temperature of 450 ℃/30s to crystallize the ferroelectric layer 5 and the phase change material layer 6.
S7: a metal gate electrode 7 formed on the phase change material layer 6.
Specifically, an electrode layer 7 is formed on the phase change material layer 6 by magnetron sputtering, as shown in fig. 3 (f). Materials that may be selected for the metal gate electrode 7 include, but are not limited to: doped polysilicon, tiN, taN, ni, ti, cu, W, au or Pt and other highly conductive materials.
It should be noted that the two steps of forming the metal gate electrode and rapid thermal annealing may be permuted according to the material and device process requirements.
Referring to fig. 4, fig. 4 is an I-V curve test chart of a phase change material according to an embodiment of the invention. When voltage is applied to the phase-change material layer of the ferroelectric/phase-change heterostructure, the current of the phase-change material is increased instantaneously when the voltage of the phase-change material reaches a certain voltage, which indicates that the material changes phase under the action of the voltage, the resistivity is reduced, and the material changes from a high-resistance state to a low-resistance state. Based on this idea, a current signal which is generated in the high-low resistance state can be defined as two states for use in the multi-value storage.
Referring to fig. 5, fig. 5 is a schematic diagram of a ferroelectric material according to an embodiment of the present invention. It is readily apparent from fig. 5 that the remnant polarization of the ferroelectric material will also change when different voltages are applied. Meanwhile, the rectangle degree and symmetry of the curve are also good, and the nonvolatile polarization characteristic and polarization state of the curve can be well applied to multi-value storage.
Compared with other ferroelectric transistor technologies, the invention can apply pulse voltage to heterostructure, the spontaneous polarization of ferroelectric material is nonvolatile, can be kept at interface after external electric field is removed, and when the external electric field exceeds coercive field, the polarization state of ferroelectric monocrystal substrate can be modulated, thus realizing the regulation and control of carrier concentration in phase change layer, and further obtaining larger change rate between high and low resistance states. The multi-value storage function is realized, and meanwhile, the power consumption and the production cost can be reduced.
In the several embodiments provided in the present invention, it should be understood that the apparatus and method disclosed in the present invention may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted or not performed.
In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each module may exist alone physically, or two or more modules may be integrated into one module. The integrated modules may be implemented in hardware or in hardware plus software functional modules.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (10)
1. A nonvolatile phase-change ferroelectric transistor with multi-value storage characteristics is characterized by comprising a substrate (1), a source electrode (2), a drain electrode (3), a dielectric layer (4), a ferroelectric layer (5), a phase-change material layer (6) and a gate electrode layer (7), wherein,
the source electrode (2) and the drain electrode (3) are respectively embedded in the left side and the right side of the upper surface of the substrate (1);
the dielectric layer (4), the ferroelectric layer (5), the phase change material layer (6) and the gate electrode layer (7) are sequentially arranged on the upper surface of the dielectric layer (4) between the source electrode (2) and the drain electrode (3) from bottom to top;
the ferroelectric layer (5) is made of a ferroelectric material having a nonvolatile polarization inversion characteristic.
2. Nonvolatile phase-change ferroelectric transistor with multi-valued memory characteristics according to claim 1, characterized in that the material of said phase-change material layer (6) is VO 2 、V 2 O 5 Synthetic materials of germanium, antimony, tellurium or antimony ditelluride.
3. The non-volatile phase-change ferroelectric transistor with multi-value storage characteristics according to claim 1, characterized in that the thickness of the phase-change material layer (6) is 0.5-50nm.
4. A non-volatile phase-change ferroelectric transistor with multi-valued memory characteristics according to claim 1, characterized in that the material of the ferroelectric layer (5) is selected from SrBi 2 Ta 2 O 9 Ferroelectric phase HfO 2 、BaTiO 3 、PbZr x Ti 1-x O 3 。
5. A non-volatile phase change ferroelectric transistor with multi-valued storage characteristics according to claim 1, characterized in that the ferroelectric layer (5) has a thickness of 1-50nm.
6. The non-volatile phase-change ferroelectric transistor with multi-value storage characteristics according to claim 1, characterized in that the material of the dielectric layer (4) is Al 2 O 3 、SiO 2 、HfO 2 Or ZrO(s) 2 The thickness is 0.3-5nm, and the material of the gate electrode layer (7) is doped polysilicon, tiN, taN, ni, ti, cu, W, au or Pt.
7. A method for manufacturing a nonvolatile phase-change ferroelectric transistor having a multi-value storage characteristic, characterized by being used for manufacturing the nonvolatile phase-change ferroelectric transistor according to any one of claims 1 to 6, the method comprising:
selecting a substrate;
forming a channel on the substrate, and forming a source electrode and a drain electrode on two sides of the upper surface of the channel respectively;
forming a dielectric layer on the upper surface of the channel between the source electrode and the drain electrode;
forming a ferroelectric layer on the dielectric layer;
forming a phase change material layer on the ferroelectric layer;
forming a metal gate electrode on the phase change material layer;
the ferroelectric layer and the phase change material layer are formed into a microstructure having ferroelectric properties and phase change properties by rapid thermal annealing.
8. A read-write method of a nonvolatile phase change ferroelectric transistor having a multi-value storage characteristic as claimed in any one of claims 1 to 6, comprising:
when the gate voltage V of the ferroelectric transistor GS ＞V p1 The phase change material layer is phase-changed from high resistance state to low resistance state, and when the phase change material layer is in low resistance state, the gate voltage V GS Respectively at V f1 、V f2 Polarizing the ferroelectric layers to direct to the channelsAnd the direction of the gate electrode, the threshold voltages corresponding to the transistors are V th1 、V th2 Wherein V is p1 A first threshold voltage for phase-changing the phase-change material layer; v (V) f1 And V f2 Respectively two states of the grid voltage when the phase change material layer is in a low resistance state; v (V) th1 And V th2 Threshold voltages when the ferroelectric layer is polarized up and down respectively;
when the ferroelectric transistor gate voltage V GS ＜V p2 The phase change material changes phase from low resistance state to high resistance state, and when the phase change material layer is in the high resistance state, the gate voltage V GS Respectively at V f3 、V f4 The ferroelectric layer is polarized in the directions of the channel and the gate electrode respectively, and the threshold voltages corresponding to the transistors are V respectively th3 、V th4 Wherein V is p2 A second threshold voltage for phase-changing the phase-change material layer; v (V) f3 And V f4 Respectively two states of the grid voltage when the phase change material layer is in a low resistance state; v (V) th3 And V th4 The threshold voltages at which the ferroelectric layer is polarized up and down, respectively.
9. The method for reading and writing a nonvolatile phase-change ferroelectric transistor with multi-valued memory characteristics according to claim 8, wherein V th1 ＜V th2 ＜V th3 ＜V th4 And do not overlap each other.
10. The method for reading and writing a nonvolatile phase-change ferroelectric transistor with multi-valued memory characteristics according to claim 8, wherein V p1 ＞V f1 、V f2 、V f3 、V f4 And V is p2 ＜V f1 、V f2 、V f3 、V f4 。
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