CN115482859A - Data storage structure and data storage method - Google Patents
Data storage structure and data storage method Download PDFInfo
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- CN115482859A CN115482859A CN202110662604.2A CN202110662604A CN115482859A CN 115482859 A CN115482859 A CN 115482859A CN 202110662604 A CN202110662604 A CN 202110662604A CN 115482859 A CN115482859 A CN 115482859A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention provides a data storage structure and a data storage method, wherein the data storage structure comprises: the ferroelectric capacitor comprises a first electrode, a second electrode and a ferroelectric material positioned between the first electrode and the second electrode, wherein the first electrode, the ferroelectric material and the second electrode form a ferroelectric capacitor, and the ferroelectric capacitor comprises: the first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage. According to the data storage structure and the data storage method provided by the invention, the oxygen ions of the first electrode are ensured to be injected into the ferroelectric material or return to the first electrode under the action of voltage, so that the regulation and control of oxygen vacancies in the ferroelectric material can be realized, thereby realizing the multi-value storage related to saturation polarization, the programming and self-recovery of ferroelectricity, and effectively improving the breakdown electric field of the ferroelectric material.
Description
Technical Field
The invention relates to the technical field of data storage, in particular to a data storage structure and a data storage method.
Background
The memory is an indispensable important component in modern electronic equipment, and particularly, the development of digital information technology brings people into a big data era, and a large amount of data is collected, stored, searched, shared and analyzed at any time. The rapid development of autonomous vehicles, airplanes, internet of things and portable wearable devices makes the rapid storage, reading and processing of information critical, and the demand for high-speed, high-density and low-power memory is more urgent. The memory is divided into volatile and nonvolatile memory according to the storage mode of information. SRAM and DRAM are volatile memories, which have high read-write speed but limited size reduction, and the stored information disappears after power-off; the nonvolatile memory can still keep information after power is off, and has important application in high-density embedded storage.
Main nonvolatile memory devices such as Phase Change Memories (PCMs), magnetoresistive Random Access Memories (MRAMs), resistive Random Access Memories (RRAMs), and ferroelectric memories have a long history of development, have been widely used in the field of embedded memories, and have recently been used in the fields of neuromorphic calculations, memory integration, and the like. The RRAM generally utilizes the formation and the breakage of an internal conductive channel to control the switching characteristic of a device, has low energy consumption, simple structure and larger resistance variation range, but the formation and the breakage of the conductive channel have randomness, thereby bringing the problems of reliability and performance difference between devices; the PCM uses the resistance difference of the phase change material between the crystalline phase and the amorphous phase to realize the nonvolatile storage of information, has high switching speed and strong durability, but needs larger current to convert the crystalline phase into the amorphous phase, has large power consumption, relates to the problem of amorphous stability, and can possibly challenge the stability of a high-resistance state; MRAM uses tunneling magnetoresistance to store information, has fast read speed and high durability, but requires large write energy and has poor retention performance. The ferroelectric memory realizes information storage by utilizing nonvolatile polarization of ferroelectric materials and has the characteristics of high read-write speed, low power consumption, irradiation resistance, high reliability and the like. Although ferroelectric memories based on conventional ferroelectric materials have been practically applied in the fields of embedded storage, radio frequency identification, and the like, the defects of the conventional ferroelectric materials in terms of process compatibility and high-density integration limit the further development of ferroelectric memory technology. The emergence of ferroelectric hafnium oxide has raised the heat trend of ferroelectric memory again, because it has good CMOS compatibility and expandability, can still keep ferroelectric below 10nm of thickness, have good application potential in the field of embedded memory.
Ferroelectric memory utilizes the remanent polarization of ferroelectric materials to achieve nonvolatile storage of information, and mainly includes two types: ferroelectric random access memory (FE-RAM) and ferroelectric field effect transistor (FE-FET). The FE-RAM structure is similar to the traditional DRAM, except that the MIM ferroelectric capacitor is used to replace the ordinary dielectric capacitor, after power is off, the data can still be kept by the remanent polarization of the ferroelectric material, and the pre-stored data can be read for many times without extra refreshing. However, the area of the memory cell is large, and the area of the MIM ferroelectric capacitor needs to be reduced to improve the integration density, but the stored charges are reduced, which affects the reading of information. In order to improve the storage density, a three-dimensional ferroelectric HZO capacitor device oriented to FE-RAM application is developed to improve the charge storage capacity per unit area; the FE-FET directly integrates the ferroelectric material into the field effect transistor, and utilizes the ferroelectric polarization to regulate the threshold voltage of the transistor, thereby generating a larger memory window to realize the storage of information, and the FE-FET with the gate length of 30nm and 22nm is prepared on the advanced process. However, FE-FETs have durability problems, typically 10 4 -10 6 After the next erase cycle, the memory window disappears or breaks down. Although some methods for improving the durability are proposed, for example, inserting an additional metal layer between the ferroelectric layer and the gate oxide layer can increase the erasing times, the gate leakage current problem is also caused; in addition, the area ratio of the ferroelectric layer to the oxide layer is controlled, so that the performance deterioration of the oxide layer can be weakened by reducing the partial pressure of the oxide layer, but the improvement degree of the durability is limited. Therefore, how to improve the cycling endurance of the FE-FET is still an urgent problem to be solved.
Another advantage of ferroelectric memory technology is that it can achieve multi-valued storage. The realization of multi-value storage based on ferroelectric hafnium oxide at present mainly depends on the gradual turnover of numerous ferroelectric domains in ferroelectric hafnium oxide. Under the stimulation of continuous pulses, the ferroelectric domain is gradually turned over and has an accumulation effect, and the channel is continuously modulated by utilizing the characteristic to realize multi-value storage. The multi-value storage has great significance in the aspect of multi-bit storage and has wide application prospect in the aspect of neuromorphic calculation. The FE-FET can be used as synapse, and the ferroelectric polarization in the FE-FET is gradually reversed by utilizing the grid pulse, so that the modulation of threshold voltage is realized, the channel conductance is influenced, and the channel conductance is analogized to the weight of the nerve synapse; matrix-vector multiplication (MVM) is a basic operation in the neural network, in-situ calculation of stored information can be realized by using the FE-FETs, the neural network calculation is accelerated, and the method has great application potential in the aspect of storage and calculation integration. However, in the case of the ferroelectric hafnium oxide, the action of continuous pulses or strong electric fields may move oxygen vacancies or generate new oxygen vacancies, resulting in pinning of ferroelectric domains, thereby deteriorating ferroelectricity, causing fatigue or aging effects; moreover, under the action of the strong electric field, the hafnium oxide can be punctured, so that the device fails and has no self-recovery capability; in addition, the multi-value storage depends on the polycrystalline multi-domain characteristics of the ferroelectric hafnium oxide, and as the size is reduced, the number of ferroelectric domains is reduced and even changed into a single domain, and the multi-value storage is difficult to realize.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a data storage structure and a data storage method.
The invention provides a data storage structure, comprising: a first electrode, a second electrode, and a ferroelectric material located between the first electrode and the second electrode, the first electrode, the ferroelectric material, and the second electrode constituting a ferroelectric capacitor, wherein: the first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage.
According to a data storage structure provided by the invention, the data storage structure further comprises a switching transistor, wherein the drain electrode of the switching transistor is connected with the first electrode or the second electrode of the ferroelectric capacitor; the ferroelectric capacitor and the switching transistor constitute a memory cell.
According to a data storage structure provided by the invention, the data storage structure comprises a word line, a bit line and a plurality of storage units; the bit lines comprise a first bit line and a second bit line; wherein: the word line is connected with the gates of the switching transistors of the plurality of memory cells; the first bit line connects the second electrodes of the ferroelectric capacitors of the plurality of memory cells when the drain of the switching transistor is connected to the first electrode of the ferroelectric capacitor; the first bit line is connected to the first electrodes of the ferroelectric capacitors of the plurality of memory cells when the drain of the switching transistor is connected to the second electrode of the ferroelectric capacitor; the second bit line connects sources of the switching transistors of the plurality of the memory cells.
The present invention also provides a data storage structure comprising: a ferroelectric field effect transistor, wherein: the gate of the ferroelectric field effect transistor comprises a first electrode, the gate stack of the ferroelectric field effect transistor comprises a ferroelectric material; or, a gate of the ferroelectric field effect transistor comprises the first electrode, a gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and a second electrode; the first electrode, the ferroelectric material and the second electrode are adjacent in sequence; or, a gate of the ferroelectric field effect transistor comprises the second electrode, a gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and the first electrode; the second electrode, the ferroelectric material and the first electrode are adjacent in sequence; the first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage.
According to the data storage structure provided by the invention, the data storage structure comprises a word line, a source line, a drain line and a plurality of ferroelectric field effect transistors; wherein: the word line is connected to the gates of the plurality of the ferroelectric field effect transistors, the source line is connected to the sources of the plurality of the ferroelectric field effect transistors, and the drain line is connected to the drains of the plurality of the ferroelectric field effect transistors.
According to the data storage structure provided by the invention, the data storage structure comprises two identical ferroelectric field effect transistors which are respectively a first ferroelectric field effect transistor and a second ferroelectric field effect transistor; wherein: the drains of the first and second ferroelectric field effect transistors are connected as an ML line, and the gates of the first and second ferroelectric field effect transistors are connected to an SL line and
and the source electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are connected in parallel and are grounded, and the substrates of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are separated by an isolation insulating region.
The invention also provides a data storage method, which comprises the following steps: changing the polarization strength of the ferroelectric material by injecting or discharging oxygen vacancies in the ferroelectric material by applying a voltage pulse to the first electrode; and realizing multi-value storage according to the polarization intensity of the ferroelectric material.
The invention also provides a data storage method, which comprises the following steps: during the writing period, a memory cell to be written is selected, after a voltage control switch transistor on a word line is started, negative maximum voltage is applied to a bit line to erase the original state, positive voltage or negative voltage with different magnitudes is applied to change the polarization state of a ferroelectric capacitor through the movement of an oxygen vacancy, so that the ferroelectric capacitor stores different charges, and multi-valued data are written into the memory cell; during reading, the memory cell to be read is selected, after the voltage on the word line controls the switching transistor to be started, a negative voltage larger than a preset voltage threshold value is applied to the bit line, and the multi-valued data of the memory cell is read according to the size of the reversing current on the bit line.
The invention also provides a data storage method, which comprises the following steps: during writing, a ferroelectric field effect transistor to be written is selected, the source line and the drain line are grounded, negative maximum voltage is applied to the word line to erase the original state, then positive voltage or negative voltage with different magnitudes is applied, the polarization state of the ferroelectric field effect transistor is changed through the movement of oxygen vacancies, the resistance value of a channel is further changed, and multi-valued data writing is realized; during reading, the ferroelectric field effect transistor to be read is selected, voltage is applied to the source electrode line, current is extracted from the drain electrode line, and reading of multi-value data is achieved.
The invention also provides a data storage method, which comprises the following steps: applying a voltage to a first electrode of a first ferroelectric field effect transistor and/or a second ferroelectric field effect transistor changes a polarization of a ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor; and adjusting the threshold voltage of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor according to the polarization strength of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor to obtain different storage intervals.
According to the data storage structure and the data storage method provided by the invention, the oxygen ions of the first electrode are injected into the ferroelectric material or return to the first electrode under the action of voltage, so that the regulation and control of oxygen vacancies in the ferroelectric material can be realized, thereby realizing multi-value storage related to saturation polarization, programming and self-recovery of ferroelectricity, and effectively improving the breakdown electric field of the ferroelectric material.
Drawings
In order to more clearly illustrate the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is one of the schematic structural diagrams of a data storage structure provided by the present invention;
FIG. 2 is a second schematic structural diagram of a data storage structure provided in the present invention;
FIG. 3 is a third schematic structural diagram of a data storage structure provided in the present invention;
FIG. 4 is a fourth schematic diagram of the structure of the data storage structure provided by the present invention;
FIG. 5 is a schematic diagram of the data storage structure shown in FIG. 4 as a synapse device;
FIG. 6 is a fifth schematic diagram of the structure of the data storage structure provided by the present invention;
FIG. 7 is a sixth schematic diagram of the structure of the data storage structure provided by the present invention;
FIG. 8 is a schematic diagram of the operation of the data storage structure shown in FIG. 7;
FIG. 9 is a flow chart of a data storage method provided by the present invention;
FIG. 10 is a second flowchart of a data storage method provided by the present invention;
FIG. 11 is a third schematic flowchart of a data storage method provided by the present invention;
FIG. 12 is a fourth flowchart illustrating a data storage method according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
The data storage structure and the data storage method of the present invention are described below with reference to fig. 1 to 12.
Fig. 1 is a schematic structural diagram of a data storage structure provided in the present invention. As shown in fig. 1, the data storage structure comprises a first electrode (10), a second electrode (20), and a ferroelectric material (30) located between the first electrode (10) and the second electrode (20), the first electrode (10), the ferroelectric material (30), and the second electrode (20) constitute a ferroelectric capacitor, wherein: the first electrode (10) has a characteristic that oxygen ions of the first electrode (10) are injected into the ferroelectric material (30) or returned to the first electrode (10) by the action of a voltage.
The data storage structure provided by the invention comprises a first electrode (10), a second electrode (20) and a ferroelectric material (30) positioned between the first electrode (10) and the second electrode (20), wherein the first electrode (10), the ferroelectric material (30) and the second electrode (20) form a ferroelectric capacitor. The ferroelectric capacitor is an MIM ferroelectric capacitor structure, namely a novel conductive electrode-ferroelectric material-electrode structure. The first electrode (10) has a characteristic that oxygen ions of the first electrode (10) are injected into the ferroelectric material (30) or returned to the first electrode (10) by the action of a voltage, and the first electrode (10) can be a mixed ion-electron conductor electrode, an oxide electrode or the like, and the oxide electrode includes an organic oxide electrode. The mixed ion-electron conductor electrode can be a common mixed conductor La with a perovskite structure 1-x Sr x MnO 3-δ ，La 1-x Sr x CoO 3-δ ,La 1-x Sr x FeO 3-δ ,La 1-x Sr x CrO 3-δ ,La 1-x Sr x CuO 2.5-δ ，SrCoO 3 ，Sm x Gd 0.5-x Sr 0.5 CoO 3-δ Etc., may be a novel mixed conductor Re 1-x Sr x CoO 3 And the like. The ferroelectric material (30) may be a ferroelectric hafnium oxide with a doping element. The doping element of the ferroelectric hafnium oxide material can be Zr, si, la, Y, gd, al and other elements. The presence of the doping element and the second electrode in the ferroelectric material may render the ferroelectric material ferroelectric. In the description of the embodiments, the ferroelectric hafnium oxide is taken as an example for a lot, and is not intended to limit the scope of the present invention.
The first electrode (10) is used as a novel conductive electrode and can be used as an oxygen source, under the action of voltage, oxygen ions can be discharged and then injected into the ferroelectric material (30), or the oxygen ions return to the first electrode (10) from the ferroelectric material (30), which is equivalent to the generation and disappearance of oxygen vacancies in the ferroelectric material (30). Since oxygen vacancies can stabilize the ferroelectric orthogonal phase and increase the polarization strength, the movement of voltage-controlled oxygen vacancies can increase or decrease the polarization strength of the ferroelectric material, thereby realizing multi-value storage. The multi-value storage is realized not based on gradual turnover of a plurality of ferroelectric domains, but by fully utilizing the control effect of the first electrode (10) on oxygen vacancies in the ferroelectric material (30), so that the multi-value storage can be realized even if the area of the ferroelectric layer is reduced under the requirement of high-density integration. On the other hand, the reversible movement of the oxygen vacancy can also realize the ferroelectric performance self-recovery of the ferroelectric material (30) and improve the breakdown resistance of the ferroelectric material (30); the voltage can be used for breaking a leakage channel formed by the oxygen vacancies, reducing leakage current and improving the breakdown electric field. When a voltage is applied, the first electrode (10) may be grounded and a voltage may be applied to the second electrode (20), or the second electrode (20) may be grounded and a voltage may be applied to the first electrode (10).
When a voltage is applied to the first electrode (10), a logic 0 can be obtained if the voltage is a maximum negative voltage, and a logic 1 can be obtained if the voltage is a maximum positive voltage. When a state in which the voltage is between the maximum negative-going voltage and the maximum positive-going voltage is applied, a logic between (0,1) can be obtained. Wherein positive voltage indicates that the direction of application of voltage is the same as the polarization direction of the ferroelectric material, and negative voltage indicates that the direction of application of voltage is opposite to the polarization direction of the ferroelectric material. Setting the maximum positive and negative voltages takes into account the breakdown effect on the one hand and the presence of a threshold value for the polarization result on the other hand.
Fig. 2 is a second schematic structural diagram of a data storage structure provided in the present invention. As shown in fig. 2, 101 is an LSMO electrode (a first electrode), 102 is a ferroelectric HZO (ferroelectric hafnium oxide), 103 is an upper electrode TiN (a second electrode), and the LSMO electrode (101), the ferroelectric HZO (102), and the upper electrode TiN (103) constitute an MIM ferroelectric capacitor structure. By grounding the LSMO electrode (101) and applying positive and negative voltages to the top electrode TiN (103), or grounding the top electrode TiN (103) and applying positive and negative voltages to the LSMO electrode (101), the ferroelectric HZO (102) can be polarized up or down, respectively, to store logic states 1 and 0. In addition, by applying positive voltages with different magnitudes to the upper electrode TiN (103), under the influence of electric field force, oxygen ions in the LSMO electrode (101) can be injected into the ferroelectric HZO (102) or discharged from the ferroelectric HZO (102) and returned to the LSMO electrode (101), which is equivalent to the generation and disappearance of oxygen vacancies in the ferroelectric HZO (102), so that the polarization strength of the ferroelectric HZO (102) is adjusted, and multi-value storage is realized. On the other hand, the reversible movement of oxygen vacancies can also improve the breakdown resistance of the ferroelectric hafnium oxide to a breakdown electric field of 5MV/cm or more.
In a specific operation method, for the ferroelectric capacitor with the MIM structure, oxygen vacancies in the ferroelectric material are injected or discharged by applying a voltage pulse to the first electrode (10), so that the polarization strength of the ferroelectric material is changed, and the ferroelectric capacitor can store different charges according to different pulses. The oxygen vacancy is multi-stage adjustable for regulating and controlling the polarization strength, so that the ferroelectric capacitor can realize multi-value storage. The application of the voltage pulse to the first electrode (10) may be achieved by direct application or indirect application. In addition, since the regulation of the oxygen vacancies by the voltage is reversible, a leakage channel composed of the oxygen vacancies in the ferroelectric material (30) can be switched off by applying a reverse voltage, so that the breakdown of the ferroelectric layer becomes reversible-the reverse voltage causes the oxygen vacancies to be discharged from the ferroelectric layer and the leakage channel is broken. Therefore, the ferroelectric property of the ferroelectric layer has self-recovery property, and the breakdown resistance is also improved.
According to the data storage structure provided by the invention, the oxygen ions of the first electrode are ensured to be injected into the ferroelectric material or return to the first electrode under the action of voltage, so that the regulation and control of oxygen vacancies in the ferroelectric material can be realized, thereby realizing the multi-value storage related to saturation polarization, the programming and self-recovery of ferroelectricity, and effectively improving the breakdown electric field of the ferroelectric material.
According to a data storage structure provided by the present invention, the data storage structure further comprises a switching transistor, a drain of the switching transistor is connected to the first electrode or the second electrode of the ferroelectric capacitor; the ferroelectric capacitor and the switching transistor constitute a memory cell.
The ferroelectric capacitor and the switching transistor are connected to form a minimum memory cell for data storage. When the ferroelectric capacitor is connected to the switching transistor, the first electrode (10) or the second electrode (20) of the ferroelectric capacitor is connected to the drain of the switching transistor.
The data storage structure provided by the invention forms a minimum unit for data storage by connecting the drain electrode of the switching transistor and the first electrode or the second electrode of the ferroelectric capacitor.
According to the data storage structure provided by the invention, the data storage structure comprises a word line, a bit line and a plurality of storage units; the bit lines comprise a first bit line and a second bit line; wherein: the word line is connected with the gates of the switching transistors of the plurality of memory cells; the first bit line connects the second electrodes of the ferroelectric capacitors of the plurality of memory cells when the drain of the switching transistor is connected to the first electrode of the ferroelectric capacitor; the first bit line is connected to the first electrodes of the ferroelectric capacitors of the plurality of memory cells when the drain of the switching transistor is connected to the second electrode of the ferroelectric capacitor; the second bit line connects sources of the switching transistors of the plurality of the memory cells.
The data storage structure of the memory array comprises a word line, a first bit line, a second bit line and a plurality of memory cells; wherein: the word line is connected with the grids of the switch transistors of the plurality of memory cells and is used for controlling the on-off of the switch transistors; when the drain of the switching transistor is connected with the first electrode of the ferroelectric capacitor, the first bit line is connected with the second electrodes of the ferroelectric capacitors of the plurality of memory cells; when the drain of the switching transistor is connected with the second electrode of the ferroelectric capacitor, the first bit line is connected with the first electrodes of the ferroelectric capacitors of the plurality of memory cells; the second bit line is connected with the sources of the switching transistors of the plurality of memory cells; the first bit line and the second bit line are used to change the polarization state of the ferroelectric capacitor by applying a voltage.
FIG. 3 is a third schematic structural diagram of a data storage structure according to the present invention. As shown in fig. 3, each memory cell is composed of 1 ferroelectric capacitor (201) and 1 switching transistor (202), and the first word line (203) and the bit line (204) (including the first bit line and the second bit line) are used to complete the writing and reading of the memory.
The polarization state of the ferroelectric capacitor determines the logic state of the cell, the downward polarization state represents a logic 0, and the upward different polarization states represent the logic between the intervals (0,1), and the specific number of states can be set according to the performance requirement.
During writing, address data is input into a first word line (203) and a bit line (204), a target memory cell is selected, the voltage on the first word line (203) controls the switching transistor (202) to be turned on, the voltage on the bit line (204) is responsible for changing the polarization state of the ferroelectric capacitor (201), the original state is erased by applying negative maximum voltage, and then different polarization states can be written by moving oxygen vacancies by applying positive voltages with different magnitudes.
During reading, as in the writing state, a target memory cell is selected by address data, the voltage on the first word line (203) turns on the switching transistor (202), the bit line (204) applies a sufficiently large negative voltage, and if the polarization state of the original capacitor is a down state (logic 0), the ferroelectric capacitor (201) is not inverted; because the flip current of different polarization states is different, the polarization state of the ferroelectric capacitor (201) can be read out according to the flip current on the bit line (204), so as to judge the multi-value logic stored in the cell.
The data storage structure provided by the invention realizes a multi-value storage array based on a ferroelectric transistor 1T1C (1 transistor and 1 capacitor) unit, the storage array realizes multi-value storage by using the principle that an LSMO electrode regulates oxygen vacancy so as to change the polarization state of a ferroelectric capacitor, has excellent breakdown-resistant property and cycle durability property, and has good performances of low power consumption and quick erasing and writing due to the nonvolatile property of the polarization state.
According to the present invention there is provided a design memory structure comprising a ferroelectric field effect transistor wherein: the gate of the ferroelectric field effect transistor comprises a first electrode, the gate stack of the ferroelectric field effect transistor comprises a ferroelectric material; or, a gate of the ferroelectric field effect transistor comprises the first electrode, a gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and a second electrode; the first electrode, the ferroelectric material and the second electrode are adjacent in sequence; or, a gate of the ferroelectric field effect transistor comprises the second electrode, a gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and the first electrode; the second electrode, the ferroelectric material and the first electrode are adjacent in sequence; the first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage.
In a specific device structure, the multi-state memory device of the invention can be a ferroelectric capacitor (MIM) with a novel conductive electrode-ferroelectric material-electrode structure, and can also be a novel conductor electrode-ferroelectric material-metal electrode-gate oxide-semiconductor structure transistor (MFMIS-FET) or a novel conductor electrode-ferroelectric material-gate oxide-semiconductor structure transistor (MFIS-FET). For an MFMIS-FET or an MFIS-FET, oxygen vacancies in the ferroelectric material are controlled by the gate voltage, and the oxygen vacancies affect the polarization and thus the threshold voltage of the transistor, and the ferroelectric transistor can realize oxygen vacancy-based multivalued storage because the polarization can have a plurality of stable values under the influence of the oxygen vacancies.
The data storage structure provided by the invention is indispensable for the first electrode and the ferroelectric material, and the second electrode can be omitted by adopting an MFIS-FET structure. When the data storage structure is an MFIS-FET, the gate of the ferroelectric field effect transistor comprises a first electrode and the gate stack of the ferroelectric field effect transistor comprises a ferroelectric material.
In the case of the MFMIS-FET structure, the first electrode, the second electrode, and the ferroelectric material are included, and the first electrode and the second electrode may be used as gates. Thus, with the MFMIS-FET structure, the gate of the ferroelectric field effect transistor comprises a first electrode, and the gate stack of the ferroelectric field effect transistor comprises a ferroelectric material and a second electrode; the first electrode, the ferroelectric material and the second electrode are adjacent in sequence. Or, the gate of the ferroelectric field effect transistor comprises the second electrode, the gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and the first electrode; the second electrode, the ferroelectric material and the first electrode are adjacent in sequence.
The first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage.
FIG. 4 is a fourth schematic structural diagram of a data storage structure provided by the present invention. As shown in FIG. 4, 301 is TiN gate, 302 is gate dielectric layer ferroelectric HZO,303 is bottom electrode LSMO,304 is Al 2 O 3 And (3) intercalation, wherein 305 is an N-type doped source electrode, 306 is an N-type doped drain electrode, 307 is p-type Si, and an MFMIS-FET ferroelectric transistor structure is formed. By applying positive voltage or negative voltage to the TiN gate (301), the ferroelectric HZO (302) of the gate dielectric layer can be polarized upwards or downwards respectively, so that the generation and the depletion of carriers in a channel are influenced, the switching of a normally-on state and a normally-off state of a transistor is controlled, and the storage of logic states 0 and 1 is realized. In addition, by applying positive or negative voltage to the grid electrode and under the influence of electric field force, the LSMO intercalation electrode can be an oxygen source, in which oxygen ions can be discharged and injected into or returned from the ferroelectric hafnium oxide, corresponding to the generation and disappearance of oxygen vacancies, so that the polarization strength of the ferroelectric hafnium oxide can be adjusted. The adjusted polarization strength generates different electric fields to influence current carriers in the channel, so that the resistance of the transistor channel is changed, and multi-value storage is realized.
FIG. 5 is a schematic diagram of the data storage structure shown in FIG. 4 as a synapse device. As shown in FIG. 5, the MFMIS-FET synapse device based on ferroelectric hafnium oxide can be constructed, a TiN gate (301) in the MFMIS-FET is used for simulating a presynaptic terminal, an N-type doped drain (306) is used for simulating a postsynaptic terminal, and channel resistance simulates synaptic weight. By applying continuous positive voltage or negative voltage pulses to the TiN grid (301) and being influenced by electric field force, the LSMO intercalation electrode can be an oxygen source, and oxygen ions in the LSMO intercalation electrode can be discharged or injected into the ferroelectric hafnium oxide, which is equivalent to the generation and disappearance of oxygen vacancies, so that the polarization strength of the ferroelectric hafnium oxide is adjusted, the resistance of a channel is continuously and adjustably influenced, and the plasticity of synapses is realized. Different from the synapse of a ferroelectric transistor realizing synapse plasticity through partial polarization, the change of channel resistance of the synapse device and the magnitude of pulse voltage can form a good linear relation, so that the synapse device is very beneficial to hardware realization of simulated neural computation to realize deep learning.
According to the data storage structure provided by the invention, the oxygen ions of the first electrode are ensured to be injected into the ferroelectric material or return to the first electrode under the action of voltage, so that the regulation and control of oxygen vacancies in the ferroelectric material can be realized, thereby realizing the multi-value storage related to saturation polarization, the programming and self-recovery of ferroelectricity, and effectively improving the breakdown electric field of the ferroelectric material.
According to the data storage structure provided by the invention, the data storage structure comprises a word line, a source line, a drain line and a plurality of ferroelectric field effect transistors; wherein: the word line is connected to the gates of the plurality of the ferroelectric field effect transistors, the source line is connected to the sources of the plurality of the ferroelectric field effect transistors, and the drain line is connected to the drains of the plurality of the ferroelectric field effect transistors.
The memory array can be formed by a plurality of ferroelectric field effect transistors, and a data storage structure of the memory array comprises a word line, a source line, a drain line and a plurality of ferroelectric field effect transistors; wherein: the word line is connected to the gates of the plurality of ferroelectric field effect transistors, and the ferroelectric transistors can be biased in different polarization states by applying positive or negative voltages of different magnitudes to the gates on the word line. The source line is connected with the sources of the ferroelectric field effect transistors, and the drain line is connected with the drains of the ferroelectric field effect transistors.
FIG. 6 is a fifth schematic diagram of a data storage structure provided by the present invention. As shown in fig. 6, a partial memory array is constructed for a ferroelectric transistor memory device, each memory cell is composed of a ferroelectric transistor (401), a second word line (402) is connected to the gate of the ferroelectric transistor (401), one source line (403) is used as a voltage input terminal, and the other drain line (404) is used as a current output terminal.
The channel resistance of the ferroelectric transistor (401) determines the logic state of the memory cell. Applying different positive or negative voltages to the gates biases the ferroelectric transistor (401) in different polarization states. The measured channel resistance when the gate voltage is 0V (during reading) represents the logic between the intervals [0,1], and the specific number of states can be set according to the performance requirement.
During writing, address data is input to the source line (403), the drain line (404) and the second word line (402), the target memory cell is selected, the source line (403) and the drain line (404) are grounded, and a voltage on the second word line (402) is responsible for changing the memory state of the ferroelectric transistor (401). The specific operation is as follows: the original state is erased by applying negative maximum voltage, and then positive voltage or negative voltage with different magnitudes is applied, and different polarization states are written by moving the oxygen vacancies, so that the resistance value of the channel is changed.
During reading, as in the written state, the target memory cell is selected by the address data, a voltage is applied to the source line 403, and a current is drawn from the drain line 404, so that the data of an entire column can be read.
The data storage structure provided by the invention realizes a multi-value storage array based on an MFMIS-FET ferroelectric transistor unit, the storage array realizes multi-value storage by utilizing the principle that an LSMO electrode regulates and controls an oxygen vacancy so as to change the polarization state of a ferroelectric transistor and further regulate and control a channel, has excellent breakdown-resistant property and cycle durability property, and has the advantages of low power consumption, quick erasing and high density integration due to the nonvolatile property, nondestructive reading and simple structure.
According to the data storage structure provided by the invention, the data storage structure comprises two identical ferroelectric field effect transistors which are respectively a first ferroelectric fieldAn effect transistor and a second ferroelectric field effect transistor; wherein: the drains of the first and second ferroelectric field effect transistors are connected as an ML line, and the gates of the first and second ferroelectric field effect transistors are connected to an SL line and
and the source electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are connected and grounded, and the substrates of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are separated by an isolation insulation region.
FIG. 7 is a sixth schematic diagram of the structure of the data storage structure provided by the present invention. As shown in fig. 7, an analog-content-addressable memory (a-CAM) cell structure based on mixed conductor electrode ferroelectric transistors includes two N-type ferroelectric transistors T1 and T2 formed in a P-type active region (601) on a Si substrate. T1 comprises an N-type doped region source (602), an N-type doped region drain (603) and a gate dielectric layer HfO 2 (604) LSMO mixed conductor floating gate layer (605), ferroelectric HfZrO 4 A layer (606) and a TiN gate (607), in which the ferroelectric HfZrO 4 Layer (606), mixed conductor layer LSMO (605) and gate dielectric layer HfO 2 (604) Together forming a gate stack thereof. The structures of T2 and T1 are the same, the source (608) of the N-type doped region is connected with the source (602) of the N-type doped region of T1 through an interconnection wire W1 (609) and is grounded, the drain (610) of the N-type doped region is connected with the drain (603) of the N-type doped region of T1 through an interconnection wire W2 (611) and serves as Match Line (ML), the grid (607) of T1 and the grid (612) of T2 are respectively connected with an SL Line and the grid (612) of T2
A wire therein
Voltage V applied to wire SL For the voltage corresponding to the data to be searched,
from V SL Obtained after passing through an inverter. The substrates of T1 and T2 are separated by an isolation insulating region (616).
FIG. 8 is a schematic diagram of the operation of the data storage structure shown in FIG. 7. As shown in fig. 8, the working principle is: when V is SL When the voltage is less than the voltage beta determined by T1, T1 is cut off, and ML is kept at a high level; when V is SL Above beta, T1 is turned on and ML is discharged to a low level, thus obtaining V SL The upper limit value β of (b). T2 has the same operation, and is switched on and off
Control so that V can be obtained SL Lower limit value of when V SL When the value is less than alpha, T2 is conducted, and ML discharges; otherwise T2 is turned off and ML remains high. Thus, when the input voltage is between α and β, both T1 and T2 are in the off state, at which time ML remains high, indicating "match"; when the input voltage is less than alpha or greater than beta, at least one of T1 and T2 is conducted, and ML discharges to low level. Thus, a memory range α - β is obtained. The array can be composed of a plurality of unit structures, and the polarization strength of ferroelectric HZO is changed by utilizing the regulation and control effect of an LSMO gate electrode on oxygen vacancy under the action of voltage, so that the threshold voltage of a ferroelectric transistor is adjusted, and different storage intervals alpha can be obtained 1 ～β 1 ，α 2 ～β 2 ，α 3 ～β 3 ，α 4 ～β 4 … …, and can store and search data in these intervals, the number of the intervals determines the number of bits of the searchable data, and if there are 8 separate storage intervals, addressing of 3-bit data can be performed. Beta represents T 1 Threshold voltages of alpha and T 2 Is related to the inverter used in the circuit implementation.
According to the data storage structure provided by the invention, the analog content addressable memory unit structure is constructed by utilizing two identical ferroelectric field effect transistors, the polarization strength of ferroelectric HZO is changed by utilizing the regulation and control effect of an LSMO gate electrode on oxygen vacancy under the action of voltage, the threshold voltage of the ferroelectric transistor is regulated, different storage intervals can be obtained, and multi-bit data addressing is realized.
The data storage method provided by the present invention is described below, and the data storage method described below is based on the data storage structure described above.
Fig. 9 is a schematic flow chart of a data storage method provided by the present invention. As shown in fig. 9, the method includes:
s1, injecting or discharging oxygen vacancies in the ferroelectric material by applying voltage pulses to a first electrode, and changing the polarization strength of the ferroelectric material;
and S2, realizing multi-value storage according to the polarization intensity of the ferroelectric material.
The data storage method provided by the invention can be applied to the MIM ferroelectric capacitor, the memory cell and the memory array constructed by the MIM ferroelectric capacitor, the memory array constructed by the MFMIS-FET ferroelectric transistor, the MFIS-FET ferroelectric transistor, the MFMIS-FET ferroelectric transistor or the MFIS-FET ferroelectric transistor, and the addressable memory cell structure and the addressable memory array constructed by two MFMIS-FET ferroelectric transistors or MFIS-FET ferroelectric transistors.
The voltage pulse can be applied to the first electrode directly or indirectly, the first electrode injects or discharges oxygen vacancies in the ferroelectric material to the first electrode under the action of the voltage pulse, the polarization strength of the ferroelectric material is changed, and multi-value storage is realized according to the polarization strength of the ferroelectric material.
In a specific operation method, for the ferroelectric capacitor with the MIM structure, oxygen vacancies in the ferroelectric material are injected or discharged by applying voltage pulses to change the polarization strength of the ferroelectric material, and at this time, the ferroelectric capacitor stores different charges according to the pulses. The regulation and control of the oxygen vacancy on the polarization strength are multi-stage adjustable, so that the ferroelectric capacitor can realize multi-value storage; for an MFMIS-FET or an MFIS-FET, oxygen vacancies in the ferroelectric material are controlled by the gate voltage, the oxygen vacancies affect the polarization and thus the threshold voltage of the transistor, and the ferroelectric transistor can achieve oxygen vacancy based multivalued storage because the polarization can have multiple stable values under the influence of the oxygen vacancies. In addition, because the regulation of the voltage on the oxygen vacancy is reversible, a leakage channel consisting of the oxygen vacancy in the ferroelectric material can be switched off by applying reverse voltage, so that the breakdown of the ferroelectric layer becomes reversible, the reverse voltage enables the oxygen vacancy to be discharged out of the ferroelectric layer, and the leakage channel is broken. Therefore, the ferroelectric property of the ferroelectric layer has self-recovery property, and the breakdown resistance is also improved. Therefore, the method can further comprise applying a reverse voltage to the first electrode to shut off the leakage path, thereby improving breakdown resistance.
According to the data storage method provided by the invention, the oxygen ions of the first electrode are ensured to be injected into the ferroelectric material or return to the first electrode under the action of voltage, so that the regulation and control of oxygen vacancies in the ferroelectric material can be realized, thereby realizing the multi-value storage related to saturation polarization, the programming and self-recovery of ferroelectricity, and effectively improving the breakdown electric field of the ferroelectric material.
FIG. 10 is a second flowchart illustrating a data storage method according to the present invention. As shown in fig. 10, the method includes:
s3, in the writing period, selecting a memory cell to be written, applying negative maximum voltage on a bit line to erase the original state after a voltage control switch transistor on a word line is started, and then applying positive voltage or negative voltage with different sizes to change the polarization state of the ferroelectric capacitor through the movement of an oxygen vacancy, so that the ferroelectric capacitor stores different charges, and multi-valued data are written into the memory cell;
and S4, during reading, selecting the memory cell to be read, applying a negative voltage larger than a preset voltage threshold value to the bit line after the voltage on the word line controls the switching transistor to be started, and reading the multi-valued data of the memory cell according to the size of the reversing current on the bit line.
The data storage method provided by the invention is suitable for the storage array constructed by the MIM ferroelectric capacitor shown in FIG. 3. The data storage method provided by the invention comprises the steps of writing data into the storage unit and reading the data from the storage unit. During the writing period, a memory cell to be written is selected, after a voltage control switch transistor on a word line is started, negative maximum voltage is applied to a bit line to erase the original state, positive voltage or negative voltage with different magnitudes is applied to change the polarization state of the ferroelectric capacitor through the movement of an oxygen vacancy, so that the ferroelectric capacitor stores different charges, and the writing of multi-valued data into the memory cell is realized; during reading, a memory cell to be read is selected, after a voltage control switch transistor on a word line is turned on, a negative voltage larger than a preset voltage threshold is applied to a bit line, and multi-valued data of the memory cell is read according to the magnitude of a flipping current on the bit line.
The data storage method provided by the invention realizes data writing and reading of a multi-value storage array based on ferroelectric transistor 1T1C (1 transistor and 1 capacitor) units.
Fig. 11 is a third schematic flowchart of a data storage method provided by the present invention. As shown in fig. 11, the method includes:
s5, in the writing period, selecting a ferroelectric field effect transistor to be written, grounding the source line and the drain line, applying negative maximum voltage to the word line to erase the original state, then applying positive voltage or negative voltage with different magnitudes, changing the polarization state of the ferroelectric field effect transistor through the movement of an oxygen vacancy, further changing the channel resistance value, and realizing multi-value data writing;
and S6, during reading, selecting the ferroelectric field effect transistor to be read, applying voltage on the source electrode line, and extracting current on the drain electrode line to realize reading of multi-value data.
The data storage method provided by the invention is suitable for the storage array constructed by the ferroelectric transistor shown in FIG. 6. The data storage method provided by the invention comprises the steps of writing data into the storage unit and reading the data from the storage unit. During the writing period, selecting a ferroelectric field effect transistor to be written, grounding a source line and a drain line, applying negative maximum voltage on a word line to erase the original state, then applying positive voltage or negative voltage with different magnitudes, changing the polarization state of the ferroelectric field effect transistor through the movement of oxygen vacancies, further changing the resistance value of a channel, and realizing the writing of multi-valued data; in the reading period, a ferroelectric field effect transistor to be read is selected, a voltage is applied to a source line, and a current is extracted from a drain line, so that reading of multi-valued data is realized.
The data storage method provided by the invention realizes data writing and reading of a multivalued storage array of the MFMIS-FET ferroelectric transistor unit.
FIG. 12 is a fourth flowchart illustrating a data storage method according to the present invention. As shown in fig. 12, the method includes:
s7, applying voltage to a first electrode of a first ferroelectric field effect transistor and/or a second ferroelectric field effect transistor to change the polarization strength of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor;
and S8, adjusting the threshold voltage of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor according to the polarization strength of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor to obtain different storage intervals.
The data storage method provided by the invention is suitable for the data storage structure shown in FIG. 7 or the storage array formed by the data storage structure shown in FIG. 7. The data storage method provided by the invention comprises the following steps: applying a voltage to the first electrode of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor changes the polarization of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor; and adjusting the threshold voltage of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor according to the polarization strength of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor to obtain different storage intervals. Wherein a change in the polarization of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor brings about a change in the threshold voltage of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor.
The data storage method provided by the invention can realize the multi-bit data addressing of the addressable memory unit structure and the array.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a necessary general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A data storage structure, comprising: a first electrode, a second electrode, and a ferroelectric material located between the first electrode and the second electrode, the first electrode, the ferroelectric material, and the second electrode constituting a ferroelectric capacitor, wherein:
the first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage.
2. The data storage structure of claim 1, further comprising a switching transistor having a drain connected to the first electrode or the second electrode of the ferroelectric capacitor;
the ferroelectric capacitor and the switching transistor constitute a memory cell.
3. The data storage structure of claim 2, wherein the data storage structure comprises a word line, a bit line, and a plurality of the memory cells; the bit lines comprise a first bit line and a second bit line; wherein:
the word line is connected with the gates of the switching transistors of the plurality of the memory cells; the first bit line connects the second electrodes of the ferroelectric capacitors of the plurality of memory cells when the drain of the switching transistor is connected to the first electrode of the ferroelectric capacitor; the first bit line is connected to the first electrodes of the ferroelectric capacitors of the plurality of memory cells when the drain of the switching transistor is connected to the second electrode of the ferroelectric capacitor; the second bit line connects sources of the switching transistors of the plurality of the memory cells.
4. A data storage structure, comprising: a ferroelectric field effect transistor, wherein:
the gate of the ferroelectric field effect transistor comprises a first electrode, the gate stack of the ferroelectric field effect transistor comprises a ferroelectric material;
or, a gate of the ferroelectric field effect transistor comprises the first electrode, a gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and a second electrode; the first electrode, the ferroelectric material and the second electrode are adjacent in sequence;
or, a gate of the ferroelectric field effect transistor comprises the second electrode, a gate stack of the ferroelectric field effect transistor comprises the ferroelectric material and the first electrode; the second electrode, the ferroelectric material and the first electrode are adjacent in sequence;
the first electrode has a characteristic that oxygen ions of the first electrode are injected into the ferroelectric material or returned to the first electrode by a voltage.
5. The data storage structure of claim 4, wherein the data storage structure comprises a word line, a source line, a drain line, and a plurality of the ferroelectric field effect transistors; wherein:
the word line is connected to the gates of the plurality of the ferroelectric field effect transistors, the source line is connected to the sources of the plurality of the ferroelectric field effect transistors, and the drain line is connected to the drains of the plurality of the ferroelectric field effect transistors.
6. The data storage structure of claim 4, wherein the data storage structure comprises two identical ferroelectric field effect transistors, a first ferroelectric field effect transistor and a second ferroelectric field effect transistor, respectively; wherein:
the drains of the first and second ferroelectric field effect transistors are connected as an ML line, and the gates of the first and second ferroelectric field effect transistors are connected to an SL line and
and the source electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are connected and grounded, and the substrates of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are separated by an isolation insulation region.
7. A data storage method based on the data storage structure of any one of claims 1 to 6, the method comprising:
changing the polarization strength of the ferroelectric material by injecting or discharging oxygen vacancies in the ferroelectric material by applying a voltage pulse to the first electrode;
and realizing multi-value storage according to the polarization intensity of the ferroelectric material.
8. A method for storing data based on the data storage structure of claim 3, the method comprising:
during the writing period, a memory cell to be written is selected, after a voltage control switch transistor on a word line is started, negative maximum voltage is applied to a bit line to erase the original state, positive voltage or negative voltage with different magnitudes is applied to change the polarization state of a ferroelectric capacitor through the movement of an oxygen vacancy, so that the ferroelectric capacitor stores different charges, and multi-valued data are written into the memory cell;
during reading, the memory cell to be read is selected, after the voltage on the word line controls the switching transistor to be started, a negative voltage larger than a preset voltage threshold value is applied to the bit line, and the multi-valued data of the memory cell is read according to the size of the reversing current on the bit line.
9. A data storage method based on the data storage structure of claim 5, the method comprising:
during the writing period, selecting a ferroelectric field effect transistor to be written, grounding the source line and the drain line, applying negative maximum voltage on the word line to erase the original state, then applying positive voltage or negative voltage with different magnitudes, changing the polarization state of the ferroelectric field effect transistor through the movement of oxygen vacancies, further changing the resistance value of a channel, and realizing the writing of multi-valued data;
and during reading, the ferroelectric field effect transistor to be read is selected, voltage is applied to the source electrode line, current is extracted from the drain electrode line, and reading of multi-value data is achieved.
10. A data storage method based on the data storage structure of claim 6, the method comprising:
applying a voltage to a first electrode of a first ferroelectric field effect transistor and/or a second ferroelectric field effect transistor changes a polarization of a ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor;
and adjusting the threshold voltage of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor according to the polarization strength of the ferroelectric material of the first ferroelectric field effect transistor and/or the second ferroelectric field effect transistor to obtain different storage intervals.
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