CN116390532A - Display panel and display device - Google Patents

Abstract

The embodiment of the application provides a display panel and a display device, wherein the display panel comprises: a substrate; the thin film transistor is arranged in the display area and comprises a grid electrode, a grid electrode insulating layer, an interlayer dielectric layer and a source-drain electrode layer which are sequentially arranged along the direction deviating from the substrate, wherein the source-drain electrode layer comprises a first electrode and a second electrode, and a groove is formed in the interlayer dielectric layer; the light-emitting device is arranged in the display area, and comprises a first electrode layer, an organic light-emitting layer and a second electrode layer which are sequentially arranged along the direction deviating from the substrate, wherein the first electrode layer is arranged on one side of the source-drain electrode layer deviating from the substrate and is connected with the first electrode; at least one isolation wall is arranged in the isolation region, one part of the isolation wall is positioned in the groove, and the other part of the isolation wall is positioned outside the groove so as to isolate the second electrode layer. According to the technical scheme, the organic light-emitting layer can be prevented from being invalid due to the fact that external water vapor and oxygen enter the organic light-emitting layer, and the service life of the display panel is prolonged.

Description

Display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel and a display device.

Background

With the development of the organic light-emitting diode (OLED) display panel industry, a display panel with holes has emerged. However, the organic light emitting layer of the display panel is very sensitive to water and oxygen, and is easy to fail and cannot be displayed normally under the condition that water vapor invades through the openings.

Disclosure of Invention

Embodiments of the present application provide a display panel and a display device to solve or alleviate one or more technical problems in the prior art.

As an aspect of the embodiments of the present application, the embodiments of the present application provide a display panel provided with a display area, an opening area, and an isolation area between the display area and the opening area, the isolation area being at least partially disposed around the opening area, the display panel including: a substrate; the thin film transistor is arranged in the display area and comprises a grid electrode, a grid electrode insulating layer, an interlayer dielectric layer and a source-drain electrode layer which are sequentially arranged along the direction deviating from the substrate, wherein the source-drain electrode layer comprises a first electrode and a second electrode, and a groove is formed in the interlayer dielectric layer; the light-emitting device is arranged in the display area, and comprises a first electrode layer, an organic light-emitting layer and a second electrode layer which are sequentially arranged along the direction deviating from the substrate, wherein the first electrode layer is arranged on one side of the source-drain electrode layer deviating from the substrate and is connected with the first electrode; at least one isolation wall is arranged in the isolation region, one part of the isolation wall is positioned in the groove, and the other part of the isolation wall is positioned outside the groove so as to isolate the second electrode layer.

In one embodiment, the material of the isolation wall is the same as that of the source/drain electrode layer, and the isolation wall and the source/drain electrode layer are formed by one process.

In one embodiment, a partition wall includes: the first isolation parts are correspondingly arranged on the side walls of the grooves, each first isolation part is provided with an extending end positioned outside the groove, and the extending ends are used for isolating the second electrode layer; the second isolation part is connected between the two first isolation parts which are oppositely arranged, and the second isolation part is arranged on the bottom wall of the groove.

In one embodiment, the protruding end of the first isolation portion includes a first end surface and a second end surface, the first end surface is disposed near the center of the groove, the second end surface is disposed away from the center of the groove, and the first end surface and the second end surface form an included angle.

In one embodiment, the second end surface is non-coplanar with the sidewalls of the groove.

In one embodiment, the width of the orthographic projection of each first isolation portion on the substrate is 0.5 μm to 0.7 μm.

In one embodiment, the connection between the second isolation portion and the first isolation portion forms an included angle greater than 90 °.

In one embodiment, the thickness of the second spacer is less than the thickness of the interlayer dielectric layer.

In one embodiment, a recess extends through the interlayer dielectric layer in a thickness direction of the interlayer dielectric layer, the recess being defined by the gate insulating layer and the interlayer dielectric layer together.

In one embodiment, the number of partition walls is 5 or more.

As another aspect of the embodiments of the present application, the embodiments of the present application provide a display device, including the display panel of any one of the embodiments of the above aspect.

The embodiment of the application adopts the technical scheme, so that the failure of the organic light-emitting layer caused by the entering of external water vapor and oxygen into the organic light-emitting layer can be avoided, and the service life of the display panel is effectively prolonged.

The foregoing summary is for the purpose of the specification only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present application will become apparent by reference to the drawings and the following detailed description.

Drawings

In the drawings, the same reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily drawn to scale. It is appreciated that these drawings depict only some embodiments according to the disclosure and are not therefore to be considered limiting of its scope.

Fig. 1 shows a schematic structural diagram of a display panel according to an embodiment of the present application;

fig. 2 is a schematic view showing a partial sectional structure of a display panel according to an embodiment of the present application;

FIG. 3 shows an enlarged view of section A, circled in FIG. 2;

FIG. 4 illustrates a partial microstructure view of a display panel according to an embodiment of the application;

fig. 5 shows a schematic diagram of a manufacturing flow of a display panel according to an embodiment of the present application;

fig. 6 shows a partial top view schematic of a partition wall of a display panel according to an embodiment of the present application.

Reference numerals illustrate:

10: a display panel;

10a: a display area; 10b: an opening area; 10c: an isolation region;

100: a substrate; 200: a thin film transistor; 210: an active layer; 220: a gate; 230: a gate insulating layer; 231: a first gate insulating layer; 232: a second gate insulating layer; 240: an interlayer dielectric layer; 241: a groove; 250: a source/drain electrode layer; 251: a first pole; 252: a second pole; 300: a light emitting device; 310: a first electrode layer; 320: an organic light emitting layer; 330: a second electrode layer; 400: a partition wall; 410: a first isolation part; 411: an extension end; 4111: a first end face; 4112: a second end face; 420: a second isolation part; 500: a buffer layer; 600: a pixel definition layer; 700: a planar layer.

Detailed Description

Hereinafter, only certain exemplary embodiments are briefly described. As will be recognized by those of skill in the pertinent art, the described embodiments may be modified in various different ways without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.

With the development of the OLED display panel industry, large-size, large-viewing-angle and comprehensive screens gradually become the hot spot field of research. The full screen is a display screen with an ultrahigh screen duty ratio, and the ideal full screen duty ratio is 100%, namely the front surfaces of the mobile phones are all display interfaces. However, the method is limited by the installation requirement of essential functional components of the mobile phone such as a front camera, a receiver, a face recognition sensor, a light sensor and the like, and a certain gap is required to be reserved above the screen of the mobile phone to install the functional components, so that display screens such as Liu Haibing, a water drop screen and the like are formed.

With the continuous development of the full-face screen, the vast consumers are not satisfied with the designs of Liu Haibing, water drop screens and the like, and a display panel with holes is formed, and the holes on the display panel can be used for placing functional components such as cameras and the like, so that the utilization rate of the screen is increased. Because the organic luminescent material is very sensitive to water vapor and oxygen, the luminescent failure of the pixel area is easy to cause under the condition of invasion of the water vapor and the oxygen, and normal display cannot be realized. In order to solve the above problems, in the related art, a separator having an i-shaped cross section is generally provided to separate the cathode layer. However, the process of the i-shaped isolation column is complicated, and a separate mask (mask) is required to be used for manufacturing, so that the manufacturing cost of the display panel is increased.

A display panel 10 according to an embodiment of the first aspect of the present application is described below with reference to fig. 1-6. Among them, the display panel 10 may be provided with a display region 10a, an open region 10b, and a separation region 10c between the display region 10a and the open region 10b, the separation region 10c being disposed at least partially around the open region 10b.

Fig. 1 shows a schematic structural view of a display panel 10 according to an embodiment of the present application; fig. 2 is a schematic view showing a partial sectional structure of the display panel 10 according to the embodiment of the present application; fig. 3 shows an enlarged view of the portion a circled in fig. 2. As shown in fig. 1 to 3, the display panel 10 includes a substrate 100, a thin film transistor 200, a light emitting device 300, and at least one partition 400. Illustratively, in order to facilitate the subsequent processing of the desired components in the various regions of the display panel 10, the various regions may be defined on the substrate 100 first, for example, the display region 10a, the isolation region 10c, and the opening region 10b may be defined on the substrate 100.

The thin film transistor 200 is disposed in the display region 10a. The thin film transistor 200 includes a gate electrode 220, a gate insulating layer 230, an interlayer dielectric layer 240, and a source-drain electrode layer 250 sequentially disposed in a direction away from the substrate 100, the source-drain electrode layer 250 including a first electrode 251 and a second electrode 252, one of the first electrode 251 and the second electrode 252 being a source electrode, and the other of the first electrode 251 and the second electrode 252 being a drain electrode. A recess 241 is formed on the interlayer dielectric layer 240.

Illustratively, referring to fig. 2, the thin film transistor 200 may further include an active layer 210 and a buffer layer 500. The buffer layer 500 may be made of silicon nitride, silicon oxide, etc., and may protect other structures on the substrate 100 while achieving the effects of blocking water and oxygen and blocking alkaline ions.

The thin film transistor 200 may be a top gate type in which the active layer 210 is located at a side of the gate electrode 220 near the substrate 100, and the gate insulating layer 230 includes a first gate insulating layer 231 and a second gate insulating layer 232. In preparation, the buffer layer 500 may be formed on the substrate 100 first, and then the active layer 210 may be formed on the buffer layer 500 on a side facing away from the substrate 100. Then, a first gate insulating layer 231 is formed on a side of the active layer 210 facing away from the substrate 100, wherein the first gate insulating layer 231 covers the active layer 210 and the buffer layer 500; forming a gate electrode 220 on the first gate insulating layer 231; a second gate insulating layer 232 is formed on a side of the gate electrode 220 facing away from the substrate 100, wherein the second gate insulating layer 232 covers the gate electrode 220 and the first gate insulating layer 231. Then, an interlayer dielectric layer 240 is formed on the side of the second gate insulating layer 232 facing away from the substrate 100; a source-drain electrode layer 250 including a first pole 251 and a second pole 252 is formed on a side of the interlayer dielectric layer 240 facing away from the substrate 100. The first pole 251 and the second pole 252 may be in contact with the active layer 210 through vias on the interlayer dielectric layer 240, the second gate insulating layer 232, and the first gate insulating layer 231.

Of course, the thin film transistor 200 may also be a bottom gate type. The active layer 210 may be located at a side of the gate 220 facing away from the substrate 100 and between the gate insulating layer 230 and the interlayer dielectric layer 240. The type of the thin film transistor 200 is not limited in this application.

The light emitting device 300 is disposed in the display area 10a. The light emitting device 300 includes a first electrode layer 310, an organic light emitting layer 320, and a second electrode layer 330 sequentially disposed in a direction away from the substrate 100, the first electrode layer 310 being disposed on a side of the source drain electrode layer 250 away from the substrate 100 and connected to the first electrode 251. Wherein one of the first electrode layer 310 and the second electrode layer 330 is an anode, and the other of the first electrode layer 310 and the second electrode layer 330 is a cathode. The anode and the cathode are used for providing an electric field to the organic light emitting layer 320, so that the organic light emitting layer 320 emits light under the action of the electric field.

Illustratively, the anode may be made of Indium Tin Oxide (ITO), indium Zinc Oxide (IZO), zinc oxide (ZnO), or the like; the organic light emitting layer 320 may include a small molecular organic material or a polymer molecular organic material, may be a fluorescent light emitting material or a phosphorescent light emitting material, may emit red light, green light, blue light, or may emit white light, etc.; the cathode may be made of a metal material such as lithium (Li), aluminum (Al), magnesium (Mg), or silver (Ag).

The display panel 10 may further include a pixel defining layer 600, where the pixel defining layer 600 is disposed on a side of the first electrode layer 310 facing away from the substrate 100. The pixel defining layer 600 may have a plurality of openings formed thereon, and the first electrode layer 310 may be exposed through the corresponding openings. The organic light emitting layers 320 are all located in the openings and cover the first electrode layer 310. The second electrode layer 330 covers the organic light emitting layer 320 and the pixel defining layer 600. The display panel 10 may further include a planarization layer 700. After forming the source and drain electrode layer 250, a planarization layer 700 may be formed on a side of the source and drain electrode layer 250 facing away from the substrate 100, and then a first electrode layer 310 may be formed on the planarization layer 700, the first electrode layer 310 being connected to the first electrode 251 through a via hole on the planarization layer 700.

The partition wall 400 is disposed in the isolation region 10c. As shown in fig. 2, 4 and 5, a portion of the partition wall 400 is located in the groove 241, and another portion of the partition wall 400 is located outside the groove 241 to block the second electrode layer 330. Like this, the part of partition wall 400 that is located outside recess 241 can break off second electrode layer 330, avoids steam and oxygen to spread along second electrode layer 330, plays the effect of effectual isolated water oxygen passageway to avoid leading to organic luminescent layer 320 inefficacy because external steam and oxygen get into organic luminescent layer 320, effectively prolong the life of display panel 10.

In one embodiment, referring to fig. 5, the isolation wall 400 is the same as the source/drain electrode layer 250, and the isolation wall 400 and the source/drain electrode layer 250 are formed through one process. The process may include the steps of coating, exposing, developing, etching, stripping, etc. of the photoresist. The "one-time process" refers to forming the isolation wall 400 and the source drain electrode layer 250 in the same process, and the isolation wall 400 and the source drain electrode layer 250 may be formed by using the same mask.

For example, after forming the interlayer dielectric layer 240, a metal layer may be formed on a side of the interlayer dielectric layer 240 facing away from the substrate 100. The metal layer is then patterned to form the first pole 251, the second pole 252 and the partition wall 400. The partition wall 400, the first pole 251 and the second pole 252 may be made of a metal material or an alloy material, for example, a metal single-layer or multi-layer structure formed of molybdenum, aluminum, titanium, etc. Wherein, when the partition wall 400, the first pole 251 and the second pole 252 are of a multi-layer structure, the multi-layer structure may be a multi-metal layer stack, such as a titanium, aluminum, titanium (Ti/Al/Ti) three-layer metal stack; or a three-layer metal stack of molybdenum, aluminum, molybdenum (Mo/Al/Mo), etc.

In this embodiment, the isolation wall 400 and the source-drain electrode layer 250 can be formed by using the same mask, and compared with the i-shaped isolation column in the related art, the process of the isolation wall 400 is simpler, and one process is saved, so that the manufacturing efficiency of the display panel 10 can be improved, and the manufacturing cost of the display panel 10 can be reduced.

In one embodiment, as shown in fig. 2 and 3, the partition wall 400 includes a plurality of first and second partitions 410 and 420. In the description of the present application, the meaning of "plurality" is two or more.

The first isolation portions 410 are disposed on the sidewalls of the groove 241. Each of the first isolation portions 410 has a protruding end 411 located outside the groove 241, and the protruding end 411 is used to block the second electrode layer 330. The second isolation part 420 is connected between two first isolation parts 410 arranged oppositely, and the second isolation part 420 is arranged at the bottom wall of the groove 241.

Illustratively, the partition wall 400 may be a ring-shaped structure disposed around the open hole region 10b. At this time, the groove 241 is ring-shaped, and the groove 241 includes two sidewalls and a bottom wall between the two sidewalls. Accordingly, there are two first isolation portions 410, and the two first isolation portions 410 are respectively disposed on two sidewalls of the groove 241. The second isolation parts 420 are connected to one ends of the two first isolation parts 410 near the substrate 100. In preparation, after the interlayer dielectric layer 240 is formed, a metal layer may be formed on a side of the interlayer dielectric layer 240 facing away from the substrate 100. The metal layer is then patterned to form the first pole 251, the second pole 252 and the spacer 400 such that the protruding end 411 of the spacer 400 protrudes from the surface of the interlayer dielectric layer 240 on the side facing away from the substrate 100.

In this embodiment, by making the partition wall 400 include the plurality of first partition portions 410 and the second partition portions 420, the extending ends 411 of the first partition portions 410 can disconnect the second electrode layer 330, so as to prevent water vapor and oxygen from spreading along the second electrode layer 330 to the display area 10a, effectively isolate the water-oxygen path, thereby avoiding the failure of the organic light emitting layer 320 and prolonging the service life of the display panel 10.

In one embodiment, as shown in fig. 2 and 3, the protruding end 411 of the first partition 410 includes a first end surface 4111 and a second end surface 4112, the first end surface 4111 being disposed near the center of the groove 241, the second end surface 4112 being disposed away from the center of the groove 241, the first end surface 4111 and the second end surface 4112 forming an included angle. For example, in the examples of fig. 2 and 3, an end of the first end surface 4111 facing away from the substrate 100 is connected to an end of the second end surface 4112 facing away from the substrate 100, and an included angle between the connection of the first end surface 4111 and the second end surface 4112 is a sharp angle smaller than 90 °.

Thus, the portion of the second electrode layer 330 extending to the isolation region 10c may be disconnected at the first end surface 4111 and the second end surface 4112, so as to prevent external moisture and oxygen from spreading along the second electrode layer 330 from the opening region 10b to the display region 10a, thereby further preventing the organic light emitting layer 320 from being disabled and improving the long-term reliability of the display panel 10. Moreover, the angle between the first end face 4111 and the second end face 4112 may increase the level difference of the disconnection of the second electrode layer 330, making it easier for the second electrode layer 330 to be disconnected at the first end face 4111 and the second end face 4112.

In one embodiment, referring to fig. 2 and 3, second end face 4112 is not coplanar with the sidewalls of groove 241. For example, in the examples of fig. 2 and 3, the portion of the first partition 410 located within the groove 241 includes a third end surface disposed near the center of the groove 241 and a fourth end surface disposed away from the center of the groove 241, the fourth end surface conforming to the sidewall of the groove 241. Wherein the third end face is coplanar with the first end face 4111 and the fourth end face is not coplanar with the second end face 4112. Thereby, the second end face 4112 and the first end face 4111 may form an angle, thereby effectively blocking the second electrode layer 330.

In one embodiment, referring to fig. 3 in combination with fig. 6, the width w of the orthographic projection of each first isolation portion 410 on the substrate 100 is 0.5 μm to 0.7 μm (inclusive). Specifically, when w is less than 0.5 μm, the width of the orthographic projection of each first isolation portion 410 on the substrate 100 is too small, greatly increasing the process difficulty of the isolation wall 400, and reducing the preparation efficiency; when w is greater than 0.7 μm, the width of the orthographic projection of each first partition 410 on the substrate is excessively large, resulting in excessive material cost of the partition wall 400. Thus, by making the width w of the orthographic projection of each first isolation portion 410 on the substrate 100 be 0.5 μm to 0.7 μm, the first isolation portion 410 effectively cuts off the second electrode layer 330, and at the same time, the difficulty of the manufacturing process is low, so that the manufacturing efficiency of the isolation wall 400 can be improved, and the cost can be reduced.

In one embodiment, as shown in fig. 2, 3 and 5, the connection between the second isolation portion 420 and the first isolation portion 410 forms an angle greater than 90 °. For example, in the example of fig. 5, the shape of the spacer column is adapted to the shape of the groove 241. The cross section of the groove 241 is inverted trapezoid, and the connection part of the side wall and the bottom wall of the groove 241 forms an included angle of more than 90 degrees. Accordingly, the connection between the second isolation portion 420 and the first isolation portion 410 forms an included angle greater than 90 °.

In this embodiment, the connection between the second isolation portion 420 and the first isolation portion 410 forms an included angle greater than 90 °, so that the first isolation portion 410 can be better deposited on the side wall of the groove 241, and the second isolation portion 420 can be better deposited on the bottom wall of the groove 241, thereby reducing the difficulty in the manufacturing process of the whole isolation wall 400.

In one embodiment, the thickness of the second spacer 420 is less than the thickness of the interlayer dielectric layer 240. For example, in the example of fig. 2 and 3, a side surface of the second spacer 420 facing away from the substrate 100 is recessed from a side surface of the interlayer dielectric layer 240 facing away from the substrate 100.

In one embodiment, as shown in fig. 2, 3 and 5, a groove 241 penetrates the interlayer dielectric layer 240 in a thickness direction of the interlayer dielectric layer 240, and the groove 241 is defined by the gate insulating layer 230 and the interlayer dielectric layer 240 together. For example, in the examples of fig. 2, 3, and 5, the recess 241 is defined by the second gate insulating layer 232 and the interlayer dielectric layer 240 together. The bottom wall of the recess 241 is a portion of a side surface of the second gate insulating layer 232 facing away from the substrate 100. The depth of the groove 241 is equal to the thickness of the interlayer dielectric layer 240.

In one embodiment, the number of the partition walls 400 is 5 or more. Wherein, the plurality of partition walls 400 may be arranged at intervals. So set up, a plurality of partition walls 400 can be better with second electrode layer 330 disconnection, avoid steam and oxygen to spread along second electrode layer 330, play the effect of effectual isolated water oxygen passageway to avoid leading to organic luminescent layer 320 inefficacy because external water oxygen gets into organic luminescent layer 320, effectively prolong display panel 10's life.

A display device according to an example of the second aspect of the present application includes the display panel 10 according to any of the embodiments of the first aspect of the present application described above. By way of example, the display device may be any product or component having a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

According to the display device of the embodiment of the application, by adopting the display panel 10, the organic light-emitting layer 320 is prevented from being invalid due to the fact that external water and oxygen enter the organic light-emitting layer 320, the service life of the display panel 10 is effectively prolonged, and accordingly the reliability of the display device is improved.

Other configurations of the display panel 10 and the display device of the above-described embodiments may be applied to various technical solutions now and in the future known to those skilled in the art, and will not be described in detail herein.

In the description of the present specification, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature.

In this application, unless specifically stated and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; the device can be mechanically connected, electrically connected and communicated; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

In this application, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, and may also include the first and second features not being in direct contact but being in contact with each other by way of additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is less level than the second feature.

The above disclosure provides many different embodiments or examples for implementing different structures of the present application. The components and arrangements of specific examples are described above in order to simplify the disclosure of this application. Of course, they are merely examples and are not intended to limit the present application. Furthermore, the present application may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not in themselves indicate the relationship between the various embodiments and/or arrangements discussed.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of various changes or substitutions within the technical scope of the present application, and these should be covered in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (11)

1. A display panel provided with a display area, an open area, and an isolation area between the display area and the open area, the isolation area being disposed at least partially around the open area, the display panel comprising:

a substrate;

the thin film transistor is arranged in the display area and comprises a grid electrode, a grid electrode insulating layer, an interlayer dielectric layer and a source-drain electrode layer which are sequentially arranged along the direction deviating from the substrate, wherein the source-drain electrode layer comprises a first electrode and a second electrode, and a groove is formed in the interlayer dielectric layer;

the light-emitting device is arranged in the display area and comprises a first electrode layer, an organic light-emitting layer and a second electrode layer which are sequentially arranged along the direction deviating from the substrate, and the first electrode layer is arranged on one side of the source-drain electrode layer deviating from the substrate and is connected with the first electrode;

at least one isolation wall is arranged in the isolation region, one part of the isolation wall is positioned in the groove, and the other part of the isolation wall is positioned outside the groove so as to isolate the second electrode layer.

2. The display panel according to claim 1, wherein the partition wall and the source-drain electrode layer are made of the same material, and the partition wall and the source-drain electrode layer are formed by one process.

3. The display panel of claim 1, wherein the partition wall comprises:

the first isolation parts are correspondingly arranged on the side walls of the grooves, each first isolation part is provided with an extending end positioned outside the groove, and the extending ends are used for isolating the second electrode layer;

the second isolation part is connected between the two first isolation parts which are oppositely arranged, and the second isolation part is arranged on the bottom wall of the groove.

4. A display panel according to claim 3, wherein the protruding end of the first spacer comprises a first end face and a second end face, the first end face being arranged close to the centre of the recess, the second end face being arranged away from the centre of the recess, the first end face and the second end face forming an angle.

5. The display panel of claim 4, wherein the second end surface is not coplanar with a sidewall of the recess.

6. A display panel according to claim 3, wherein the width of the orthographic projection of each first spacer on the substrate is 0.5 μm to 0.7 μm.

7. A display panel according to claim 3, wherein the connection between the second isolation portion and the first isolation portion forms an angle of more than 90 °.

8. The display panel of claim 3, wherein a thickness of the second spacer is less than a thickness of the interlayer dielectric layer.

9. The display panel according to any one of claims 1 to 8, wherein the recess penetrates the interlayer dielectric layer in a thickness direction of the interlayer dielectric layer, the recess being defined by the gate insulating layer and the interlayer dielectric layer together.

10. The display panel according to any one of claims 1 to 8, wherein the number of the partition walls is 5 or more.

11. A display device comprising the display panel according to any one of claims 1 to 10.

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