CN116387220A - Method and system for calibrating wafer alignment - Google Patents
Method and system for calibrating wafer alignment Download PDFInfo
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- CN116387220A CN116387220A CN202111578785.7A CN202111578785A CN116387220A CN 116387220 A CN116387220 A CN 116387220A CN 202111578785 A CN202111578785 A CN 202111578785A CN 116387220 A CN116387220 A CN 116387220A
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000003550 marker Substances 0.000 claims description 26
- 238000005259 measurement Methods 0.000 claims description 7
- 239000011521 glass Substances 0.000 claims description 4
- 239000010453 quartz Substances 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 238000004378 air conditioning Methods 0.000 claims 5
- 235000012431 wafers Nutrition 0.000 description 35
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000004590 computer program Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The present application relates to a method for calibrating wafer alignment. In one embodiment of the present application, the method for calibrating wafer alignment includes: providing a first sign board having a first surface and a second surface opposite the first surface, and having a first sign, the first sign being located on the first surface of the first sign board; providing a second sign board having a first surface and a second surface opposite the first surface and having a second sign, the second sign being located on the first surface of the second sign board; placing the first surface of the first sign board face-to-face with the first surface of the second sign board; providing a microscope, focusing the microscope on the first mark above the second surface of the first mark plate, and obtaining a first focal length Z1; taking out the first identification plate, enabling the microscope to focus the second identification above the first surface of the second identification plate, and obtaining a second focal length Z2; and determining a compensation parameter Δz that is the second focal length Z2 minus the first focal length Z1.
Description
Technical Field
The present application relates generally to the field of semiconductor processing equipment, and more particularly, to a method and system for calibrating wafer alignment.
Background
The wafer bonding technology is to combine two wafers, which are homogeneous or heterogeneous, into a whole by generating molecular force between the two wafers under the action of external force. In the wafer bonding technology, the alignment accuracy is an important parameter.
With the development of chip technology, the integration level of chips is higher and higher, and the requirement on wafer bonding alignment precision is also gradually increased. The wafer alignment process is to perform image acquisition on alignment marks prepared on the surfaces of two wafers by an upper microscope and a lower microscope respectively, and align the wafers by analyzing pictures acquired by the two sets of microscopes. Wherein systematic errors from the upper and lower microscopes are inherently present and can reduce wafer alignment accuracy. The current method mainly adopts a film to perform confocal calibration, but the method does not compensate the thickness of the film, which reduces the confocal calibration effect.
Disclosure of Invention
The application provides a method and a system for calibrating wafer alignment, which adopt a transparent identification plate to perform confocal calibration, and compensate the thickness of the transparent identification plate, so that the system error brought by an upper microscope and a lower microscope can be reduced, and the confocal calibration effect of the upper microscope and the lower microscope is improved.
In one aspect, the present application provides a method for calibrating wafer alignment, comprising: providing a first sign board having a first surface and a second surface opposite the first surface, and having a first sign, the first sign being located on the first surface of the first sign board; providing a second sign board having a first surface and a second surface opposite the first surface and having a second sign, the second sign being located on the first surface of the second sign board; placing the first surface of the first sign board face-to-face with the first surface of the second sign board; providing a microscope, focusing the microscope on the first mark above the second surface of the first mark plate, and obtaining a first focal length Z1; taking out the first identification plate, enabling the microscope to focus the second identification above the first surface of the second identification plate, and obtaining a second focal length Z2; and determining a compensation parameter Δz that is the second focal length Z2 minus the first focal length Z1.
According to an embodiment of the present application, in the method, placing the first surface of the first sign face-to-face with the first surface of the second sign comprises: providing a platform; and placing the second sign on the platform such that the second sign is exposed on a focal path of the microscope.
According to an embodiment of the present application, the method further comprises: the stage is moved in the focusing path of the microscope to focus the microscope on the first or second marker.
According to an embodiment of the present application, the first sign board comprises transparent glass or quartz.
According to an embodiment of the present application, the method further comprises, after determining the compensation parameter Δz, performing the following operations: providing a first microscope, focusing the first microscope on the first mark above the second surface of the first mark plate, and obtaining a focal length Z3; and compensating the first microscope, so that the focal length ZC after compensation is the focal length Z3 plus the compensation parameter delta Z.
According to an embodiment of the present application, the method further comprises: a second microscope is provided that focuses the first marker below the first surface of the first marker panel.
In another aspect, the present application also provides a system for calibrating wafer alignment, comprising: a processor; and a compensation measurement device, comprising: a first sign board having a first sign; a second sign board having a second sign, wherein the first sign is placed face-to-face with the second sign; and a microscope which focuses the first mark above the first mark plate on a focusing path to obtain a first focal length Z1 under the control of the processor, and then focuses the second mark above the second mark plate on the focusing path to obtain a second focal length Z2, wherein the processor determines a compensation parameter delta Z which is obtained by subtracting the first focal length Z1 from the second focal length Z2 based on the first focal length Z1 and the second focal length Z2.
According to an embodiment of the present application, the first sign board has a first surface and a second surface opposite to the first surface, wherein the first sign is located on the first surface of the first sign board, and the second sign board has a first surface and a second surface opposite to the first surface, wherein the second sign is located on the first surface of the second sign board.
According to an embodiment of the application, the system further comprises a stage that moves on the focal path under the control of the processor.
According to an embodiment of the present application, the system further comprises a wafer alignment calibration device comprising: the first microscope focuses the first mark above the first mark plate under the control of the processor to obtain a focal length Z3, wherein the processor determines a compensation focal length ZC of the first microscope based on the focal length Z3 and the compensation parameter DeltaZ, and the compensation parameter DeltaZ is added to the focal length Z3.
According to an embodiment of the present application, the wafer alignment calibration device further includes: a second microscope, under control of the processor, focuses the first marker under the first marker panel.
The details of one or more examples of the application are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.
Drawings
The disclosure in this specification refers to and includes the following figures:
FIG. 1 is a schematic diagram of a system for calibrating wafer alignment according to some embodiments of the present application;
FIGS. 2A and 2B are schematic illustrations of operations performed by the compensation measurement device of FIG. 1, according to some embodiments of the present application;
FIGS. 3A, 3B and 3C are schematic diagrams of operations performed by the wafer alignment calibration apparatus of FIG. 1, according to some embodiments of the present application;
fig. 4 is a flow chart of a method for calibrating wafer alignment according to some embodiments of the present application.
In accordance with common practice, the various features illustrated in the drawings may not be drawn to scale. Accordingly, the dimensions of the various features may be arbitrarily expanded or reduced for clarity. The shapes of the various components illustrated in the figures are merely exemplary shapes and are not intended to limit the actual shapes of the components. In addition, the embodiments illustrated in the drawings may be simplified for clarity. Thus, the illustrations may not illustrate all of the components of a given device or apparatus. Finally, the same reference numerals may be used throughout the specification and drawings to refer to the same features.
Detailed Description
For a better understanding of the spirit of the present invention, it is further described below in connection with some embodiments thereof.
The appearances of the phrase "in one embodiment" or "in accordance with one embodiment" in various places in the specification are not necessarily all referring to the same specific embodiment, nor are "in other embodiment(s) or" in accordance with other embodiment(s) "in the specification. It is intended that, for example, claimed subject matter include all or a combination of portions of example embodiments. The meaning of "up" and "down" referred to herein is not limited to the relationship directly presented by the drawings, which shall include descriptions having explicit correspondence, such as "left" and "right", or vice versa. The term "connected" as used herein is understood to encompass "directly connected" as well as "connected via one or more intermediate components. The names of the various components used in the present specification are for illustration purposes only and are not limiting, and different manufacturers may use different names to refer to components having the same function.
Various embodiments of the present invention are discussed in detail below. Although specific implementations are discussed, it should be understood that these implementations are for illustrative purposes only. One skilled in the relevant art will recognize that other components and configurations may be used without departing from the spirit and scope of the invention.
Fig. 1 is a schematic diagram of a system 100 for calibrating wafer alignment according to some embodiments of the present application.
Referring to fig. 1, a system 100 includes a compensation measurement device 101, a wafer alignment calibration device 102, and a processor 103. The compensation measuring device 101 performs compensation-related operations under the control of the processor 103 and generates compensation-related data Z1 and Z2. The processor 103 determines the compensation parameter deltaz based on the compensation-related data Z1 and Z2. The wafer alignment calibration device 102 performs calibration-related operations based on the compensation parameter Δz under the control of the processor 103, and generates height data ZC and ZL of the calibrated upper and lower microscopes. The processor 103 has associated hardware and computer programs to support the operation of the compensation measurement device 101 and the wafer alignment calibration device 102. The components and operation of the compensation measurement device 101 are discussed in detail below with reference to fig. 2A and 2B, while the components and operation of the wafer alignment calibration device 102 are discussed in detail below with reference to fig. 3A, 3B, and 3C.
Fig. 2A and 2B are schematic diagrams of operations performed by the compensation measurement device 101 of fig. 1, according to some embodiments of the present application.
Referring to fig. 2A, the compensation measuring device 101 includes a microscope 10, a first identification plate 30, and a second identification plate 50. The microscope 10 has an objective lens 102. The first sign board 30 has a first surface 30a and a second surface 30b opposite to the first surface 30a, and has a first sign M1 on the first surface 30 a. According to an embodiment of the present application, the first sign board 30 comprises transparent glass or quartz. According to one embodiment of the present application, the first sign board 30 is rectangular in shape, having a length and width of about 10 to 20 mm and a thickness of about 1 mm. According to another embodiment of the present application, the first sign board 30 is circular in shape having a diameter of about 10 to 20 mm and a thickness of about 1 mm. The second identification plate 50 has a first surface 50a and a second surface 50b opposite to the first surface 50a, and has a second identification M2 located on the first surface 50 a. The first and second indicia plates 30, 50 are placed on the movable platform 70 in a face-to-face relationship with the first and second indicia M1, M2, wherein the first and second indicia M1, M2 may not necessarily be aligned with each other. The movable stage 70 and the microscope 10 can move relatively on the focusing path P of the microscope 10 to bring the first mark M1 and the second mark M2 into view of the microscope 10, so as to facilitate focusing of the microscope 10.
According to an embodiment of the present application, the movable stage 70 is moved in the direction of the focusing path P under the control of the processor 103 to focus the microscope 10 on the first marker M1 of the first marker plate 30 above the second surface 30b of the first marker plate 30 and to obtain a first focal length Z1, which is the distance from the objective lens 102 of the microscope 10 to the first marker M1. Thereafter, the first identification panel 30 is removed from the movable platform 70.
Referring to fig. 2B, under the control of the processor 103, the movable platform 70 is moved in the direction of the focusing path P, so that the microscope 10 focuses the second mark M2 above the first surface 50a of the second mark plate 50, and a second focal length Z2 is obtained, which is the distance between the objective lens 102 of the microscope 10 and the second mark M2 after the first mark plate 30 is removed.
The processor 103 determines a compensation parameter Δz based on the first focal length Z1 and the second focal length Z2, which is the second focal length Z2 minus the first focal length Z1, i.e., Δz=z2-Z1. Δz is the amount of compensation for the thickness of the first sign plate 30 when confocal calibration is performed using the first sign plate 30. This compensation amount will be used to calibrate the wafer alignment.
Fig. 3A, 3B, and 3C are schematic diagrams of operations performed by the wafer alignment calibration device 102 of fig. 1, according to some embodiments of the present application.
Referring to fig. 3A, the wafer alignment calibration apparatus 102 includes a first microscope 81, a second microscope 82, and a first identification plate 30. The first microscope 81 has a first objective lens 812 and the second microscope 82 has a second objective lens 822. Under the control of the processor 103, the first microscope 81 is focused on the first mark M1 above the second surface 30b of the first mark plate 30 to obtain a focal length Z3, which is a distance between the first objective lens 812 of the first microscope 81 and the first mark M1, wherein the focusing path P1 of the first microscope 81 is determined by the first mark M1 and the center of the first objective lens 812 of the first microscope 81. Then, the processor 103 determines the compensation focal length ZC of the first microscope 81 based on the focal length Z3 and the compensation parameter Δz, which is the focal length Z3 plus the compensation parameter Δz, i.e., zc=z3+Δz.
Referring to fig. 3B, under the control of the processor 103, the first identification plate 30 is moved relative to the first microscope 81 in the direction of the focusing path P1, so that the distance between the first identification M1 of the first identification plate 30 and the first objective lens 812 of the first microscope 81 is the compensation focal length ZC.
Then, referring to fig. 3C, under the control of the processor 103, the second microscope 82 is focused on the first mark M1 under the first surface 30a of the first mark plate 30 to obtain a focal length ZL, which is a distance between the second objective lens 822 of the second microscope 82 and the first mark M1. Then, the focal length ZC and the focal length ZL can be used for aligning the upper wafer and the lower wafer during wafer bonding.
According to an embodiment of the present application, the microscope 10 of fig. 2A and 2B and the first and second microscopes 81, 82 of fig. 3A, 3B and 3C have the same magnification.
Fig. 4 is a flow chart of a method for calibrating wafer alignment according to some embodiments of the present application.
Referring to fig. 4, in operation 412, a first identification panel is provided having a first identification.
In operation 414, a second identification panel is provided having a second identification.
In operation 416, the first identifier is placed face-to-face with the second identifier.
In operation 418, a microscope is provided, the microscope is focused on the first marker on a focus path, and a first focal length Z1 is taken.
In operation 420, the first identification panel is removed.
In operation 422, the microscope is focused on the second marker on the focus path and a second focal length Z2 is taken.
In operation 424, a compensation parameter Δz is determined, which is the second focal length Z2 minus the first focal length Z1.
In operation 426, a first microscope is provided, which is focused on the first marker above the first marker plate and a focal distance Z3 is taken.
In operation 428, the first microscope is compensated such that the compensated focal length ZC is the focal length Z3 plus the compensation parameter Δz.
In operation 430, a second microscope is provided that focuses the first marker below the first marker panel to obtain a focal length ZL.
The focal length ZC and the focal length ZL can be used for aligning an upper wafer and a lower wafer during wafer bonding.
The thickness of the film subjected to confocal calibration is not compensated compared with the current method, so that the confocal calibration effect is reduced. The method and the system for calibrating the wafer alignment adopt the transparent identification plate to perform confocal calibration, and compensate the thickness of the transparent identification plate, so that the system errors brought by the upper microscope and the lower microscope can be reduced, and the confocal calibration effect of the upper microscope and the lower microscope is improved.
The description herein is provided to enable any person skilled in the art to make or use the invention. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (13)
1. A method for calibrating wafer alignment, comprising:
providing a first sign board having a first surface and a second surface opposite the first surface, and having a first sign, the first sign being located on the first surface of the first sign board;
providing a second sign board having a first surface and a second surface opposite the first surface and having a second sign, the second sign being located on the first surface of the second sign board;
placing the first surface of the first sign board face-to-face with the first surface of the second sign board;
providing a microscope, focusing the microscope on the first mark above the second surface of the first mark plate, and obtaining a first focal length Z1;
taking out the first identification plate, enabling the microscope to focus the second identification above the first surface of the second identification plate, and obtaining a second focal length Z2; a kind of electronic device with high-pressure air-conditioning system
A compensation parameter Δz is determined, which is the second focal length Z2 minus the first focal length Z1.
2. The method of claim 1, wherein placing the first surface of the first sign face-to-face with the first surface of the second sign comprises:
providing a platform; a kind of electronic device with high-pressure air-conditioning system
The second sign board is placed on the platform such that the second sign is exposed on a focal path of the microscope.
3. The method as recited in claim 2, further comprising:
the stage is moved in the focusing path of the microscope to focus the microscope on the first or second marker.
4. The method of claim 1, wherein the first identification panel comprises transparent glass or quartz.
5. The method of claim 1, further comprising, after determining the compensation parameter Δz:
providing a first microscope, focusing the first microscope on the first mark above the second surface of the first mark plate, and obtaining a focal length Z3; a kind of electronic device with high-pressure air-conditioning system
And compensating the first microscope, so that the focal length ZC after compensation is the focal length Z3 plus the compensation parameter delta Z.
6. The method of claim 5, further comprising:
a second microscope is provided that focuses the first marker below the first surface of the first marker panel.
7. A system for calibrating wafer alignment, comprising:
a processor; a kind of electronic device with high-pressure air-conditioning system
A compensation measurement device, comprising:
a first sign board having a first sign;
a second sign board having a second sign, wherein the first sign is placed face-to-face with the second sign; a kind of electronic device with high-pressure air-conditioning system
A microscope, under the control of the processor, focusing the first marker over the first marker plate on a focusing path to obtain a first focal length Z1, and then focusing the second marker over the second marker plate on the focusing path to obtain a second focal length Z2,
wherein the processor determines a compensation parameter Δz based on the first focal length Z1 and the second focal length Z2, which is the second focal length Z2 minus the first focal length Z1.
8. The system of claim 7, wherein the first sign board has a first surface and a second surface opposite the first surface, wherein the first sign is located on the first surface of the first sign board and the second sign board has a first surface and a second surface opposite the first surface, wherein the second sign is located on the first surface of the second sign board.
9. The system of claim 7, wherein the first identification panel comprises transparent glass or quartz.
10. The system of claim 7, further comprising a stage that moves on the focal path under control of the processor.
11. The system of claim 7, further comprising a wafer alignment calibration device, the wafer alignment calibration device comprising:
a first microscope, under control of the processor, focusing the first marker over the first marker panel to obtain a focal length Z3,
wherein the processor determines a compensation focal length ZC of the first microscope based on the focal length Z3 and the compensation parameter Δz, which is the focal length Z3 plus the compensation parameter Δz.
12. The system of claim 11, wherein the wafer alignment calibration device further comprises:
a second microscope, under control of the processor, focuses the first marker under the first marker panel.
13. The system of claim 12, wherein the microscope, the first microscope, and the second microscope have the same magnification.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111578785.7A CN116387220A (en) | 2021-12-22 | 2021-12-22 | Method and system for calibrating wafer alignment |
| PCT/CN2022/126488 WO2023116160A1 (en) | 2021-12-22 | 2022-10-20 | Method and system for calibrating wafer alignment |
| TW111145120A TW202333284A (en) | 2021-12-22 | 2022-11-25 | Method and system for calibrating wafer alignment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111578785.7A CN116387220A (en) | 2021-12-22 | 2021-12-22 | Method and system for calibrating wafer alignment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116387220A true CN116387220A (en) | 2023-07-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111578785.7A Pending CN116387220A (en) | 2021-12-22 | 2021-12-22 | Method and system for calibrating wafer alignment |
Country Status (3)
| Country | Link |
|---|---|
| CN (1) | CN116387220A (en) |
| TW (1) | TW202333284A (en) |
| WO (1) | WO2023116160A1 (en) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AT405775B (en) * | 1998-01-13 | 1999-11-25 | Thallner Erich | Method and apparatus for bringing together wafer-type (slice-type, disk-shaped) semiconductor substrates in an aligned manner |
| CN103258762B (en) * | 2007-08-10 | 2016-08-03 | 株式会社尼康 | Base Plate Lamination Device and method for bonding substrate |
| WO2010023935A1 (en) * | 2008-08-29 | 2010-03-04 | 株式会社ニコン | Substrate aligning apparatus, substrate aligning method and method for manufacturing multilayer semiconductor |
| JP5454310B2 (en) * | 2010-04-01 | 2014-03-26 | 株式会社ニコン | Substrate bonding apparatus and substrate bonding method |
| JP5549335B2 (en) * | 2010-04-07 | 2014-07-16 | 株式会社ニコン | Substrate observation apparatus and device manufacturing method |
| JP6307730B1 (en) * | 2016-09-29 | 2018-04-11 | 株式会社新川 | Semiconductor device manufacturing method and mounting apparatus |
-
2021
- 2021-12-22 CN CN202111578785.7A patent/CN116387220A/en active Pending
-
2022
- 2022-10-20 WO PCT/CN2022/126488 patent/WO2023116160A1/en unknown
- 2022-11-25 TW TW111145120A patent/TW202333284A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| TW202333284A (en) | 2023-08-16 |
| WO2023116160A1 (en) | 2023-06-29 |
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