CN116386545A - Pixel driving circuit, compensation method thereof and display panel - Google Patents

Abstract

The application discloses a pixel drive circuit and compensation method, display panel thereof, pixel drive circuit includes: the device comprises a reset circuit, a capacitance circuit, a precharge circuit, a data input circuit and a light-emitting circuit, wherein the reset circuit is connected with a first node, a second node and a third node, and resets the voltage of the first node and the voltage of the third node to zero voltage under the control of a first enabling signal; the precharge circuit is connected with the second enabling signal and the third enabling signal and charges the voltage compensation of the fourth node under the control of the second enabling signal and the third enabling signal; and the light emitting circuit is connected with the second node, the third node, the fourth node, the fifth node and the sixth node, emits light under the voltage control of the third enabling signal and the fourth node, and compensates the threshold voltage of the driving thin film transistor in each pixel driving circuit by the scheme, so that the current flowing through the OLED light emitting unit is irrelevant to the threshold voltage.

Description

Pixel driving circuit, compensation method thereof and display panel

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a pixel driving circuit, a compensation method thereof, and a display panel.

Background

OLED (Organic Light-Emitting Diode) displays have many advantages of thin body, power saving, bright color, strong image quality and the like, and are widely applied. Such as OLED televisions, mobile phones, notebook computers, etc., are increasingly dominant in the field of flat panel displays. In the OLED display panel, pixels are arranged in a matrix form including a plurality of rows and a plurality of columns, and the earliest pixel design generally adopts a structure that each pixel is composed of two transistors (T) and a capacitor (C), which is also called a 2T1C pixel circuit, but the transistors have a problem of threshold voltage drift.

In the current process, there is a problem of uniformity or stability of the low temperature polysilicon thin film transistor (LTPS TFT) or the Oxide thin film transistor (Oxide TFT), and the OLED itself is gradually attenuated with the increase of the lighting time. The light-emitting brightness of an OLED is generally proportional to the current provided by a Thin Film Transistor (TFT), and the parameters affecting the magnitude of the current are TFT mobility, threshold voltage, driving voltage of the OLED, and magnitude of power supply voltage, which are related to the characteristic parameters of the TFT. In this regard, a need exists for a pixel driving circuit that compensates for the TFT threshold voltage.

Disclosure of Invention

The invention provides a pixel driving circuit, a compensation method thereof and a display panel, which are used for compensating threshold voltage of a driving thin film transistor in each pixel driving circuit, so that current flowing through an OLED light emitting unit is irrelevant to the threshold voltage.

The application discloses a pixel drive circuit includes: the device comprises a reset circuit, a capacitance circuit, a precharge circuit, a data input circuit and a light-emitting circuit, wherein the reset circuit is connected with a first node, a second node and a third node, is connected with a first enabling signal, and resets the voltage of the first node and the voltage of the third node to zero voltage under the control of the first enabling signal; the capacitor circuit is connected with the first node and the fourth node, and stores the voltage of the first node and the voltage of the fourth node; the precharge circuit is connected with the fourth node, the fifth node and the sixth node, is connected with a second enabling signal and a third enabling signal, and charges the voltage compensation of the fourth node under the control of the second enabling signal and the third enabling signal; the data input circuit is connected with the first node, is connected with a scanning signal and a data signal, and transmits the data signal to the first node under the control of the scanning signal; and the light-emitting circuit is connected with the second node, the third node, the fourth node, the fifth node and the sixth node, is connected with a third enabling signal, and emits light under the voltage control of the third enabling signal and the fourth node.

Optionally, the data input circuit includes a first active switch, a control end of the first active switch is connected to the scanning signal, an input end of the first active switch is connected to the data signal, and an output end of the first active switch is connected to the first node; the reset circuit comprises a second active switch and a third active switch, wherein the control end of the second active switch and the control end of the third active switch are respectively connected with a first enabling signal, the input end of the second active switch is connected to the first node, the output end of the second active switch is connected to the second node, and the second node is grounded; the input end of the third active switch is connected with a third node, and the output end of the third active switch is grounded.

Optionally, the capacitor circuit includes a first capacitor, one end of the first capacitor is connected to the first node, and the other end of the first capacitor is connected to the second node; the light-emitting circuit comprises a sixth active switch, a seventh active switch and a light-emitting unit, one end of the light-emitting unit is connected with the second node, the other end of the light-emitting unit is connected with the third node, the control end of the seventh active switch is connected with the third enabling signal, the output end of the seventh active switch is connected with the third node, the input end of the seventh active switch is connected with the sixth node, the control end of the sixth active switch is connected with the fourth node, the output end of the sixth active switch is connected with the sixth node, and the input end of the sixth active switch is connected with the fifth node; the precharge circuit comprises a fourth active switch, a fifth active switch and an eighth active switch, wherein the control end of the fourth active switch is connected with the third enabling signal, the input end of the fourth active switch is connected with the fourth node, the output end of the fourth active switch is connected to the fifth node, the control end of the fifth active switch and the control end of the eighth active switch are respectively connected with the second enabling signal, the input end of the fifth active switch is connected with a power supply voltage, the output end of the fifth active switch is connected with the fifth node, the input end of the eighth active switch is connected with the sixth node, and the output end of the eighth active switch is grounded.

Optionally, the first active switch, the second active switch, the third active switch, the fourth active switch and the eighth active switch are respectively N-type thin film transistors, and the fifth active switch and the seventh active switch are respectively P-type thin film transistors.

Optionally, the timing of the pixel driving circuit includes: a reset phase, a precharge phase, a threshold value latch phase, a data input phase and a light emitting phase; in the reset stage, the first enabling signal is at a first potential, and the second enabling signal, the third enabling signal and the data signal are respectively at a second potential; in the precharge phase, the third enable signal is at a first potential, and the first enable signal, the second enable signal and the data signal are respectively at a second potential; in the threshold latching stage, the second enabling signal and the third enabling signal are respectively in a first potential, and the first enabling signal and the data signal are respectively in a second potential; in the data input stage, the third enabling signal and the data signal are respectively at a first potential, and the first enabling signal and the second enabling signal are respectively at a second potential; in the light emitting stage, the first enable signal, the second enable signal, the third enable signal and the data signal are respectively at a second potential.

Optionally, the timing of the pixel driving circuit includes: a reset phase, a precharge phase, a threshold value latch phase, a data input phase and a light emitting phase; in the reset phase, the second active switch and the third active switch are turned on; during the precharge phase, the fourth active switch and the fifth active switch are turned on; in the threshold latching stage, the fourth active switch, the sixth active switch and the eighth active switch are turned on, and when the potential of the fourth node drops to the threshold voltage of the sixth active switch, the sixth active switch is turned off; in the data input stage, the first active switch, the fourth active switch and the fifth active switch are turned on; in the lighting stage, the fifth active switch, the sixth active switch and the seventh active switch are turned on.

Optionally, the potential of the data signal is smaller than the potential of the power supply voltage.

Optionally, the first active switch, the second active switch, the third active switch, the fourth active switch, the fifth active switch, the sixth active switch, the seventh active switch and the eighth active switch are respectively a low-temperature polysilicon thin film transistor or an oxide thin film transistor or an amorphous silicon thin film transistor.

The application also discloses a display panel, which comprises the pixel driving circuit.

The application also discloses a compensation method of the pixel driving circuit, wherein the pixel driving circuit uses the pixel driving circuit, and the compensation method comprises the following steps:

entering a reset stage, wherein the first enabling signal is at a first potential, and the second enabling signal, the third enabling signal and the data signal are respectively at a second potential;

entering a precharge stage, wherein the third enabling signal is at a first potential, and the first enabling signal, the second enabling signal and the data signal are respectively at a second potential;

entering a threshold value latching stage, wherein the second enabling signal and the third enabling signal are respectively of a first potential, and the first enabling signal and the data signal are respectively of a second potential;

entering a data input stage, wherein the third enabling signal and the data signal are respectively of a first potential, and the first enabling signal and the second enabling signal are respectively of a second potential;

and entering a light emitting stage, wherein the first enabling signal, the second enabling signal, the third enabling signal and the data signal are respectively in a second potential.

In the application, firstly, by setting a reset circuit, the first node, the second node, the third node and other key nodes in the pixel driving circuit are subjected to grounding treatment or zero voltage treatment so as to empty residual charges in the pixel driving circuit. And secondly, the precharge circuit is a capacitor circuit, and the capacitor circuit is stored as the threshold voltage of the driving thin film transistor in a mode of charging and discharging firstly, so that the actual voltage of the fourth node is superposed with the threshold voltage in the data input stage, the threshold voltage of the driving thin film transistor (namely the threshold voltage of the driving thin film transistor) is compensated by directly grabbing the driving thin film transistor, the threshold voltage of the driving thin film transistor can be effectively compensated, the current flowing through the organic light emitting diode is stable, the uniform light emitting brightness of the organic light emitting diode is ensured, the influence of the threshold voltage on the circuit can be eliminated, the occurrence of ghost is prevented, the display quality is improved, the display effect of a picture is improved, the organic light emitting diode only emits light in the driving stage, the unnecessary light emission of the organic light emitting diode is avoided, and the power consumption is reduced.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive faculty for a person skilled in the art. In the drawings:

FIG. 1 is a schematic diagram of a pixel drive circuit of the present application;

FIG. 2 is a timing diagram of a pixel driving circuit of the present application;

FIG. 3a is a schematic circuit diagram of the pixel driving circuit of the present application during a reset phase;

FIG. 3b is a schematic circuit diagram of the pixel drive circuit of the present application during a precharge phase;

FIG. 3c is a circuit schematic of the pixel drive circuit of the present application during a threshold latch stage;

FIG. 3d is a schematic circuit diagram of the pixel driving circuit of the present application during a data writing stage;

FIG. 3e is a schematic circuit diagram of the pixel driving circuit of the present application during the light emitting phase;

FIG. 4 is a schematic diagram showing steps of a method for compensating a pixel driving circuit;

fig. 5 is a schematic view of a display panel according to the present application.

100, a pixel driving circuit; 110. a reset circuit; 120. a capacitance circuit; 130. a precharge circuit; 140. a data input circuit; 150. a light emitting circuit; 200. a display panel; c1, a first capacitor; DE1, first enable signal; DE2, second enable signal; DE3, third enable signal; an LED and a light emitting unit; DATA, DATA signals; SCAN, SCAN signal; t1, a first active switch; t2, a second active switch; t3, a third active switch; t4, a fourth active switch; t5, a fifth active switch; t6, sixth active switch; t7, a seventh active switch; t8, eighth active switch; A. a first node; B. a second node; D. a third node; E. a fourth node; F. a fifth node; G. and a sixth node.

Detailed Description

It should be understood that the terminology, specific structural and functional details disclosed herein are merely representative for purposes of describing particular embodiments, but that the application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.

In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or implicitly indicating the number of technical features indicated. Thus, unless otherwise indicated, features defining "first", "second" may include one or more such features either explicitly or implicitly; the meaning of "plurality" is two or more. In addition, terms of the azimuth or positional relationship indicated by "upper", "lower", "left", "right", "vertical", "horizontal", etc., are described based on the azimuth or relative positional relationship shown in the drawings, and are merely for convenience of description of the present application, and do not indicate that the apparatus or element referred to must have a specific azimuth, be constructed and operated in a specific azimuth, and thus should not be construed as limiting the present application. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

The present application is described in detail below with reference to the attached drawings and alternative embodiments.

Fig. 1 is a schematic diagram of a pixel driving circuit of the present application, and referring to fig. 1, the present application discloses a pixel driving circuit, including: the device comprises a reset circuit 110, a capacitor circuit 120, a precharge circuit 130, a data input circuit 140 and a light emitting circuit 150, wherein the reset circuit 110 is connected with a first node A, a second node B and a third node D, the reset circuit 110 is connected with a first enabling signal DE1, and the voltage of the first node A and the voltage of the third node D are reset to zero voltage under the control of the first enabling signal DE 1; the capacitor circuit 120 is connected to the first node a and the fourth node E, and the capacitor circuit 120 stores the voltage of the first node a and the voltage of the fourth node E; the precharge circuit 130 is connected to the fourth node E, the fifth node F, and the sixth node G, and the precharge circuit 130 is connected to the second enable signal DE2 and the third enable signal DE3, and charges the voltage compensation of the fourth node E under the control of the second enable signal DE2 and the third enable signal DE 3; the DATA input circuit 140 is connected to the first node a, the DATA input circuit 140 is connected to a SCAN signal SCAN and a DATA signal DATA, and the DATA signal DATA is transmitted to the first node a under the control of the SCAN signal SCAN; and the light emitting circuit 150 is connected to the second node B, the third node D, the fifth node F, and the sixth node G, and the light emitting circuit 150 is connected to a third enable signal, and emits light under the voltage control of the third enable signal and the fourth node E.

In this application, first, by setting the reset circuit 110, the key nodes such as the first node a, the second node B, and the third node D in the pixel driving circuit 100 are grounded or subjected to zero voltage treatment, so as to empty the residual charges in the pixel driving circuit 100. The pre-charge circuit 130 is used for storing the capacitor circuit 120 as the threshold voltage of the driving thin film transistor by a mode of charging and discharging the capacitor circuit 120, so that the actual voltage of the fourth node E is superposed with the threshold voltage in the data input stage, the threshold voltage of the driving thin film transistor (namely the threshold voltage of the driving thin film transistor) is directly grasped to perform threshold voltage compensation, the threshold voltage of the driving thin film transistor can be effectively compensated, the current flowing through the organic light emitting diode is stable, the uniform light emitting brightness of the organic light emitting diode is ensured, the influence of the threshold voltage on the circuit can be eliminated, the occurrence of ghost is prevented, the display quality is improved, the display effect of a picture is improved, the organic light emitting diode only emits light in the driving stage, the unnecessary light emission of the organic light emitting diode is avoided, and the power consumption is reduced.

Specifically, the DATA input circuit 140 includes a first active switch T1, a control end of the first active switch T1 is connected to the SCAN signal SCAN, an input end of the first active switch T1 is connected to the DATA signal DATA, and an output end of the first active switch T1 is connected to the first node a. The DATA input circuit 140 outputs the DATA signal DATA to the first node a mainly through the first active switch T1, and increases the potential of the fourth node E through the capacitor circuit 120. The fourth node E is connected to the gate of the driving tft of the light emitting circuit 150, the sixth node G is connected to the drain of the driving tft of the light emitting circuit 150, and the potential of the sixth node G is adjusted by the potential of the fourth node E, so as to control the OLED light emitting unit LEDs to have different light emitting intensities, thereby achieving different brightness of the light emitting devices under different DATA signals DATA.

However, the threshold voltages of the driving thin film transistors are affected by the process, and there may be a slight difference between the threshold voltages of two different driving thin film transistors under different processes or under the same process, so that there may be a problem that brightness of two pixels is different due to the difference of the threshold voltages of the driving thin film transistors under the same DATA signal DATA, and brightness unevenness is further caused. The present application mainly compensates for the threshold voltage by the precharge circuit 130 in combination with the capacitor circuit 120, as described in detail below. It should be noted that, the light emitting units LED in the light emitting circuit 150 may be active light emitting devices, such as organic light emitting diodes, and the organic light emitting diodes corresponding to each pixel are respectively red organic light emitting diodes, green organic light emitting diodes, blue organic light emitting diodes, and white organic light emitting diodes.

Specifically, the reset circuit 110 includes a second active switch T2 and a third active switch T3, where a control end of the second active switch T2 and a control end of the third active switch T3 are respectively connected to a first enable signal DE1, an input end of the second active switch T2 is connected to the first node a, an output end of the second active switch T2 is connected to the second node B, and the second node B is grounded; the input end of the third active switch T3 is connected with a third node D, and the output end of the third active switch T3 is grounded.

Specifically, the capacitor circuit 120 includes a first capacitor C1, one end of the first capacitor C1 is connected to the first node a, and the other end of the first capacitor C1 is connected to the second node B.

The third node D is an anode terminal of the light emitting unit LED, the first node a is one terminal of the capacitor circuit 120, and the reset circuit 110 uses the second active switch T2 and the third active switch T3 to perform grounding treatment on the first node a and the third node D, so that the potential of the first node a of the capacitor circuit 120 is set to zero, and the anode terminal of the light emitting unit LED is set to zero. In the reset stage, the first node a of the capacitor circuit 120 is connected to the output terminal of the first active switch T1, and the first node a is set to zero potential, so that the effect of the residual charge on the previous frame or the data line on the charging of the pixels of the current row is minimized.

Specifically, the light emitting circuit 150 includes a sixth active switch T6, a seventh active switch T7, and a light emitting unit LED, one end of the light emitting unit LED is connected to the second node B, the other end of the light emitting unit LED is connected to the third node D, a control end of the seventh active switch T7 is connected to the third enable signal DE3, an output end of the seventh active switch T7 is connected to the third node D, an input end of the seventh active switch T7 is connected to the sixth node G, a control end of the sixth active switch T6 is connected to the fourth node E, an output end of the sixth active switch T6 is connected to the sixth node G, and an input end of the sixth active switch T6 is connected to the fifth node F.

Specifically, the precharge circuit 130 includes a fourth active switch T4, a fifth active switch T5, and an eighth active switch T8, where a control end of the fourth active switch T4 is connected to the third enable signal DE3, an input end of the fourth active switch T4 is connected to the fourth node E, an output end of the fourth active switch T4 is connected to the fifth node F, a control end of the fifth active switch T5 and a control end of the eighth active switch T8 are respectively connected to the second enable signal DE2, an input end of the fifth active switch T5 is connected to a power supply voltage, an output end of the fifth active switch T5 is connected to the fifth node F, an input end of the eighth active switch T8 is connected to the sixth node G, and an output end of the eighth active switch T8 is grounded.

The first active switch T1, the second active switch T2, the third active switch T3, the fourth active switch T4, and the eighth active switch T8 are respectively N-type thin film transistors, and the fifth active switch T5 and the seventh active switch T7 are respectively P-type thin film transistors. The sixth active switch T6 is a driving thin film transistor.

In the precharge circuit 130 of the present embodiment, when the fourth active switch T4 and the fifth active switch T5 are turned on, the power supply voltage is used to charge the first capacitor C1, and after the first capacitor C1 is charged, the potential of the fourth node E changes to the potential of the power supply voltage because the potential of the first node a of the first capacitor C1 is zero. Then, in the path formed by the fourth active switch T4, the sixth active switch T6 and the eighth active switch T8, the potential of the fourth node E is gradually discharged to the threshold voltage of the sixth active switch T6, and at this time, the potential of the fourth node E is the threshold voltage, so as to realize the threshold capacitance latching of the first capacitor C1 to the sixth active switch T6. And finally, when the DATA input stage is entered, the first node A increases the potential of the DATA signal DATA when the DATA signal DATA is input by the first node A, and the potential of the DATA signal DATA voltage is increased by synchronizing the fourth node E, so that the potential of the fourth node E is the sum of the DATA signal DATA voltage and the threshold voltage. In this embodiment, the threshold voltage is cleared by charging and discharging.

In another variation of the present embodiment, the eighth active switch T8 or the seventh active switch T7 in the light-emitting circuit 150 may be omitted to form the 7T1C or 6T1C pixel driving circuit 100, wherein the function of the seventh active switch T7 is mainly to enable charges to flow into the ground terminal along the routes of the fourth active switch T4, the sixth active switch T6 and the eighth active switch T8 during the discharging process of the precharge circuit 130, and if the seventh active switch T7 is not used, the output terminal of the sixth active switch T6 may be grounded through the third active switch T3 or the eighth active switch T8. If the eighth active switch T8 is not used, the output of the sixth active switch T6 can be grounded by using the third active switch T3. If the seventh active switch T7 and the eighth active switch T8 are not used, the output of the sixth active switch T6 is also grounded by the third active switch T3. In the 8T1C circuit, the first enable signal DE1, the second enable signal DE2 and the third enable signal DE3 are respectively connected to the control of the two active switches, so that the two TFT switches can be controlled to operate simultaneously, and the error rate of one enable signal required by each switch can be reduced.

The first active switch T1, the second active switch T2, the third active switch T3, the fourth active switch T4, the fifth active switch T5, the sixth active switch T6, the seventh active switch T7 and the eighth active switch T8 are respectively a low-temperature polysilicon thin film transistor or an oxide thin film transistor or an amorphous silicon thin film transistor.

Compared with an amorphous silicon thin film transistor (amorphorus-Si TFT), the low temperature polysilicon thin film transistor (LTPS TFT) and the oxide thin film transistor (Indium Gallium Zinc Oxide TFT, IZGO TFT) have higher mobility and more stable characteristics, and are more suitable for being applied to AMOLED (Active-matrix organic light-patterning diode) display. Low temperature polysilicon thin film transistors (LTPS TFTs) are mostly used in medium and small size applications, while oxide thin film transistors (IZGO TFTs) are mostly used in large size applications. This is because LTPS TFTs have greater mobility, smaller device footprints, and are more suitable for high PPI applications. The IZGO TFT has better uniformity, the process is compatible with a-Si, and the method is more suitable for producing large-size AMOLED panels on high-generation lines. They then have disadvantages in that LTPS TFTs fabricated on large area glass substrates often have non-uniformity in electrical parameters such as threshold voltage, mobility, etc. due to limitations of crystallization processes, which are converted into current and brightness differences of OLED display devices and perceived by human eyes, i.e., mura phenomenon. The Oxide TFT has a good process uniformity, but similar to the a-Si TFT, the threshold voltage thereof shifts under a long-time pressure and a high temperature, and the difference in display brightness is caused by the difference in threshold shift amount of the TFTs of each portion of the panel depending on the display screen, and the difference is related to the image displayed before, so that it often appears as a afterimage phenomenon, which is called afterimage. The oxide thin film transistor is IZGO (Indium Gallium Zinc Oxide) TFT, and compared with the traditional a-Si (amorphous silicon) TFT, the IZGO-TFT has three main advantages in performance, namely high precision, low power consumption and high touch performance, and the main goods supply targets are tablet personal computers and super products. Unlike low temperature LTPS (polysilicon) TFTs, the semiconductor layer does not need to be crystallized by irradiation with laser light, and thus has a feature that the size of the glass substrate can be easily increased. The IGZO process has extremely high similarity with the a-Si process, and the IZGO has high electron mobility, so that the method can be applied to the production of OLED display panels.

Fig. 2 is a timing diagram of signals of the pixel driving circuit of the present application, and the timing diagram shown in fig. 2 is only a row of pixels in one scanning period corresponding to a time of charging through the data line. Referring to fig. 2, the timing of the pixel driving circuit 100 includes: a reset stage S1, a precharge stage S2, a threshold latch stage S3, a data input stage S4, and a light emitting stage S5; in the reset phase S1, the first enable signal DE1 is at a first potential, and the second enable signal DE2, the third enable signal DE3, and the DATA signal DATA are respectively at a second potential; in the precharge phase S2, the third enable signal DE3 is at a first potential, and the first enable signal DE1, the second enable signal DE2, and the DATA signal DATA are respectively at a second potential; in the threshold latching stage S3, the second enable signal DE2 and the third enable signal DE3 are respectively at a first potential, and the first enable signal DE1 and the DATA signal DATA are respectively at a second potential; in the DATA input stage S4, the third enable signal DE3 and the DATA signal DATA are respectively at a first potential, and the first enable signal DE1 and the second enable signal DE2 are respectively at a second potential; in the light emitting stage S5, the first enable signal DE1, the second enable signal DE2, the third enable signal DE3, and the DATA signal DATA are respectively at the second potential.

Fig. 3a is a circuit schematic of the pixel driving circuit in the reset stage, as shown in fig. 3a, in the reset stage, the first enable signal DE1 is at a first potential, and the second enable signal DE2, the third enable signal DE3 and the DATA signal DATA are respectively at a second potential; the second active switch T2, the third active switch T3 and the seventh active switch T7 are conducted, and the rest active switches are kept in a cut-off state; in the reset phase, the first node a and the third node D reset the zero voltage respectively, so as to realize the discharge reset effect of the first capacitor C1, the light emitting unit LED and the output terminal of the sixth active switch T6.

The first potential is logic high potential, and the second potential is logic low potential.

FIG. 3b is a schematic circuit diagram of the pixel driving circuit of the present application in a precharge phase, as shown in FIG. 3b, in which the fourth active switch T4 and the fifth active switch T5 are conductiveThe rest active switches are kept in a cut-off state; the potential of the fourth node E is the potential V of the power supply voltage _DD The function of charging the first capacitor C1 by the power supply voltage is realized.

Fig. 3c is a schematic circuit diagram of the pixel driving circuit in the threshold value latching stage, as shown in fig. 3c, in the threshold value latching stage, the fourth active switch T4, the sixth active switch T6 and the eighth active switch T8 are turned on, the rest of active switches are in an off state, and when the potential of the fourth node E drops to the threshold voltage of the sixth active switch T6, the sixth active switch T6 is turned off; after the last stage, the potential of the fourth node E is V _DD The first capacitor C1 is continuously discharged on the way along the fourth active switch T4, the sixth active switch T6 and the eighth active switch T8 until the voltage difference between the gate and the drain of the sixth active switch T6 is the threshold voltage V _th That is, the voltage difference between the fourth node E and the sixth node G is the threshold voltage, and the sixth node G is grounded, that is, the potential of the fourth node E is subjected to the threshold voltage applying process, at this time, the sixth active switch T6 is turned off, the first capacitor C1 is not discharged any more, and the latch function of the threshold voltage is realized.

Fig. 3d is a schematic circuit diagram of the pixel driving circuit in the data input stage, as shown in fig. 3d, in the data input stage, the first active switch T1, the fourth active switch T4 and the fifth active switch T5 are turned on, and the rest active switches are turned off. When the first active switch T1 is turned on, the DATA signal DATA is input to charge the first capacitor C1, and the first node A is raised to the voltage V of the DATA signal DATA _DATA The fourth node E provides the voltage V of the power voltage signal for the fourth node E due to the action of the first capacitor C1 _DD At this time, the voltage of the fourth node E is V _DD +V _th At this time, the first capacitor C1 stores the electric quantity U _C Is V (V) _DD +V _th -V _DATA 。

Fig. 3e is a schematic circuit diagram of the pixel driving circuit in the light emitting stage, see fig. 3e, in which the fifth active switch T5 and the sixth active switchThe switch T6 and the seventh active switch T7 are turned on, and the rest of the active switches are turned off. Since the voltage of the fourth node E is V _DD +V _th The sixth active switch T6 is turned on, and the circuit is the paths from the fifth active switch T5, the sixth active switch T6, and the seventh active switch T7 to the light emitting unit LED. The current through the sixth active switch T6 is

Will V _GS ＝U _C ＝V _DD +V _th -V _DATA Substitution of the above formula to obtain->

Wherein mu is electron mobility, C is capacitance per unit area of the FTT device, and W/L represents the ratio of the width to the length of a TFT channel; these parameters are relatively stable, the variables being equal to V only _DD ,V _DATA These circuit input parameters are related to each other, and these two parameters are controllable, and the current flowing through the sixth active switch T6 is known by the formula (V _th ) Irrelevant, thereby achieving reset compensation of OLED threshold voltage (V _th ) Is provided. Wherein the potential of the DATA signal DATA is less than the potential of the power supply voltage. V (V) _data The voltage is the DATA signal DATA actually displayed, which is supplied from the external DATA chip, and the first, second and third enable signals DE1, DE2 and DE3 are respectively supplied from the timing circuit.

In another embodiment, the input terminal of the fourth active switch T4 may not be connected to the fifth node F, but connected to the DATA line, i.e. the DATA signal DATA on the DATA line is used to precharge the first capacitor C1 in the precharge phase, and the on time of the fourth active switch T4 may be consistent with the DATA input phase in the pixel driving circuit 100 of the previous row, so as to realize the precharge mode of the DATA signal DATA of the previous row for the current row.

Fig. 4 is a schematic step diagram of a method for compensating a pixel driving circuit, and referring to fig. 4, the application further discloses a method for compensating a pixel driving circuit, where the pixel driving circuit uses the pixel driving circuit, and the method for compensating the pixel driving circuit includes:

s100: entering a reset stage, wherein the first enabling signal is at a first potential, and the second enabling signal, the third enabling signal and the data signal are respectively at a second potential;

s200: entering a precharge stage, wherein the third enabling signal is at a first potential, and the first enabling signal, the second enabling signal and the data signal are respectively at a second potential;

s300: entering a threshold value latching stage, wherein the second enabling signal and the third enabling signal are respectively of a first potential, and the first enabling signal and the data signal are respectively of a second potential;

s400: entering a data input stage, wherein the third enabling signal and the data signal are respectively of a first potential, and the first enabling signal and the second enabling signal are respectively of a second potential;

s500: and entering a light emitting stage, wherein the first enabling signal, the second enabling signal, the third enabling signal and the data signal are respectively in a second potential.

In the application, firstly, by setting a reset circuit, important nodes such as a first node, a second node and a third node in a pixel driving circuit are subjected to grounding treatment or zero voltage treatment so as to empty residual charges in the pixel driving circuit. And secondly, the precharge circuit is a capacitor circuit, and the capacitor circuit is stored as the threshold voltage of the driving thin film transistor in a mode of charging and discharging firstly, so that the actual voltage of the fourth node is superposed with the threshold voltage in the data input stage, and the threshold voltage of the driving thin film transistor, namely the threshold voltage of the driving thin film transistor, is directly grasped to carry out threshold voltage compensation, so that the threshold voltage of the driving thin film transistor can be effectively compensated, the current flowing through the organic light emitting diode is stable, the uniform light emitting brightness of the organic light emitting diode is ensured, the influence of the threshold voltage on the circuit can be eliminated, the occurrence of residual shadow is prevented, the display quality is improved, the display effect of a picture is improved, the organic light emitting diode can emit light only in the driving stage, the unnecessary light emission of the organic light emitting diode is avoided, and the power consumption is reduced.

Fig. 5 is a schematic diagram of a display panel of the present application, and as shown in fig. 5, a display panel 200 is disclosed, including the pixel driving circuit 100 of any one of the above embodiments. The display panel 200 is suitable for active light emitting display panels such as OLED display panels, mini-LED display panels, micro-LED display panels and the like.

It should be noted that, the inventive concept of the present application may form a very large number of embodiments, but the application documents have limited space and cannot be listed one by one, so that on the premise of no conflict, the above-described embodiments or technical features may be arbitrarily combined to form new embodiments, and after the embodiments or technical features are combined, the original technical effects will be enhanced.

The foregoing is a further detailed description of the present application in connection with specific alternative embodiments, and it is not intended that the practice of the present application be limited to such descriptions. It should be understood that those skilled in the art to which the present application pertains may make several simple deductions or substitutions without departing from the spirit of the present application, and all such deductions or substitutions should be considered to be within the scope of the present application.

Claims (10)

1. A pixel driving circuit, comprising:

the reset circuit is connected with the first node, the second node and the third node, is connected with a first enabling signal and resets the voltage of the first node and the voltage of the third node to zero voltage under the control of the first enabling signal;

the capacitor circuit is connected with the first node and the fourth node and stores the voltage of the first node and the voltage of the fourth node;

the precharge circuit is connected with the fourth node, the fifth node and the sixth node, is connected with a second enabling signal and a third enabling signal, and charges the voltage compensation of the fourth node under the control of the second enabling signal and the third enabling signal;

the data input circuit is connected with the first node, is connected with a scanning signal and a data signal, and transmits the data signal to the first node under the control of the scanning signal; and

and the light-emitting circuit is connected with the second node, the third node, the fourth node, the fifth node and the sixth node, is connected with a third enabling signal, and emits light under the voltage control of the third enabling signal and the fourth node.

2. The pixel driving circuit according to claim 1, wherein the data input circuit comprises a first active switch, a control terminal of the first active switch is connected to the scan signal, an input terminal of the first active switch is connected to the data signal, and an output terminal of the first active switch is connected to the first node;

the reset circuit comprises a second active switch and a third active switch, the control end of the second active switch and the control end of the third active switch are respectively connected with the first enabling signal, the input end of the second active switch is connected to the first node, the output end of the second active switch is connected to the second node, and the second node is grounded; the input end of the third active switch is connected with the third node, and the output end of the third active switch is grounded.

3. The pixel driving circuit according to claim 2, wherein the capacitor circuit includes a first capacitor, one end of the first capacitor is connected to the first node, and the other end of the first capacitor is connected to the second node;

the light-emitting circuit comprises a sixth active switch, a seventh active switch and a light-emitting unit, one end of the light-emitting unit is connected with the second node, the other end of the light-emitting unit is connected with the third node, the control end of the seventh active switch is connected with the third enabling signal, the output end of the seventh active switch is connected with the third node, the input end of the seventh active switch is connected with the sixth node, the control end of the sixth active switch is connected with the fourth node, the output end of the sixth active switch is connected with the sixth node, and the input end of the sixth active switch is connected with the fifth node;

the precharge circuit comprises a fourth active switch, a fifth active switch and an eighth active switch, wherein the control end of the fourth active switch is connected with the third enabling signal, the input end of the fourth active switch is connected with the fourth node, the output end of the fourth active switch is connected to the fifth node, the control end of the fifth active switch and the control end of the eighth active switch are respectively connected with the second enabling signal, the input end of the fifth active switch is connected with a power supply voltage, the output end of the fifth active switch is connected with the fifth node, the input end of the eighth active switch is connected with the sixth node, and the output end of the eighth active switch is grounded.

4. The pixel driving circuit according to claim 3, wherein the first active switch, the second active switch, the third active switch, the fourth active switch, and the eighth active switch are N-type thin film transistors, respectively, and the fifth active switch and the seventh active switch are P-type thin film transistors, respectively.

5. The pixel driving circuit according to claim 4, wherein the timing of the pixel driving circuit comprises: a reset phase, a precharge phase, a threshold value latch phase, a data input phase and a light emitting phase;

in the reset stage, the first enabling signal is at a first potential, and the second enabling signal, the third enabling signal and the data signal are respectively at a second potential;

in the precharge phase, the third enable signal is at a first potential, and the first enable signal, the second enable signal and the data signal are respectively at a second potential;

in the threshold latching stage, the second enabling signal and the third enabling signal are respectively in a first potential, and the first enabling signal and the data signal are respectively in a second potential;

in the data input stage, the third enabling signal and the data signal are respectively at a first potential, and the first enabling signal and the second enabling signal are respectively at a second potential;

in the light emitting stage, the first enable signal, the second enable signal, the third enable signal and the data signal are respectively at a second potential.

6. A pixel driving circuit according to claim 3, wherein the timing of the pixel driving circuit comprises: a reset phase, a precharge phase, a threshold value latch phase, a data input phase and a light emitting phase;

in the reset phase, the second active switch and the third active switch are turned on;

during the precharge phase, the fourth active switch and the fifth active switch are turned on;

in the threshold latching stage, the fourth active switch, the sixth active switch and the eighth active switch are turned on, and when the potential of the fourth node drops to the threshold voltage of the sixth active switch, the sixth active switch is turned off;

in the data input stage, the first active switch, the fourth active switch and the fifth active switch are turned on;

in the lighting stage, the fifth active switch, the sixth active switch and the seventh active switch are turned on.

7. The pixel driving circuit according to claim 4, wherein a potential of the data signal is smaller than a potential of the power supply voltage.

8. The pixel driving circuit according to claim 3, wherein the first active switch, the second active switch, the third active switch, the fourth active switch, the fifth active switch, the sixth active switch, the seventh active switch, and the eighth active switch are low temperature polysilicon thin film transistors or oxide thin film transistors or amorphous silicon thin film transistors, respectively.

9. A display panel comprising a pixel driving circuit according to any one of claims 1-8.

10. A method of compensating a pixel driving circuit using the pixel driving circuit according to any one of claims 1 to 8, the method comprising:

entering a reset stage, wherein the first enabling signal is at a first potential, and the second enabling signal, the third enabling signal and the data signal are respectively at a second potential;

entering a precharge stage, wherein the third enabling signal is at a first potential, and the first enabling signal, the second enabling signal and the data signal are respectively at a second potential;

entering a threshold value latching stage, wherein the second enabling signal and the third enabling signal are respectively of a first potential, and the first enabling signal and the data signal are respectively of a second potential;

entering a data input stage, wherein the third enabling signal and the data signal are respectively of a first potential, and the first enabling signal and the second enabling signal are respectively of a second potential;

and entering a light emitting stage, wherein the first enabling signal, the second enabling signal, the third enabling signal and the data signal are respectively in a second potential.

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