CN116366026A - Ultra-wideband cascading type numerical control attenuator and phased array radar - Google Patents
Ultra-wideband cascading type numerical control attenuator and phased array radar Download PDFInfo
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- CN116366026A CN116366026A CN202310080957.0A CN202310080957A CN116366026A CN 116366026 A CN116366026 A CN 116366026A CN 202310080957 A CN202310080957 A CN 202310080957A CN 116366026 A CN116366026 A CN 116366026A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/24—Frequency-independent attenuators
- H03H11/245—Frequency-independent attenuators using field-effect transistor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/04—Frequency selective two-port networks
- H03H11/06—Frequency selective two-port networks comprising means for compensation of loss
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention discloses an ultra-wideband cascade digital control attenuator and a phased array radar, wherein the digital control attenuator comprises: at least one small attenuation unit and at least one large attenuation unit are cascaded between the input end and the output end, wherein the small attenuation unit comprises a T-shaped attenuation structure, and the large attenuation unit comprises a pi-shaped attenuation structure; and the driving control circuit is connected with the small attenuation unit and the large attenuation unit respectively. The invention combines the small attenuation unit and the large attenuation unit to realize the numerical control attenuator, wherein the small attenuation unit adopts a T-shaped attenuation structure, the large attenuation unit adopts a pi-shaped attenuation structure, and the switching between an attenuation state and a reference state is realized through the control of high and low voltage of the drive control circuit; thus finally realizing the numerical control attenuator with different structures and different attenuation sizes by combining the numerical control attenuation units together.
Description
Technical Field
The invention relates to the technical field of microwaves, in particular to an ultra-wideband cascading type numerical control attenuator and a phased array radar.
Background
Along with the development of microwave monolithic technology, gaAs MMICs are widely used in systems such as airborne radar, satellite communication, and electronic countermeasure. The phased array radar T/R component is one of the largest application fields of the current MMICs, and the numerical control attenuator is one of key matched MMICs in the phased array radar T/R component. Since the side lobes of the antenna will have an impact on the survival rate of the phased array system in harsh environments, the adjustment of the phase and amplitude of the T/R components must exhibit good tracking characteristics. The digitally controlled attenuator is used as part of the T/R assembly to equalize the gain and control the signal amplitudes on the different paths. Therefore, in engineering application, the ultra-wideband numerical control attenuator plays an important role, and the numerical control attenuator capable of combining numerical control attenuation units with different structures and different attenuation sizes belongs to the technical problem to be solved in the field.
In addition, small insertion loss can reduce the inherent effect of digitally controlled attenuators on channel gain. However, there is a certain contradiction between bandwidth and insertion loss and attenuation precision, so that a digital control attenuator which needs to ensure ultra-wideband low insertion loss and high attenuation precision is a further urgent need in the current engineering.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides an ultra-wideband cascading type numerical control attenuator and a phased array radar.
The aim of the invention is realized by the following technical scheme:
in a first aspect of the present invention, there is provided an ultra wideband cascade type digital controlled attenuator, comprising:
at least one small attenuation unit and at least one large attenuation unit are cascaded between the input end and the output end, wherein the small attenuation unit comprises a T-shaped attenuation structure, and the large attenuation unit comprises a pi-shaped attenuation structure;
and the driving control circuit is connected with the small attenuation unit and the large attenuation unit respectively.
Further, the T-shaped attenuation structure comprises a transistor FET1, a microstrip line TL2, a resistor Ra1 and a resistor Rg1;
the signal input end of the T-shaped attenuation structure sequentially passes through the microstrip line TL1 and the microstrip line TL2 and then is connected with the signal output end of the T-shaped attenuation structure, the common connection point of the microstrip line TL1 and the microstrip line TL2 is connected with the drain electrode of the transistor FET1, the source electrode of the transistor FET1 is grounded through a resistor Ra1, and the grid electrode of the transistor FET1 is connected with the drive control circuit through a resistor Rg 1.
Further, the small attenuation unit comprises a 2dB attenuation unit, and the 2dB attenuation unit comprises two serially connected T-shaped attenuation structures.
Further, the small attenuation unit comprises a 1dB attenuation unit, and the 1dB attenuation unit comprises a T-shaped attenuation structure.
Further, the pi-type attenuation structure comprises a transistor FET2, a transistor FET3, a transistor FET4, a transistor FET5, a transistor FET6, a microstrip line TL3, a microstrip line TL4, a microstrip line TL5, a microstrip line TL6, a resistor Ra2, a resistor Ra3, a resistor Rg2, a resistor Rg3, a resistor Rg4, a resistor Rg5, a resistor Rg6, an inductor L1, and an inductor L2;
the signal input end of the pi-type attenuation structure sequentially passes through the microstrip line TL5, the drain electrode of the transistor FET4, the source electrode of the transistor FET4 and the microstrip line TL6 and then is connected with the signal output end of the pi-type attenuation structure, and the grid electrode of the transistor FET4 is connected with the drive control circuit through a resistor Rg 6;
the source of the transistor FET4 and the drain of the transistor FET4 are also respectively connected with a microstrip line TL3 and a microstrip line TL4 in parallel; the common connection point of the microstrip line TL3 and the drain of the transistor FET4 is grounded after passing through the drain of the transistor FET3, the source of the transistor FET3, the drain of the transistor FET2, the source of the transistor FET2, and the inductance L2 in order; the common connection point of the microstrip line TL4 and the source of the transistor FET4 is grounded after passing through the drain of the transistor FET5, the source of the transistor FET5, the drain of the transistor FET6, the source of the transistor FET6, and the inductance L1 in order;
the grid electrode of the transistor FET2 is connected with the drive control circuit through a resistor Rg2, the grid electrode of the transistor FET3 is connected with the drive control circuit through a resistor Rg3, the grid electrode of the transistor FET5 is connected with the drive control circuit through a resistor Rg4, and the grid electrode of the transistor FET6 is connected with the drive control circuit through a resistor Rg 5;
the control voltage of transistor FET2, the control voltage of transistor FET3, the control voltage of transistor FET5, the control voltage of transistor FET6 are logically opposite to the control voltage of transistor FET 4.
Further, the large attenuation unit comprises a 16dB attenuation unit, and the 16dB attenuation unit comprises two pi-type attenuation structures connected in series.
Further, the large attenuation unit comprises a 4dB attenuation unit and/or an 8dB attenuation unit, and the 4dB attenuation unit and the 8dB attenuation unit comprise a pi-type attenuation structure.
Further, the transistors in the T-type and pi-type attenuation structures are depletion transistors.
Further, the small attenuation unit comprises a 1dB attenuation unit and a 2dB attenuation unit which are sequentially connected, a large attenuation unit is connected to the rear of the small attenuation unit, and the large attenuation unit comprises an 8dB attenuation unit, a 16dB attenuation unit and a 4dB attenuation unit which are sequentially connected.
In a second aspect of the invention, a phased array radar is provided, comprising a T/R assembly comprising the ultra wideband cascading digital control attenuator.
The beneficial effects of the invention are as follows:
(1) In an exemplary embodiment of the present invention, a small attenuation unit and a large attenuation unit (attenuation amount) are combined to realize a digital control attenuator, wherein the small attenuation unit adopts a T-type attenuation structure, the large attenuation unit adopts a pi-type attenuation structure, and switching between an attenuation state and a reference state is realized through control of high and low voltages of a drive control circuit; thus finally realizing the numerical control attenuator with different structures and different attenuation sizes by combining the numerical control attenuation units together.
(2) In yet another exemplary embodiment of the present invention, the 2dB attenuation structure employs two series T-shaped attenuation structures that eliminate transistors in the prior art that are in series on the main path, thereby reducing losses in the main path in series, and the standing wave is tuned by adjusting the size of the single tube (i.e., the two transistor FET 1) in parallel, thereby achieving the objective of reducing ground state insertion loss while improving the attenuation state input port standing wave.
(3) In yet another exemplary embodiment of the present invention, the dual-switch in-line pi-type attenuation structure composed of two of the transistor switches (i.e., FET2+ FET3, and FET5+ FET 6) can widen the frequency characteristics of the transistor switches, as compared to the conventional pi-type attenuation structure, because the dual-switch in-line pi-type attenuation structure has a smaller Coffx equivalent capacitance in the case of selecting the same transistor size. Meanwhile, the embedded pi-type attenuation structure of the double switch can improve the voltage swing of the transistor under high power, the power capacity of the switch of the transistor is improved, and further the 1dB compression point output power of the ultra-wideband low-insertion-loss high-attenuation-precision numerical control attenuator is improved, and the frequency response of the pi-type attenuation structure in the whole frequency band can be changed by the inductor L1 and the inductor L2, so that the better attenuation precision in the band is ensured.
(4) In yet another exemplary embodiment of the present invention, the 16dB attenuator units are superimposed on each other by the attenuation of two dual-switch in-line pi-type attenuator structures. The structure ensures enough attenuation and is beneficial to improving the frequency characteristic of the high frequency band. Compared with a single pi-type attenuation structure, the 16dB attenuation unit formed by cascading the two double-switch embedded pi-type attenuation structures is selected, so that the equivalent capacitance Coffx on a main circuit is reduced, and better high-frequency response can be obtained in a band. In the cascade optimization process, the attenuation precision and the attenuation quantity of the two double-switch embedded pi-type attenuation structures at high frequency and low frequency are mutually compensated, and an ideal compromise between the attenuation precision and the insertion loss is obtained.
Drawings
Fig. 1 is a schematic structural diagram of an ultra wideband cascade type digital control attenuator according to an exemplary embodiment of the present invention;
fig. 2 is a schematic structural view of a T-shaped attenuation structure of a small attenuation unit according to an exemplary embodiment of the present invention;
fig. 3 is a schematic diagram of a 2dB attenuation unit of a small attenuation unit provided in an exemplary embodiment of the present invention;
fig. 4 is a schematic structural view of a pi-type attenuation structure of a large attenuation unit provided in an exemplary embodiment of the present invention;
FIG. 5 is a schematic diagram of the attenuation state of a pi-type attenuation structure of a large attenuation unit according to an exemplary embodiment of the present invention;
FIG. 6 is a schematic diagram of the reference state of the pi-type attenuation structure of a large attenuation unit according to an exemplary embodiment of the present invention;
fig. 7 is a schematic diagram of a 16dB attenuator unit of the large attenuator unit provided in an exemplary embodiment of the present invention;
FIG. 8 is a schematic structural diagram of a specific implementation of an ultra wideband cascaded digital controlled attenuator according to an exemplary embodiment of the present invention;
FIG. 9 is a schematic diagram of a full state input return loss S11 curve and a full state output return loss S22 curve for a digital controlled attenuator test according to an exemplary embodiment of the present invention;
fig. 10 is a schematic diagram of a numerical control attenuator test, curves of attenuation states and curves of attenuation accuracy according to an exemplary embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully understood from the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be noted that directions or positional relationships indicated as being "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are directions or positional relationships described based on the drawings are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the apparatus or elements to be referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Referring to fig. 1, fig. 1 shows a schematic structural diagram of an ultra-wideband cascade type digital control attenuator according to an exemplary embodiment of the present invention, including:
at least one small attenuation unit and at least one large attenuation unit are cascaded between the input end and the output end, wherein the small attenuation unit comprises a T-shaped attenuation structure, and the large attenuation unit comprises a pi-shaped attenuation structure;
and the driving control circuit is connected with the small attenuation unit and the large attenuation unit respectively.
Specifically, in the present exemplary embodiment, a small attenuation unit and a large attenuation unit (attenuation amount) are combined to realize a digitally controlled attenuator, wherein the small attenuation unit adopts a T-type attenuation structure, the large attenuation unit adopts a pi-type attenuation structure, and switching between an attenuation state and a reference state is realized through control of high and low voltages of a drive control circuit; thus finally realizing the numerical control attenuator with different structures and different attenuation sizes by combining the numerical control attenuation units together.
It should be noted that the front-to-back sequence of the small attenuation unit and the large attenuation unit is adjustable according to the actual requirement, and only one of them is shown in fig. 1.
More preferably, in an exemplary embodiment, as shown in fig. 2, the T-type attenuation structure includes a transistor FET1, a microstrip line TL2, a resistor Ra1, and a resistor Rg1;
the signal input end of the T-shaped attenuation structure sequentially passes through the microstrip line TL1 and the microstrip line TL2 and then is connected with the signal output end of the T-shaped attenuation structure, the common connection point of the microstrip line TL1 and the microstrip line TL2 is connected with the drain electrode of the transistor FET1, the source electrode of the transistor FET1 is grounded through a resistor Ra1, and the grid electrode of the transistor FET1 is connected with the drive control circuit through a resistor Rg 1.
More preferably, in an exemplary embodiment, the small attenuation unit comprises a 2dB attenuation unit, and the 2dB attenuation unit comprises two serially connected T-shaped attenuation structures, as shown in fig. 3.
Specifically, in the implementation of the small attenuation unit of the prior art using a T-type attenuation structure (e.g., 1dB attenuation unit, 2dB attenuation unit, 4dB attenuation unit of CN 201811111201.3), it employs a transistor provided with a series connection on the main path; in the present exemplary embodiment, the two serially connected T-shaped attenuation structures adopted by the 2dB attenuation structure remove transistors serially connected in the main path in the prior art, thereby reducing the loss in the main path, and the standing wave is adjusted by adjusting the size of the single tube (i.e. the two transistor FET 1) in parallel, so as to achieve the purposes of reducing the ground state insertion loss and improving the standing wave of the attenuation state input port.
More preferably, in an exemplary embodiment, the small attenuation unit comprises a 1dB attenuation unit, and the 1dB attenuation unit comprises a T-shaped attenuation structure.
More preferably, in an exemplary embodiment, as shown in fig. 4, the pi-type attenuation structure includes a transistor FET2, a transistor FET3, a transistor FET4, a transistor FET5, a transistor FET6, a microstrip line TL3, a microstrip line TL4, a microstrip line TL5, a microstrip line TL6, a resistor Ra2, a resistor Ra3, a resistor Rg2, a resistor Rg3, a resistor Rg4, a resistor Rg5, a resistor Rg6, an inductor L1, and an inductor L2;
the signal input end of the pi-type attenuation structure sequentially passes through the microstrip line TL5, the drain electrode of the transistor FET4, the source electrode of the transistor FET4 and the microstrip line TL6 and then is connected with the signal output end of the pi-type attenuation structure, and the grid electrode of the transistor FET4 is connected with the drive control circuit through a resistor Rg 6;
the source of the transistor FET4 and the drain of the transistor FET4 are also respectively connected with a microstrip line TL3 and a microstrip line TL4 in parallel; the common connection point of the microstrip line TL3 and the drain of the transistor FET4 is grounded after passing through the drain of the transistor FET3, the source of the transistor FET3, the drain of the transistor FET2, the source of the transistor FET2, and the inductance L2 in order; the common connection point of the microstrip line TL4 and the source of the transistor FET4 is grounded after passing through the drain of the transistor FET5, the source of the transistor FET5, the drain of the transistor FET6, the source of the transistor FET6, and the inductance L1 in order;
the grid electrode of the transistor FET2 is connected with the drive control circuit through a resistor Rg2, the grid electrode of the transistor FET3 is connected with the drive control circuit through a resistor Rg3, the grid electrode of the transistor FET5 is connected with the drive control circuit through a resistor Rg4, and the grid electrode of the transistor FET6 is connected with the drive control circuit through a resistor Rg 5;
the control voltage of transistor FET2, the control voltage of transistor FET3, the control voltage of transistor FET5, the control voltage of transistor FET6 are logically opposite to the control voltage of transistor FET 4.
It should be noted that, in this exemplary embodiment, the "control voltage of the transistor FET2, the control voltage of the transistor FET3, the control voltage of the transistor FET5, the control voltage of the transistor FET6, and the control voltage of the transistor FET4 are logically opposite to each other" may be specifically understood as: when the transistor FET2, the transistor FET3, the transistor FET5, the transistor FET6 are turned on, the transistor FET4 is turned off, which is denoted as a decay state at this time; transistor FET2, transistor FET3, transistor FET5, transistor FET6 are turned off, and transistor FET4 is turned on, which is denoted as a reference state. More specifically:
as shown in fig. 5, when the transistors FET4 are in the attenuation state, i.e., the transistors FET2, FET3, FET5, FET6 are turned on, the transistor FET4 in the off state can be equivalent to a capacitor Coff, and the resistor Ra2, resistor Ra3 and the on-resistance Ron of the transistors FET2, FET3, FET5, FET6 form a dual-switch embedded pi-type attenuation structure. The resistors Ra2, ra3 and Ron provide a sufficient attenuation for the attenuation unit.
As shown in fig. 6, when the transistors FET2, FET3, FET5, and FET6 are in the reference state, the transistors FET2, FET3, FET5, and FET6 in the off state are respectively equivalent to the capacitor Coffa, coffb, coffc, coffd, and the switch series connection can be equivalent to two equivalent capacitors Coffx. Further, the inductances L1, L2 are connected in series with the corresponding transistor FET2, 3, 5, 6 to ground. The equivalent capacitance Coffx is related to the transistor size. The series connection of the two transistor switches is equivalent to the series connection of the two equivalent capacitors Coffx, which is equivalent to the reduction of the size of the equivalent capacitors Coffx, thereby reducing the insertion loss of the in-band reference state high-frequency terminal.
For a broadband digital control attenuator, attenuation precision and insertion loss of the high frequency band and the low frequency band in the broadband are difficult to be balanced, and the main reason is that the frequency characteristics of the equivalent capacitance Coffx and the on-resistance Ron of the transistor are difficult to reach in-band balance in the broadband. Thus, in the present exemplary embodiment, the dual-switch in-line pi-type attenuation structure composed of two of the transistor switches (i.e., FET2+ FET3 and FET5+ FET 6) can widen the frequency characteristics of the transistor switches, as compared with the conventional pi-type attenuation structure (e.g., the structure disclosed in the patent application No. CN 202010908759.5), because the dual-switch in-line pi-type attenuation structure has a smaller Coffx equivalent capacitance in the case of selecting the same transistor size. Meanwhile, the embedded pi-type attenuation structure of the double switch can improve the voltage swing of the transistor under high power, the power capacity of the switch of the transistor is improved, and further the 1dB compression point output power of the ultra-wideband low-insertion-loss high-attenuation-precision numerical control attenuator is improved, and the frequency response of the pi-type attenuation structure in the whole frequency band can be changed by the inductor L1 and the inductor L2, so that the better attenuation precision in the band is ensured.
More preferably, in an exemplary embodiment, as shown in fig. 7, the large attenuation unit includes a 16dB attenuation unit, and the 16dB attenuation unit includes two pi-type attenuation structures connected in series.
Specifically, in the present exemplary embodiment, the 16dB attenuation units are superimposed on each other by the attenuation amounts of the two-switch in-line pi-type attenuation structures. The structure ensures enough attenuation and is beneficial to improving the frequency characteristic of the high frequency band.
More specifically, the equivalent capacitance Coffx formed by the transistor switch FET4 being turned off affects the insertion loss and also affects the attenuation accuracy in a wide band. Therefore, the two cascaded dual-switch embedded pi-type attenuation structures forming the 16dB attenuation unit are first adjusted, and the attenuation amounts of the two cascaded dual-switch embedded pi-type attenuation structures reach about 8dB by selecting the parameter values of the transistor FET2, the transistor FET3, the transistor FET5, the transistor FET6, the microstrip line TL3, the microstrip line TL4, the microstrip line TL5, the microstrip line TL6, the inductance L1, the inductance L2, the resistance Ra3, the resistance Rg2, the resistance Rg3, the resistance Rg4, the resistance Rg5, and the resistance Rg 6. And then cascading the two double-switch embedded pi-type attenuation structures, and adjusting the attenuation quantity, attenuation precision and port standing waves of the whole 16dB attenuation unit by optimizing element parameters.
Therefore, compared with a single pi-type attenuation structure, the 16dB attenuation unit formed by cascading the two double-switch embedded pi-type attenuation structures is selected, so that the equivalent capacitance Coffx on a main circuit is reduced, and better high-frequency response in a band can be obtained. In the cascade optimization process, the attenuation precision and the attenuation quantity of the two double-switch embedded pi-type attenuation structures at high frequency and low frequency are mutually compensated, and an ideal compromise between the attenuation precision and the insertion loss is obtained.
More preferably, in an exemplary embodiment, the large attenuation unit includes a 4dB attenuation unit and/or an 8dB attenuation unit, and the 4dB attenuation unit and the 8dB attenuation unit include a pi-type attenuation structure.
More preferably, in an exemplary embodiment, the transistors in the T-type and pi-type attenuation structures are depletion transistors.
More specifically, the digital control attenuator is processed by adopting a 0.25um GaAs pHEMT process, the transistor is a depletion type transistor, and the drive control circuit is manufactured by adopting an enhancement type transistor.
More preferably, in an exemplary embodiment, as shown in fig. 8, the small attenuation unit includes a 1dB attenuation unit and a 2dB attenuation unit connected in sequence, and a large attenuation unit is connected to the rear of the small attenuation unit, and includes an 8dB attenuation unit, a 16dB attenuation unit and a 4dB attenuation unit connected in sequence.
Wherein, when the 1dB attenuating unit, the 2dB attenuating unit, the 8dB attenuating unit, the 16dB attenuating unit and the 4dB attenuating unit are adopted in the specific manner in the above-described exemplary embodiments, there are the following corresponding settings and experimental parameters:
the control voltage is converted into two voltages of 0V and-5V through a drive control circuit, and each attenuation unit is controlled through the voltage output by the drive circuit. The resistors Ra 1-Ra 3 are 10Ω -200Ω, the inductance L1 and the inductance L2 are 1 pH-2000 pH, the characteristic impedance of the microstrip lines TL 1-TL 6 is 60-130 Ω, and the attenuation precision of the numerical control attenuator can be ensured. The resistors Rg 1-Rg 6 are 1KΩ -20KΩ, the control voltage Vc is 3-5V at high level, and 0.5-0.5V at low level.
The magnitudes of the resistors Ra2 and Ra3 and the impedance magnitudes of the microstrip lines TL3 to TL6 are optimized and tuned through simulation for the transistor switches FET1 to FET6 in the entire digitally controlled attenuator, and the attenuation accuracy, the attenuation flatness and the low insertion loss of the digitally controlled attenuator can be improved in ultra wideband by selecting appropriate values, as shown in fig. 9 and 10. Wherein, fig. 9 is an input return loss S11 curve (on fig. 9) of the full state and an output return loss S22 curve (under fig. 9) of the full state after the digital control attenuator test shown in the present exemplary embodiment; fig. 10 is a graph of each attenuation state (on fig. 10) and a graph of attenuation accuracy (under fig. 10) for the digitally controlled attenuator test shown in the present exemplary embodiment.
In yet another exemplary embodiment of the present invention, a phased array radar is provided, which includes a T/R assembly including the ultra wideband cascade digital control attenuator provided in any one of the exemplary embodiments.
It is apparent that the above examples are given by way of illustration only and not by way of limitation, and that other variations or modifications may be made in the various forms based on the above description by those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. And obvious variations or modifications thereof are contemplated as falling within the scope of the present invention.
Claims (10)
1. An ultra-wideband cascading type numerical control attenuator is characterized in that: comprising the following steps:
at least one small attenuation unit and at least one large attenuation unit are cascaded between the input end and the output end, wherein the small attenuation unit comprises a T-shaped attenuation structure, and the large attenuation unit comprises a pi-shaped attenuation structure;
and the driving control circuit is connected with the small attenuation unit and the large attenuation unit respectively.
2. An ultra wideband cascade digital control attenuator as in claim 1, wherein: the T-shaped attenuation structure comprises a transistor FET1, a microstrip line TL2, a resistor Ra1 and a resistor Rg1;
the signal input end of the T-shaped attenuation structure sequentially passes through the microstrip line TL1 and the microstrip line TL2 and then is connected with the signal output end of the T-shaped attenuation structure, the common connection point of the microstrip line TL1 and the microstrip line TL2 is connected with the drain electrode of the transistor FET1, the source electrode of the transistor FET1 is grounded through a resistor Ra1, and the grid electrode of the transistor FET1 is connected with the drive control circuit through a resistor Rg 1.
3. An ultra wideband cascade digital control attenuator as in claim 2, wherein: the small attenuation unit comprises a 2dB attenuation unit, and the 2dB attenuation unit comprises two serially connected T-shaped attenuation structures.
4. An ultra wideband cascade digital control attenuator according to claim 2 or 3, wherein: the small attenuation unit comprises a 1dB attenuation unit, and the 1dB attenuation unit comprises a T-shaped attenuation structure.
5. An ultra wideband cascade digital control attenuator as in claim 1, wherein: the pi-type attenuation structure comprises a transistor FET2, a transistor FET3, a transistor FET4, a transistor FET5, a transistor FET6, a microstrip line TL3, a microstrip line TL4, a microstrip line TL5, a microstrip line TL6, a resistor Ra2, a resistor Ra3, a resistor Rg2, a resistor Rg3, a resistor Rg4, a resistor Rg5, a resistor Rg6, an inductor L1 and an inductor L2;
the signal input end of the pi-type attenuation structure sequentially passes through the microstrip line TL5, the drain electrode of the transistor FET4, the source electrode of the transistor FET4 and the microstrip line TL6 and then is connected with the signal output end of the pi-type attenuation structure, and the grid electrode of the transistor FET4 is connected with the drive control circuit through a resistor Rg 6;
the source of the transistor FET4 and the drain of the transistor FET4 are also respectively connected with a microstrip line TL3 and a microstrip line TL4 in parallel; the common connection point of the microstrip line TL3 and the drain of the transistor FET4 is grounded after passing through the drain of the transistor FET3, the source of the transistor FET3, the drain of the transistor FET2, the source of the transistor FET2, and the inductance L2 in order; the common connection point of the microstrip line TL4 and the source of the transistor FET4 is grounded after passing through the drain of the transistor FET5, the source of the transistor FET5, the drain of the transistor FET6, the source of the transistor FET6, and the inductance L1 in order;
the grid electrode of the transistor FET2 is connected with the drive control circuit through a resistor Rg2, the grid electrode of the transistor FET3 is connected with the drive control circuit through a resistor Rg3, the grid electrode of the transistor FET5 is connected with the drive control circuit through a resistor Rg4, and the grid electrode of the transistor FET6 is connected with the drive control circuit through a resistor Rg 5;
the control voltage of transistor FET2, the control voltage of transistor FET3, the control voltage of transistor FET5, the control voltage of transistor FET6 are logically opposite to the control voltage of transistor FET 4.
6. The ultra-wideband cascade digital control attenuator of claim 5, wherein: the large attenuation unit comprises a 16dB attenuation unit, and the 16dB attenuation unit comprises two pi-type attenuation structures connected in series.
7. An ultra wideband cascade digital control attenuator according to claim 5 or 6, wherein: the large attenuation unit comprises a 4dB attenuation unit and/or an 8dB attenuation unit, and the 4dB attenuation unit and the 8dB attenuation unit comprise a pi-shaped attenuation structure.
8. An ultra wideband cascade digital control attenuator according to claim 2 or 5, wherein: the transistors in the T-type attenuation structure and the pi-type attenuation structure are depletion transistors.
9. An ultra wideband cascade digital control attenuator according to any of claims 1 to 8, wherein: the small attenuation unit comprises a 1dB attenuation unit and a 2dB attenuation unit which are sequentially connected, the rear of the small attenuation unit is connected with a large attenuation unit, and the large attenuation unit comprises an 8dB attenuation unit, a 16dB attenuation unit and a 4dB attenuation unit which are sequentially connected.
10. A phased array radar comprising a T/R assembly, characterized by: the T/R assembly comprising an ultra wideband cascade digital controlled attenuator as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310080957.0A CN116366026A (en) | 2023-01-17 | 2023-01-17 | Ultra-wideband cascading type numerical control attenuator and phased array radar |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310080957.0A CN116366026A (en) | 2023-01-17 | 2023-01-17 | Ultra-wideband cascading type numerical control attenuator and phased array radar |
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| Publication Number | Publication Date |
|---|---|
| CN116366026A true CN116366026A (en) | 2023-06-30 |
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|---|---|---|---|
| CN202310080957.0A Pending CN116366026A (en) | 2023-01-17 | 2023-01-17 | Ultra-wideband cascading type numerical control attenuator and phased array radar |
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| Country | Link |
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| CN (1) | CN116366026A (en) |
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2023
- 2023-01-17 CN CN202310080957.0A patent/CN116366026A/en active Pending
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