CN110380708B - Ultra-wideband amplitude-phase compensation digital switch attenuator circuit - Google Patents
Ultra-wideband amplitude-phase compensation digital switch attenuator circuit Download PDFInfo
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- CN110380708B CN110380708B CN201910496739.9A CN201910496739A CN110380708B CN 110380708 B CN110380708 B CN 110380708B CN 201910496739 A CN201910496739 A CN 201910496739A CN 110380708 B CN110380708 B CN 110380708B
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Abstract
The invention discloses an ultra-wideband amplitude-phase compensation digital attenuator circuit which is formed by cascading n attenuation units in an inductive matching manner, wherein the n attenuation units adopt any one or more of a T-shaped circuit with a simplified structure, a bridge-T topological structure with a compensation structure and a pi-shaped topological structure with a phase compensation structure. The circuit has simple topological structure, can realize the ultra wide band working range with the phase compensation structure, has the characteristics of low phase error, low insertion loss and high attenuation precision, and can adopt the microwave monolithic integrated circuit process technology to carry out mass production.
Description
Technical Field
The invention relates to the field of radio frequency integrated circuits, in particular to an ultra wide band amplitude and phase compensation digital switch attenuator circuit.
Background
The attenuator is one of key component modules of wireless communication, phased array radar and instrument and meter systems, and has the main function of providing amplitude control to achieve the purposes of linearly adjusting gain and increasing dynamic range. In the prior art, most step attenuators rely on three basic topology types: pi type attenuator, T type attenuator, bridge-T type attenuator. In these designs, whether the signal is bypassed or attenuated is determined by the operating state of the switching transistor of the attenuation unit, so these types of attenuators are highly dependent on the performance of the switching transistor, but the parasitic parameters of the transistor often cause the additional phase shift in the attenuated state to become larger, resulting in the attenuator introducing unnecessary phase fluctuations during use.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the ultra-wideband amplitude-phase compensation digital switch attenuator circuit, which can effectively reduce the additional phase shift caused by transistor parasitics, broaden the bandwidth and improve the precision.
The purpose of the invention is realized by the following technical scheme:
the ultra-wideband amplitude-phase compensation digital attenuator circuit is characterized in that the circuit is formed by matching and cascading n attenuation units through inductors, wherein the n attenuation units adopt any one or more of a T-shaped circuit with a simplified structure, a bridge-T topological structure with a compensation structure and a pi-shaped topological structure with the compensation structure; the T-shaped circuit with the simplified structure consists of resistors Rb1, Rb2 and a transistor Mb1, and is provided with two ports Pb1 and Pb2, wherein the port Pb2 is connected to a radio frequency signal path to serve as a bypass, Pb1 is a control signal input and is connected with one end of the resistor Rb1, the other end of the Rb1 is connected with a gate of the transistor Mb1, a drain of the Mb1 is connected with the port Pb2, a source of the Mb1 is connected with one end of the resistor Rb2, and the other end of the resistor Rb2 is grounded;
the bridge-T topological structure with the compensation structure consists of resistors Ra1, Ra2, Ra3, Ra4, Ra5, Ra6, Ra7, Ra8, transistors Ma1, Ma2, Ma3 and capacitors Ca1, and has five ports, namely IN, OUT, Pa1, Pa2 and Pa3, wherein radio-frequency signal input enters from an IN port and is output from an OUT port, and Pa1, Pa2 and Pa3 are control signal input ports of the transistors; the IN port is connected to one end of resistors Ra2 and Ra5 and the drain of a transistor Ma2, the other end of the resistor Ra2 is connected to one end of a capacitor Ca1 and one end of Ra3, the other end of the capacitor Ca1 is connected to the drain of the capacitor Ma1, the gate of the capacitor Ma1 is connected to the resistor Ra1, and the source of the transistor Ma1 is grounded. The other end of the resistor Ra1 is connected to the control port Pa1, the other end of the resistor Ra3 is connected to one end of the resistor Ra6 and the source of the transistor Ma2, and the gate of the transistor Ma2 is connected to the control port Pa2 via the resistor Ra 4. The other end of the resistor Ra5, the other end of the resistor Ra6, and the drain of the transistor Ma3 are connected together, and the gate of the transistor Ma3 is connected together through the resistor Ra7 and the control port Pa 3. The source of the transistor Ma3 is connected to ground through a resistor Ra 8;
the pi-type topological structure with the compensation structure comprises resistors Rc1, Rc2, Rc3, Rc4, Rc5, Rc6, Rc7 and Rc8, a capacitor Cc1, and transistors Mc1, Mc1 and Mc1, wherein five ports are IN, OUT, Pc1 and Pc1 respectively, wherein radio-frequency signals are input from an IN port and output from an OUT port, the Pc1 and the Pc1 are control signal input ports of the transistors, the IN port is connected with one end of the resistor Rc1, the drain of the transistor Mc1 and the drain of the transistor Mc1, the other end of the resistor Rc1 is connected with one end of the capacitor Cc1 and one end of the Rc1, the other end of the capacitor Cc1 is connected with the drain of the resistor Rc1, and the source of the transistor Mc1 is connected with the ground; the other end of the resistor Rc1 is connected with the control port Pc3, the OUT port is connected with the other end of the resistor Rc3, the source of the transistor Mc2 and the drain of the transistor Mc4, the gate of the transistor Mc2 is connected with one end of the resistor Rc4, the other end of the resistor Rc4 is connected with the control port Pc2, the gate of the transistor Mc3 is connected with one end of the resistor Rc5, the gate of the transistor Mc4 is connected with one end of the resistor Rc6, the other end of the resistor Rc5 is connected with the other end of the resistor Rc6 and connected with the control port Pc1, one end of the resistor Rc7 is connected with the source of the transistor Mc3, the other end of the resistor Rc7 is grounded, one end of the resistor Rc8 is.
Furthermore, the transistor in the circuit is an N-type metal-oxide semiconductor field effect transistor.
The invention has the following beneficial effects:
the ultra-wideband amplitude-phase compensation digital switching attenuator circuit of the invention cascades a plurality of attenuation units through inductance matching, and the high attenuation units and the low attenuation units are arranged in a staggered way, so that the matching performance of the attenuator can be effectively improved.
Drawings
Fig. 1 is a block diagram of the overall structure of the ultra-wideband amplitude-phase compensation digital switching attenuator circuit of the invention.
Fig. 2 is a circuit topology structure diagram of a Bridge-T type attenuation unit in the ultra-wideband amplitude-phase compensation digital switch attenuator.
Fig. 3 is a circuit topology structure diagram of a simplified T-shaped attenuation unit in the ultra-wideband amplitude-phase compensation digital switch attenuator of the present invention.
FIG. 4 is a circuit topology structure diagram of a pi-type attenuation unit in the ultra-wideband amplitude-phase compensation digital switching attenuator of the present invention.
Fig. 5 is a detailed diagram of an integrated circuit of an ultra-wideband amplitude-phase compensation digital switching attenuator according to the present invention.
Fig. 6 is a diagram showing the attenuation simulation result of the ultra-wideband amplitude-phase compensation digital switching attenuator of the present invention.
FIG. 7 is a diagram showing simulation results of additional phase shift of the ultra-wideband amplitude-phase compensation digital switching attenuator of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and preferred embodiments, and the objects and effects of the present invention will become more apparent, and the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, the ultra-wideband amplitude-phase compensation digital switch attenuator circuit of the present invention is formed by matching and cascading n attenuation units through inductors, wherein the n attenuation units adopt any one or more of a T-type circuit with a simplified structure, a bridge-T topology with a compensation structure, and a pi topology with a compensation structure. The low-attenuation unit is a T-shaped circuit with a simplified structure, the low-attenuation unit is a bridge-T topological structure with a compensation structure, and the high-attenuation unit is a pi-shaped topological structure with a compensation structure.
The circuit is described below with respect to a specific embodiment.
As one embodiment, as shown in FIG. 5, the circuit is formed by matching and cascading 0.25dB, 0.5dB, 1dB, 2dB, 4dB and 8dB attenuation units through inductors L1, L2, L3, L4, L5 and L6. The 0.25dB adopts a T-shaped circuit with a simplified structure, and a signal port Pb2 in the circuit structure is connected to a signal path and is connected with an inductor L1. 0.5dB, 1dB, 2dB and 4dB adopt bridge-T topological structure with compensation structure, and the input signal IN end and input signal OUT end IN the circuit structure are connected into the circuit and respectively connected with the inductor. 8dB adopts a pi-type topological structure with a compensation structure, and an input signal IN end and an input signal OUT end IN the circuit structure are connected into the circuit and are respectively connected with an inductor. The cascade sequence of the attenuation units is 0.25dB, 0.5dB, 8dB, 2dB, 4dB and 1 dB. The high attenuation units and the low attenuation units in the attenuator are arranged in a staggered mode, so that the matching performance of the attenuator can be effectively improved. The working frequency range of the attenuator is dc-20GHz, 0.25dB is taken as a stepping value, and 64 attenuation states are realized within the attenuation range of 0 dB-15.75 dB.
With reference to fig. 2, 0.5dB, 1dB, 2dB and 4dB adopt bridge-T topology with compensation structure, which is composed of resistors Ra1, Ra2, Ra3, Ra4, Ra5, Ra6, Ra7 and Ra8, N-type mosfets Ma1, Ma2 and Ma3, and capacitors Ca 1. There are five ports IN, OUT, Pa1, Pa2, Pa3, respectively. Wherein the radio frequency signal input enters from the IN port and is output from the OUT port. Pa1, Pa2, Pa3 are control signal input ports of the transistors. The IN port is connected to one end of resistors Ra2 and Ra5 and the drain of a transistor Ma2, the other end of the resistor Ra2 is connected to one end of a capacitor Ca1 and one end of Ra3, the other end of the capacitor Ca1 is connected to the drain of the transistor Ma1, the gate of the transistor Ma1 is connected to the resistor Ra1, and the source of the transistor Ma1 is grounded. The other end of the resistor Ra1 is connected with the control port Pa1, the other end of the resistor Ra3 is connected with one end of the resistor Ra6 and the source of the transistor Ma2 and the OUT port, and the transistor Ma2 is connected with the control port Pa2 through the resistor Ra 4. The other end of the resistor Ra5, the other end of the resistor Ra6, and the drain of the transistor Ma3 are connected together, and the gate of the transistor Ma3 is connected together through the resistor Ra7 and the control port Pa 3. The source of transistor Ma3 is connected to ground through resistor Ra 8. The attenuator comprises two working states, one is a bypass state, wherein control signals are input into control terminals Pa1 and Pa3 to enable transistors Ma1 and Ma3 to be in an off state, and control signals are input into control terminals Pa2 to enable transistor Ma2 to be in an on state. The other state is a decay state, the control terminals Pa1 and Pa3 input control signals to enable the transistors Ma1 and Ma3 to be in a conducting state, and the control terminal Pa2 inputs control signals to enable the transistor Ma2 to be in a turning-off state. In the two states, the difference of the amplitude of the radio frequency output signal is 0.5dB/1dB/2dB/4dB and other fixed values, and the phase of the output signal is almost unchanged.
In conjunction with fig. 3, 0.25dB uses a simplified T-type circuit, which is composed of resistors Rb1, Rb2, and nmos 1, and has two ports, Pb1 and Pb2, respectively, wherein the port Pb2 is connected to the rf signal path as a bypass, Pb1 is a control signal input, which is connected to the resistor Rb1, the other end of Rb1 is connected to the gate of the transistor Mb1, the drain of Mb1 is connected to the port Pb2, the source of Mb1 is connected to the resistor Rb2, and the other end of the resistor Rb2 is connected to ground. The attenuator comprises two working states, one is a bypass state, and when a control signal is input at a port Pb1, the transistor Mb1 is in an off state. The other state is a decay state, and the control terminal Pb1 inputs a control signal to make the transistor Mb1 in a conducting state. Under the two states, the difference between the amplitudes of the radio frequency output signals is 0.25dB fixed value, and the phases of the output signals are almost unchanged.
With reference to fig. 4, 8dB adopts a pi topology with a compensation structure, and is composed of resistors Rc1, Rc2, Rc3, Rc4, Rc5, Rc6, Rc7 and Rc8, a capacitor Cc1, N-type metal-oxide semiconductor field effect transistors Mc1, Mc2, Mc3 and Mc 4. The structure has five ports, IN, OUT, Pc1, Pc2, Pc3, respectively. Wherein the radio frequency signal input enters from the IN port and is output from the OUT port. Pc1, Pc2, Pc3 are control signal input ports of the transistors. The IN port is connected to one end of a resistor Rc2, a drain of a transistor Mc2, and a drain of a transistor Mc3, the other end of the resistor Rc2 is connected to one end of a capacitor Cc1 and one end of an Rc3, the other end of the capacitor Cc1 is connected to a drain of Mc1, a gate of Mc1 is connected to one end of a resistor Rc1, and a source of the transistor Mc1 is grounded. The other end of the resistor Rc1 is connected with the control port Pc3, the OUT port is connected with the other end of the resistor Rc3, the source of the transistor Mc2 and the drain of the transistor Mc4, the gate of the transistor Mc2 is connected with one end of the resistor Rc4, the other end of the resistor Rc4 is connected with the control port Pc2, the gate of the transistor Mc3 is connected with one end of the resistor Rc5, the gate of the transistor Mc4 is connected with one end of the resistor Rc6, the other end of the resistor Rc5 is connected with the other end of the resistor Rc6 and connected with the control port Pc1, one end of the resistor Rc7 is connected with the source of the transistor Mc3, the other end of the resistor Rc7 is grounded, one end of the resistor Rc8 is. The attenuator comprises two working states, one is a bypass state, wherein control signals are input into the control ends Pc1 and Pc3 to enable the transistors Mc1, Mc3 and Mc4 to be in an off state, and control signals are input into the control end Pc2 to enable the transistor Mc2 to be in an on state. The other state is a damping state, the control terminals Pc1 and Pc3 input signals to enable the transistors Mc1, Mc3 and Mc4 to be in a conducting state, and the control terminal Pc2 inputs a control signal to enable the transistor Mc2 to be in a turning-off state. Under the two states, the amplitude difference of the radio frequency output signals is 8dB fixed value, and the phase of the output signals is almost unchanged.
The attenuation result of the ultra-wideband amplitude-phase compensation digital switch attenuator is shown in fig. 6, and simulation results show that the attenuation precision of each attenuation state of the ultra-wideband amplitude-phase compensation digital switch attenuator is ideal in a dc-20GHz frequency range. The simulation result of the additional phase shift of each attenuation state of the ultra-wideband phase compensation digital switching attenuator is shown in fig. 7, and the maximum additional phase shift is-0.65 °/+0.35 °, so that the phase influence introduced by the attenuator in use is small.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and although the invention has been described in detail with reference to the foregoing examples, it will be apparent to those skilled in the art that various changes in the form and details of the embodiments may be made and equivalents may be substituted for elements thereof. All modifications, equivalents and the like which come within the spirit and principle of the invention are intended to be included within the scope of the invention.
Claims (2)
1. The ultra-wideband amplitude-phase compensation digital attenuator circuit is characterized in that the circuit is formed by matching and cascading n attenuation units through inductors, wherein the n attenuation units adopt any one or more of a T-shaped circuit with a simplified structure, a bridge-T topological structure with a compensation structure and a pi-shaped topological structure with the compensation structure; the T-shaped circuit with the simplified structure consists of resistors Rb1, Rb2 and a transistor Mb1, and is provided with two ports Pb1 and Pb2, wherein the port Pb2 is connected to a radio frequency signal path to serve as a bypass, Pb1 is a control signal input and is connected with one end of the resistor Rb1, the other end of the Rb1 is connected with a gate of the transistor Mb1, a drain of the Mb1 is connected with the port Pb2, a source of the Mb1 is connected with one end of the resistor Rb2, and the other end of the resistor Rb2 is grounded;
the bridge-T topological structure with the compensation structure consists of resistors Ra1, Ra2, Ra3, Ra4, Ra5, Ra6, Ra7, Ra8, transistors Ma1, Ma2, Ma3 and capacitors Ca1, and has five ports, namely IN, OUT, Pa1, Pa2 and Pa3, wherein radio-frequency signal input enters from an IN port and is output from an OUT port, and Pa1, Pa2 and Pa3 are control signal input ports of the transistors; the IN port is connected with one ends of resistors Ra2 and Ra5 and the drain of a transistor Ma2, the other end of the resistor Ra2 is connected with one end of a capacitor Ca1 and one end of Ra3, the other end of the capacitor Ca1 is connected with the drain of the capacitor Ma1, the gate of the capacitor Ma1 is connected with the resistor Ra1, and the source of the transistor Ma1 is grounded; the other end of the resistor Ra1 is connected with the control port Pa1, the other end of the resistor Ra3 is connected with one end of the resistor Ra6 and the source of the transistor Ma2 and the OUT port, and the gate of the transistor Ma2 is connected with the control port Pa2 through the resistor Ra 4; the other end of the resistor Ra5, the other end of the resistor Ra6 and the drain of the transistor Ma3 are connected together, and the gate of the transistor Ma3 is connected together through the resistor Ra7 and the control port Pa 3; the source of the transistor Ma3 is connected to ground through a resistor Ra 8;
the pi-type topological structure with the compensation structure comprises resistors Rc1, Rc2, Rc3, Rc4, Rc5, Rc6, Rc7 and Rc8, a capacitor Cc1, and transistors Mc1, Mc1 and Mc1, wherein five ports are IN, OUT, Pc1 and Pc1 respectively, wherein radio-frequency signals are input from an IN port and output from an OUT port, the Pc1 and the Pc1 are control signal input ports of the transistors, the IN port is connected with one end of the resistor Rc1, the drain of the transistor Mc1 and the drain of the transistor Mc1, the other end of the resistor Rc1 is connected with one end of the capacitor Cc1 and one end of the Rc1, the other end of the capacitor Cc1 is connected with the drain of the resistor Rc1, and the source of the transistor Mc1 is connected with the ground; the other end of the resistor Rc1 is connected with the control port Pc3, the OUT port is connected with the other end of the resistor Rc3, the source of the transistor Mc2 and the drain of the transistor Mc4, the gate of the transistor Mc2 is connected with one end of the resistor Rc4, the other end of the resistor Rc4 is connected with the control port Pc2, the gate of the transistor Mc3 is connected with one end of the resistor Rc5, the gate of the transistor Mc4 is connected with one end of the resistor Rc6, the other end of the resistor Rc5 is connected with the other end of the resistor Rc6 and connected with the control port Pc1, one end of the resistor Rc7 is connected with the source of the transistor Mc3, the other end of the resistor Rc7 is grounded, one end of the resistor Rc8 is.
2. The ultra-wideband amplitude-phase compensation digital attenuator circuit according to claim 1, wherein the transistors in the circuit are N-type metal-oxide semiconductor field effect transistors.
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110830001A (en) * | 2019-11-20 | 2020-02-21 | 南京汇君半导体科技有限公司 | Ultra-wideband attenuator |
| CN111404511B (en) * | 2020-05-19 | 2021-07-23 | 成都天锐星通科技有限公司 | Ultra-wideband high-precision differential attenuator |
| CN112350686B (en) * | 2020-10-31 | 2023-03-24 | 拓维电子科技(上海)有限公司 | Differential numerical control attenuator based on inductance compensation |
| CN113114162A (en) * | 2021-03-24 | 2021-07-13 | 中国电子科技集团公司第三十八研究所 | Attenuator circuit for CMOS broadband amplitude-phase multifunctional chip |
| CN113114151B (en) * | 2021-04-29 | 2022-12-20 | 成都天锐星通科技有限公司 | Bandwidth reconfigurable radio frequency attenuator and phased array system |
| CN113114163B (en) * | 2021-05-28 | 2023-08-18 | 东南大学 | Millimeter wave CMOS digital control attenuator with innovative structure |
| CN113328729B (en) * | 2021-06-21 | 2022-10-25 | 东南大学 | Passive numerical control attenuator with temperature process angle error compensation function |
| CN116248076B (en) * | 2023-02-24 | 2024-04-02 | 电子科技大学 | High-linearity digital step attenuator with low power consumption logic control |
| CN117176106A (en) * | 2023-09-27 | 2023-12-05 | 中国电子科技集团公司第三十八研究所 | Amplitude phase integrated regulation and control circuit based on resistance attenuation network |
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| CN103427781B (en) * | 2013-08-31 | 2016-07-06 | 西安电子科技大学 | Silicone substrate high-linearity low-phase-shift ultra-broad-band digital attenuator |
| CN103441747B (en) * | 2013-08-31 | 2016-08-10 | 西安电子科技大学 | Five step-by-step movement ultra broadband numerical-control attenuators of low differential loss low phase shift high integration |
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