CN116360540B - Voltage regulating system and voltage regulating method for chip test - Google Patents
Voltage regulating system and voltage regulating method for chip test Download PDFInfo
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/28—Provision in measuring instruments for reference values, e.g. standard voltage, standard waveform
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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Abstract
The invention discloses a voltage regulating system and a voltage regulating method for chip test, which relate to the technical field of chip test and comprise an adjustable power supply and a main control unit MCU, wherein a voltage feedback end FB of the adjustable power supply is grounded through a resistor R1, and a resistor R2 is connected in series between the voltage feedback end FB and a voltage output end VOUT of the adjustable power supply, and the voltage regulating system is characterized by further comprising a parallel resistor queue and an analog switch SW, wherein one end of each resistor in the parallel resistor queue is connected with the voltage feedback end VFB, the other end of each resistor is respectively connected with one end of each sub-channel in the analog switch SW in a one-to-one correspondence manner, and the other end of each sub-channel in the analog switch SW is connected with a digital-to-analog conversion module DAC of the main control unit MCU; the invention improves the precision of voltage regulation.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a voltage regulating system and a voltage regulating method for chip testing.
Background
With the rapid development of integrated circuit technology, chip functions are becoming more and more powerful, and the demand of the market for chips is increasing day by day, which puts different demands on the research, production and manufacture of chips. As an important link in chip development, if the chip test can be completed more efficiently and with high quality, the chip test can provide powerful assistance for quick development and excellent performance of the chip.
The bias voltage test is an important link in the reliability test of the chip and is used for testing whether the chip can work normally or not when the chip fluctuates within a certain range above and below the conventional voltage. When the bias voltage test is performed, the voltage of the power supply can be regulated within a certain range, the current common power supply voltage regulating system is shown in fig. 1, and the voltage regulating principle is as follows:
(1)
As can be seen from the formula (1), the voltage regulating system mainly consists of the ratio of R2 to R3 and the difference between VFB and VIN, and the circuit has the following problems when in use:
1. r2 is different in different power chips, R3 needs to be manually switched to ensure that the desired stepping accuracy is achieved, for example, R2 is 100K, R3 is 1K in the last circuit, the ratio of R2 to R3 is 100, and if the minimum difference between VFB and VIN is 1mV, the minimum adjustable stepping of the output voltage can only be 100mV, which is not reasonable in circuit adjustment.
2. VIN may be output at 0 in the initial state, which may cause VOUT to be at a maximum value, which may damage the chip under test, with reference to the above equation.
3. The test belongs to an open loop voltage regulating system, the voltage regulating precision is poor, the anti-interference capability is weak, a large deviation exists between a voltage output value and a theoretical value, and different bias voltage compensation needs to be carried out on different chips, so that the reliability of a test result is poor.
Disclosure of Invention
In order to solve the problems in the prior art, the invention aims to provide a voltage regulating system and a voltage regulating method for chip testing, and the voltage regulating precision is improved.
In order to achieve the above purpose, the invention adopts the following technical scheme: the utility model provides a voltage regulation system for chip test, includes adjustable power supply and master control unit MCU, adjustable power supply's voltage feedback end FB is grounded through resistance R1, it has resistance R2 to establish ties between voltage feedback end FB and the voltage output end VOUT of adjustable power supply, still includes parallelly connected resistance queue and analog switch SW, the one end of each resistance in the parallelly connected resistance queue all with voltage feedback end VFB is connected, the other end of each resistance respectively with the one end one-to-one connection of each subchannel in the analog switch SW, the other end of each subchannel in the analog switch SW all with master control unit MCU's digital to analog conversion module DAC is connected.
As a further improvement of the invention, the voltage output end VOUT is grounded through a resistor R3 and a resistor R4 which are sequentially connected in series, the common end of the resistor R3 and the resistor R4 is connected with an analog-to-digital conversion module ADC of the MCU, and the analog-to-digital conversion module ADC is used for collecting the voltage Vc obtained by dividing the output voltage VOUT by the resistor R3 and the resistor R4.
As a further improvement of the present invention, the general purpose input/output GPIO module of the main control unit MCU is connected to the control port CTRL of the analog switch SW through a pull-up resistor group and a pull-down resistor group, where the pull-up resistor group and the pull-down resistor group are used to fix the sub-channel that is turned on in the default state of the analog switch SW.
The invention also provides a voltage regulating method for chip test, which adopts the voltage regulating system for chip test, and the voltage regulating method realizes closed-loop regulation of the output voltage VOUT through a closed-loop control algorithm PID, and specifically comprises the following steps:
the voltage Vc obtained by the output voltage VOUT after being divided by the resistor R3 and the resistor R4 is acquired by the analog-to-digital conversion module ADC, and the main control unit acquires the voltage value of the output voltage VOUT in real time through calculation according to the voltage Vc:
setting a theoretical output voltage as VOUT1, an actual output voltage as VOUT2, a theoretical input voltage as VIN1, and calculating the voltage collected by the analog-to-digital conversion module ADC according to the theory as Vc1, wherein the voltage collected actually is Vc2, and the voltage difference between Vc1 and Vc2 is Verror:
if Verror (t) is not 0, it indicates that the output voltage does not reach the theoretical value, at this time, the input voltage VIN is modified again, the modified input voltage is assumed to be VIN2, and according to the calculation principle of the PID control algorithm, the main control unit MCU will automatically obtain the voltage value of VIN2 according to the following formula and output in real time through the DAC:
the above formula is obtained by substituting Verror (t) and VIN1 calculation parameters according to PID formula, wherein: verror (t) is a difference function between Vc1 and Vc2 in real time, kp is a proportional adjustment coefficient, ti is an integral coefficient, and Td is a differential coefficient;
the PID control algorithm continuously works, continuously debugs the output VIN2 voltage value until VOUT 1=vout 2, at this time Verror (t) =0, the regulated output voltage reaches the theoretical output value, and meanwhile, because Verror (t) =0, the VIN2 output voltage value does not change any further, and a constant value is kept to be continuously output.
The beneficial effects of the invention are as follows:
1. the voltage regulation precision is higher, each chip is not required to be subjected to bias compensation, and the reliability of the regulation result is higher;
2. the adjustment is free from reliability risk, so that the use is safer;
3. the resistance value of the voltage regulating string can be adjusted by software, the stepping precision is adjusted more flexibly and conveniently, the applicability is wider, and the research and development and debugging efficiency is higher.
Drawings
Fig. 1 is a schematic circuit diagram of a conventional power supply voltage regulating system;
fig. 2 is a schematic circuit diagram of a voltage regulation system according to embodiment 1 of the present invention;
fig. 3 is a schematic circuit diagram of a voltage regulation system according to embodiment 2 of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Example 1:
as shown in fig. 2, the voltage regulation system for chip test includes an adjustable power supply and a main control unit MCU, wherein a voltage feedback end FB of the adjustable power supply is grounded via a resistor R1, a resistor R2 is connected in series between the voltage feedback end FB and a voltage output end VOUT of the adjustable power supply, the voltage regulation system further includes a parallel resistor queue and an analog switch SW, one end of each resistor in the parallel resistor queue is connected with the voltage feedback end VFB, the other end of each resistor is respectively connected with one end of each sub-channel in the analog switch SW in a one-to-one correspondence manner, and the other end of each sub-channel in the analog switch SW is connected with a digital-to-analog conversion module DAC of the main control unit MCU.
In this embodiment, the voltage output end VOUT is further grounded through a resistor R3 and a resistor R4 that are sequentially connected in series, and a common end of the resistor R3 and the resistor R4 is connected with an analog-to-digital conversion module ADC of the main control unit MCU, where the analog-to-digital conversion module ADC is configured to collect a voltage Vc obtained by dividing an output voltage VOUT by the resistor R3 and the resistor R4.
In this embodiment, the general purpose input/output GPIO module of the main control unit MCU is connected to the control port CTRL of the analog switch SW through a pull-up resistor set and a pull-down resistor set, where the pull-up resistor set and the pull-down resistor set are used to fix the sub-channel that is turned on in the default state of the analog switch SW.
The voltage regulating system of the present embodiment is based on the conventional scheme of fig. 1:
a. the function of collecting the output voltage of the regulated power supply is added, and the collected voltage is read by an analog-to-digital conversion module ADC of a main control unit MCU;
b. between VFB and VIN, a single series resistor is modified into a parallel resistor queue and an analog switch SW connected in series with the resistor queue, and VIN signals need to pass through the analog switch first, then go to the resistor queue and finally go to VFB; wherein VIN is output by the DAC of the MCU. In addition, each resistor in the resistor array, each sub-channel on the right side and the left side of the analog switch are connected in a one-to-one correspondence, the left side of the resistor array is uniformly connected to the VFB, and the right side of the analog switch is uniformly connected to the VIN signal line.
c. The channel selection of the analog switch SW is completed by a general purpose input/output GPIO module of the MCU, wherein the general purpose input/output GPIO module leads out of a signal line group, and R_pullup (pull-up resistor group) and R_pulldown (pull-down resistor group) are added outside, and the pull-up resistor and the pull-down resistor are used for fixing the sub-channel in a default state of the analog switch SW.
The embodiment also provides a voltage regulating method for chip test, which adopts the voltage regulating system for chip test as described above, and specifically includes:
a. based on the design scheme of fig. 2, an open-loop power supply voltage regulation formula can be obtained, as shown in formula (2):
(2)
Where RPm is a resistance value in the resistor queue, rsw is the impedance of one of the sub-channels of the analog switch, which is small by default, and RPm is not an order of magnitude, which is negligible.
Compared with the R3 in the formula (1) which is a fixed resistance value, the R3 in the formula (2) has the defect that the resistance value of RPm is flexibly selected through software by modifying the resistance value into a variable resistance value through ingenious design, namely, the multiplication coefficient of (VFB-VIN) is flexibly modified, and the stepping precision can be flexibly adjustable in the software layer during voltage regulation; for example, (VFB-VIN) is a minimum voltage difference of 1mV, and by modifying the RPm resistance to make the R2/RPm values 1,5,10 respectively, then the adjustable step accuracy of VOUT can be 1mV,5mV,10mV, without having to repeatedly adjust the R3 resistance because the steps do not meet the requirements, and repeatedly welding, reducing the debug efficiency.
In addition, the safety problem in the conventional scheme of fig. 1 can be solved perfectly, in this embodiment, on the BUS of the analog switch, a pull-up resistor and a pull-down resistor are added to fix a default condition, one of the sub-channels of the analog switch is in a conducting state, and a larger value can be selected from the RPm resistor values connected in series on the default sub-channel; thus, the default R2/RPm ratio will be small, no matter what level is input by VIN due to the initial state or the abnormal state, because R2/RPm is small, then according to equation (2), the change of VOUT is also small, VOUT will not be abnormal greatly, and the electronic components at the back end will not be damaged due to too high and too low voltages.
b. In fig. 2, VOUT is divided by a resistor R3 and a resistor R4 to obtain a voltage Vc, where the voltage Vc is input to an analog-to-digital conversion module ADC of the main control unit MCU to be collected, so that the main control unit MCU can obtain the voltage value of VOUT in real time through calculation, and a common closed-loop control algorithm PID (proportional-integral-derivative algorithm) is introduced to realize closed-loop regulation of VOUT voltage, and the specific regulation principle is as follows:
(3)
Assuming that the theoretical output voltage is VOUT1, the actual output voltage is VOUT2, and the theoretical input voltage is VIN1, then the theoretical ADC acquisition voltage is Vc1, the actual acquired voltage is Vc2, and the voltage difference between the two voltages is Verror according to formula (3):
(4)
If Verror in the formula (4) is not 0, it indicates that the output voltage does not reach the theoretical value, at this time, the input voltage VIN needs to be modified again, and the modified input voltage is assumed to be VIN2, then, according to the calculation principle of the PID control algorithm, the MCU will automatically obtain the voltage value of VIN2 according to the formula (5) and output in real time through the DAC.
(5)
Formula (5) is obtained by substituting Verror (t) and VIN1 calculation parameters according to a PID formula, wherein:
verror (t) is a difference function between Vc1 and Vc2 in real time, kp is a proportional adjustment coefficient, ti is an integral coefficient, td is a differential coefficient, kp, ti and Td form a set of PID adjustment parameters, and the PID adjustment parameters are fixed during system debugging and are not modified in the later period.
When the closed loop system works, if the value of Verror (t) is not 0, the actual output voltage VOUT2 and the theoretical output voltage VOUT1 are represented to be unequal, at this time, the PID control algorithm inside the master control unit MCU continuously works, the output VIN2 voltage value is continuously debugged until VOUT1 = VOUT2, at this time Verror (t) =0, the regulated output voltage reaches the theoretical output value, and at the same time, because Verror (t) =0, the VIN2 output voltage value is not continuously changed any more, and a constant value is continuously output. Each time the VOUT output voltage is regulated, the regulation is performed according to the closed-loop regulation flow until the theoretical output value is reached. After the closed loop is added, the output voltage value is monitored and regulated in real time, so that the control precision of the voltage regulating system is greatly improved, and a more accurate test result is provided for research and development during the voltage regulating test.
The selection principle of each hardware module in this embodiment is as follows:
1. selection of resistor R3 and resistor R4: the resistor R3 and the resistor R4 are mainly used for dividing voltage, and the voltage value of VOUT is prevented from exceeding the acquisition range of an analog-digital conversion module ADC of a main control unit MCU, so that the voltage divided by the resistor R3 and the resistor R4 is ensured to be within the acquisition voltage range of the analog-digital conversion module ADC, and the maximum value of the acquisition voltage of the analog-digital conversion module ADC is assumed to be Vadc (MAX);
(6)
As can be seen from equation (6), when VOUT and Vadc (MAX) are determined, it is preferable to select the appropriate resistance values of the resistor R3 and the resistor R4, and it is recommended that the resistance values of the resistor R3 and the resistor R4 be as large as possible to prevent the problem of large leakage.
2. The resistor queue of RPm is selected by mainly coupling RPm resistance values with resistor R2, the resistance value of the resistor R2 is different from 1K to hundreds of K in the current adjustable power supply in the market, for more voltage adjustment step selection, RPm can be placed from 1K resistor, and then accumulated upwards according to steps of 10K, such as 1K, 10K, 20K … … K, 190K, 200K … … and the like, wherein the accumulated difference value can be modified to be smaller, the adjustable step precision is finer, and the maximum value in the resistor queue needs to be placed on a default subchannel of an analog switch, so that the resistance value of RPm is very large when the system is initialized, the input voltage basically does not influence VOUT according to formula (2), and the system is safer and more reliable.
3. Selection of the analog switch SW: the number of channels of the analog switch needs to be consistent with the number of resistors in the RPm resistor queue, each sub-channel of the analog switch needs to correspond to one resistor, and in addition, in order to reduce the influence of adding the analog switch on a voltage regulating system, the channel impedance of the analog switch needs to be as small as possible, and the channel leakage current needs to be as small as possible.
4. Selection of r_pullup and r_pulldown: the two are selected from common pull-up and pull-down resistors, and the positions on the BUS BUS are determined according to a set default channel, so that each signal line on the BUS is not required to be added with a pull-down resistor.
5. Selecting a main control unit MCU: the main control unit MCU needs to contain modules such as ADC/DAC/GPIO and the like, and can support the execution of a PID algorithm, the accuracy of the ADC/DAC needs to be as high as possible, and the number of PIN PINs of the GPIO module needs to meet the control requirement of an analog switch.
Example 2:
in embodiment 1, all devices are completed by using separate devices, and the invention can also be realized by an integrated circuit, wherein RPm resistor queues, analog switches SW, r_pullup, r_pulldown, R3 and R4 in the scheme are integrated in an MCU chip and used as a voltage regulating module, and the integrated scheme block diagram is shown with reference to fig. 3.
IN fig. 3, the voltage regulating scheme is located IN the MCU chip as an integrated module, the number of external pins of the module is 2, one is the voltage acquisition pin IN1, and the second is the voltage regulating output dedicated pin OUT1; the number of the internal pins of the module pair is 3, the voltage Vc after voltage division is transmitted to the ADC module for collection by the OUT2 pin, the IN2 pin inputs the output voltage VIN of the DAC, the IN3 pin is a BUS input pin, the number of the input pins is determined according to the number of analog switch channels, the MCU controls the level for the IN3 BUS BUS through the GPIO or other excitation sources, and then a certain sub-channel IN the analog switch can be selected to be conducted.
After the voltage regulating module is integrated, the equivalent parameters of all devices are calculated and selected according to the embodiment 1, the connection mode of the RPm resistor array and the analog switch part is kept consistent, and the connection mode of R3 and R4 is kept consistent with the embodiment 1.
After the chip is integrated, the method is very convenient to use, only two connecting pins are seen outwards, the test is simple, efficient and reliable, and the voltage regulating method is the same as that of the embodiment 1.
The foregoing examples merely illustrate specific embodiments of the invention, which are described in greater detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention.
Claims (2)
1. The voltage regulation method for chip test is characterized by further comprising a parallel resistor queue and an analog switch SW, wherein one end of each resistor in the parallel resistor queue is connected with the voltage feedback end VFB, the other end of each resistor is respectively connected with one end of each sub-channel in the analog switch SW in a one-to-one correspondence manner, and the other end of each sub-channel in the analog switch SW is connected with a digital-to-analog conversion module DAC of the main control unit MCU;
the voltage output end VOUT is grounded through a resistor R3 and a resistor R4 which are sequentially connected in series, the common end of the resistor R3 and the resistor R4 is connected with an analog-digital conversion module ADC of the MCU, and the analog-digital conversion module ADC is used for collecting a voltage Vc obtained by dividing an output voltage VOUT through the resistor R3 and the resistor R4;
the voltage regulation method realizes the closed-loop regulation of the output voltage VOUT through a closed-loop control algorithm PID, and specifically comprises the following steps:
the voltage Vc obtained by the output voltage VOUT after being divided by the resistor R3 and the resistor R4 is acquired by the analog-to-digital conversion module ADC, and the main control unit acquires the voltage value of the output voltage VOUT in real time through calculation according to the voltage Vc:
the method comprises the steps of carrying out a first treatment on the surface of the Setting a theoretical output voltage as VOUT1, an actual output voltage as VOUT2, a theoretical input voltage as VIN1, and calculating the voltage collected by the analog-to-digital conversion module ADC according to the theory as Vc1, wherein the voltage collected actually is Vc2, and the voltage difference between Vc1 and Vc2 is Verror:
the method comprises the steps of carrying out a first treatment on the surface of the If Verror (t) is not 0, it indicates that the output voltage does not reach the theoretical value, at this time, the input voltage VIN is modified again, the modified input voltage is assumed to be VIN2, and according to the calculation principle of the PID control algorithm, the main control unit MCU will automatically obtain the voltage value of VIN2 according to the following formula and output in real time through the DAC:
the method comprises the steps of carrying out a first treatment on the surface of the The above formula is obtained by substituting Verror (t) and VIN1 calculation parameters according to PID formula, wherein: verror (t) is a difference function between Vc1 and Vc2 in real time, kp is a proportional adjustment coefficient, ti is an integral coefficient, and Td is a differential coefficient;
the PID control algorithm continuously works, continuously debugs the output VIN2 voltage value until VOUT 1=vout 2, at this time Verror (t) =0, the regulated output voltage reaches the theoretical output value, and meanwhile, because Verror (t) =0, the VIN2 output voltage value does not change any further, and a constant value is kept to be continuously output.
2. The voltage regulation method for chip testing according to claim 1, wherein the general purpose input/output GPIO module of the main control unit MCU is connected to the control port CTRL of the analog switch SW through a pull-up resistor set and a pull-down resistor set, and the pull-up resistor set and the pull-down resistor set are used for fixing a subchannel that is turned on in a default state of the analog switch SW.
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