CN116344557A - Image sensor and method of forming the same - Google Patents

Image sensor and method of forming the same Download PDF

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Publication number
CN116344557A
CN116344557A CN202111579006.5A CN202111579006A CN116344557A CN 116344557 A CN116344557 A CN 116344557A CN 202111579006 A CN202111579006 A CN 202111579006A CN 116344557 A CN116344557 A CN 116344557A
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forming
dielectric layer
trenches
grooves
image sensor
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杨瑞坤
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Geke Semiconductor Shanghai Co ltd
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Geke Semiconductor Shanghai Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention discloses an image sensor and a forming method thereof, wherein the method comprises the following steps: forming a plurality of first trenches in the alignment region of the substrate by etching and epitaxial processes; forming at least one dielectric layer on the lower surfaces of the first grooves; and forming a first epitaxial layer on the upper parts of the first trenches through an epitaxial process, so that the openings of the first trenches are closed, and forming cavities in the first trenches, thereby forming the alignment mark. By forming a plurality of cavities to form a plurality of columns, a plurality of signals at the interface of the substrate and at least one dielectric layer can be detected to serve as alignment marks. Alternatively, the alignment marks are formed by detecting a plurality of signals of interfaces between the plurality of cavities and at least one dielectric layer. According to the technical scheme, the alignment mark can be formed at the same time of forming the pixel array of the pixel area, no additional process is needed, and the cost can be reduced.

Description

Image sensor and method of forming the same
Technical Field
The present disclosure relates to semiconductor technology, and more particularly, to an image sensor and a method for forming the same.
Background
A CMOS image sensor (CMOS Image Sensor, CIS) is a semiconductor device that converts an optical image into an electrical signal. The CIS includes a Photodiode (PD) for sensing light and a logic circuit for processing the sensed light into an electrical signal.
In the existing semiconductor process, alignment marks (for example, separate alignment marks or alignment mark patterns in an active area mask) for photolithography are generally formed on a substrate surface as an initial step, and then other steps are performed. However, CIS is a process for or other process requiring epitaxy prior to active region formation, since the shallow alignment mark is affected by the planarization process after epitaxy is completed, resulting in the attenuation or disappearance of the alignment signal.
In order to solve the alignment problem in the semiconductor process of epitaxy before the formation of the active region, a shallow trench can be formed in the alignment region and a dielectric layer is filled to serve as an alignment mark, then a deep trench is formed in the device region and epitaxy is carried out, and then the active region is formed in the epitaxy layer, wherein the alignment mark is not influenced by the planarization treatment process after epitaxy, but the defect of the scheme is that a shallow trench photoetching step is added and the nesting alignment error is increased; and because the distance between the alignment mark and the back surface of the substrate is far, the alignment signal is weak when the back surface process is performed, and the alignment mark can not be applied to the semiconductor process needing back surface processing, such as the back-illuminated image sensor process.
Disclosure of Invention
Based on the technical problems existing in the prior art, the invention provides a method for forming an image sensor, which comprises the following steps: forming a plurality of first trenches in the alignment region of the substrate by etching and epitaxial processes; forming at least one dielectric layer on the lower surfaces of the first grooves; and forming a first epitaxial layer on the upper parts of the first trenches through an epitaxial process, so that the openings of the first trenches are closed, and forming cavities in the first trenches, thereby forming the alignment mark.
Optionally, the at least one dielectric layer includes a first dielectric layer and a second dielectric layer; the forming at least one dielectric layer on the lower surfaces of the first trenches comprises: forming the first dielectric layers on the surfaces of the first grooves; closing the plurality of first trench openings by depositing the second dielectric layer; removing part of the second dielectric layers at the openings of the plurality of first grooves; and removing part of the first dielectric layers at the openings of the first trenches, so as to form at least one dielectric layer on the lower surfaces of the first trenches.
Optionally, forming the plurality of first trenches in the alignment region of the substrate by etching and epitaxy processes includes: and forming second grooves in the pixel region of the substrate and forming a plurality of first grooves in the alignment region of the substrate through etching and epitaxial processes.
Optionally, the first dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer.
Optionally, the first sub-dielectric layer is silicon oxide; the second sub-dielectric layer is silicon nitride; the second dielectric layer is silicon oxide.
Optionally, forming the first dielectric layer on the surfaces of the plurality of first trenches includes: forming a first sub-dielectric layer on the surfaces of the second grooves of the pixel region and the first grooves of the alignment region; and forming a second sub-medium layer on the surface of the first sub-medium layer.
Optionally, the method of the image sensor further comprises: thinning the back surface of the substrate, and taking the first dielectric layer or the second dielectric layer as a stop layer; and removing the first dielectric layer or the second dielectric layer, and forming the back trench isolation structure in a self-aligned manner.
Optionally, removing portions of the second dielectric layer at the openings of the plurality of first trenches includes: and removing part of the second dielectric layers at the openings of the second trenches of the pixel region and the first trenches of the alignment region through hydrofluoric acid, so as to expose the second sub-dielectric layers.
Optionally, removing portions of the first dielectric layer at the openings of the plurality of first trenches includes: removing part of the second sub-medium layer at the openings of the second grooves of the pixel region and the first grooves of the alignment region through hot phosphoric acid; and removing part of the first sub-dielectric layer at the openings of the second grooves of the pixel region and the plurality of first grooves of the alignment region through hydrofluoric acid.
Optionally, forming the plurality of first trenches in the alignment region of the substrate by etching and epitaxy processes includes: forming a patterned first mask layer on a substrate; forming a fourth groove in the pixel region and forming a plurality of third grooves in the alignment region through an etching process; and forming at least one epitaxial layer on the surfaces of the fourth groove and the third grooves and forming lateral PN junctions through an epitaxial process, so that the line widths of the fourth groove and the third grooves are narrowed, the second groove is formed in a pixel area, and the first grooves are formed in an alignment area.
Optionally, the forming a first epitaxial layer by an epitaxial process, after closing the openings of the plurality of first trenches, further includes: removing the first mask layer; performing chemical mechanical polishing on the substrate; forming a second epitaxial layer on the substrate; and forming a transistor on the second epitaxial layer.
The invention also provides an image sensor, which is formed by the method for forming the image sensor.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
in the method for forming the image sensor provided by the technical scheme of the invention, a plurality of first grooves are formed in an alignment area of a substrate through etching and epitaxial processes; forming at least one dielectric layer on the lower surfaces of the first grooves; and forming a first epitaxial layer on the upper parts of the first trenches through an epitaxial process, so that the openings of the first trenches are closed, and forming cavities in the first trenches, thereby forming the alignment mark. By forming a plurality of cavities to form a plurality of columns, a plurality of signals at the interface of the substrate and at least one dielectric layer can be detected to serve as alignment marks. Alternatively, the alignment marks are formed by detecting a plurality of signals of interfaces between the plurality of cavities and at least one dielectric layer. According to the technical scheme, the alignment mark can be formed at the same time of forming the pixel array of the pixel area, no additional process is needed, and the cost can be reduced.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
FIG. 1 is a schematic diagram illustrating a method for forming an image sensor according to an embodiment of the present invention;
FIGS. 2 and 3 are schematic cross-sectional views of an image sensor during a method of forming the image sensor according to an embodiment of the present invention;
FIGS. 4 and 5 are top views of an image sensor structure during a method of forming an image sensor;
fig. 6 to 13 are schematic cross-sectional views of an image sensor during a method for forming the image sensor according to an embodiment of the present invention;
FIG. 14 is a schematic cross-sectional view of an image sensor during a method of forming an image sensor according to an embodiment of the invention;
fig. 15 to 17 are schematic cross-sectional views of an image sensor during a method of forming the image sensor according to an embodiment of the present invention.
Detailed Description
The following detailed description is exemplary and is intended to provide further explanation of the invention. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present invention. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the singular is "a," an, "and/or" the "when used in this specification is taken to mean" the presence of a feature, step, operation, device, component, and/or combination thereof.
Fig. 1 is a method for forming an image sensor according to an embodiment of the invention, the method includes the following steps:
step S1: forming a plurality of first trenches in the alignment region of the substrate by etching and epitaxial processes;
step S2: forming at least one dielectric layer on the lower surfaces of the first grooves;
step S3: and forming a first epitaxial layer on the upper parts of the first trenches through an epitaxial process, so that the openings of the first trenches are closed, and forming cavities in the first trenches, thereby forming the alignment mark.
The method of forming the image sensor of fig. 1 is described in detail below with reference to fig. 2 through 17. As shown in fig. 2, the substrate 11 has a front surface and a back surface, and may include a pixel region and an alignment region. The pixel area is used for forming a pixel array; the alignment region is used for forming an alignment mark.
Referring to fig. 2 to 6, for step S1, forming a plurality of first trenches 13c in the alignment region of the substrate 11 by etching and epitaxial processes includes:
forming a patterned first mask layer 12 on a substrate 11;
forming a fourth trench 13b in the pixel region and forming a plurality of third trenches 13a in the alignment region by an etching process;
and forming at least one epitaxial layer on the surfaces of the fourth grooves 13b and the third grooves 13a through an epitaxial process, forming lateral PN junctions, narrowing the line widths of the fourth grooves 13b and the third grooves 13a, forming the second grooves 13d in a pixel region, and forming the first grooves 13c in an alignment region.
Specifically, referring to fig. 2, a substrate 11 is provided; the substrate 11 may be a doped or undoped semiconductor material such as silicon, germanium, silicon Germanium On Insulator (SGOI), or a combination thereof. The substrate 11 may comprise a substrate of a multi-layered epitaxial layer. By way of example only, in this embodiment, the substrate 11 may form an epitaxial layer 112, 113 on a silicon wafer 111. Wherein the epitaxial layer 112 may be a low doped P-type buffer layer; the epitaxial layer 113 may be an N-type epitaxial layer for forming an N-type region of a photosensitive cell, i.e., a photodiode.
Specifically, referring to fig. 3, a patterned first mask layer 12 is formed on a substrate 11, and through an etching process, a fourth trench 13b is simultaneously formed in a pixel region of the substrate 11, and a plurality of third trenches 13a are formed in an alignment region of the substrate 11.
Fig. 4 is a top view of the pixel region of the substrate 11 formed in fig. 3 after forming the fourth trench 13 b. After the fourth trench 13b is formed in the pixel region of the substrate 11, an array of photosensitive cells 11a (i.e., carrier collection regions of photodiodes) may be formed.
Fig. 5 is a top view of the alignment region of the substrate 11 formed in fig. 3 after forming the third trench 13a. The plurality of third trenches 13a are used for forming alignment marks later.
Referring to fig. 5, at least one epitaxial layer 14 and lateral PN junctions are formed on the surfaces of the fourth trench 13b of the pixel region and the third trench 13a of the alignment region by an epitaxial process, so that the line widths of the fourth trench 13b of the pixel region and the third trench 13a of the alignment region are narrowed, thereby simultaneously forming the second trench 13d in the pixel region of the substrate 11 and forming the plurality of first trenches 13c in the alignment region of the substrate 11. In an embodiment, by controlling the process conditions, the opening shapes of the second trench 13d in the pixel region and the plurality of first trenches 13c in the alignment region of the substrate 11 may be horn-shaped, that is, the openings of the second trench 13d and the first trench 13c may be inclined. In an embodiment, the epitaxial layer 141 and the epitaxial layer 142 may be sequentially formed on the surface of the first trench 13 through an epitaxial process. The epitaxial layer 141 may be an intrinsic semiconductor. Epitaxial layer 142 may be a P-type semiconductor.
Referring to fig. 7 to 11, for step S2: forming at least one dielectric layer on the lower surfaces of the plurality of first trenches 13c includes:
forming the first dielectric layer 15 on the surfaces of the first trenches 13 c;
closing the openings of the plurality of first trenches 13c by depositing the second dielectric layer 16;
removing part of the second dielectric layer 16 at the openings of the first trenches 13 c;
and removing part of the first dielectric layer 15 at the openings of the first trenches 13c, so as to form at least one dielectric layer on the lower surfaces of the first trenches.
In this embodiment, the at least one dielectric layer may include a first dielectric layer 15 and a second dielectric layer 16. The first dielectric layer 15 may include a first sub-dielectric layer 151 and a second sub-dielectric layer 152. Optionally, the first sub-dielectric layer 151 is silicon oxide. Alternatively, the second sub-dielectric layer 152 may be silicon nitride. Alternatively, the second dielectric layer 16 may be silicon oxide.
In a specific embodiment, for the step of forming the first dielectric layer 15 on the surfaces of the plurality of first trenches 13c, referring to fig. 6, a first sub-dielectric layer 151 may be formed on the surfaces of the plurality of first trenches 13c of the alignment region and the second trenches 13d of the pixel region through a thermal oxidation process, referring to fig. 7, and a second sub-dielectric layer 152 may be continuously formed on the surfaces of the first sub-dielectric layer 151 through a low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition, LPCVD).
In a specific embodiment, for the step of depositing the second dielectric layer 16 to close the openings of the plurality of first trenches 13c, referring to fig. 9, the second dielectric layer 16 may be deposited to close the openings of the plurality of first trenches 13c by a high aspect ratio process (High Aspect Ratio Process, HARP). Further, the second dielectric layer 16 may be thinned by chemical mechanical polishing (chemical mechanical polish, CMP), stopping on the first mask layer 12.
In a specific embodiment, for the step, a portion of the second dielectric layer 16 at the openings of the plurality of first trenches 13c is removed, referring to fig. 10, a portion of the second dielectric layer at the openings of the plurality of first trenches 13c of the alignment region and the second trench 13d of the pixel region is removed by hydrofluoric acid, so that the second sub-dielectric layer 152 is exposed.
In a specific embodiment, for the step, removing portions of the first dielectric layer 15 at the openings of the plurality of first trenches 13c, so as to form the at least one dielectric layer on the lower surfaces of the plurality of first trenches includes:
referring to fig. 11, portions of the second sub-dielectric layer 152 at the openings of the second trenches 13d of the pixel region and the plurality of first trenches 13c of the alignment region are removed by hot phosphoric acid;
referring to fig. 12, portions of the first sub-dielectric layer 151 at the openings of the second trenches 13d of the pixel region and the plurality of first trenches 13c of the alignment region are removed by hydrofluoric acid. In this embodiment, the second dielectric layer 16 is silicon oxide. Therefore, when the second trenches 13d of the pixel region and portions of the first sub-dielectric layer 151 at the openings of the plurality of first trenches 13c of the alignment region are removed by hydrofluoric acid, the second dielectric layer 16 is also consumed, thereby exposing the sidewalls of the second sub-dielectric layer 152. In this embodiment, the second dielectric layer 16 may not be completely removed by hydrofluoric acid at the bottoms of the second trenches 13d and the plurality of first trenches 13c.
Referring to fig. 13, for step S3: forming a first epitaxial layer 17 on the upper portions of the plurality of first trenches 13c by an epitaxial process, closing the openings of the plurality of first trenches 13c, and forming cavities 17a in the plurality of first trenches, thereby forming an alignment mark includes: a first epitaxial layer 17 is formed on the upper portions of the plurality of first trenches 13c by an epitaxial process, so that the openings of the plurality of first trenches 13c are closed. Further, the first epitaxial layer 17 may be thinned by CMP, stopping on the first mask layer 12.
FIG. 14 is a schematic view of an inner cross section of the alignment region along the surface direction of the substrate 11 after forming the alignment mark; i.e. a plurality of cavities 17a forming a plurality of columns. The alignment marks may be obtained by detecting a plurality of signals 17b of the interface of the epitaxial layer 14 with the first dielectric layer 15. In some embodiments, the plurality of signals 17c may be used as alignment marks by detecting the interface of the cavity 17a with the first dielectric layer 15.
In some embodiments, after the forming the first epitaxial layer 17 by the epitaxial process, closing the openings of the plurality of first trenches 13c further includes:
referring to fig. 15, the first mask layer 12 is removed;
referring to fig. 16, the substrate 11 is subjected to chemical mechanical polishing;
referring to fig. 17, a second epitaxial layer 18 is formed on the substrate 11;
referring to fig. 17, a transistor 19 is formed on the second epitaxial layer 18.
In some embodiments, the method of forming an image sensor as shown in fig. 1 may be applied to a backside illuminated image sensor. The method for forming the image sensor shown in fig. 1 further includes: thinning the back surface of the substrate 11, and taking the first dielectric layer 15 or the second dielectric layer 16 as a stop layer; and removing the first dielectric layer 15 or the second dielectric layer 16, and forming the back trench isolation structure in a self-aligned manner. Further, for the backside of the backside image sensor, the related process, such as forming a filter layer and a microlens layer on the backside of the substrate 11, is completed, which is not described herein.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (12)

1. A method of forming an image sensor, comprising:
forming a plurality of first trenches in the alignment region of the substrate by etching and epitaxial processes;
forming at least one dielectric layer on the lower surfaces of the first grooves;
and forming a first epitaxial layer on the upper parts of the first trenches through an epitaxial process, so that the openings of the first trenches are closed, and forming cavities in the first trenches, thereby forming the alignment mark.
2. The method of forming an image sensor of claim 1, wherein the at least one dielectric layer comprises a first dielectric layer and a second dielectric layer; the forming at least one dielectric layer on the lower surfaces of the first trenches comprises:
forming the first dielectric layers on the surfaces of the first grooves;
closing the plurality of first trench openings by depositing the second dielectric layer;
removing part of the second dielectric layers at the openings of the plurality of first grooves;
and removing part of the first dielectric layers at the openings of the first trenches, so as to form at least one dielectric layer on the lower surfaces of the first trenches.
3. The method of forming an image sensor of claim 2, wherein forming a plurality of first trenches in the alignment region of the substrate by etching and epitaxy processes comprises:
and forming second grooves in the pixel region of the substrate and forming a plurality of first grooves in the alignment region of the substrate through etching and epitaxial processes.
4. The method of forming an image sensor of claim 3 wherein the first dielectric layer comprises a first sub-dielectric layer and a second sub-dielectric layer.
5. The method of forming an image sensor of claim 4 wherein the first sub-dielectric layer is silicon oxide; the second sub-dielectric layer is silicon nitride; the second dielectric layer is silicon oxide.
6. The method of forming an image sensor of claim 2, wherein forming a first dielectric layer on the plurality of first trench surfaces comprises:
forming a first sub-dielectric layer on the surfaces of the second grooves of the pixel region and the first grooves of the alignment region;
and forming a second sub-medium layer on the surface of the first sub-medium layer.
7. The method of forming an image sensor of claim 2, further comprising:
thinning the back surface of the substrate, and taking the first dielectric layer or the second dielectric layer as a stop layer;
and removing the first dielectric layer or the second dielectric layer, and forming the back trench isolation structure in a self-aligned manner.
8. The method of forming an image sensor of claim 5, wherein said removing portions of said second dielectric layer at said plurality of first trench openings comprises:
and removing part of the second dielectric layers at the openings of the second trenches of the pixel region and the first trenches of the alignment region through hydrofluoric acid, so as to expose the second sub-dielectric layers.
9. The method of forming an image sensor as in claim 5, said removing portions of said first dielectric layer at said plurality of first trench openings comprising:
removing part of the second sub-medium layer at the openings of the second grooves of the pixel region and the first grooves of the alignment region through hot phosphoric acid;
and removing part of the first sub-dielectric layer at the openings of the second grooves of the pixel region and the plurality of first grooves of the alignment region through hydrofluoric acid.
10. The method of forming an image sensor of claim 2, wherein forming a plurality of first trenches in the alignment region of the substrate by etching and epitaxy processes comprises:
forming a patterned first mask layer on a substrate;
forming a fourth groove in the pixel region and forming a plurality of third grooves in the alignment region through an etching process;
and forming at least one epitaxial layer on the surfaces of the fourth groove and the third grooves and forming lateral PN junctions through an epitaxial process, so that the line widths of the fourth groove and the third grooves are narrowed, the second groove is formed in a pixel area, and the first grooves are formed in an alignment area.
11. The method of forming an image sensor of claim 10, wherein forming a first epitaxial layer by an epitaxial process, after closing the openings of the plurality of first trenches, further comprises:
removing the first mask layer;
performing chemical mechanical polishing on the substrate;
forming a second epitaxial layer on the substrate;
and forming a transistor on the second epitaxial layer.
12. An image sensor, characterized in that it is formed by the method of forming an image sensor according to any one of claims 1 to 11.
CN202111579006.5A 2021-12-22 2021-12-22 Image sensor and method of forming the same Pending CN116344557A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111579006.5A CN116344557A (en) 2021-12-22 2021-12-22 Image sensor and method of forming the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111579006.5A CN116344557A (en) 2021-12-22 2021-12-22 Image sensor and method of forming the same

Publications (1)

Publication Number Publication Date
CN116344557A true CN116344557A (en) 2023-06-27

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