CN116341461A - Analog image signal acquisition SIP chip - Google Patents
Analog image signal acquisition SIP chip Download PDFInfo
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- CN116341461A CN116341461A CN202211603368.8A CN202211603368A CN116341461A CN 116341461 A CN116341461 A CN 116341461A CN 202211603368 A CN202211603368 A CN 202211603368A CN 116341461 A CN116341461 A CN 116341461A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2115/00—Details relating to the type of the circuit
- G06F2115/02—System on chip [SoC] design
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention discloses an analog image signal acquisition SIP chip, which comprises n double-way operational amplifiers, 2n differential filter circuits, a multichannel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multichannel digital potentiometer, a reference source, LDO (low dropout regulator) and a low-speed operational amplifier; wherein n is an integer of 2 or more. The invention adopts SIP packaging technology to make the high-speed single-ended operational amplifier, high-speed differential operational amplifier, low-speed buffer, LDO power supply, reference source, AD analog-to-digital converter, digital potentiometer and peripheral resistance-capacitance of each chip used in detector analog signal processing circuitThe device die is packaged in a SIP chip, weighing about 1g, and having a size of 10X107X 1mm 3 The highest four-path analog image signal acquisition and conditioning functions of the single SIP chip are realized, and the size of a circuit board can be greatly reduced by using the SIP chip, so that the weight of the circuit board is reduced.
Description
Technical Field
The invention belongs to the technical field of electronics, and particularly relates to an analog image signal acquisition SIP chip.
Background
The output signals of many infrared detectors are analog signals, and the analog signals output by the detectors are converted into digital signals through an amplifier chip and an analog-to-digital converter chip, and then are sent to the inside of a main control chip to be organized into a pair of complete infrared images.
With the increasing resolution of the current detector image, the image data volume is increased, so that the number of channels of the analog output of the detector is increased, and the circuit size for processing the analog signal is increased, which is very unfavorable for various use scenes which are very sensitive to weight, such as spaceflight, airborne, handheld and the like.
Disclosure of Invention
The invention aims to provide an analog image signal acquisition SIP chip which realizes multichannel analog image signal acquisition and conditioning, and simultaneously reduces the size and the weight.
The technical scheme provided by the invention is as follows:
an analog image signal acquisition SIP chip comprises n double-way operational amplifiers, 2n differential filter circuits, a multichannel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multichannel digital potentiometer, a reference source, LDO and a low-speed operational amplifier; wherein n is an integer of 2 or more;
the two-way operational amplifier supports two-way analog image signal input;
the non-inverting input ends of every two differential operational amplifiers are connected to the two output ends of one double-way operational amplifier, the inverting input ends of the differential operational amplifiers are connected with an external pin Vbias, and external direct current bias is provided; the differential operational amplifier common-mode voltage input pins are connected with the multichannel high-speed differential ADC analog-to-digital converter and are used for matching the common-mode voltage between the differential operational amplifier output and the analog input of the multichannel high-speed differential ADC analog-to-digital converter; two output ends of the differential operational amplifier are connected to one channel of the multichannel high-speed differential ADC analog-to-digital converter through a differential filter circuit;
the channel mode control module is used for controlling the on-off of a power supply port of the double-channel operational amplifier and the differential operational amplifier connected with the double-channel operational amplifier;
the multi-channel digital potentiometer is a digital potentiometer with an IIC interface, and each two channels of the digital potentiometer are respectively used as two feedback resistors in a differential operational amplifier and used for realizing differential operational amplifier gain adjustment so as to adapt to the input amplitude of an analog image signal and the input amplitude of a multi-channel high-speed differential ADC analog-digital converter;
the reference source is used for providing bias power supply with low infrared detector power supply current;
LDO, is the linear voltage stabilizer of low pressure difference, is used for providing the bias voltage power supply that the infrared detector supply current is great;
the low-speed operational amplifier is combined with a reference source and used for realizing any voltage output lower than the voltage of the reference source so as to provide bias power supply with lower infrared detector power supply current.
Further, the differential filter circuit comprises a first resistor, a second resistor and a capacitor; the two output ends of the differential operational amplifier are respectively connected to one channel of the multichannel high-speed differential ADC analog-to-digital converter through a first resistor and a second resistor, and the capacitor is positioned between the first resistor and the second resistor and the connecting end of the multichannel high-speed differential ADC analog-to-digital converter.
Further, the channel mode control module comprises a control pin and a load switch, and the on-off of the power supply port is controlled by controlling the on-off of the load switch through the control pin.
Further, one channel of the analog image signal is normally on, and the load switch is used for controlling the on-off of the power supply ports of the other channels.
Furthermore, the SIP chip leading-out terminal adopts a BGA array mode.
Furthermore, the SIP chip is packaged by using a substrate type plastic package, an organic substrate is used in a circuit, a passive device is fixed by using welding paste, the chip is fixed on the surface PAD of the substrate by using a conductive adhesive bonding mode, and meanwhile, the electrical connection is ensured by using a gold wire bonding mode.
Further, the two-way operational amplifier is located in a first column, the differential operational amplifier is located in a second column, the multi-channel digital potentiometer is located in the middle of the second column, the differential filter circuit is located in a third column, the channel mode control module is located above a fourth column, the multi-channel high-speed differential ADC analog-to-digital converter is located in the middle of the fourth column, and the reference source, the LDO and the low-speed operational amplifier are located below the fourth column.
Further, the SIP chip is rectangular.
Compared with the prior art, the invention has the following advantages:
1. the invention adopts SIP packaging technology to package the high-speed single-ended operational amplifier, high-speed differential operational amplifier, low-speed buffer, LDO power supply, reference source, AD analog-to-digital converter, digital potentiometer, peripheral resistor-capacitor and other device bare chips of each chip into one SIP chip, the weight is about 1g, and the size is 10 multiplied by 17 multiplied by 1mm 3 The highest four-path analog image signal acquisition and conditioning functions of the single SIP chip are realized, and the size of a circuit board can be greatly reduced by using the SIP chip, so that the weight of the circuit board is reduced.
2. According to the invention, the amplification factor of the operational amplifier can be adjusted through the digital potentiometer of the IIC interface so as to adapt to the analog output signal of the infrared detector and the AD analog-to-digital converter; meanwhile, the IIC interface potentiometer can effectively reduce the number of IO on the periphery of the SIP chip and reduce the size of the SIP chip.
3. The invention can realize single-channel transmission and four-channel transmission by selectively closing the channels through the channel mode power supply control pins, and can effectively reduce the power consumption of the SIP chip.
4. The invention is internally provided with an LDO power supply chip, a reference source and a low-speed operational amplifier, and can directly supply power to the bias voltage of the detector, thereby reducing SIP peripheral power supply circuits and further reducing the size of a circuit board.
5. In the traditional scheme, each channel direct current bias is firstly subjected to a double-path low-speed operational amplifier and then is input to the inverting input end of the differential operational amplifier.
6. The invention adopts a three-stage structure: the primary single-ended amplifier, the secondary differential amplifier and the tertiary differential AD analog-to-digital converter are compared with the traditional two-stage structure: the first-level single-ended amplifier and the second-level single-ended AD (analog-to-digital) converter can greatly reduce common-mode interference in an analog circuit and improve image quality.
7. According to the data flow direction of the analog signals, compared with the traditional square-appearance SIP chip, the invention designs the rectangular appearance with the size of 10mm multiplied by 17mm multiplied by 1mm, can effectively reduce the length of windings in the chip, reduce the common mode interference of the windings on the analog signals and improve the signal to noise ratio in the chip.
8. According to the invention, the differential operational amplifier negative power supply port-V5A 2 is reserved, and the differential operational amplifier negative power supply port-V5A 2 can be selected to be directly connected with the ground or connected with a negative power supply according to the range of analog input signals, so that the flexibility of the use of the invention is improved, and the input range of the analog signals of the invention is improved.
Drawings
Fig. 1 is a block diagram of a SIP chip according to an embodiment of the present invention;
FIG. 2 is a block diagram illustrating a channel mode control module according to an embodiment of the present invention;
FIG. 3 is a diagram of a SIP chip size diagram according to an embodiment of the present invention;
fig. 4 is a layout diagram of the SIP chip according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention. In addition, the technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
The invention discloses an analog image signal acquisition SIP chip, which comprises n double-way operational amplifiers, 2n differential filter circuits, a multichannel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multichannel digital potentiometer, a reference source, LDO and a low-speed operational amplifier; wherein n is an integer of 2 or more;
the two-way operational amplifier supports two-way analog image signal input;
the non-inverting input ends of every two differential operational amplifiers are connected to the two output ends of one double-way operational amplifier, the inverting input ends of the differential operational amplifiers are connected with an external pin Vbias, and external direct current bias is provided; the differential operational amplifier common-mode voltage input pins are connected with the multichannel high-speed differential ADC analog-to-digital converter and are used for matching the common-mode voltage between the differential operational amplifier output and the analog input of the multichannel high-speed differential ADC analog-to-digital converter; two output ends of the differential operational amplifier are connected to one channel of the multichannel high-speed differential ADC analog-to-digital converter through a differential filter circuit;
the channel mode control module is used for controlling the on-off of a power supply port of the double-channel operational amplifier and the differential operational amplifier connected with the double-channel operational amplifier;
the multi-channel digital potentiometer is a digital potentiometer with an IIC interface, and each two channels of the digital potentiometer are respectively used as two feedback resistors in a differential operational amplifier and used for realizing differential operational amplifier gain adjustment so as to adapt to the input amplitude of an analog image signal and the input amplitude of a multi-channel high-speed differential ADC analog-digital converter;
the reference source is used for providing bias power supply with low infrared detector power supply current;
LDO, is the linear voltage stabilizer of low pressure difference, is used for providing the bias voltage power supply that the infrared detector supply current is great;
the low-speed operational amplifier is combined with a reference source and used for realizing any voltage output lower than the voltage of the reference source so as to provide bias power supply with lower infrared detector power supply current.
Further, the differential filter circuit comprises a first resistor, a second resistor and a capacitor; the two output ends of the differential operational amplifier are respectively connected to one channel of the multichannel high-speed differential ADC analog-to-digital converter through a first resistor and a second resistor, and the capacitor is positioned between the first resistor and the second resistor and the connecting end of the multichannel high-speed differential ADC analog-to-digital converter.
Further, the channel mode control module comprises a control pin and a load switch, and the on-off of the power supply port is controlled by controlling the on-off of the load switch through the control pin. One channel of the analog image signal is normally on, and the load switch is used for controlling the on-off of the power supply ports of the other channels.
Further, the two-way operational amplifier is located in a first column, the differential operational amplifier is located in a second column, the multi-channel digital potentiometer is located in the middle of the second column, the differential filter circuit is located in a third column, the channel mode control module is located above a fourth column, the multi-channel high-speed differential ADC analog-to-digital converter is located in the middle of the fourth column, and the reference source, the LDO and the low-speed operational amplifier are located below the fourth column.
Fig. 1 is a schematic diagram of the internal structure of a chip according to an embodiment of the present invention, which mainly includes two dual-channel operational amplifiers, four differential filter circuits including resistors R and capacitors C, a four-channel high-speed differential ADC analog-to-digital converter, a channel mode control module, an eight-channel digital potentiometer, a reference source, LDO and a low-speed operational amplifier.
In this embodiment, the dual-path operational amplifier uses a SX8042MD die of the intermediate power unit 24, the die is powered to ±5V, the bandwidth is 210MHz, the input range is ±3.4v, the output range is ±4.9v, and the static power consumption is 0.06W. The SX8042MD die supports two analog inputs, mainly for buffering analog input signals AIN1, AIN2, AIN3, AIN 4.
The non-inverting input ends of the two differential operational amplifiers are respectively connected to the two output ends of a two-way operational amplifier, the inverting input ends of the differential operational amplifiers are connected with an external pin Vbias to provide external direct current bias, the common-mode voltage input pins of the differential operational amplifiers are connected with a 4-channel high-speed differential ADC (analog to digital) for matching the common-mode voltage between the output of the differential operational amplifiers and the analog input of the 4-channel high-speed differential ADC, and the SF207 bare chip of the intermediate electric 24 is used for the differential operational amplifiers.
The filter circuit is mainly used for filtering the analog signals output by the differential operational amplifier, the common mode voltage between the differential operational amplifier and the high-speed ADC is not changed, original manufacturers of the resistor R and the capacitor C are torch electrons, and original packages of the resistor R and the capacitor C are directly packaged into the SIP chip.
The four-channel high-speed differential ADC analog-to-digital converter adopts MXT2401 of China space technology 722, wherein the MXT2401 is a four-channel 16-bit data converter. Each channel can work independently, has an on-chip sample and hold circuit, and is designed and optimized, so that the cost is lower, the power consumption is lower, the size is smaller and the use is easier. The product has excellent dynamic performance in the whole input range under the conversion rate of 125 MSPS. The SIP chip of the present invention directly encapsulates the MXT2401 die.
The channel mode control module is shown in fig. 2, and mainly comprises a control pin ms_ch and a load switch. The on-off of the power supply ports of the power supply pins V5A1 to the 2 nd, 3 rd and 4 th channels of the two-way operational amplifier are controlled through the level of the MS_CH pin, and the on-off of the power supply ports of the power supply pins V5A2 to the 2 nd, 3 rd and 4 th channels of the difference operational amplifier are controlled through the level of the MS_CH pin.
The eight-channel digital potentiometer adopts a digital potentiometer SZ522E0 bare chip of an IIC interface of the intermediate electric 24, and each two channels of the digital potentiometer are respectively used as two feedback resistors in a differential operational amplifier to realize differential operational amplifier gain adjustment so as to adapt analog signal input AIN1, AIN2, AIN3, AIN4 amplitude and 4-channel high-speed differential ADC input amplitude.
The reference source is a 3.3V output reference source JS3033 die of the intermediate power 58, which is mainly used for providing bias power with low infrared detector supply current.
The low-speed operational amplifier adopts a Saint-bang micro SGM8558-2XG bare chip, is mainly used as a buffer, can be combined with reference source voltage division, realizes random voltage output lower than 3.3V by buffering, and is mainly used for providing bias power supply with lower infrared detector power supply current.
The LDO adopts a GED7151S8 bare chip of Beijing gamma electrons, is a low dropout linear voltage regulator, adopts a 4.5V to 16V power supply to supply power, and has a maximum output current of 800mA. The device adopts an advanced proprietary architecture, provides high power supply rejection and ultra-low noise characteristics, and can realize excellent transient response performance of lines and loads. The voltage can be regulated between 1.5V and 5.1V by using an external resistor. The method is mainly used for providing bias power supply with larger infrared detector power supply current.
The invention uses BGA array, the number of the terminals is 57, and the sequence of the terminals is defined in detail in table 1.
TABLE 1SIP chip pin extraction table
The dimensions of the invention are 10mm by 17mm by 1mm and the circuit dimensions are shown in FIG. 3.
The SIP uses a substrate type plastic package, an organic substrate is used in a circuit, a passive device is fixed by using welding paste, a chip is fixed on a PAD on the surface of the substrate by using a conductive adhesive bonding mode, meanwhile, electrical connection is ensured by using a gold wire bonding mode, and the technological description of the chip is shown in Table 2 in detail.
TABLE 2SIP chip Process specification Table
The layout of the circuit is shown in fig. 4, wherein circuits 1 and 2 are two-way operational amplifiers, 3, 4, 6 and 7 are differential operational amplifiers, 5 are digital potentiometers, 8, 9, 10 and 11 are filter circuits, 12 are channel mode control modules, 13 are 4-channel high-speed differential ADCs, 14 are LDOs, 15 are reference sources, and 16 is a low-speed operational amplifier.
It should be noted that each step/component described in the present application may be split into more steps/components, or two or more steps/components or part of the operations of the steps/components may be combined into new steps/components, as needed for implementation, to achieve the object of the present invention.
It will be readily appreciated by those skilled in the art that the foregoing is merely a preferred embodiment of the invention and is not intended to limit the invention, but any modifications, equivalents, improvements or alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (8)
1. The analog image signal acquisition SIP chip is characterized by comprising n double-way operational amplifiers, 2n differential filter circuits, a multichannel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multichannel digital potentiometer, a reference source, LDO (low dropout regulator) and a low-speed operational amplifier; wherein n is an integer of 2 or more;
the two-way operational amplifier supports two-way analog image signal input;
the non-inverting input ends of every two differential operational amplifiers are connected to the two output ends of one double-way operational amplifier, the inverting input ends of the differential operational amplifiers are connected with an external pin Vbias, and external direct current bias is provided; the differential operational amplifier common-mode voltage input pins are connected with the multichannel high-speed differential ADC analog-to-digital converter and are used for matching the common-mode voltage between the differential operational amplifier output and the analog input of the multichannel high-speed differential ADC analog-to-digital converter; two output ends of the differential operational amplifier are connected to one channel of the multichannel high-speed differential ADC analog-to-digital converter through a differential filter circuit;
the channel mode control module is used for controlling the on-off of a power supply port of the double-channel operational amplifier and the differential operational amplifier connected with the double-channel operational amplifier;
the multi-channel digital potentiometer is a digital potentiometer with an IIC interface, and each two channels of the digital potentiometer are respectively used as two feedback resistors in a differential operational amplifier and used for realizing differential operational amplifier gain adjustment so as to adapt to the input amplitude of an analog image signal and the input amplitude of a multi-channel high-speed differential ADC analog-digital converter;
the reference source is used for providing bias power supply with low infrared detector power supply current;
LDO, is the linear voltage stabilizer of low pressure difference, is used for providing the bias voltage power supply that the infrared detector supply current is great;
the low-speed operational amplifier is combined with a reference source and used for realizing any voltage output lower than the voltage of the reference source so as to provide bias power supply with lower infrared detector power supply current.
2. The analog image signal acquisition SIP chip of claim 1, wherein the differential filter circuit comprises a first resistor, a second resistor, and a capacitor; the two output ends of the differential operational amplifier are respectively connected to one channel of the multichannel high-speed differential ADC analog-to-digital converter through a first resistor and a second resistor, and the capacitor is positioned between the first resistor and the second resistor and the connecting end of the multichannel high-speed differential ADC analog-to-digital converter.
3. The analog image signal acquisition SIP chip of claim 1, wherein the channel mode control module includes a control pin and a load switch, and the control pin controls the on-off of the load switch to control the on-off of the power supply port.
4. An analog image signal acquisition SIP chip according to claim 3, wherein one channel of the analog image signal is normally on, and the load switch is used to control the on-off of the power supply ports of the remaining channels.
5. The analog image signal acquisition SIP chip of claim 1, wherein the SIP chip terminals are in the form of a BGA array.
6. The SIP chip of claim 1, wherein the SIP chip is encapsulated by a substrate, an organic substrate is used in the circuit, a passive device is fixed by using a solder paste, the chip is fixed on a PAD of the substrate by using a conductive adhesive bonding method, and an electrical connection is ensured by using a gold wire bonding method.
7. The SIP chip of any of claims 1-6, wherein the dual-path op-amp is located in a first column, the differential op-amp is located in a second column, the multi-channel digital potentiometer is located in the middle of the second column, the differential filter circuit is located in a third column, the channel mode control module is located above a fourth column, the multi-channel high-speed differential ADC analog-to-digital converter is located in the middle of the fourth column, and the reference source, LDO, and the low-speed op-amp are located below the fourth column.
8. The analog image signal capturing SIP chip of claim 7, wherein the SIP chip is rectangular.
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| CN202211603368.8A CN116341461A (en) | 2022-12-13 | 2022-12-13 | Analog image signal acquisition SIP chip |
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| CN202211603368.8A CN116341461A (en) | 2022-12-13 | 2022-12-13 | Analog image signal acquisition SIP chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117311248A (en) * | 2023-11-30 | 2023-12-29 | 睿励科学仪器（上海）有限公司 | Processing circuit of light intensity signal and semiconductor defect detection system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117311248A (en) * | 2023-11-30 | 2023-12-29 | 睿励科学仪器（上海）有限公司 | Processing circuit of light intensity signal and semiconductor defect detection system |
| CN117311248B (en) * | 2023-11-30 | 2024-02-09 | 睿励科学仪器（上海）有限公司 | Processing circuit of light intensity signal and semiconductor defect detection system |
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