CN116339439A - Power supply circuit and method for tail current of operational amplifier - Google Patents
Power supply circuit and method for tail current of operational amplifier Download PDFInfo
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Abstract
The utility model provides a power supply circuit of tail current is put to fortune which characterized in that: the circuit comprises a first current source, a second current source, a primary current mirror, a secondary current mirror, a biasing unit and an operational amplifier; the primary current mirror receives a first reference current of the first current source and mirrors the first reference current into the bias unit; the second-stage current mirror receives a second reference current of the second current source, and after the bias unit enters a variable resistance region due to the rising of the input voltage of the operational amplifier, the second-stage current mirror adjusts the source-drain voltage of the first-stage current mirror based on the bias unit so that the circuit replicates the first reference current and outputs the first reference current to the operational amplifier. The invention has simple circuit structure and few elements, and can realize accurate tail current input under the condition of fluctuation of the input voltage of the operational amplifier.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a power supply circuit and a method for tail current of an operational amplifier.
Background
In the prior art, the tail current source provided for the operational amplifier is usually duplicated by a reference current source through a current mirror circuit. In order to copy the current more accurately, the current mirror can be generally set to be of a common-source common-gate structure, so that the source-drain voltages of the two transistors can be guaranteed to be equal, the influence of a channel length modulation effect on a current copying process can be effectively restrained, and the accuracy of current mirror copying current is guaranteed.
However, even if the current mirror with the cascode structure is adopted, when the input voltage of the operational amplifier input by the PMOS is too high or the input voltage of the operational amplifier input by the NMOS is too low, the cascode transistor may not work in the saturation region any more, and along with the influence of the channel length modulation effect, the current mirror cannot accurately copy the current of the reference current source, and thus, the constant tail current cannot be ensured to be provided for the operational amplifier.
In order to solve this problem, a power supply circuit and a method for tail current of an operational amplifier are needed.
Disclosure of Invention
In order to solve the defects existing in the prior art, the invention aims to provide a power supply circuit and a method for tail current of an operational amplifier, which provide tail current for the operational amplifier by providing a multistage current mirror and a bias unit structure. When the input voltage of the PMOS input operational amplifier is too high or the input voltage of the NMOS input operational amplifier is too low, the bias unit gradually enters the variable resistance region to reduce the drain-source voltage difference of the tail current source MOS tube of the operational amplifier.
The invention adopts the following technical scheme.
The invention relates to a power supply circuit of an operational amplifier tail current, wherein the circuit comprises a first current source, a second current source, a primary current mirror, a secondary current mirror, a biasing unit and an operational amplifier; a primary current mirror receiving a first reference current of the first current source and mirroring it into the bias cell; and the second-stage current mirror receives a second reference current of the second current source, and when the bias unit enters the variable resistance region due to the rising of the input voltage of the operational amplifier, the second-stage current mirror adjusts the source-drain voltage of the first-stage current mirror based on the bias unit so that the circuit replicates the first reference current and outputs the first reference current to the operational amplifier.
Preferably, the primary current mirror, the secondary current mirror and the biasing unit are composed of PMOS tubes, and the operational amplifier adopts the PMOS tubes as input ends; or the primary current mirror, the secondary current mirror and the bias unit are composed of NMOS tubes, and the operational amplifier adopts the NMOS tubes as input ends.
Preferably, the primary current mirror comprises PMOS tubes Mp3 and Mp4; the sources of Mp3 and Mp4 are connected to the power supply voltage Vdd; the grids of the Mp3 and the Mp4 are connected with each other and connected to one end of a first current source, and the other end of the first current source is grounded; the drain electrode of the Mp3 is connected with the source electrode of the Mp7 tube in the secondary current mirror and the bias unit respectively, and the drain electrode of the Mp4 is connected with the source electrode of the Mp6 tube in the secondary current mirror.
Preferably, the secondary current mirror comprises PMOS tubes Mp6 and Mp7; the grid electrode of the Mp6 is connected with the grid electrode and the drain electrode of the Mp7, and is connected to one end of the second current source, and the other end of the second current source is grounded.
Preferably, the bias unit comprises a MOS tube Mp5; the gate of the MOS transistor Mp5 is connected with the bias voltage Vb, the source thereof is connected with the drain electrode of Mp3 in the primary current mirror and the source electrode of Mp7 in the secondary current mirror, and the drain electrode thereof is connected with the sources of the input transistors Mp1 and Mp2 of the operational amplifier.
Preferably, when the input voltage of the operational amplifier is smaller than the voltage drop of the primary current mirror, the bias unit and the operational amplifier to the power supply voltage, i.e. V i ≤V dd -V sd3 -V dsat5 -V sg1,2 When the MOS tube Mp5 in the bias unit works in a saturation region, the source voltage of the Mp5 is unchanged, and the bias unit inputs the mirror current of the first current mirror into the operational amplifier; wherein V is i Comprising V in And V ip ,V in And V ip The voltages of the negative phase input end and the positive phase input end of the operational amplifier are respectively V sd3 Source-drain voltage of MP3, V dsat5 An overdrive voltage of MP5, V sg1,2 The source grid voltage of the positive phase and negative phase input tube is amplified.
Preferably, when the input voltage of the operational amplifier is greater than the voltage drop of the primary current mirror, the bias unit and the operational amplifier to the power supply voltage, i.e. V i >V dd -V sd3 -V dsat5 -V sg1,2 When the bias unit enters the variable resistance region, the source voltage of the Mp5 rises along with the rise of the drain voltage, the voltage of the point E of the grid electrode of the secondary current mirror rises along with the rise of the source voltage, and the drain voltages of the mirror image MOS tubes Mp3 and Mp4 in the primary current mirror synchronously rise.
Preferably, after the input voltage of the operational amplifier increases to cause the bias unit to enter the variable resistance region, the source-drain voltage difference variation Δv caused by Mp3 in the primary current mirror under the effect of increasing the source end voltage of the bias unit Mp5 ds3 And the source-drain voltage difference change delta V caused by Mp4 in the primary current mirror under the action of the secondary current mirror ds4 Equal in size.
Preferably, the tail current provided by the circuit for the operational amplifier is I tail =k·I ref1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein k is the ratio of the width to length ratio of Mp3 to Mp4 in the primary current mirror; i ref1 Is the first reference current of the first current source.
The second aspect of the invention relates to a power supply method of the tail current of the operational amplifier, wherein the method is realized by adopting the power supply circuit of the tail current of the operational amplifier.
Compared with the prior art, the power supply circuit and the method for the tail current of the operational amplifier have the beneficial effects that the tail current is provided for the operational amplifier by providing the multistage current mirror and the bias unit structure. When the input voltage of the PMOS input operational amplifier is too high or the input voltage of the NMOS input operational amplifier is too low, the bias unit gradually enters the variable resistance region, so that the drain-source voltage difference of the MOS transistor of the operational amplifier tail current source is reduced. On the basis, the invention forms a feedback through the two-stage current mirror structure, so that the drain-source voltages of the two mirror image MOS tubes in the tail current source current mirror structure are synchronously changed, thereby reducing the influence of the channel length modulation effect and ensuring that the copying of the tail current is not influenced by the input voltage of the operational amplifier. The invention has simple circuit structure and few elements, and can realize accurate tail current input under the condition of fluctuation of the input voltage of the operational amplifier.
Drawings
FIG. 1 is a schematic diagram of two different operational amplifier circuits in the prior art;
fig. 2 is a schematic diagram of a power supply circuit for tail current of an operational amplifier according to the present invention.
Detailed Description
The present application is further described below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical solutions of the present invention and are not intended to limit the scope of protection of the present application.
Fig. 1 is a schematic diagram of two different operational amplifier power supply circuits in the prior art. As shown in fig. 1, two different circuits of fig. 1 are often used in the prior art to provide tail current input for an op-amp.
The left side of FIG. 1 is an operational amplifier with a current mirror, the input of the operational amplifier is composed of PMOS transistors Mp1, mp2, the load is composed of NMOS transistors Mn1, mn2, I ref1 Is a reference current, mp3 and Mp4 form a current mirror, and tail current I is provided for the operational amplifier through current replication tail . If the channel length modulation effect is ignored, the current calculation formula is shown in the following formula (1).
I D =(1/2)μC OX (W/L)(V GS -V TH ) 2 (1)
Wherein μ is the carrier mobility of the transistor, C OX The capacitance of the gate oxide layer in unit area of the transistor is W/L is the width-to-length ratio of the transistor, V GS -V TH Is the overdrive voltage of the transistor. Ideally when the current of MP4 is I ref1 When the current of Mp3 should be k.I ref1 Where k is the replica ratio of the current mirror, i.e., the ratio of the width to length ratio between Mp3 and Mp 4.
If the channel length modulation effect is considered, the current calculation formula is shown in the following formula (2),
I D =(1/2)μC OX (W/L)(V GS -V TH ) 2 (1+λV DS ) (2)
where λ is the channel length modulation factor. The formula adds the drain-source voltage V of the transistor DS Parameters, thus two transistors V of Mp3 and Mp4 need to be considered DS Influence on current replication.
In the left-hand circuit of fig. 1, vds4=vgs 4 of transistor Mp4, vds3 of Mp3 tube is determined by the op-amp input level and gate-source voltages Vgs of Mp1 and Mp2 such that Vds3 may not be equal to Vds4, then channel modulation effects may cause the output from I ref1 Mirror image obtained I tail The current cannot be accurately duplicated, thereby generating errors。
In order to suppress the influence of the channel length modulation effect, the conventional method is to use a cascode structure, as shown in the right circuit of fig. 1, to add cascode transistors Mp5 and Mp6 in a dashed frame, and generally select the same ratio as the ratio of the width to length of Mp3 and Mp4 so that Vgs 5=vgs 6. Since Vgs 5+vds3=vgs 6+vds4, vds3=vds4 is obtained. The scheme has small input voltage or V i ≤V dd -V sd3 -V dsat5 -V sg1,2 Mp5 is operated in the saturation region, and Vgs 5=vgs 6, that is vds3=vds4 can be ensured. However, when the input voltage of the op-amp is higher, because Mp5 is no longer in the saturation region and gradually enters the varistor region, vgs5=vgs6 cannot be ensured, and Vds3 and Vds4 are not equal. I due to the effect of channel length modulation tail Copy I poorly ref1 Resulting in inaccurate current replication.
In order to better reduce the influence of channel length modulation effect on current replication, the invention provides a novel circuit structure.
Fig. 2 is a schematic diagram of a power supply circuit for tail current of an operational amplifier according to the present invention. As shown in fig. 2, a power supply circuit for tail current of an operational amplifier, wherein the circuit comprises a first current source I ref1 Second current source I ref2 The circuit comprises a first-stage current mirror Mp4 and Mp3, a second-stage current mirror Mp7 and Mp6, a biasing unit and an operational amplifier; a primary current mirror receiving a first reference current of the first current source and mirroring it into the bias cell; and the second-stage current mirror receives a second reference current of the second current source, and after the bias unit enters the variable resistance region due to the rising of the input voltage of the operational amplifier, the second-stage current mirror receives the rising of the input voltage of the operational amplifier based on the bias unit, so that the voltages of all nodes of the second-stage current mirror and the first-stage current mirror are regulated, and the circuit copies the first reference current and outputs the first reference current to the operational amplifier.
The circuit in the invention does not simply adopt a two-stage current mirror structure, but adds a biasing unit. The connection mode in the invention enables the bias unit to directly transmit the change to the MP3 tube in the primary current mirror after recognizing the rise or the fall of the operational amplifier input voltage, and simultaneously indirectly transmit the change to the MP4 tube in the primary current mirror through the secondary current mirror, so that the MP3 tube and the MP4 tube simultaneously sense the change of the operational amplifier input voltage, and then provide the same change of source-drain voltage, reduce the influence of the channel length modulation effect on current replication, and further enable the replication of the first reference current to be more accurate.
Specifically, the invention adjusts the source-drain voltage of the primary current mirror through the secondary current mirror, so that the primary current mirror in the circuit can accurately copy the first current source I ref1 And generates the tail current of the op-amp.
Preferably, the primary current mirror, the secondary current mirror and the biasing unit are composed of PMOS tubes, and the operational amplifier adopts the PMOS tubes as input ends; or the primary current mirror, the secondary current mirror and the bias unit are composed of NMOS tubes, and the operational amplifier adopts the NMOS tubes as input ends.
It can be understood that the method of the invention is not only applicable to the circuit with the PMOS tube as the operational amplifier input, but also can provide a similar mirror image mode for the operational amplifier with the NMOS tube as the input end to realize the induction of the operational amplifier input voltage variation and the suppression of the channel length modulation effect at the same time.
Preferably, the primary current mirror comprises PMOS tubes Mp3 and Mp4; the sources of Mp3 and Mp4 are connected to the power supply voltage Vdd; the grids of Mp3 and Mp4 are connected with each other and connected to a first current source I ref1 The other end of the first current source is grounded; the drain electrode of the Mp3 is connected with the source electrode of the Mp7 tube in the secondary current mirror and the bias unit respectively, and the drain electrode of the Mp4 is connected with the source electrode of the Mp6 tube in the secondary current mirror.
Circuits Mp3 and Mp4 of the invention are used to replicate the first current source I ref1 And is delivered to the op-amp via Mp 5.
Preferably, the secondary current mirror comprises PMOS tubes Mp6 and Mp7; wherein the grid electrode of the Mp6 is connected with the grid electrode and the drain electrode of the Mp7 and is connected to the second current source I ref2 The other end of the second current source is grounded.
Whereas the secondary current mirror is not simple for I ref2 Copy of (a)When the voltage of the source end of MP5, namely the point B in the figure, is sensed to change, a second current source I is utilized ref2 A constant Vgs7 is achieved. Such as I ref1 =I ref2 Meanwhile, the width-to-length ratio of Mp6 is the same as that of Mp7, so that Vgs of Mp7 and Mp6 transistors are the same, namely Vgs 6=vgs 7. As the point B voltage increases, the point E voltage increases as Vgs7 is constant. After the voltage at the point E is successfully increased, the point C of the source voltage of the Mp6 is also increased to be equal to the voltage at the point B under the action of the secondary current mirror. Thus, mp4 and Mp3 still maintain the same source-drain voltage after the change in the B-point voltage, which allows Mp3 to still accurately replicate I ref1 Is set in the above-described range).
Preferably, the bias unit comprises a MOS tube Mp5; the grid electrode of the MOS tube Mp5 is connected with the bias voltage Vb, the source electrode of the MOS tube Mp5 is connected with the Mp3 drain electrode of the primary current mirror and the Mp7 source electrode of the secondary current mirror, and the drain electrode of the MOS tube is connected with the tail current end of the operational amplifier.
Mp5 is referred to herein as a bias unit because the gate voltage of Mp5 is controlled by a fixed bias voltage such that the gate-source voltage difference of Mp5 does not change with the change of the drain voltage.
Specifically, the bias unit in the invention can be used for sensing the change of the input voltage of the operational amplifier and transmitting the change to the current mirror. The simplest way is to use a MOS transistor. In an embodiment of the present invention, since the input tube of the op-amp is a PMOS tube, the bias unit for sensing the variation of the input voltage of the op-amp is a PMOS tube. And when the input tube of the operational amplifier is an NMOS tube, the bias unit for sensing the input change of the operational amplifier can be replaced by the NMOS tube.
When the bias unit Mp5 senses that the voltage of the input end of the operational amplifier is too high, the Mp5 is caused to enter the variable resistance region. The drain terminal voltage of Mp5 is raised due to the input voltage of the operational amplifier, the source electrode is raised, and the rise of the B point voltage is transmitted to the primary current mirror through the secondary current mirror, so that the synchronous rise of the drain voltages of two MOS tubes in the primary current mirror by the secondary current mirror is realized.
Preferably, when the input voltage of the operational amplifier is smaller than the voltage drop of the primary current mirror, the biasing unit and the operational amplifier to the power supply voltageWhen, i.e. V i ≤V dd -V sd3 -V dsat5 -V sg1,2 During the process, the MOS tube Mp5 in the bias unit works in the saturation region. This is because of the operational amplifier input voltage V i Smaller, but offset by V of Mp5 in the cell ds5 Greater than V gs5 And V is equal to th5 The difference, namely the overdrive voltage, the bias unit Mp5 is in a saturation region, the drain voltage variation does not affect the source voltage, the source voltage is almost unchanged, and the bias unit inputs the mirror current of the first current mirror into the operational amplifier; wherein V is i Comprising V in And V ip ,V in And V ip The voltages of the negative phase input end and the positive phase input end of the operational amplifier are respectively V sd3 For the source-drain voltage of Mp3, vgs5 is almost unchanged when Mp5 is in the saturation region, and because Vb is a fixed bias, the source-drain voltage of Mp5 is almost unchanged, thereby making the source-drain voltage V of Mp3 sd3 And is almost unchanged. V (V) dsat5 An overdrive voltage of MP5, V sg1,2 And the source gate voltage of the positive phase or negative phase input tube is used for operational amplification.
When the op-amp input voltage is not too high, i.e. V i ≤V dd -V sd3 -V dsat5 -V sg1,2 When the bias unit works in a saturation region, the drain voltage is changed because the grid voltage of the Mp5 tube is stable, the drain current and the grid source voltage difference of the Mp5 are not changed, and the source voltage is almost unchanged. When the input voltage of the operational amplifier is larger than the voltage drop of the primary current mirror, the bias unit and the operational amplifier to the power supply voltage, namely V i >V dd -V sd3 -V dsat5 -V sg1,2 When the bias unit gradually enters the variable resistance region, the source voltage of the bias unit rises along with the rising of the drain voltage, the voltage of the point E of the grid electrode of the secondary current mirror rises along with the rising of the drain voltage, and the drain voltage of the mirror image MOS tube MP4 in the primary current mirror synchronously rises.
At this time, the voltage of the point B is determined by the magnitude of the input voltage of the operational amplifier, and according to the voltage of the point B, the voltages of the point E and the point C in the two-stage current mirror are changed accordingly, so that the drain-source voltages of Mp3 and Mp4 can still be kept consistent.
Preferably, the bias unit is caused to enter the varistor when the input voltage of the operational amplifier increasesAfter the region, the source-drain voltage difference change delta V of Mp3 in the primary current mirror caused by the voltage rising effect of the bias unit ds3 And the source-drain voltage difference change delta V caused by Mp4 in the primary current mirror under the action of the secondary current mirror ds4 Equal in size. Since the voltages at the B point and the C point are synchronously increased, the drain voltages of the Mp3 and the Mp4 are synchronously increased, and the grids of the Mp3 and the Mp4 are connected with the D point, thereby the delta V ds3 And DeltaV ds4 Equal in magnitude so that the mirror currents of Mp3 and Mp4 remain in proportion.
Preferably, the tail current provided by the circuit for the operational amplifier is I tail =k·I ref1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein k is the ratio of the width-to-length ratio of Mp3 to Mp4 in the primary current mirror; i ref1 Is the first reference current of the first current source.
The method reduces the influence of the channel length modulation effect, so that the copy of the tail current is not influenced by the input voltage of the operational amplifier, and the copy of the tail current of the circuit is more accurate.
The second aspect of the invention relates to a power supply method of the tail current of the operational amplifier, which is realized by the power supply circuit of the tail current of the operational amplifier.
Compared with the prior art, the invention provides the power supply circuit and the method for the tail current of the operational amplifier, the tail current is provided for the operational amplifier through the multi-stage current mirror and the bias unit structure, when the input voltage of the operational amplifier input by the PMOS is too high or the input voltage of the operational amplifier input by the NMOS is too low, the bias unit gradually enters the variable resistance area to reduce the drain-source voltage difference of the MOS tube of the tail current source of the operational amplifier, and on the basis, the invention forms a feedback through the two-stage current mirror structure to enable the drain-source voltages of the two mirror image MOS tubes in the current mirror structure of the tail current source to synchronously change, thereby reducing the influence of the channel length modulation effect and ensuring that the replication of the tail current is not influenced by the input voltage of the operational amplifier.
While the applicant has described and illustrated the embodiments of the present invention in detail with reference to the drawings, it should be understood by those skilled in the art that the above embodiments are only preferred embodiments of the present invention, and the detailed description is only for the purpose of helping the reader to better understand the spirit of the present invention, and not to limit the scope of the present invention, but any improvements or modifications based on the spirit of the present invention should fall within the scope of the present invention.
Claims (10)
1. The utility model provides a power supply circuit of tail current is put to fortune which characterized in that:
the circuit comprises a first current source, a second current source, a primary current mirror, a secondary current mirror, a biasing unit and an operational amplifier; wherein,,
the primary current mirror receives a first reference current of the first current source and mirrors the first reference current into the bias unit;
the second-stage current mirror receives a second reference current of the second current source, and after the bias unit enters the variable resistance region due to the rising of the input voltage of the operational amplifier, the second-stage current mirror adjusts the source-drain voltage of the first-stage current mirror based on the bias unit so that the circuit replicates the first reference current and outputs the first reference current to the operational amplifier.
2. A power supply circuit for an operational amplifier tail current as defined in claim 1, wherein:
the primary current mirror, the secondary current mirror and the bias unit are composed of PMOS tubes, and the operational amplifier adopts the PMOS tubes as input ends; or,
the primary current mirror, the secondary current mirror and the biasing unit are composed of NMOS (N-channel metal oxide semiconductor) tubes, and the operational amplifier adopts the NMOS tubes as input ends.
3. A power supply circuit for an operational amplifier tail current as defined in claim 2, wherein:
the primary current mirror comprises PMOS (P-channel metal oxide semiconductor) transistors MP3 and MP4; wherein,,
the sources of the Mp3 and the Mp4 are connected to a power supply voltage Vdd;
the grids of the Mp3 and the Mp4 are connected with each other and are connected to one end of the first current source in an access mode, and the other end of the first current source is grounded;
the drain electrode of the Mp3 is respectively connected with the source electrode of the Mp7 tube in the secondary current mirror and the biasing unit, and the drain electrode of the Mp4 is connected with the source electrode of the Mp6 tube in the secondary current mirror.
4. A power supply circuit for an operational amplifier tail current as set out in claim 3, wherein:
the secondary current mirror comprises PMOS (P-channel metal oxide semiconductor) transistors Mp6 and Mp7; wherein,,
the grid electrode of the Mp6 is connected with the grid electrode and the drain electrode of the Mp7, and is connected to one end of the second current source, and the other end of the second current source is grounded.
5. The power supply circuit for tail current of operational amplifier as set out in claim 4, wherein:
the bias unit comprises an MOS tube Mp5; wherein,,
and the grid electrode of the MOS tube Mp5 is connected with bias voltage Vb, the source electrode of the MOS tube Mp5 is connected with the drain electrode of Mp3 in the primary current mirror and the source electrode of Mp7 in the secondary current mirror, and the drain electrodes of the MOS tube Mp5 are connected with the source electrodes of the input transistors Mp1 and Mp2 of the operational amplifier.
6. The power supply circuit for tail current of operational amplifier as set out in claim 5, wherein:
when the input voltage of the operational amplifier is smaller than the voltage drop of the primary current mirror, the bias unit and the operational amplifier to the power supply voltage, namely V i ≤V dd -V sd3 -V dsat5 -V sg1,2 When the MOS tube Mp5 in the bias unit works in a saturation region, the source voltage of the Mp5 is unchanged, and the bias unit inputs the mirror current of the first current mirror into the operational amplifier;
wherein V is i Comprising V in And V ip ,V in And V ip Respectively the negative phase and positive phase input terminal voltages of the operational amplifier,
V sd3 is the source-drain voltage of Mp3,
V dsat5 overdrive of MP5The voltage level at which the voltage is applied,
V sg1,2 the source grid voltage of the positive phase and negative phase input tube is amplified.
7. The power supply circuit of an operational amplifier tail current as set out in claim 6, wherein:
when the input voltage of the operational amplifier is larger than the voltage drop of the primary current mirror, the bias unit and the operational amplifier to the power supply voltage, namely V i >V dd -V sd3 -V dsat5 -V sg1,2 When the bias unit enters the variable resistance region, the source voltage of the Mp5 rises along with the rise of the drain voltage, the voltage of the point E of the grid electrode of the secondary current mirror rises along with the rise of the point E, and the drain voltages of the mirror image MOS tubes Mp3 and Mp4 in the primary current mirror synchronously rise.
8. A power supply circuit for an operational amplifier tail current as set out in claim 7, wherein:
after the input voltage of the operational amplifier increases to cause the bias unit to enter the variable resistance region, the source-drain voltage difference variation DeltaV of the MP3 in the primary current mirror caused by the voltage increasing effect of the source end of the bias unit MP5 ds3 The source-drain voltage difference change delta V caused by Mp4 in the primary current mirror under the action of the secondary current mirror ds4 Equal in size.
9. A power supply circuit for an operational amplifier tail current as defined in claim 1, wherein:
the tail current provided by the circuit for the operational amplifier is I tail =k·I ref1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein,,
k is the ratio of the width to length ratio of Mp3 to Mp4 in the primary current mirror;
I ref1 a first reference current for the first current source.
10. A power supply method of tail current of an operational amplifier is characterized in that:
the method is implemented with a supply circuit for tail current of an op-amp as claimed in any one of claims 1-9.
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CN202111608413.4A CN116339439A (en) | 2021-12-24 | 2021-12-24 | Power supply circuit and method for tail current of operational amplifier |
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CN202111608413.4A CN116339439A (en) | 2021-12-24 | 2021-12-24 | Power supply circuit and method for tail current of operational amplifier |
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