CN116325780A - Solid-state imaging device - Google Patents

Solid-state imaging device Download PDF

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CN116325780A
CN116325780A CN202080106038.0A CN202080106038A CN116325780A CN 116325780 A CN116325780 A CN 116325780A CN 202080106038 A CN202080106038 A CN 202080106038A CN 116325780 A CN116325780 A CN 116325780A
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高桥诚司
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Huawei Technologies Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80Constructional details of image sensors
    • H10F39/803Pixels having integrated switching, control, storage or amplification elements
    • H10F39/8037Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10Integrated devices
    • H10F39/12Image sensors
    • H10F39/18Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80Constructional details of image sensors
    • H10F39/807Pixel isolation structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80Constructional details of image sensors
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Abstract

本发明提供了一种固态成像设备,其中,多个单位像素沿行方向和列方向以矩阵的形式设置。所述固态成像设备包括通过第一工艺形成的第一像素到像素隔离区和通过与所述第一工艺不同的第二工艺形成的第二像素到像素隔离区。每个单位像素包括一个或多个光感测区域和一个或多个信号读出电路区域。每个光感测区域包括一个或多个光电二极管、一个或多个传输晶体管和浮动扩散的一部分。所述信号读出电路区域包括多个像素内晶体管。在每个单位像素中,所述浮动扩散和所述像素内晶体管由多个光电二极管和传输晶体管共用。每个光电二极管和每个传输晶体管设置在通过所述第一像素到像素隔离区和所述第二像素到像素隔离区来隔离的部分中。所述第一像素到像素隔离区和所述第二像素到像素隔离区的交叉区设置在与所述浮动扩散和所述像素内晶体管的沟道区不同的位置上。

Figure 202080106038

The present invention provides a solid-state imaging device, wherein a plurality of unit pixels are arranged in a matrix along row and column directions. The solid-state imaging device includes a first pixel-to-pixel isolation region formed by a first process and a second pixel-to-pixel isolation region formed by a second process different from the first process. Each unit pixel includes one or more light sensing regions and one or more signal readout circuit regions. Each photo-sensing region includes one or more photodiodes, one or more transfer transistors, and a portion of a floating diffusion. The signal readout circuit area includes a plurality of in-pixel transistors. In each unit pixel, the floating diffusion and the in-pixel transistor are shared by a plurality of photodiodes and transfer transistors. Each photodiode and each transfer transistor are disposed in a portion isolated by the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region. An intersection region of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region is disposed at a different position from the floating diffusion and the channel region of the intra-pixel transistor.

Figure 202080106038

Description

固态成像设备solid state imaging device

技术领域technical field

本申请涉及一种固态成像设备。The present application relates to a solid-state imaging device.

背景技术Background technique

固态成像设备可以用于将光信息转换为电信号。该固态成像设备包括以矩阵的形式设置的多个像素。为了隔离每个像素,可以提供像素到像素隔离区。Solid-state imaging devices can be used to convert optical information into electrical signals. This solid-state imaging device includes a plurality of pixels arranged in a matrix. To isolate each pixel, a pixel-to-pixel isolation region may be provided.

为了最小化像素大小,需要最小化像素到像素隔离区的间距。为此,还需要最小化光掩模的间距以形成像素到像素隔离区。但是,光掩模间距的最小化受到限制。In order to minimize the pixel size, the pixel-to-pixel isolation spacing needs to be minimized. For this reason, it is also necessary to minimize the pitch of the photomask to form pixel-to-pixel isolation regions. However, the minimization of the photomask pitch is limited.

像素到像素隔离区可以通过两个工艺形成。也就是说,首先通过第一工艺形成第一像素到像素隔离区,然后通过第二工艺在偏移一半间距的位置上形成第二像素到像素隔离区。因此,像素到像素隔离区可以由光掩模的一半间距形成。The pixel-to-pixel isolation region can be formed by two processes. That is to say, first the first pixel-to-pixel isolation region is formed through the first process, and then the second pixel-to-pixel isolation region is formed at a position offset by half the pitch through the second process. Therefore, pixel-to-pixel isolation regions can be formed by half the pitch of the photomask.

然而,在这些工艺中,在第一像素到像素隔离区和第二像素到像素隔离区的交叉区内植入剂量两次。这会影响设备的性能,并且会在输出图像上产生固定模式噪声。However, in these processes, the dose is implanted twice in the intersection of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region. This affects the performance of the device and can produce fixed pattern noise on the output image.

发明内容Contents of the invention

根据本申请的第一方面,提供了一种固态成像设备,其中,多个单位像素沿行方向和列方向以矩阵的形式设置。所述固态成像设备包括通过第一工艺形成的第一像素到像素隔离区和通过与所述第一工艺不同的第二工艺形成的第二像素到像素隔离区。每个单位像素包括一个或多个光感测区域和一个或多个信号读出电路区域。每个光感测区域包括一个或多个光电二极管、一个或多个传输晶体管和浮动扩散的一部分。所述信号读出电路区域包括多个像素内晶体管。在每个单位像素中,所述浮动扩散和所述像素内晶体管由多个光电二极管和传输晶体管共用。每个光电二极管和每个传输晶体管设置在通过所述第一像素到像素隔离区和所述第二像素到像素隔离区来隔离的部分中。所述第一像素到像素隔离区和所述第二像素到像素隔离区的交叉区设置在与所述浮动扩散和所述像素内晶体管的沟道区不同的位置上。According to a first aspect of the present application, there is provided a solid-state imaging device in which a plurality of unit pixels are arranged in a matrix in a row direction and a column direction. The solid-state imaging device includes a first pixel-to-pixel isolation region formed by a first process and a second pixel-to-pixel isolation region formed by a second process different from the first process. Each unit pixel includes one or more light sensing regions and one or more signal readout circuit regions. Each photo-sensing region includes one or more photodiodes, one or more transfer transistors, and a portion of a floating diffusion. The signal readout circuit area includes a plurality of in-pixel transistors. In each unit pixel, the floating diffusion and the in-pixel transistor are shared by a plurality of photodiodes and transfer transistors. Each photodiode and each transfer transistor are disposed in a portion isolated by the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region. An intersection region of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region is disposed at a different position from the floating diffusion and the channel region of the intra-pixel transistor.

根据本申请的第二方面,所述信号读出电路区域包括一个或多个p阱电位区。所述多个像素内晶体管包括复位晶体管、源极跟随晶体管和行选择晶体管。一个或多个交叉区设置在与所述p阱电位区相同的位置上。According to the second aspect of the present application, the signal readout circuit region includes one or more p-well potential regions. The plurality of in-pixel transistors include reset transistors, source follower transistors, and row select transistors. One or more crossing regions are arranged at the same position as the p-well potential region.

根据本申请的第三方面,所述信号读出电路区域沿行方向和列方向设置。According to the third aspect of the present application, the signal readout circuit area is arranged along the row direction and the column direction.

根据本申请的第四方面,所述信号读出电路区域设置在每个单位像素的边界上和所述光感测区域之间。According to the fourth aspect of the present application, the signal readout circuit region is disposed on the boundary of each unit pixel and between the photo-sensing regions.

根据本申请的第五方面,提供了一种固态成像设备,其中,多个单位像素沿行方向和列方向以矩阵的形式设置。所述固态成像设备包括通过第一工艺形成的第一像素到像素隔离区和通过与所述第一工艺不同的第二工艺形成的第二像素到像素隔离区。每个单位像素包括一个或多个光感测区域和一个或多个信号读出电路区域。每个光感测区域包括一个或多个光电二极管、一个或多个传输晶体管和浮动扩散的一部分。所述信号读出电路区域包括多个像素内晶体管。在每个单位像素中,所述浮动扩散和所述像素内晶体管由多个光电二极管和传输晶体管共用。每个光电二极管和每个传输晶体管设置在通过所述第一像素到像素隔离区和所述第二像素到像素隔离区来隔离的部分中。所述第一像素到像素隔离区和所述第二像素到像素隔离区的交叉区设置在与所述浮动扩散不同的位置上。当所述交叉区与所述像素内晶体管的沟道区重叠时,所述重叠区的长度小于所述交叉区的一半长度。According to a fifth aspect of the present application, there is provided a solid-state imaging device in which a plurality of unit pixels are arranged in a matrix in a row direction and a column direction. The solid-state imaging device includes a first pixel-to-pixel isolation region formed by a first process and a second pixel-to-pixel isolation region formed by a second process different from the first process. Each unit pixel includes one or more light sensing regions and one or more signal readout circuit regions. Each photo-sensing region includes one or more photodiodes, one or more transfer transistors, and a portion of a floating diffusion. The signal readout circuit area includes a plurality of in-pixel transistors. In each unit pixel, the floating diffusion and the in-pixel transistor are shared by a plurality of photodiodes and transfer transistors. Each photodiode and each transfer transistor are disposed in a portion isolated by the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region. An intersection of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region is disposed at a position different from that of the floating diffusion. When the intersection area overlaps with the channel area of the transistor in the pixel, the length of the overlapping area is less than half the length of the intersection area.

附图说明Description of drawings

图1是成像系统的示例性框图。FIG. 1 is an exemplary block diagram of an imaging system.

图2是成像设备的示例性电路图。FIG. 2 is an exemplary circuit diagram of an imaging device.

图3示出了本申请第一实施例提供的固态成像设备的一个单位像素中的元件的布局。FIG. 3 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the first embodiment of the present application.

图4示出了如何形成像素到像素隔离区。Figure 4 shows how pixel-to-pixel isolation regions are formed.

图5示出了本申请第二实施例提供的固态成像设备的一个单位像素中的元件的布局。FIG. 5 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the second embodiment of the present application.

图6示出了本申请第三实施例提供的固态成像设备的一个单位像素中的元件的布局。FIG. 6 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the third embodiment of the present application.

图7示出了本申请第四实施例提供的固态成像设备的一个单位像素中的元件的布局。FIG. 7 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the fourth embodiment of the present application.

图8示出了本申请第五实施例提供的固态成像设备的一个单位像素中的元件的布局。FIG. 8 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the fifth embodiment of the present application.

图9示出了像素到像素隔离区的交叉区与像素内晶体管的沟道区重叠时产生的重叠区的容许长度。FIG. 9 shows the allowable length of the overlapping region produced when the intersection region of the pixel-to-pixel isolation region overlaps the channel region of the transistor in the pixel.

图10A示出了截面AA'在成像设备的平面视图中的位置。FIG. 10A shows the position of section AA' in a plan view of the imaging device.

图10B示出了成像设备的截面视图。FIG. 10B shows a cross-sectional view of the imaging device.

图11是成像系统的另一示例性框图。11 is another exemplary block diagram of an imaging system.

图12示出了相机系统的各种应用。Figure 12 illustrates various applications of the camera system.

具体实施方式Detailed ways

在本申请提供的固态成像设备中,多个像素以矩阵的形式设置在衬底上。In the solid-state imaging device provided in the present application, a plurality of pixels are arranged on a substrate in the form of a matrix.

图1是成像系统101的示例性框图。成像系统101包括像素阵列109、控制电路105、读出电路110和信号处理电路106。在像素阵列109中,多个像素以矩阵的形式设置在衬底上。控制电路105控制像素阵列109,读出电路110读出图像数据。信号处理电路106处理读出电路110读出的图像数据。FIG. 1 is an exemplary block diagram of an imaging system 101 . Imaging system 101 includes pixel array 109 , control circuitry 105 , readout circuitry 110 and signal processing circuitry 106 . In the pixel array 109, a plurality of pixels are arranged in a matrix on a substrate. The control circuit 105 controls the pixel array 109, and the readout circuit 110 reads out image data. The signal processing circuit 106 processes the image data read out by the readout circuit 110 .

图2是成像设备的示例性电路图。该成像设备包括四个光电二极管PD1至PD4、四个传输晶体管TX1至TX4、浮动扩散FD、复位晶体管RST、源极跟随晶体管SF和行选择晶体管SEL。复位晶体管RST响应于复位信号而导通,并且使在浮动扩散FD中累积的电荷复位。光电二极管PD1至PD4通过光电转换产生与入射光量对应的电荷,并且累积产生的电荷。传输晶体管TX1至TX4中的一个传输晶体管响应于传输信号而导通,并且将在光电二极管PD1至PD4中的一个光电二极管中累积的电荷传输到浮动扩散FD。浮动扩散FD的电压由传输的电荷决定。该电压施加到源极跟随晶体管SF的栅极。源极跟随晶体管SF向行选择晶体管SEL发送与浮动扩散FD的电压对应的像素信号。行选择晶体管SEL响应于行选择信号而输出Vout作为像素信号。FIG. 2 is an exemplary circuit diagram of an imaging device. The imaging device includes four photodiodes PD1 to PD4, four transfer transistors TX1 to TX4, a floating diffusion FD, a reset transistor RST, a source follower transistor SF, and a row selection transistor SEL. The reset transistor RST is turned on in response to a reset signal, and resets charges accumulated in the floating diffusion FD. The photodiodes PD1 to PD4 generate charges corresponding to the amount of incident light by photoelectric conversion, and accumulate the generated charges. One of the transfer transistors TX1 to TX4 is turned on in response to a transfer signal, and transfers charges accumulated in one of the photodiodes PD1 to PD4 to the floating diffusion FD. The voltage of the floating diffusion FD is determined by the transferred charges. This voltage is applied to the gate of the source follower transistor SF. The source follower transistor SF transmits a pixel signal corresponding to the voltage of the floating diffusion FD to the row selection transistor SEL. The row selection transistor SEL outputs Vout as a pixel signal in response to a row selection signal.

图3示出了本申请第一实施例提供的固态成像设备的一个单位像素中的元件的布局。一个单位像素包括四个光感测区域和一个信号读出电路区域。例如,四个光感测区域包括两个绿光感测区域、一个蓝光感测区域和一个红光感测区域。每个光感测区域包括一个光电二极管PD、一个传输晶体管TX和浮动扩散FD的一部分。信号读出电路区域包括一个p阱电位区PW和三个像素内晶体管。如果光电二极管是n型,则隔离区和阱电位区应该是p型。如果光电二极管是p型,则隔离区和阱电位区应该是n型。三个像素内晶体管包括复位晶体管RST、源极跟随晶体管SF和行选择晶体管SEL。但是,信号读出电路区域中包括的元件的数量并不限于上述数量。FIG. 3 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the first embodiment of the present application. One unit pixel includes four light sensing regions and one signal readout circuit region. For example, the four light sensing areas include two green light sensing areas, one blue light sensing area and one red light sensing area. Each photo-sensing area includes a photodiode PD, a transfer transistor TX and a part of the floating diffusion FD. The signal readout circuit area includes a p-well potential area PW and three transistors in the pixel. If the photodiode is n-type, the isolation and well potential regions should be p-type. If the photodiode is p-type, the isolation region and well potential region should be n-type. The three in-pixel transistors include a reset transistor RST, a source follower transistor SF, and a row selection transistor SEL. However, the number of elements included in the signal readout circuit region is not limited to the above-mentioned number.

在一个单位像素中,四个光电二极管PD分别连接到四个传输晶体管TX。四个传输晶体管TX连接到浮动扩散FD。信号读出电路区域设置在光感测区域下方的单位像素的边界上。浮动扩散FD和信号读出电路由四个光电二极管PD和四个传输晶体管TX共用。In one unit pixel, four photodiodes PD are respectively connected to four transfer transistors TX. Four transfer transistors TX are connected to the floating diffusion FD. The signal readout circuit area is disposed on the boundary of the unit pixel under the light sensing area. The floating diffusion FD and the signal readout circuit are shared by four photodiodes PD and four transfer transistors TX.

每个光感测区域通过像素到像素隔离区来隔离。像素到像素隔离区形成为网格形状,以便围绕每个光感测区域。像素到像素隔离区防止光感测区域中的信号电荷泄漏到相邻光感测区域内。当浮动扩散或像素内晶体管形成在光感测区域和相邻光感测区域之间时,像素到像素隔离区与这些元件重叠。像素到像素隔离区的深度比浮动扩散或像素内晶体管区的深度大。但是,当深像素到像素隔离区通过高能离子植入形成时,就会发生阱邻近效应,而且在硅表面附近形成高剂量区。Each photo-sensing area is isolated by a pixel-to-pixel isolation region. The pixel-to-pixel isolation region is formed in a grid shape so as to surround each light sensing region. The pixel-to-pixel isolation region prevents signal charges in the photo-sensing region from leaking into adjacent photo-sensing regions. When floating diffusions or intra-pixel transistors are formed between a photo-sensing region and adjacent photo-sensing regions, pixel-to-pixel isolation regions overlap these elements. The depth of the pixel-to-pixel isolation region is greater than the depth of the floating diffusion or transistor region within the pixel. However, when deep pixel-to-pixel isolation regions are formed by high-energy ion implantation, well proximity effects occur and high-dose regions form near the silicon surface.

图4示出了如何形成像素到像素隔离区。像素到像素隔离区通过两个工艺形成。也就是说,首先通过第一工艺形成第一像素到像素隔离区(第一DPW),然后通过第二工艺在对角线偏移一半掩模间距的位置上形成第二像素到像素隔离区(第二DPW)。因此,像素到像素隔离区可以由光掩模的一半间距形成。Figure 4 shows how pixel-to-pixel isolation regions are formed. The pixel-to-pixel isolation regions are formed by two processes. That is to say, first the first pixel-to-pixel isolation region (first DPW) is formed through the first process, and then the second pixel-to-pixel isolation region (first DPW) is formed at a position where the diagonal line is offset by half the mask pitch through the second process. second DPW). Therefore, pixel-to-pixel isolation regions can be formed by half the pitch of the photomask.

在这些工艺中,在第一像素到像素隔离区和第二像素到像素隔离区的交叉区内植入剂量两次。这会影响浮动扩散和像素内晶体管的性能。In these processes, the dose is implanted twice in the intersection of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region. This affects the floating diffusion and the performance of the transistors within the pixel.

像素到像素隔离区的交叉区不放置在浮动扩散和像素内晶体管的沟道区上。交叉区可以放置在p阱电位区PW上。这样的设置将剂量对浮动扩散和像素内晶体管的性能的影响降至最低。因此,例如,抑制了源极跟随晶体管的Vth变化,减少了输出图像上的固定模式噪声,还减少了复位噪声和源极跟随晶体管的随机噪声,而且还减小了由于浮动扩散的接点泄漏引起的白色像素集群。Pixel-to-pixel isolation region intersection regions are not placed over floating diffusions and channel regions of transistors within pixels. The cross region may be placed on the p-well potential region PW. Such an arrangement minimizes the impact of the dose on the floating diffusion and the performance of the transistors within the pixel. Thus, for example, the Vth variation of the source follower transistor is suppressed, the fixed pattern noise on the output image is reduced, reset noise and random noise of the source follower transistor are also reduced, and also the junction leakage due to the floating diffusion is reduced. clusters of white pixels.

图5示出了本申请第二实施例提供的固态成像设备的一个单位像素中的元件的布局。在第二实施例中,信号读出电路区域设置在光感测区域下方和光感测区域右侧的单位像素的边界上。信号读出电路区域包括一个p阱电位区PW和四个像素内晶体管。四个像素内晶体管包括双转换增益晶体管DCG、复位晶体管RST、源极跟随晶体管SF和行选择晶体管SEL。可以设置另一复位晶体管RST,而不是设置双转换增益晶体管DCG。双转换增益晶体管DCG和复位晶体管RST设置在光感测区域右侧的单位像素的边界上。该构造的其余部分与第一实施例的相同。FIG. 5 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the second embodiment of the present application. In the second embodiment, the signal readout circuit region is disposed below the photo-sensing region and on the boundary of the unit pixel on the right side of the photo-sensing region. The signal readout circuit area includes a p-well potential area PW and four transistors in the pixel. The four in-pixel transistors include a dual conversion gain transistor DCG, a reset transistor RST, a source follower transistor SF, and a row selection transistor SEL. A further reset transistor RST may be provided instead of the dual conversion gain transistor DCG. The dual conversion gain transistor DCG and the reset transistor RST are disposed on the boundary of the unit pixel on the right side of the light sensing area. The rest of the construction is the same as that of the first embodiment.

图6示出了本申请第三实施例提供的固态成像设备的一个单位像素中的元件的布局。在第三实施例中,信号读出电路区域设置在光感测区域下方和光感测区域右侧的单位像素的边界上。信号读出电路区域包括一个p阱电位区PW和三个像素内晶体管。三个像素内晶体管包括复位晶体管RST、源极跟随晶体管SF和行选择晶体管SEL。p阱电位区PW设置在光感测区域右侧的单位像素的边界上。该构造的其余部分与第一实施例的相同。FIG. 6 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the third embodiment of the present application. In the third embodiment, the signal readout circuit area is disposed below the light sensing area and on the boundary of the unit pixel on the right side of the light sensing area. The signal readout circuit area includes a p-well potential area PW and three transistors in the pixel. The three in-pixel transistors include a reset transistor RST, a source follower transistor SF, and a row selection transistor SEL. The p-well potential region PW is disposed on the boundary of the unit pixel on the right side of the photo-sensing region. The rest of the construction is the same as that of the first embodiment.

图7示出了本申请第四实施例提供的固态成像设备的一个单位像素中的元件的布局。一个单位像素包括八个光感测区域和两个信号读出电路区域。例如,八个光感测区域包括四个绿光感测区域、两个蓝光感测区域和两个红光感测区域。每个光感测区域包括一个光电二极管PD、一个传输晶体管TX和浮动扩散FD的一部分。两个信号读出电路区域设置在上方四个光感测区域和下方四个光感测区域之间,并且设置在光感测区域下方的单位像素的边界上。光感测区域之间的信号读出电路区域包括一个p阱电位区PW和两个像素内晶体管。这两个像素内晶体管包括行选择晶体管SEL和源极跟随晶体管SF。光感测区域下方的信号读出电路区域还包括一个p阱电位区PW和两个像素内晶体管。这两个像素内晶体管包括双转换增益晶体管DCG和复位晶体管RST。可以设置另一复位晶体管RST,而不是设置双转换增益晶体管DCG。FIG. 7 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the fourth embodiment of the present application. One unit pixel includes eight light sensing regions and two signal readout circuit regions. For example, the eight light sensing areas include four green light sensing areas, two blue light sensing areas and two red light sensing areas. Each photo-sensing area includes a photodiode PD, a transfer transistor TX and a part of the floating diffusion FD. The two signal readout circuit areas are arranged between the upper four photo-sensing areas and the lower four photo-sensing areas, and are arranged on the boundary of the unit pixel below the photo-sensing areas. The signal readout circuit area between the photo-sensing areas includes a p-well potential area PW and two transistors in the pixel. These two in-pixel transistors include a row selection transistor SEL and a source follower transistor SF. The signal readout circuit area below the photo-sensing area also includes a p-well potential area PW and two transistors in the pixel. These two in-pixel transistors include a dual conversion gain transistor DCG and a reset transistor RST. A further reset transistor RST may be provided instead of the dual conversion gain transistor DCG.

在一个单位像素中,八个光电二极管PD分别连接到八个传输晶体管TX。八个传输晶体管TX连接到浮动扩散FD。浮动扩散FD和信号读出电路由八个光电二极管PD和八个传输晶体管TX共用。In one unit pixel, eight photodiodes PD are respectively connected to eight transfer transistors TX. Eight transfer transistors TX are connected to the floating diffusion FD. The floating diffusion FD and the signal readout circuit are shared by eight photodiodes PD and eight transfer transistors TX.

图8示出了本申请第五实施例提供的固态成像设备的一个单位像素中的元件的布局。在第五实施例中,两个p阱电位区PW设置在光感测区域右侧的单位像素的边界上。该构造的其余部分与第四实施例的相同。FIG. 8 shows the layout of elements in a unit pixel of the solid-state imaging device provided by the fifth embodiment of the present application. In the fifth embodiment, two p-well potential regions PW are disposed on the boundary of the unit pixel on the right side of the photo-sensing region. The rest of the construction is the same as that of the fourth embodiment.

图9示出了像素到像素隔离区的交叉区与像素内晶体管的沟道区重叠时产生的重叠区的容许长度。也就是说,A≦B/2是容许的,其中,B是交叉区的长度,A是交叉区与像素内晶体管的沟道区重叠时产生的重叠区的长度。这样的设置减少了交叉区对像素内晶体管的影响。FIG. 9 shows the allowable length of the overlapping region produced when the intersection region of the pixel-to-pixel isolation region overlaps the channel region of the transistor in the pixel. That is, A≦B/2 is acceptable, where B is the length of the intersection region, and A is the length of the overlapping region generated when the intersection region overlaps with the channel region of the transistor in the pixel. Such an arrangement reduces the influence of the intersection region on the transistors in the pixel.

图10A示出了截面AA'在成像设备的平面视图中的位置,图10B示出了成像设备的截面视图。参考图10B,执行后道(back end of line,BEOL)工艺,因此形成金属互连316。换句话说,形成厚绝缘薄膜,形成接触孔,沉积金属膜并图案化。然后,放置在衬底上的成像设备通过铜铜键合等键合或其它硅片间连接,连接到放置在另一衬底上的逻辑电路312。FIG. 10A shows the position of section AA' in a plan view of the imaging device, and FIG. 10B shows a cross-sectional view of the imaging device. Referring to FIG. 10B , a back end of line (BEOL) process is performed, thereby forming metal interconnections 316 . In other words, a thick insulating film is formed, a contact hole is formed, a metal film is deposited and patterned. The imaging device placed on the substrate is then connected to the logic circuit 312 placed on the other substrate through bonding such as copper-to-copper bonding or other silicon-to-silicon connections.

于是,形成深沟槽隔离(deep trench isolation,DTI)304,以减少光电二极管308之间的串扰。彩色滤光片305设置在与光电二极管308对应的位置上的一层内。微透镜306设置在与光电二极管308对应的位置上。例如,光电二极管308的大小可以不同,光电二极管308可以在图10B的水平方向上交错设置。在图10B,301是浮动扩散,302是第一DPW,303是第二DPW,307是阱接触,308是隔离STI或掺杂隔离,314是传输栅极晶体管。Thus, deep trench isolation (DTI) 304 is formed to reduce crosstalk between photodiodes 308 . The color filter 305 is provided in one layer at a position corresponding to the photodiode 308 . The microlens 306 is provided at a position corresponding to the photodiode 308 . For example, the size of the photodiodes 308 may be different, and the photodiodes 308 may be staggered in the horizontal direction of FIG. 10B . In FIG. 10B , 301 is a floating diffusion, 302 is a first DPW, 303 is a second DPW, 307 is a well contact, 308 is an isolation STI or doped isolation, and 314 is a transfer gate transistor.

图11是成像系统201的另一示例性框图。成像系统201包括光学系统202(例如,一个或多个透镜)、快门器件203、固态图像传感器204、控制电路205、信号处理电路206、显示器207和存储器208。固态图像传感器204包括,例如,图1中的像素阵列109和读出电路110,在控制电路205的控制下,通过透镜202和快门器件203获取被摄体的图像数据。信号处理电路206将获取到的图像数据输出到显示器207或将图像数据存储在存储器208中。图11中的控制电路205和信号处理电路206分别对应于图1中的控制电路105和信号处理电路106。FIG. 11 is another exemplary block diagram of imaging system 201 . Imaging system 201 includes optical system 202 (eg, one or more lenses), shutter device 203 , solid-state image sensor 204 , control circuitry 205 , signal processing circuitry 206 , display 207 and memory 208 . The solid-state image sensor 204 includes, for example, the pixel array 109 and the readout circuit 110 in FIG. The signal processing circuit 206 outputs the acquired image data to the display 207 or stores the image data in the memory 208 . The control circuit 205 and the signal processing circuit 206 in FIG. 11 correspond to the control circuit 105 and the signal processing circuit 106 in FIG. 1 , respectively.

图12示出了相机系统的各种应用。本申请实施例提供的成像设备可以应用于,例如,手机摄像头、数码相机、网络摄像头、安全监控摄像头、视频摄像机、汽车和交通摄像头、医疗摄像头和机器视觉。Figure 12 illustrates various applications of the camera system. The imaging device provided by the embodiments of the present application can be applied to, for example, mobile phone cameras, digital cameras, network cameras, security surveillance cameras, video cameras, automobile and traffic cameras, medical cameras, and machine vision.

Claims (5)

1.一种固态成像设备,其特征在于,多个单位像素沿行方向和列方向以矩阵的形式设置;1. A solid-state imaging device, characterized in that a plurality of unit pixels are arranged in the form of a matrix along the row direction and the column direction; 所述固态成像设备包括通过第一工艺形成的第一像素到像素隔离区和通过与所述第一工艺不同的第二工艺形成的第二像素到像素隔离区;The solid-state imaging device includes a first pixel-to-pixel isolation region formed by a first process and a second pixel-to-pixel isolation region formed by a second process different from the first process; 每个单位像素包括一个或多个光感测区域和一个或多个信号读出电路区域;Each unit pixel includes one or more light sensing regions and one or more signal readout circuit regions; 每个光感测区域包括一个或多个光电二极管、一个或多个传输晶体管和浮动扩散的一部分;Each photo-sensing region includes one or more photodiodes, one or more transfer transistors, and a portion of a floating diffusion; 所述信号读出电路区域包括多个像素内晶体管;The signal readout circuit area includes a plurality of transistors in pixels; 在每个单位像素中,所述浮动扩散和所述像素内晶体管由多个光电二极管和传输晶体管共用;In each unit pixel, the floating diffusion and the in-pixel transistor are shared by a plurality of photodiodes and transfer transistors; 每个光电二极管和每个传输晶体管设置在通过所述第一像素到像素隔离区和所述第二像素到像素隔离区来隔离的部分中;each photodiode and each transfer transistor are disposed in a portion isolated by the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region; 所述第一像素到像素隔离区和所述第二像素到像素隔离区的交叉区设置在与所述浮动扩散和所述像素内晶体管的沟道区不同的位置上。An intersection region of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region is disposed at a different position from the floating diffusion and the channel region of the intra-pixel transistor. 2.根据权利要求1所述的固态成像设备,其特征在于,所述信号读出电路区域包括一个或多个p阱电位区;2. The solid-state imaging device according to claim 1, wherein the signal readout circuit region comprises one or more p-well potential regions; 所述多个像素内晶体管包括复位晶体管、源极跟随晶体管和行选择晶体管;The plurality of intra-pixel transistors include reset transistors, source follower transistors, and row select transistors; 一个或多个交叉区设置在与所述p阱电位区相同的位置上。One or more crossing regions are arranged at the same position as the p-well potential region. 3.根据权利要求2所述的固态成像设备,其特征在于,所述信号读出电路区域沿行方向和列方向设置。3. The solid-state imaging device according to claim 2, wherein the signal readout circuit area is arranged along a row direction and a column direction. 4.根据权利要求2所述的固态成像设备,其特征在于,所述信号读出电路区域设置在每个单位像素的边界上和所述光感测区域之间。4. The solid-state imaging device according to claim 2, wherein the signal readout circuit region is provided on a boundary of each unit pixel and between the photo-sensing regions. 5.一种固态成像设备,其特征在于,多个单位像素沿行方向和列方向以矩阵的形式设置;5. A solid-state imaging device, characterized in that a plurality of unit pixels are arranged in the form of a matrix along the row direction and the column direction; 所述固态成像设备包括通过第一工艺形成的第一像素到像素隔离区和通过与所述第一工艺不同的第二工艺形成的第二像素到像素隔离区;The solid-state imaging device includes a first pixel-to-pixel isolation region formed by a first process and a second pixel-to-pixel isolation region formed by a second process different from the first process; 每个单位像素包括一个或多个光感测区域和一个或多个信号读出电路区域;Each unit pixel includes one or more light sensing regions and one or more signal readout circuit regions; 每个光感测区域包括一个或多个光电二极管、一个或多个传输晶体管和浮动扩散的一部分;Each photo-sensing region includes one or more photodiodes, one or more transfer transistors, and a portion of a floating diffusion; 所述信号读出电路区域包括多个像素内晶体管;The signal readout circuit area includes a plurality of transistors in pixels; 在每个单位像素中,所述浮动扩散和所述像素内晶体管由多个光电二极管和传输晶体管共用;In each unit pixel, the floating diffusion and the in-pixel transistor are shared by a plurality of photodiodes and transfer transistors; 每个光电二极管和每个传输晶体管设置在通过所述第一像素到像素隔离区和所述第二像素到像素隔离区来隔离的部分中;each photodiode and each transfer transistor are disposed in a portion isolated by the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region; 所述第一像素到像素隔离区和所述第二像素到像素隔离区的交叉区设置在与所述浮动扩散不同的位置上;an intersection region of the first pixel-to-pixel isolation region and the second pixel-to-pixel isolation region is disposed at a position different from that of the floating diffusion; 当所述交叉区与所述像素内晶体管的沟道区重叠时,所述重叠区的长度小于所述交叉区的一半长度。When the intersection area overlaps with the channel area of the transistor in the pixel, the length of the overlapping area is less than half the length of the intersection area.
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