CN116318604A

CN116318604A - Signal measurement method for vehicle-mounted Ethernet transmitter and digital oscilloscope

Info

Publication number: CN116318604A
Application number: CN202310598680.0A
Authority: CN
Inventors: 张传民; 陈松湖; 钟斌
Original assignee: Shenzhen Siglent Technologies Co Ltd
Current assignee: Shenzhen Siglent Technologies Co Ltd
Priority date: 2023-05-25
Filing date: 2023-05-25
Publication date: 2023-06-23
Anticipated expiration: 2043-05-25
Also published as: CN116318604B

Abstract

The application discloses a signal measurement method for a vehicle-mounted Ethernet transmitter and a digital oscilloscope, wherein the digital oscilloscope comprises a vehicle-mounted Ethernet clock synchronization unit, and the vehicle-mounted Ethernet clock synchronization unit comprises a signal acquisition module, a reference clock detection module, a clock setting module, a reference clock generation module and a clock output module. The signal acquisition module performs analog-to-digital conversion on the detected signal to obtain the detected digital signal, the reference clock detection module performs clock signal recovery on the detected digital signal and calibrates the recovered clock signal, the clock setting module outputs a reference analog signal according to the calibrated reference clock parameter, the reference clock generation module generates a measurement reference signal of a first preset frequency according to the reference analog signal, and the clock output module outputs the measurement reference signal. Because the measuring reference signal is obtained according to the measured signal, the measuring reference signal is more accurate and reliable, and the testing precision and the testing reliability of the vehicle-mounted Ethernet transmitter are further improved.

Description

Signal measurement method for vehicle-mounted Ethernet transmitter and digital oscilloscope

Technical Field

The invention relates to the technical field of oscilloscopes, in particular to a signal measurement method for a vehicle-mounted Ethernet transmitter and a digital oscilloscopes.

Background

Advanced Driving Assistance Systems (ADAS) for vehicles and automated driving automobiles use a large number of sensors, controls and interfaces, which require higher bandwidth. The vehicle-mounted Ethernet provides a universal communication medium, so that various components can coexist on the same switching network, and therefore, the vehicle-mounted Ethernet is required to be tested in the design and application of the vehicle-mounted Ethernet, a digital oscilloscope is required to be used for testing a vehicle-mounted Ethernet transmitter, and the digital oscilloscope is used for collecting and processing a superposition signal consisting of an interference signal sent by a signal source and a signal transmitted by the vehicle-mounted Ethernet transmitter and then outputting a measurement result. Digital oscilloscopes are indispensable tools for designing, manufacturing and maintaining electronic equipment, are increasingly popular due to the functions of waveform triggering, storing, displaying, measuring, analyzing and the like, and are considered as eyes of engineers along with rapid development of technology and market demands, and are used as a necessary tool for coping with measurement challenges of the engineers.

When a Test Mode 4 transmission distortion Test project is carried out on a 100M or 1000M vehicle-mounted Ethernet transmitter, one of the most important factors for ensuring the measurement accuracy of signals is to use a reference clock of the transmitter so as to carry out clock domain synchronization on a digital oscilloscope and a signal source. For example, on 100M and 1000M ethernet vehicles, the clock frequencies transmitted by a typical transmitter are 66.666MHz and 125MHz, respectively, and in the actual test process, the following situations are mainly encountered when the reference clock provided by the transmitter is acquired:

1) The reference clock of the generated transmitter is mostly packaged in the tested equipment, and the reference clock is less externally provided, so that the reference clock is difficult to acquire, and the clock domain synchronization between the tested signal and the test measurement instrument group is difficult;

2) Even if the reference clock of the transmitter can be used by a user, namely, a special interface for outputting the reference clock outwards is provided, a special test point and a test cable are also needed to be connected, so that the testing steps and objective conditions are increased, and the testing complexity is improved;

3) When a test and measurement instrument can use a reference clock provided by an on-board ethernet transmitter, but since the nominal frequency of an external input reference clock used by an in-industry test and measurement instrument such as an oscilloscope, a signal source, etc. is typically 10MHz, it is necessary for the instrument manufacturer to additionally provide a clock synchronization test fixture for clock frequency conversion, which can convert the transmitter reference clock such as 66.666MHz or 125MHz to the nominal frequency of 10MHz. The clock synchronous test fixture has single function and high price, and greatly increases the hardware test cost. In addition, the accuracy of the 10MHz nominal frequency output by the clock synchronous test fixture cannot be evaluated, so that the uncertainty of the vehicle-mounted Ethernet transmitter test is greatly increased.

Disclosure of Invention

The technical problem that this application mainly solves is when carrying out signal test to the transmitter of on-vehicle ethernet, how to acquire the nominal frequency signal of its clock signal synchronization under the prerequisite that does not increase clock synchronization test fixture.

According to a first aspect, the present application provides a digital oscilloscope, including a vehicle-mounted ethernet clock synchronization unit, configured to synchronize with a signal under test output by a vehicle-mounted ethernet transmitter when testing the vehicle-mounted ethernet transmitter;

the vehicle-mounted Ethernet clock synchronization unit comprises a signal acquisition module, a reference clock detection module, a clock setting module, a reference clock generation module and a clock output module;

the signal acquisition module is connected with the reference clock detection module and is used for carrying out analog-to-digital conversion on the detected signal and sending the detected digital signal obtained by the analog-to-digital conversion to the reference clock detection module;

the reference clock detection module comprises a phase discriminator, a frequency divider and a clock calibration device; the phase discriminator is respectively connected with the signal acquisition module and the clock calibration device, and is used for recovering clock signals and recovering measured data information of the measured digital signals according to the phase discrimination sampling clock output by the frequency divider and sending phase error signals obtained by recovering the clock signals to the clock calibration device; the clock calibration device is connected with the clock setting module and is used for acquiring a reference clock parameter synchronous with the measured signal according to the phase error signal and outputting a first control signal to the clock setting module according to the reference clock parameter;

the clock setting module is connected with the reference clock generating module and is used for outputting a reference analog signal to the reference clock generating module according to the first control signal;

the reference clock generation module is connected with the clock output module and is used for generating a measurement reference signal with a first preset frequency according to the reference analog signal and sending the measurement reference signal to the clock output module;

the clock output module is respectively connected with the signal acquisition module and the frequency divider;

when the detected signals are synchronized, the clock output module is used for outputting a sampling clock for analog-to-digital conversion to the signal acquisition module, the clock output module is also used for sending a phase discrimination acquisition signal to the frequency divider, and the frequency divider is used for acquiring the phase discrimination sampling clock to the phase discriminator according to the phase discrimination acquisition signal;

and when the detected signals are synchronized, the clock output module is used for outputting the measurement reference signal with the first preset frequency as an output signal of the vehicle-mounted Ethernet clock synchronization unit.

In one embodiment, the reference clock acquisition module is an FPGA circuit; the first preset frequency is 10MHz.

In one embodiment, the clock setting module is a D/A converter; the reference clock generation module is a voltage controlled oscillator VCXO.

In one embodiment, the clock output module includes a phase-locked loop circuit.

In one embodiment, the phase detector includes a first D flip-flop, a second D flip-flop, a first exclusive-or gate, and a second exclusive-or gate;

the D input end of the first D trigger is connected with the signal acquisition module and used as the input end of the tested digital signal, and the Q output end of the first D trigger is connected with the D input end of the second D trigger; the clock signal input end of the first D trigger is connected with the frequency divider and is used for taking the in-phase clock of the phase discrimination sampling clock as the sampling clock of the first D trigger;

two input ends of the first exclusive-OR gate circuit are respectively connected with a D input end and a Q output end of the first D trigger, and the output end of the first exclusive-OR gate circuit is connected with the clock calibration device; two input ends of the second exclusive-OR gate circuit are respectively connected with a D input end and a Q output end of the second D trigger, and the output end of the second exclusive-OR gate circuit is connected with the clock calibration device; and the clock signal input end of the second D trigger is connected with the frequency divider and is used for taking the reverse phase clock of the phase discrimination sampling clock as the sampling clock of the second D trigger.

In an embodiment, the clock calibration device uses a digital TDC circuit based on a tap delay chain, where the digital TDC circuit is configured to measure time information of a pulse signal output from an output end of a first exclusive-or gate circuit and/or a second exclusive-or gate circuit of the phase detector, obtain a phase error time value, and output the first control signal according to the phase error time value.

According to a second aspect, the present application provides a signal measurement method for an on-board ethernet transmitter, for application to the digital oscilloscope of the first aspect, for outputting a measurement reference signal of a first preset frequency synchronized with a signal under test when the on-board ethernet transmitter is tested; the signal measurement method comprises the following steps:

performing analog-to-digital conversion on the detected signal to obtain a detected digital signal;

performing clock signal recovery on the tested digital signal according to a preset phase discrimination sampling clock to obtain a phase error signal;

inputting the phase error signal into a digital TDC circuit based on a tap delay chain to acquire a first control signal;

generating a measurement reference signal of a first preset frequency through a voltage-controlled oscillator according to the first control signal;

resetting the phase discrimination sampling clock according to the first preset frequency and reacquiring the phase error signal;

and outputting the measurement reference signal of the first preset frequency when the measurement reference signal is synchronous with the measured signal.

In one embodiment, the signal measurement method further comprises:

and when the measurement reference signal with the first preset frequency is synchronous with the measured signal, recovering the measured data transmitted by the measured signal through the phase discriminator and outputting the measured data.

According to a third aspect, the present application provides a computer readable storage medium having stored thereon a program executable by a processor to implement the method according to the second aspect.

According to the digital oscilloscope provided by the embodiment of the application, the measurement reference signal is obtained according to the measured signal actually output by the vehicle-mounted Ethernet transmitter, so that the measurement reference signal is more accurate and reliable, and further the test precision and the test reliability of the vehicle-mounted Ethernet transmitter are improved.

Drawings

FIG. 1 is a schematic diagram of a test connection of a vehicle-mounted Ethernet transmitter;

FIG. 2 is a schematic diagram of a configuration of a vehicle-mounted Ethernet clock synchronization unit according to an embodiment;

fig. 3 is a schematic circuit diagram of a phase detector according to an embodiment;

FIG. 4 is a timing diagram of input and output signals of a phase detector in one embodiment;

FIG. 5 is a schematic diagram of a digital oscilloscope in another embodiment;

fig. 6 is a flow chart of a signal measurement method in another embodiment.

Detailed Description

The invention will be described in further detail below with reference to the drawings by means of specific embodiments. Wherein like elements in different embodiments are numbered alike in association. In the following embodiments, numerous specific details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted, or replaced by other elements, materials, or methods in different situations. In some instances, some operations associated with the present application have not been shown or described in the specification to avoid obscuring the core portions of the present application, and may not be necessary for a person skilled in the art to describe in detail the relevant operations based on the description herein and the general knowledge of one skilled in the art.

Furthermore, the described features, operations, or characteristics of the description may be combined in any suitable manner in various embodiments. Also, various steps or acts in the method descriptions may be interchanged or modified in a manner apparent to those of ordinary skill in the art. Thus, the various orders in the description and drawings are for clarity of description of only certain embodiments, and are not meant to be required orders unless otherwise indicated.

The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The terms "coupled" and "connected," as used herein, are intended to encompass both direct and indirect coupling (coupling), unless otherwise indicated.

Referring to fig. 1, a schematic diagram of a test connection of a vehicle-mounted ethernet transmitter is shown, in which the transmitter sends a signal to a test fixture in a transmission distortion test item in a vehicle-mounted ethernet electrical consistency test, an oscilloscope measures and processes the signal to be tested, and then recovers the clock and data of the signal to be tested, wherein the clock recovered by the oscilloscope is synchronous with the transmitter, and a digital oscilloscope outputs the 10MHz Ref Clk after synchronization as a reference clock of a signal source, thereby realizing clock domain synchronization of the transmitter, the digital oscilloscope and the signal source. In the prior art, when a vehicle-mounted Ethernet transmitter is tested, a special clock synchronization test fixture which is matched with the model of the transmitter is required to acquire a reference clock signal with preset nominal frequency, and the device is high in price and greatly increases the test cost; in addition, the complexity of the transmitter test increases as well as the number of uncertainty factors (e.g., inability to determine the accuracy of the clock synchronization test fixture). In the embodiment of the application, the digital oscilloscope generates the reference clock signal and acquires the measurement reference signal according to the measured signal actually output by the vehicle-mounted Ethernet transmitter, so that the measurement reference signal is more accurate and reliable, the measurement cost is reduced, and the test precision and the test reliability of the vehicle-mounted Ethernet transmitter are improved.

Example 1

Fig. 2 is a schematic structural diagram of a vehicle-mounted ethernet clock synchronization unit in an embodiment, where the vehicle-mounted ethernet clock synchronization unit 1 is disposed in a digital oscilloscope, and is configured to synchronize with a signal to be tested output by a vehicle-mounted ethernet transmitter when the vehicle-mounted ethernet transmitter is tested. The on-vehicle ethernet clock synchronization unit 1 includes a signal acquisition module 10, a reference clock detection module 20, a clock setting module 30, a reference clock generation module 40, and a clock output module 50. The signal acquisition module 10 is connected to the reference clock detection module 20, and is configured to perform analog-to-digital conversion on the detected signal, and send the detected digital signal obtained by the analog-to-digital conversion to the reference clock detection module 20. The reference clock detection module 20 comprises a phase detector 21, a frequency divider 23 and a clock calibration means 22. The phase discriminator 21 is respectively connected with the signal acquisition module 10 and the clock calibration device 22, and the phase discriminator 21 is used for recovering the clock signal and recovering the information of the detected data for the detected digital signal according to the phase-discriminating sampling clock output by the frequency divider 23 and transmitting the phase error signal obtained by recovering the clock signal to the clock calibration device 22. The clock calibration device 22 is connected to the clock setting module 30, and is configured to obtain a reference clock parameter synchronized with the measured signal according to the phase error signal, and output a first control signal to the clock setting module 30 according to the reference clock parameter. The clock setting module 30 is connected to the reference clock generating module 40, and is configured to output a reference analog signal to the reference clock generating module 40 according to the first control signal. The reference clock generation module 40 is connected to the clock output module, and is configured to generate a measurement reference signal with a first preset frequency according to the reference analog signal, and send the measurement reference signal to the clock output module 50. The clock output module 50 is connected with the signal acquisition module 10 and the frequency divider 23, respectively. When the detected signal is synchronized, the clock output module 50 is configured to output a sampling clock for performing analog-to-digital conversion to the signal acquisition module 10, the clock output module 50 is further configured to send a phase detection acquisition signal to the frequency divider 23, and the frequency divider is configured to obtain a phase detection sampling clock to the phase detector 21 according to the phase detection acquisition signal. When the synchronization of the measured signal is completed, the clock output module 50 is configured to output the measurement reference signal with the first preset frequency as the output signal of the on-board ethernet clock synchronization unit 1.

In one embodiment, the reference clock acquisition module is an FPGA circuit. In one embodiment, the first predetermined frequency is 10MHz. In one embodiment, the clock setting module is a D/A converter. In one embodiment, the reference clock generation module 40 is a voltage controlled oscillator VCXO. In one embodiment, the clock output module 50 includes a phase locked loop circuit.

Referring to fig. 3, a schematic circuit diagram of a phase detector according to an embodiment is shown, and in an embodiment, the phase detector includes a first D flip-flop DFF1, a second D flip-flop DFF2, a first exclusive-or circuit X, and a second exclusive-or circuit Y. The D input end of the first D trigger DFF1 is connected with the signal acquisition module and used as the input end of the tested digital signal, and the Q output end of the first D trigger DFF1 is connected with the D input end of the second D trigger DFF 2. The clock signal input end of the first D trigger DFF1 is connected with the frequency divider and is used for taking the in-phase clock of the phase discrimination sampling clock as the sampling clock of the first D trigger. The two input ends of the first exclusive-OR gate circuit X are respectively connected with the D input end and the Q output end of the first D trigger DFF1, and the output end of the first exclusive-OR gate circuit X is connected with the clock calibration device; two input ends of the second exclusive-OR gate circuit Y are respectively connected with a D input end and a Q output end of the second D trigger DFF2, and the output end of the second exclusive-OR gate circuit Y is connected with a clock calibration device; the clock signal input end of the second D trigger DFF2 is connected with the frequency divider and is used for taking the reverse phase clock of the phase discrimination sampling clock as the sampling clock of the second D trigger. In one embodiment, the first D flip-flop DFF1 and the second D flip-flop DFF2 sample on the rising edge and the falling edge of the same clock, respectively, that is, the phase-discriminating sampling clock and the phase-inverting phase-discriminating sampling clock are 180 degrees opposite to each other.

Referring to FIG. 4, a timing diagram of input and output signals of the phase detector according to an embodiment is shown, wherein the DATA DATA input by the phase detector is respectively represented by two recovered clock signals CLK and CLK

Controlling the D flip-flop to sample data, wherein the clock signal CLK and the clock signal +>

Is 180 degrees opposite phase, the first D flip-flop DFF1 represents the sampling of the input DATA DATA on the rising edge of the recovered clock CLK, and the second D flip-flop DFF2 represents the recovered clock +.>

Is sampled at the rising edge of (c). In one embodiment, the output X of the first exclusive or circuit X represents phase error information obtained by exclusive or of the original signal DATA and the D1 signal, so as to implement a phase discrimination function. When the whole loop is locked, X is half a clock period, and the recovered clock CLK is just at the optimal sampling point of the data. Y represents the characteristic jump density signal obtained after the exclusive OR processing of the D1 and D2 signals, the pulse density of Y and the jump density of the DATA DATA have the same characteristics, when Y has no pulse, the input signal outgoing line is represented to have the continuous same level, at the moment, the information output by the phase discriminator is invalid, and the subsequent circuit is controlled by the Y signal to not respond to the X signal output by the phase discriminator.

The manner of use of the oscilloscope disclosed in the present application is described below by way of a specific embodiment.

Please refer to fig. 5, which shows another embodimentIn the embodiment, the digital oscilloscope is structurally schematic, wherein the automobile Ethernet transmitter is applied to 100M or 1000M automobile Ethernet, and the transmitter is based on IEEE Std 802.3bw ^TM Or IEEE Std 802.3bp ^TM And (5) standard. In one embodiment, the Test pattern of Test Mode 4 is sent to a digital oscilloscope for transmission distortion testing (Transmit distortion Test). The signal acquisition ADC circuit carries out analog-to-digital conversion on the input tested signal and outputs the signal to the FPGA circuit. The FPGA circuit is a main functional module for realizing clock synchronization, wherein the frequency divider is based on the working clock frequency of a phase-locked loop (PLL), generates a data sampling clock after proper frequency division, and outputs the data sampling clock to the phase discriminator. The phase detector recovers clock and data from the input signal and outputs phase error information to the TDC measurement circuit for time measurement, and the TDC measurement circuit outputs a control signal to the D/A converter according to the phase error measurement result. The D/A converter is a digital-to-analog converter, and generates an analog voltage signal to a voltage-controlled oscillator VCXO of the next stage according to the phase error information output by the TDC measuring circuit. The voltage-controlled oscillator is a local clock reference source, has good short-term stability, good phase noise index and jitter performance, and adjusts the output reference clock frequency value according to the control voltage of the input end, and the frequency of the voltage-controlled oscillator selected in the embodiment of the application is 10MHz. The phase-locked loop circuit PLL generates a set of operating clocks according to the reference clock frequency of the input terminal, and outputs a 10MHz reference clock signal to the outside. In one embodiment, through the negative feedback adjustment of the PLL, after the output signal X of the phase detector reaches half a clock period of the data sampling clock CLK, it is explained that the clock domain of the digital oscilloscope is synchronized with the clock domain of the transmitter to be tested, and the signal source for performing the post test on the transmitter also uses the synchronized 10MHz Ref CLK clock as its reference clock, so that the whole measurement system achieves synchronization of the clock domains.

In one embodiment, the clock calibration device uses a digital TDC circuit based on a tap delay chain, where the digital TDC circuit is configured to measure time information of a pulse signal output from an output end of the first exclusive-or circuit X and/or the second exclusive-or circuit Y of the phase discriminator, obtain a phase error time value, and output a first control signal according to the phase error time value. The circuit implementation of the digital TDC circuit is referred to in the chinese patent with publication number CN115685725a, which is a clock calibration device and measurement device of measurement equipment, and therefore, the disclosure technology is omitted herein.

Referring to fig. 6, a flow chart of a signal measurement method in another embodiment is shown, and in an embodiment of the present application, a digital oscilloscope for outputting a measurement reference signal with a first preset frequency synchronized with a signal to be measured when testing a vehicle-mounted ethernet transmitter is further disclosed, where the signal measurement method includes:

step 101, obtaining a tested digital signal.

And carrying out analog-to-digital conversion on the detected signal to obtain a detected digital signal.

Step 102, a phase error signal is obtained.

And carrying out clock signal recovery on the tested digital signal according to a preset phase discrimination sampling clock so as to obtain a phase error signal.

Step 103, acquiring a first control signal.

The phase error signal is input to a digital TDC circuit employing a tap-based delay chain to obtain a first control signal.

Step 104, a measurement reference signal is generated.

And generating a measurement reference signal with a first preset frequency through a voltage-controlled oscillator according to the first control signal.

Step 105, update the phase error signal.

Resetting the phase discrimination sampling clock according to the first preset frequency and re-acquiring a phase error signal; and updating the first control signal through the digital TDC circuit, so as to generate a new measurement reference signal and realize closed loop regulation.

And step 106, outputting a measurement reference signal.

In one embodiment, the signal measurement method further comprises:

and step 107, recovering the tested data.

In the digital oscilloscope disclosed in an embodiment of the application, the clock signal is recovered from the tested signal, the clock signal is synchronous with the clock domain of the tested equipment, and the 10MHz reference clock is externally output by the oscilloscope according to the synchronized clock signal, so that the clock domain synchronization of the external equipment (such as a signal source), the digital oscilloscope and the tested equipment is realized, the measurement accuracy and flexibility are improved, and the test difficulty is reduced. The technical scheme simplifies the synchronous flow of clock domains among different devices, simplifies the testing steps and increases the testing flexibility. When the signal of the vehicle-mounted Ethernet transmitter is measured, even under the test environment that the clock source of the tested signal is difficult to acquire, the clock is recovered from the tested signal to realize the clock domain synchronization of the whole measurement system, 125M or 66.666MHz is not required to be converted into a reference clock of 10MHz, and the additional hardware cost is not required to be increased. Therefore, the clock of the tested signal is recovered through the digital oscilloscope, and the synchronized clock is output to the peripheral, so that the clock domain synchronization of the whole measurement system is achieved, the complexity of the clock domain synchronization is reduced, the accuracy of signal measurement is improved, and the test time and the hardware cost are also reduced.

The digital oscilloscope disclosed in the embodiment of the application comprises a vehicle-mounted Ethernet clock synchronization unit, wherein the vehicle-mounted Ethernet clock synchronization unit comprises a signal acquisition module, a reference clock detection module, a clock setting module, a reference clock generation module and a clock output module. The signal acquisition module performs analog-to-digital conversion on the detected signal to obtain a detected digital signal, the reference clock detection module performs clock signal recovery on the detected digital signal and calibrates the recovered clock signal, the clock setting module outputs a reference analog signal according to the calibrated reference clock parameter, the reference clock generation module generates a measurement reference signal of a first preset frequency according to the reference analog signal, and the clock output module outputs the measurement reference signal. Because the measuring reference signal is obtained according to the measured signal, the measuring reference signal is more accurate and reliable, and the testing precision and the testing reliability of the vehicle-mounted Ethernet transmitter are further improved.

Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by a computer program. When all or part of the functions in the above embodiments are implemented by means of a computer program, the program may be stored in a computer readable storage medium, and the storage medium may include: read-only memory, random access memory, magnetic disk, optical disk, hard disk, etc., and the program is executed by a computer to realize the above-mentioned functions. For example, the program is stored in the memory of the device, and when the program in the memory is executed by the processor, all or part of the functions described above can be realized. In addition, when all or part of the functions in the above embodiments are implemented by means of a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and the program in the above embodiments may be implemented by downloading or copying the program into a memory of a local device or updating a version of a system of the local device, and when the program in the memory is executed by a processor.

The foregoing description of the invention has been presented for purposes of illustration and description, and is not intended to be limiting. Several simple deductions, modifications or substitutions may also be made by a person skilled in the art to which the invention pertains, based on the idea of the invention.

Claims

1. The digital oscilloscope is characterized by comprising a vehicle-mounted Ethernet clock synchronization unit, wherein the vehicle-mounted Ethernet clock synchronization unit is used for synchronizing with a tested signal output by a vehicle-mounted Ethernet transmitter when the vehicle-mounted Ethernet transmitter is tested;

2. The digital oscilloscope of claim 1, wherein the reference clock acquisition module is an FPGA circuit; the first preset frequency is 10MHz.

3. The digital oscilloscope of claim 1 wherein said clock setting module is a D/a converter; the reference clock generation module is a voltage controlled oscillator VCXO.

4. The digital oscilloscope of claim 1, wherein the clock output module comprises a phase-locked loop circuit.

5. The digital oscilloscope of claim 1 wherein said phase detector comprises a first D flip-flop, a second D flip-flop, a first exclusive-or gate, and a second exclusive-or gate;

6. The digital oscilloscope of claim 5 wherein said clock calibration means employs a digital TDC circuit based on a tapped delay chain for measuring the time information of the pulse signal output from the output of the first and/or second exclusive-or circuits of said phase detector, obtaining a phase error time value, and outputting said first control signal in accordance with said phase error time value.

7. A signal measurement method for a vehicle-mounted ethernet transmitter, for application to the digital oscilloscope of any one of claims 1 to 6, for outputting a measurement reference signal of a first preset frequency synchronized with a signal under test when the vehicle-mounted ethernet transmitter is tested; the signal measurement method comprises the following steps:

8. The signal measurement method of claim 7, further comprising:

9. The signal measurement method of claim 7, wherein the first predetermined frequency is 10MHz.

10. A computer-readable storage medium, characterized in that the medium has stored thereon a program executable by a processor to implement the signal measurement method according to any one of claims 7 to 9.