CN116318039A

CN116318039A - Topological structure of filter, filter and communication equipment

Info

Publication number: CN116318039A
Application number: CN202310260125.7A
Authority: CN
Inventors: 万晨庚
Original assignee: Beijing Xinxi Semiconductor Technology Co ltd
Current assignee: Beijing Xinxi Semiconductor Technology Co ltd
Priority date: 2023-03-13
Filing date: 2023-03-13
Publication date: 2023-06-23

Abstract

The embodiment of the invention provides a topological structure of a filter, the filter and communication equipment, wherein the topological structure of the filter comprises the following components: a series branch comprising a plurality of series stages; a parallel branch comprising a plurality of parallel stages, the parallel stages in the parallel branch forming at least one or more combined parallel stages, a combined parallel stage having at least two parallel stages; wherein, the first end of each parallel stage is connected with the serial branch, and the second end of the parallel stage in the combined parallel stage is connected with a common ground inductor; the number of the plurality of parallel stages is greater than the number of the plurality of series stages. According to the topological structure of the filter provided by the embodiment of the invention, the capacity of the filter for preventing the frequency of the transmitted interference signal can be increased by combining the parallel stages with the number larger than that of the serial stages, and the out-of-band rejection of the filter is improved.

Description

Topological structure of filter, filter and communication equipment

Technical Field

The embodiment of the invention relates to the technical field of filters, in particular to a topological structure of a filter, the filter and communication equipment.

Background

The filter is a device for eliminating interference in a communication system, and plays an important role in the communication system, so that the improvement of the performance of the filter is of great significance to the improvement of the performance of the communication system. Out-of-band rejection is one of the key technical indicators affecting the performance of the filter, so how to provide a technical scheme to improve the out-of-band rejection of the filter becomes a technical problem to be solved.

Disclosure of Invention

In view of the above, embodiments of the present invention provide a topology structure of a filter, and a communication device, so as to improve filtering performance of the filter.

An embodiment of the present invention provides a topology structure of a filter, including:

a series branch comprising a plurality of series stages;

a parallel branch comprising a plurality of parallel stages, the parallel stages in the parallel branch forming at least one or more combined parallel stages, a combined parallel stage having at least two parallel stages; wherein, the first end of each parallel stage is connected with the serial branch, and the second end of the parallel stage in the combined parallel stage is connected with a common ground inductor; the number of the plurality of parallel stages is greater than the number of the plurality of series stages.

Optionally, the combined parallel stage includes a first combined parallel stage and a second combined parallel stage, wherein the second end of the parallel stage in the first combined parallel stage is connected to a common first pair of ground inductances, and the second end of the parallel stage in the second combined parallel stage is connected to a common second pair of ground inductances.

Optionally, the series branch comprises an even number of series stages; the number of parallel stages in the first combined parallel stage is half of the number of serial stages, and parallel stages other than the first combined parallel stage are combined to form the second combined parallel stage.

Optionally, the series branch comprises an odd number of series stages; the number of parallel stages in the first combined parallel stage is half of the sum of the number of series stages and a first threshold value, and parallel stages other than the first combined parallel stage are combined to form the second combined parallel stage.

Optionally, the number of parallel stages is the sum of the number of series stages and 1.

The embodiment of the invention also provides a filter, which comprises: the topology of a filter as recited in any of the preceding embodiments.

Optionally, the filter further includes: an input port, an output port and a ground inductance; the topological structure of the filter comprises a serial branch and a parallel branch; the input port is connected with one end of the series branch, the output port is connected with the other end of the series branch, and one end of the grounding inductor is connected with a second end of the parallel stage in the combined parallel stage of the parallel branch.

Optionally, the combined parallel stage includes a first combined parallel stage and a second combined parallel stage, and the filter further includes:

one end of the first branch inductance is connected with the second end of the parallel stage in the first combined parallel stage, and the other end of the first branch inductance is connected with the grounding inductance connected with the first combined parallel stage;

And one end of the second branch inductance is connected with the second end of the parallel stage in the second combined parallel stage, and the other end of the second branch inductance is connected with the grounding inductance connected with the second combined parallel stage.

Optionally, the filter further includes:

and the common ground inductance is commonly connected with the ground inductance connected with each combined parallel stage.

Optionally, the filter further includes:

one end of the first capacitor is connected with the input port, and the other end of the first capacitor is connected with the ground inductance which is not nearest to the input port;

or one end of the first capacitor is connected with the output port, and the other end of the first capacitor is connected with the grounding inductor which is not nearest to the output port.

Optionally, the filter further includes:

one end of the second capacitor is connected with the output port, and the other end of the second capacitor is connected with the ground inductance which is not nearest to the output port;

or one end of the second capacitor is connected with the input port, and the other end of the second capacitor is connected with the ground inductance which is not nearest to the input port.

Optionally, the filter further includes:

the input matching network is arranged at one side of the output port;

the output matching network is arranged at one side of the input port;

the inductance of the input matching network and the inductance value of the output matching network meet the matching principle.

Optionally, the matching principle corresponds to a range of 0.005-0.04Hz ² * H.times.F or 0.01-0.08Hz ² * H x F; where Hz represents the frequency in hertz, H represents the inductance in henry, and F represents the capacitance in law.

The embodiment of the invention also provides communication equipment comprising the filter according to any one of the embodiments.

The topological structure of the filter provided by the embodiment of the invention comprises a series branch circuit, a plurality of series stages, a plurality of parallel stages and a plurality of parallel stages, wherein the series branch circuit comprises a plurality of series stages; a parallel branch comprising a plurality of parallel stages, the parallel stages in the parallel branch forming at least one or more combined parallel stages, a combined parallel stage having at least two parallel stages; wherein, the first end of each parallel stage is connected with the serial branch, and the second end of the parallel stage in the combined parallel stage is connected with a common ground inductor; the number of the plurality of parallel stages is greater than the number of the plurality of series stages. It can be seen that in the topology structure of the filter provided by the embodiment of the invention, the number of the parallel stages is set to be larger than that of the serial stages, so that the number relation between the serial stages and the parallel stages is changed, and the greater the number of the parallel stages is compared with the number of the serial stages, the better the out-of-band suppression effect of the filter is, so that the out-of-band suppression of the filter can be improved by increasing the number of the parallel stages; furthermore, in the topology structure of the filter provided by the embodiment of the invention, at least one or a plurality of parallel stages of the parallel branches are combined to form a combined parallel stage; so that the second ends of the parallel stages in the combined parallel stage are commonly connected with a grounding inductor; therefore, the number of connections to the ground inductance can be reduced, and the inductance value generated by the ground inductance can be reduced. Since the inductance value of the grounding inductor is in direct proportion to the use quantity of the grounding inductor, the inductance value of the grounding inductor is in direct proportion to the insertion loss of the filter, and the lower the inductance value of the grounding inductor is, the lower the loss is; therefore, the total inductance value generated by the ground inductance can be reduced by reducing the connection quantity of the ground inductance, so that the insertion loss can be reduced; meanwhile, the purpose of improving out-of-band rejection of the filter is achieved by combining parallel stages.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of the topology of a basic filter;

FIG. 2 is a schematic diagram of a topology of a filter according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of a topology of a filter according to an embodiment of the present invention;

FIG. 4 is another schematic diagram of the topology of a filter according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a first structure of a filter according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a second structure of a filter according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a third configuration of a filter according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of a fourth configuration of a filter according to an embodiment of the present invention;

fig. 9 is a schematic diagram of a fifth structure of a filter according to an embodiment of the present invention;

Fig. 10 is a schematic diagram of a sixth structure of a filter according to an embodiment of the present invention;

fig. 11 is a schematic diagram of a seventh structure of a filter according to an embodiment of the present invention;

fig. 12 is a schematic view of an eighth structure of a filter according to an embodiment of the present invention;

fig. 13 is a schematic diagram of a ninth structure of a filter according to an embodiment of the present invention;

fig. 14 is a schematic view of a tenth structure of a filter according to an embodiment of the present invention;

FIG. 15 is a schematic diagram of the out-of-band rejection of a filter versus a basic filter provided by an embodiment of the present invention;

fig. 16 is a schematic diagram showing the comparison of return loss of a filter and a basic filter according to an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The filter is a filter circuit composed of resonators, connection structures of the resonators and necessary matching elements, and the matching elements comprise passive devices such as inductors, capacitors and the like. The filter can effectively filter the frequency points of the specific frequency or the frequencies outside the frequency points in the power line to obtain a power signal of the specific frequency or eliminate the power signal of the specific frequency. Thus, the filter is one of the essential key components in the communication system and can be used to make frequency selection, i.e. pass the desired power signal frequency while reflecting the undesired interference signal frequency.

To facilitate understanding of the overall structure and functional implementation of the filter, in one example, embodiments of the present invention are described in connection with the topology of the basic filter; referring to fig. 1, fig. 1 is a schematic diagram of a topology of a basic filter.

As shown in fig. 1, the topology structure of the filter includes an input port 01, an output port 02 and a ground port 03; a serial branch 04 connected to the input port 01 and the output port 02, and a parallel branch 05 connected to the serial branch 04; the series branch 04 includes a plurality of series stages (Se, 041..04 n) thereon, and the parallel branch 05 includes a plurality of parallel stages (Sh, 051..05 m) thereon; and a ground inductance 06 connected between each parallel stage and the ground port 03; each series stage or parallel stage may be formed by connecting a plurality of resonators in series, may be formed by connecting a plurality of resonators in parallel, or may be formed by connecting a plurality of resonators in series and a plurality of resonators in parallel.

When the filter works, an electric signal is input to the parallel branch 05 and the serial branch 04 of the filter through the input port 01, so that the resonators in the serial stage or the parallel stage can convert the input electric signal into an acoustic signal, and then convert the acoustic signal into an electrical signal to be output. The structural arrangement of the resonator ensures that the resonator has different electrical impedance for signals with different frequencies, so that transmission and reflection of different frequencies are realized, and filter characteristics are formed.

It can be seen that the use of filters is very important in communication systems. Thus, as the performance of the communication system increases, the requirements for the performance improvement of the filter become higher and higher. The performance of a filter can be generally described by performance metrics such as order (number of stages), absolute or relative bandwidth, out-of-band rejection, passband insertion loss, return loss (passband echo), etc. Out-of-band rejection refers to the "delta attenuation" outside the passband frequency range of the filter, specifying how many decibels (dB) of each frequency (Hz) outside the passband of the filter decreases; the ability of the filter to select unwanted frequency signals can be characterized; therefore, the magnitude of the out-of-band rejection has a great influence on the filter performance.

In designing a filter, to ensure out-of-band rejection of the filter, the out-of-band rejection of the filter is typically improved by adding more electrical devices, increasing the device area of the filter, or adding more complex packaging or design structures. However, such a processing manner makes the design method of the filter more complex, which results in an increase in the overall design difficulty of the filter; on the other hand, the overall device size of the filter is significantly increased, so that the manufacturing cost of the filter is also drastically increased.

The design method of the filter cannot obtain better out-of-band rejection, or under the condition of obtaining the same out-of-band rejection, indexes such as passband insertion loss and the like are sacrificed; it is therefore a technical problem to be solved how to provide a suitable filter design structure to improve the out-of-band rejection of the filter.

In order to improve out-of-band rejection of a filter, the embodiment of the invention provides a topological structure of the filter, and the purpose of effectively improving out-of-band rejection of the filter is achieved by improving the topological structure of the filter.

Referring to fig. 2, fig. 2 is a schematic structural diagram of a topology of a filter according to an embodiment of the invention.

As shown in the figure, the topology structure of the filter provided by the embodiment of the invention includes:

a series branch 04 comprising a plurality of series stages 041 to 04n (n being the number of series stages);

a parallel branch 05 comprising a plurality of parallel stages 051 to 05m (m being the number of parallel stages), the parallel stages in the parallel branch 05 forming at least one or more combined parallel stages 07, one combined parallel stage 07 having at least two parallel stages; wherein, the first end of each parallel stage is connected with the serial branch 04, and the second end of the parallel stage in the combined parallel stage 07 is connected with a common ground inductance 06; the number of parallel stages is greater than the number of series stages.

The phrase "the parallel stages in the parallel branch 05 include at least one or more combined parallel stages 07" means that: the plurality of parallel stages 051 to 05m form one combined parallel stage 07, or the plurality of parallel stages 051 to 05m form one combined parallel stage 07 and at least one parallel stage connected in series with the inductance 06; alternatively, the plurality of parallel stages 051 to 05m form a plurality of combined parallel stages 07 (e.g., 2 combined parallel stages including a first combined parallel stage 071 and a second combined parallel stage 072 shown in fig. 3 and 4); alternatively, a plurality of combined parallel stages 07 and at least one parallel stage connected in series with the inductance 06 to ground may be formed for the plurality of parallel stages 051 to 05 m.

It can be seen that, in the topology structure of the filter provided by the embodiment of the present invention, by setting the number of parallel stages 051 to 05m to be greater than the number of serial stages 041 to 04n (i.e. m is greater than n), the number relationship between the serial stages and the parallel stages is changed, and the greater the number of parallel stages is compared with the number of serial stages, the better the out-of-band suppression effect of the filter is, so that the out-of-band suppression effect of the filter can be improved by increasing the number of parallel stages; further, in the topology structure of the filter provided by the embodiment of the present invention, at least one or more parallel stages of the parallel branches 05 are combined to form a combined parallel stage 07; so that the second ends of the parallel stages in the combined parallel stage 07 are commonly connected with a ground inductance 06; therefore, the number of connections to the inductance 06 can be reduced, and the inductance value generated by the inductance 06 can be reduced. Since the inductance value of the grounding inductor 06 is in direct proportion to the use quantity of the grounding inductor 06, the inductance value of the grounding inductor 06 is in direct proportion to the loss generated by the grounding inductor 06, the lower the inductance value of the grounding inductor 06 is, the smaller the generated loss is, and the better the insertion loss of the filter is; therefore, reducing the number of connections to the inductance 06 can reduce the total inductance value generated by the inductance 06, so that the insertion loss to the inductance 06 can be reduced; at the same time, at least one or more parallel stages of the parallel branches 05 are combined to form a combined parallel stage 07; the second ends of the parallel stages in the combined parallel stage 07 are commonly connected with a grounding inductance 06, so that an inductance-capacitance circuit can be formed, the transmission zero point of the filter is increased, and the purpose of improving out-of-band rejection of the filter is achieved.

In the topological structure of the filter provided by the embodiment of the invention, the parallel stages are combined to form the combined parallel stage 07 so as to reduce the arrangement quantity of the inductance 06, thereby improving the insertion loss of the filter; and meanwhile, the formation of an inductance-capacitance circuit is increased, so that the transmission zero point of the filter is increased, and the out-of-band rejection of the filter is improved. From the foregoing, it can be seen that the number of parallel stages on the parallel path 05 is different in the topology of the filter, and thus the number of combined parallel stages 07 that can be formed is different according to the number of parallel stages. In order to ensure that the out-of-band rejection effect of the filter can be best, preferably, in the topology structure of the filter provided by the embodiment of the present invention, an arrangement manner in which the plurality of parallel stages includes 2 combined parallel stages 07 may be selected. Referring to fig. 3 and fig. 4, fig. 3 is a schematic structural diagram of a topology of a filter according to an embodiment of the present invention, and fig. 4 is another schematic structural diagram of a topology of a filter according to an embodiment of the present invention.

As shown in fig. 3 and fig. 4, the topology of the filter provided by the embodiment of the present invention, the combined parallel stage 07 may include a first combined parallel stage 071 and a second combined parallel stage 072, where the second end of the parallel stage in the first combined parallel stage 071 is connected to a first pair of common ground inductance 061, and the second end of the parallel stage in the second combined parallel stage 072 is connected to a second pair of common ground inductance 062.

In conjunction with the schematic diagrams of the topologies of the filters shown in fig. 3 and 4, in some implementations, the present embodiment divides the plurality of parallel stages 051 to 05m on the parallel leg 05 into two parts, forming two combined parallel stages. By adopting the design mode, on one hand, the use quantity of the grounding sense 06 can be reduced, and the quality factor of the grounding sense 06 is improved so as to improve the insertion loss of the filter; on the other hand, since the parallel stage includes a plurality of resonators connected in series or in parallel, by combining the parallel stages, a plurality of parallel resonant circuits having different resonant frequencies can be formed, and a plurality of distributed transmission zeros (which can be realized by only setting different frequencies or capacitance values of two parallel resonant circuits) can be formed out of band, thereby improving out-of-band suppression. If the parallel stages are not combined, a plurality of resonant frequencies may overlap, and transmission zero points which are uniformly distributed cannot be obtained, so that the effect of improving the whole inhibition is not improved (the inhibition is poor in possible places and good in other zero point superposition inhibition is achieved in possible places, but one zero point can play a role in improving the inhibition, and the improvement of the inhibition by the additional zero point superposition is smaller); in addition, by dividing the parallel stages on the parallel branch 05 into two combined parallel stages, an inductance-capacitance circuit (LC circuit) can be formed between each combined parallel stage and the correspondingly connected inductance-to-ground 06 (for example, the first combined parallel stage 071 is connected to the first inductance-to-ground 061, and the second combined parallel stage 072 is connected to the second inductance-to-ground 062); since the LC circuit can enhance the out-of-band rejection effect of the filter, the parallel stage on the parallel branch 05 is divided into two combined parallel stages, so that the number of parallel stages for generating the maximum capacitance can be increased in the filter while the number of the parallel stages for using the ground inductor 06 is reduced, so that the out-of-band rejection effect of the filter is the best.

Further, in the topology of the filter provided by the embodiment of the present invention, the number of parallel stages 051 to 05m is greater than the number of series stages 041 to 04n (m > n); thus, in some embodiments, it is preferred that the number of parallel stages is the sum of the number of series stages and 1, i.e. m=n+1; that is, when the parallel stages and the series stages are arranged, the number of the parallel stages is set to be 1 more than the number of the series stages, for example, the number of the series stages is 4, and the number of the parallel stages is 5; thus, the out-of-band rejection of the filter can be improved while meeting the design requirements of the filter.

The number of series stages may be even or odd, and thus, in some embodiments, the number of parallel stages may be determined according to the number of series stages required in the actual design, so that the parallel stages are arranged as two combined parallel stages.

In one example, the series leg 04 includes an even number of series stages; the number of parallel stages in the first combined parallel stage 071 is half the number of series stages, and parallel stages other than the first combined parallel stage 071 are combined to form the second combined parallel stage 072.

By the above described embodiment and by connecting the combined arrangement such that the sum of the number of parallel stages in the first combined parallel stage 071 and the number of parallel stages in the second combined parallel stage 072 is equal to the total number of parallel stages in the parallel branch 05; thereby ensuring that the parallel stage on the parallel branch 05 can be divided into two parts, forming two combined parallel stages, respectively, for the filter to have an optimal out-of-band rejection effect.

For ease of understanding, the number n of series stages is illustrated as 4.

In the topology structure of the filter provided by the embodiment of the invention, the number m of parallel stages is set to be larger than the number n of series stages; thus, when the number n of series stages is an even number, for example 4 (series stages 041, 042, 043, 044 as shown in fig. 3), the number m of parallel stages may be 5, 6, etc. greater than the number of series stages. Here, the number m of parallel stages is 5 as an example; the topology of the filter shown in fig. 3 can be continued.

Based on dividing the parallel stages into 2 parts, an arrangement of 2 combined parallel stages is formed, that is, when 5 parallel stages are divided to obtain 2 combined parallel stages, the number of parallel stages in the first combined parallel stage 071 may be 4/2=2, and the number of parallel stages in the second combined parallel stage 072 may be 5-2=3.

The location of the parallel stages contained in each combined parallel stage may be determined according to actual design requirements. For convenience of description, each parallel stage is named a parallel stage 051, a parallel stage 052, a parallel stage 053, a parallel stage 054, and a parallel stage 055 in order from the input port 01 to the output port 02, as shown in fig. 3.

When the number of parallel stages in one of the combined parallel stages is 3, then the 3 parallel stages may be parallel stage 053, parallel stage 054, parallel stage 055; accordingly, in a combined parallel stage comprising 2 parallel stages, the parallel stages may be parallel stage 051 and parallel stage 052.

Alternatively, when the number of parallel stages in one of the combined parallel stages is 3, then the 3 parallel stages may be parallel stage 052, parallel stage 053, parallel stage 055; accordingly, in a combined parallel stage comprising 2 parallel stages, the parallel stages may be parallel stage 051 and parallel stage 054.

That is, the number of parallel stages included in the first combined parallel stage 071 and the second combined parallel stage 072 is sufficient, and the number is required when setting is performed according to the number of series stages. There is no limitation as to whether the specific selected positions of the parallel stages in each combined parallel stage 07 are consecutive or are spaced apart.

For example, the configuration shown in fig. 3 may be one implementation of dividing the 5 parallel stages in sequence in the direction from the input port 01 to the output port 02, so that the

parallel stages

051, 052 form a first combined parallel stage 071, and the

parallel stages

053, 054, 055 form a second combined parallel stage 072; the parallel stages are combined according to adjacent positions, so that actual operation can be facilitated, and manufacturing difficulty is reduced.

In other embodiments, the topology of the filter provided by the embodiments of the present invention, the serial branch 04 may include an odd number of serial stages; the number of parallel stages in the first combined parallel stage 071 is half the sum of the number of series stages and a first threshold value, and parallel stages other than the first combined parallel stage 071 are combined to form the second combined parallel stage 072.

In order to ensure that the topology of the filter provided by the embodiment of the present invention can achieve an optimal out-of-band rejection effect, when the number of series stages is odd (n is odd), when the parallel stages are divided into two groups of combined parallel stages, the sum of the number of parallel stages in the first combined parallel stage 071 and the number of parallel stages in the second combined parallel stage 072 is equal to the total number of parallel stages in the parallel branch 05.

In the embodiment of the invention, in order to improve the out-of-band rejection effect of the filter, the number of parallel stages is set to be larger than the number of series stages (m > n); therefore, when the number of the series stages is odd, in order to be able to facilitate dividing the number of parallel stages included in the combined parallel stage, the number of series stages may be made even-type by calculation of the series stages with the first threshold value.

For ease of understanding, the first threshold value is 1, for example, with the number n of series stages being 3 (series stages 041, 042, 043 shown in fig. 4). The number of parallel stages is greater than the number of series stages, and may be, for example, 4, 5, 6, etc.; here, the number m of parallel stages is 4 as an example.

When the 4 parallel stages are divided to obtain 2 combined parallel stages, the number of parallel stages in the first combined parallel stage 071 may be (3+1)/2=2, and the number of parallel stages in the second combined parallel stage 072 may be 4-2=2.

The location of the parallel stages contained in each combined parallel stage may be determined according to actual design requirements. For convenience of description, description will be continued with the respective parallel stages being sequentially named as parallel stage 051, parallel stage 052, parallel stage 053, and parallel stage 054 in a direction from input port 01 to output port 02.

When the number of parallel stages in one of the combined parallel stages is 2, then the 2 parallel stages may be parallel stage 051, parallel stage 052; accordingly, among the combined parallel stages including the remaining 2 parallel stages, the parallel stages may be the parallel stage 053 and the parallel stage 054.

Alternatively, when the number of parallel stages in one of the combined parallel stages is 2, then the 2 parallel stages may be parallel stage 052, parallel stage 053; correspondingly, among the combined parallel stages comprising the remaining 2 parallel stages, the parallel stages may be parallel stage 051 and parallel stage 054.

As long as the number of parallel stages determined according to the number of series stages in each combined parallel stage can be satisfied, it is not limited whether specific positions of parallel stages in each combined parallel stage are adjacent or spaced.

For example, the configuration shown in fig. 4 may be one implementation of dividing the 4 parallel stages in sequence in the direction from the input port 01 to the output port 02, such that the

parallel stages

051 and 052 form a first combined parallel stage 071, and the

parallel stages

053 and 054 form a second combined parallel stage 072; and each combined parallel stage is obtained according to the adjacent combination mode of the parallel stage positions, so that the actual process manufacturing can be facilitated, and the manufacturing difficulty is reduced.

In the filter provided by the embodiment of the invention, the number of the parallel stages is set to be larger than the number of the series stages by changing the topological structure of the basic filter, so that the out-of-band suppression effect of the filter is improved; the parallel stages are combined at the same time, so that the parallel branch 05 comprises at least one or more combined parallel stages 07; therefore, the use quantity of the grounding sense 06 can be reduced, the quality factor of the grounding sense 06 is improved, and the insertion loss of the filter is improved; on the other hand, the parallel stages are combined, so that the parallel branch 05 comprises at least one or a plurality of combined parallel stages 07, thereby increasing the formation of transmission zero points in the filter and achieving the effect of improving the out-of-band rejection of the filter.

Based on the foregoing, in order to enable the filter to have an optimal out-of-band rejection effect, in the topology structure of the filter provided by the embodiment of the present invention, a setting manner in which the parallel branch 05 includes 2 combined parallel stages 07 is preferably adopted. Therefore, in one implementation manner, the filter provided by the embodiment of the present invention may further include: input port 01, output port 02, inductance to ground 06; the topology of the filter comprises a series branch 04 and a parallel branch 05; the input port 01 is connected to one end of the serial branch 04, the output port 02 is connected to the other end of the serial branch 04, and one end of the inductance 06 is connected to a second end of the parallel stage in the combined parallel stage 07 of the parallel branch 05.

By using an arrangement in which the parallel branch 05 comprises 2 sets of combined parallel stages 07, the out-of-band rejection of the boost filter can be maximized.

On the basis of adopting the topological structure of the filters of the 2 combined parallel stages 07 to realize the optimal out-of-band suppression effect of the filters, the out-of-band suppression effect of the filters is further improved so as to improve the filtering performance of the filters; the filter provided by the embodiment of the invention is newly added with an inductance element.

Optionally, in the filter provided by the embodiment of the present invention, the combined parallel stage 07 may include a first combined parallel stage 071 and a second combined parallel stage 072, and the filter may further include:

a first branch inductance 10, one end of the first branch inductance 10 is connected with a second end of the parallel stage in the first combined parallel stage 071, and the other end of the first branch inductance 01 is connected with a ground inductance 06 connected with the first combined parallel stage 071;

and one end of the second branch inductor 11 is connected with the second end of the parallel stage in the second combined parallel stage 072, and the other end of the second branch inductor 11 is connected with the grounding inductor 06 connected with the second combined parallel stage 072.

In order to facilitate understanding of the structure of the filter provided in the above embodiment of the present invention, please refer to fig. 5 and 6, fig. 5 is a schematic diagram of a first structure of the filter provided in the embodiment of the present invention, and fig. 6 is a schematic diagram of a second structure of the filter provided in the embodiment of the present invention.

Since the number of the series stages 041 to 04n in the topology of the filter includes two types, i.e., odd and even, the filter formed based on the topology of the filter provided by the embodiment of the present invention also includes different structural arrangements of the two types.

When the number of series stages in the topology of the filter is even (n is even), please refer to the structure shown in fig. 5.

Continuing to make the number n of the series-connected stages 4 and the number m of the parallel-connected stages 5; in the direction from the input port 01 to the output port 02, 5 parallel stages are named parallel stage 051, parallel stage 052, parallel stage 053, parallel stage 054, and parallel stage 055 in this order.

As shown in fig. 5, when the parallel stages in the first combined parallel stage 071 are the

parallel stages

051, 052; when the parallel stages in the second combined parallel stage 072 are parallel stage 053, parallel stage 054, and parallel stage 055; one end of the first branch inductance 10 may be connected to the second end of the parallel stage 052 in the first combined parallel stage 071, and the other end is connected to the inductance to ground (first inductance to ground 061) connected to the first combined parallel stage 071; of course, one end of the first shunt inductor 10 may also be connected to the second end of the parallel stage 051; i.e. on the leg where either of the parallel stage 051 and the parallel stage 052 is located.

With continued reference to fig. 5, one end of the second shunt inductor 11 may be connected to the second end of the parallel stage 055 in the second combined parallel stage 072, and the other end is connected to the inductance to ground (the second inductance to ground 062) connected to the second combined parallel stage 072; of course, one end of the second shunt inductor 11 may be connected to the second end of the parallel stage 053 or the parallel stage 054, that is, may be disposed on a shunt where any one of the parallel stage 053, the parallel stage 054, and the parallel stage 055 is located.

When the number n of the series stages in the topology of the filter is an odd number, please refer to the structure shown in fig. 6.

Continuing to use the number n of the series-connected stages as 3, and the number m of the parallel-connected stages 051 as 4; the 4 parallel stages are designated as parallel stage 051, parallel stage 052, parallel stage 053, and parallel stage 054 in this order, as an example, in the direction from input port 01 to output port 02.

As shown in fig. 6, when the parallel stages in the first combined parallel stage 071 are the

parallel stages

051, 052; when the parallel stages in the second combined parallel stage 072 are

parallel stages

053 and 054; one end of the first branch inductance 10 may be connected to the second end of the parallel stage 052 in the first combined parallel stage 071, and the other end is connected to the inductance to ground (first inductance to ground 061) connected to the first combined parallel stage 071; of course, one end of the first shunt inductor 10 may also be connected to the second end of the parallel stage 051; i.e. on the leg where either of the parallel stage 051 and the parallel stage 052 is located.

With continued reference to fig. 6, one end of the second shunt inductor 11 may be connected to the second end of the parallel stage 054 in the second combined parallel stage 072, and the other end is connected to the inductance to ground (the second inductance to ground 062) connected to the second combined parallel stage 072; of course, one end of the second shunt inductor 11 may be connected to the second end of the parallel stage 053, that is, may be disposed on any branch of the parallel stage 053 and the parallel stage 054.

By adding inductive elements in the combined parallel stage 07, the number of LC circuits in the circuit structure of the filter is increased; the LC circuit can form a low-impedance bypass for the unnecessary interference signal frequency, takes the interference signal frequency in the input power supply signal as a filtering object, and prevents the interference signal frequency from returning to the power supply; the addition of inductive elements in the combined parallel stage 07 to form an LC circuit can thus promote out-of-band rejection of the filter.

In another embodiment, to improve the out-of-band rejection effect of the filter, an LC circuit is added to an internal transmission circuit of the filter, and the filter provided by the embodiment of the present invention may further include: the common ground inductance 20 is commonly connected to the ground inductance connected to each combined parallel stage 07.

In the above-mentioned topology structure of the filter adopting 2 combined parallel stages 07, in order to achieve the optimal out-of-band suppression effect of the filter, in order to achieve the improvement of the out-of-band suppression effect, in the filter provided by the embodiment of the present invention, the formation of LC circuits in the internal circuit of the filter may be further increased by adding the common ground inductance 20 to the ground inductance connected to the 2 combined parallel stages 07, so as to achieve the purpose of improving the out-of-band suppression effect of the filter.

The arrangement of adding the common inductance 20 may be shown in fig. 7 and 8, where fig. 7 is a third schematic diagram of the filter according to the embodiment of the present invention, and fig. 8 is a fourth schematic diagram of the filter according to the embodiment of the present invention.

The third structure of the filter shown in fig. 7 is a layout corresponding to the case where an even number of stages are connected in series in the topology of the filter.

For convenience of explanation, the number n of the series stages is 4, and the number m of the parallel stages is 5; in the direction from the input port 01 to the output port 02, 5 parallel stages are named parallel stage 051, parallel stage 052, parallel stage 053, parallel stage 054, and parallel stage 055 in this order.

As shown in fig. 7, the first combined parallel stage 071 includes

parallel stages

051 and 052, and the second combined parallel stage 072 includes

parallel stages

053, 054, and 055; combining the first pair of ground senses 061 of the first combined parallel stage 071 and the second pair of ground senses 062 connected to the second combined parallel stage 072, so that the combined ground senses connected to each combined parallel stage 07 may be connected to one end of the common ground sense 20, so that an LC circuit is formed between the common ground sense 20 and the combined first pair of ground senses 061 and second pair of ground senses 062; and the out-of-band rejection effect of the filter is improved.

The third configuration of the filter shown in fig. 8 is a configuration corresponding to the case where an odd number of series stages are used in the topology of the filter.

For convenience of explanation, continuing to use the number n of the series-connected stages as 3, and the number m of the parallel-connected stages as 4; in the direction from the input port 01 to the output port 02, 5 parallel stages are named parallel stage 051, parallel stage 052, parallel stage 053, and parallel stage 054 in this order.

As shown, the first combined parallel stage 071 includes

parallel stages

051 and 052, and the second combined parallel stage 072 includes

parallel stages

053 and 054; combining the first pair of ground inductances 061 of the first combined parallel stage 071 and the second pair of ground inductances 062 connected with the second combined parallel stage 072, so that the combined ground inductances are connected with one end of the common ground inductance 20, and an LC circuit is formed between the common ground inductances 20 and the ground inductances connected with the combined parallel stage 07; and the out-of-band rejection effect of the filter is improved.

In other embodiments, the capacitor element can be directly added to connect with an inductance element in the topological structure of the filter, namely, the inductance element is connected with the ground inductance element to form an LC circuit, so that the out-of-band rejection effect of the filter is improved.

Optionally, please refer to fig. 9-12, fig. 9 is a fifth structural diagram of the filter according to the embodiment of the present invention, fig. 10 is a sixth structural diagram of the filter according to the embodiment of the present invention, fig. 11 is a seventh structural diagram of the filter according to the embodiment of the present invention, and fig. 12 is an eighth structural diagram of the filter according to the embodiment of the present invention.

As shown in the drawing, the filter provided by the embodiment of the present invention may further include:

a first capacitor 30, one end of the first capacitor 30 is connected to the input port 01, and the other end of the first capacitor 30 is connected to a ground inductance which is not nearest to the input port 01;

or, one end of the first capacitor 30 is connected to the output port 02, and the other end of the first capacitor 30 is connected to the inductance to ground which is not closest to the output port 02.

Fig. 9 and 11 show the topology of the filter, in which the first capacitor 30 is arranged when the number of series stages is an even number; fig. 10 and 12 show the arrangement of the first capacitor 30 when the number of series stages is an odd number in the topology of the filter.

The non-nearest means that, in the topology of the filter, the one farthest from the input port 01 or the output port 02 has the inductance to ground. When it is selected to connect one end of the first capacitor 30 to the input port 01, as shown in fig. 9, for example, the second pair of ground senses 062 to which the second combined parallel stage 072 is connected is the non-nearest pair of ground senses. When one end of the first capacitor 30 is connected to the output port 02 as shown in fig. 11, the first pair of ground senses 071 to which the first combined parallel stage 071 is connected is the non-nearest pair of ground senses.

By directly setting the first capacitor 30, the topology of the filter does not need to be adjusted again, so that the operation is convenient.

To facilitate formation of transmission zeros in the transmission circuit of the filter, the number of LC circuits may be increased, for example, a manner of increasing a plurality of capacitances to form a plurality of LC circuits may be selected. Optionally, the filter provided by the embodiment of the present invention may further include:

On the basis of adding a first capacitor 30 to form an LC circuit, a second capacitor may be further added between the other inductor to ground and the input port 01 or the output port 02, so as to increase the number of LC circuits formed, thereby quickly forming a transmission zero point in the transmission circuit of the filter and improving the out-of-band rejection effect of the filter.

When the first capacitor is arranged between the input port 01 and the ground inductance which is not nearest to the input port 01, the second capacitor can be arranged between the output port 02 and the ground inductance which is not nearest to the output port 02; alternatively, when the first capacitance is disposed between the output port 02 and the ground inductance that is not closest to the output port, the second capacitance may be disposed between the input port 01 and the ground inductance that is not closest to the input port 01.

Based on the background content of the filter, it can be known that the factors affecting the performance of the filter also comprise a performance index of return loss; return loss is used to represent signal reflection performance. The return loss indicates that a portion of the incident power of the signal is reflected back to the signal source. For example, if a signal of 1 megawatt mW (0 dBm) is injected into a circuit device such as an amplifier, 10% of the signal power is reflected back and the return loss is-10 decibels (dB). Return loss will introduce fluctuations in the signal, the more signals that are returned, the fewer signals that are transmitted, and the returned signals have adverse effects on the stability and interference of the overall system. Therefore, the larger the return loss, the less the returned signal, thus indicating that the better the performance of the filter, and the performance of the whole system is improved when the system is applied.

It can be seen that the size of the return loss has a significant impact on the use of the filter. Therefore, in one embodiment, in order to improve the callback loss of the filter, the filter provided by the embodiment of the present invention may further include:

an input matching network 40 disposed on one side of the input port 01;

an output matching network 41 provided on one side of the output port 02;

the inductance of the input matching network 40 and the inductance of the output matching network 41 satisfy a matching rule.

The input matching network 40 and the output matching network 41 comprise inductors in series and/or parallel structures; since return loss is the decibel (dB) number of the ratio of the input power of the signal to the reflected power of the signal at either input port 01 or output port 02; is the reflection of the circuit due to impedance mismatch, which is a reflection of the wire itself. The circuit impedance mismatch mainly occurs at the input port 01 and the output port 02, so the filter provided by the embodiment of the invention adds the matching networks (the input matching network 40 and the output matching network 41) at the input port 01 and the output port 02.

Referring to fig. 13 and 14 for the structure of the filter according to the above embodiment, fig. 13 is a schematic diagram of a ninth structure of the filter according to the embodiment of the invention, and fig. 14 is a schematic diagram of a tenth structure of the filter according to the embodiment of the invention.

The structure shown in fig. 13 is a schematic diagram of a filter topology including an even number of series stages. The structure shown in fig. 14 is a schematic diagram of a filter topology including an odd number of series stages. It can be seen that by providing the input matching network 40 and the output matching network 41 at the input port 01 and the output port 02, the impedance of the input port 01 and the output port 02 is changed through the adjustment of inductance values in the input matching network 40 and the output matching network 41, and when the inductances of the input matching network 40 and the output matching network 41 satisfy the matching principle, the reflection generated by the impedance mismatch is reduced, thereby improving the return loss of the filter.

Since inductance values in the input matching network 40 and the output matching network 41 can be adjusted, in one embodiment, to ensure optimal return loss of the filter, the inductance values of the filter are calculated byThe matching principle corresponds to the range of 0.005-0.04Hz ² * H.times.F or 0.01-0.08Hz ² * H x F; where Hz represents the unit hertz of frequency, H represents the unit henry of inductance, and F represents the unit farad of capacitance.

The range is a range corresponding to when the return loss caused by adjusting inductance values in the input matching network 40 and the output matching network 41 is in an optimal effect.

To facilitate understanding the influence of inductance values of the input matching network 40 and the output matching network 41 on return loss, the range to which the matching principle corresponds is determined. With reference to the structure shown in fig. 13, the description will be given by taking the

parallel stages

051, 052, 053, 054 and 055 as examples, where the 4 series stages are the series stage 041, the series stage 042, the series stage 043, the series stage 044 and the 5 parallel stages in the direction from the input port 01 to the output port 02.

It can be seen that the present invention is provided with an input matching network 40 (matching netwo rk) at input port 01 and an output matching network 41 at output port 02. For the input matching network 40, inductance in the input matching network 40 is denoted by L1, equivalent capacitance of the parallel stage 1 closest to the input port 01 is denoted by C1, and equivalent capacitance of the series stage 1 closest to the input port 01 (each series stage is sequentially a series stage 041, a series stage 042, a series stage 043, and a series stage 044 in the direction from the input port 01 to the output port 02) is denoted by C2. For the output matching network 41, the inductance value in the output matching network 41 is represented by L2, the equivalent capacitance of the parallel stage 055 closest to the output port 02 is represented by C3, and the equivalent capacitance of the series stage 044 closest to the output port 02 is represented by C4; when the value range of F2L 1C 1 is 0.005-0.04 and/or the value range of F2L 2C 3 is 0.005-0.04, the filter has better return loss; or the value of F2L 1 (C1+C2) is between 0.01 and 0.08 and/or the value of F2L 2 (C3+C4) is between 0.01 and 0.08, and the return loss is better.

Where F1 and F2 are the center frequencies of the filter pass bands.

In one embodiment, the return loss of the filter is better when the frequency of at least one of the combined parallel stages 07 is the same as or similar to the frequency of one of the combined parallel stages 07; wherein, the frequency approximation is defined as the frequency difference between two parallel stages being less than or equal to 10MHz.

Taking the configuration shown in fig. 13 as an example, each parallel stage is named parallel stage 051, parallel stage 052, parallel stage 053, parallel stage 054, and parallel stage 055 in this order in the direction from input port 01 to output port 02.

The return loss of the filter is better when the frequency of the parallel stage 051 in the first combined parallel stage 071 is the same as or similar to the frequency of the parallel stage 055 in the second combined parallel stage 072.

For an illustration of the performance of the filter provided by the embodiment of the present invention, please refer to fig. 15 and 16, fig. 15 is a schematic diagram of the comparison of the out-of-band rejection of the filter and the basic filter provided by the embodiment of the present invention, and fig. 16 is a schematic diagram of the comparison of the return loss of the filter and the basic filter provided by the embodiment of the present invention.

The L1 curve shown in fig. 15 represents the out-of-band rejection of the fundamental filter; the L2 curve represents the out-of-band rejection of the filter provided by embodiments of the present invention; the curve structure shown in the figure, which is obviously concave, represents a transmission zero point, the abscissa represents frequency, and the ordinate represents the absolute value of the decibel attenuation.

It can be seen that, in the filter provided by the embodiment of the invention, the number of parallel stages is increased, so that the number of parallel stages is larger than that of serial stages, and meanwhile, the connection mode of the parallel stages is changed, so that the number of LC circuits can be increased to generate transmission zero points; the transmission zero is positively correlated with the out-of-band rejection, and therefore, an increase in the transmission zero can promote the out-of-band rejection of the filter.

The S1 curve shown in fig. 16 represents the return loss of the basic filter; s2 curve represents return loss of the filter provided by the embodiment of the invention; the abscissa represents frequency, and the ordinate represents the input reflection coefficient (negative number) of return loss.

An input reflection coefficient (S11), i.e. input return loss, typically S11 less than-10 dB indicates better return loss.

As shown in fig. 16, it can be seen that, in the filter provided by the embodiment of the present invention, the input reflection coefficient is smaller than-10 dB compared with the input reflection coefficient of the basic filter, so that the return loss of the filter provided by the embodiment of the present invention is better.

The embodiment of the invention also provides communication equipment, which comprises the filter in the previous embodiment.

The foregoing describes several embodiments of the present invention, and the various alternatives presented by the various embodiments may be combined, cross-referenced, with each other without conflict, extending beyond what is possible embodiments, all of which are considered to be embodiments of the present invention disclosed and disclosed.

Although the embodiments of the present invention are disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims

1. A topology of a filter, comprising:

a series branch comprising a plurality of series stages;

2. The filter topology of claim 1, wherein said combined parallel stage comprises a first combined parallel stage and a second combined parallel stage, a second end of the parallel stage in said first combined parallel stage being connected to a common first pair of ground inductances, and a second end of the parallel stage in said second combined parallel stage being connected to a common second pair of ground inductances.

3. The filter topology of claim 2, wherein said series branch comprises an even number of series stages; the number of parallel stages in the first combined parallel stage is half of the number of serial stages, and parallel stages other than the first combined parallel stage are combined to form the second combined parallel stage.

4. The filter topology of claim 2, wherein said series branch comprises an odd number of series stages; the number of parallel stages in the first combined parallel stage is half of the sum of the number of series stages and a first threshold value, and parallel stages other than the first combined parallel stage are combined to form the second combined parallel stage.

5. The filter topology of any of claims 1-4, wherein the number of parallel stages is a sum of the number of series stages and 1.

6. A filter, comprising: a topology of a filter as recited in any one of claims 1-5.

7. The filter of claim 6, further comprising: an input port, an output port and a ground inductance; the topological structure of the filter comprises a serial branch and a parallel branch; the input port is connected with one end of the series branch, the output port is connected with the other end of the series branch, and one end of the grounding inductor is connected with a second end of the parallel stage in the combined parallel stage of the parallel branch.

8. The filter of claim 7, wherein the combined parallel stage comprises a first combined parallel stage and a second combined parallel stage, the filter further comprising:

9. The filter of claim 7, further comprising:

10. The filter of claim 7, further comprising:

11. The filter of claim 10, further comprising:

12. The filter of claim 7, further comprising:

the input matching network is arranged at one side of the output port;

the output matching network is arranged at one side of the input port;

13. The filter of claim 12, wherein the matching principle corresponds to a range of 0.005-0.04Hz ² * H.times.F or 0.01-0.08Hz ² * H x F; where Hz represents the frequency in hertz, H represents the inductance in henry, and F represents the capacitance in law.

14. A communication device comprising a filter according to any of claims 6-13.