CN116316492A - Real-time digital overcurrent protection method and system for precise source meter - Google Patents
Real-time digital overcurrent protection method and system for precise source meter Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/20—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
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Abstract
The invention belongs to the technical field of electronic measuring instruments, and particularly relates to a real-time digital overcurrent protection method and system for a precise source meter, wherein the real-time digital overcurrent protection method for the precise source meter comprises the following steps: acquiring an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value; calculating the deviation value of the output voltage set value and the voltage measured value, and the deviation value of the current limiting protection set value and the current measured value; calculating a voltage control increment and a current control increment, and comparing the voltage control increment with the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection; the invention can automatically change into the constant current source and take the protection current as output when the working current exceeds the protection current during constant voltage output of the precise source meter, can set the protection current at will during constant voltage output of the precise source meter, can quickly respond and restrain current overshoot when overcurrent protection occurs, and plays a role in protecting the tested device.
Description
Technical Field
The invention belongs to the technical field of electronic measuring instruments, and particularly relates to a real-time digital overcurrent protection method and system for a precise source meter.
Background
For precision source meters, protection techniques are necessary to prevent damage to the instrument or the part being measured due to excessive transient voltages or currents. The prior art is realized by adopting a comparator or an integrated operational amplifier on an analog circuit, and has the advantages of better real-time performance, lower controllable precision, easy occurrence of repeated jump near a protection critical point and lower stability.
With the rapid development of integrated circuit technology, high-speed digital signal processing and real-time control technology based on FPGA is widely applied in various fields, and particularly has remarkable advantages for application scenes pursuing high precision or high resolution.
Therefore, there is a need to develop a new real-time digital over-current protection method and system for a precision source table to solve the above-mentioned problems.
Disclosure of Invention
The invention aims to provide a real-time digital overcurrent protection method and system for a precise source meter.
In order to solve the technical problem, the present invention provides a real-time digital overcurrent protection method for a precision source table, which includes: acquiring an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value; calculating the deviation value of the output voltage set value and the voltage measured value according to the output voltage set value and the voltage measured value, and calculating the deviation value of the current limiting protection set value and the current measured value according to the current limiting protection set value and the current measured value; respectively calculating a voltage control increment and a current control increment according to the deviation value of the voltage set value and the voltage measured value and the deviation value of the current limiting protection set value and the current measured value; comparing the voltage control increment and the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection.
Further, the output voltage is set to V set Voltage measurement V measured at ADC_V terminal meas Current limiting protection set point I lim Current measurement I measured at ADC_I end meas Subtractor fed into FPGA device and with output voltage set value V in discrete time domain n time set [n]Measurement of ADC_V endIs V meas [n]The current-limiting protection set value is I lim [n]The measured value of the current measured by the ADC_I end is I meas [n]The method comprises the steps of carrying out a first treatment on the surface of the Subtracting the set value of the output voltage and the deviation value err of the measured value of the voltage by a subtracter in the FPGA device v [n]Deviation err between current limiting protection set value and current measured value i [n]。
Further, err v [n]＝V set [n]-V meas [n]；err i [n]＝I lim [n]-I meas [n]。
Further, the deviation err between the output voltage set value and the voltage measured value v [n]Integral coefficient K of constant voltage output negative feedback control loop v Deviation err of current limit protection set point and current measured value i [n]Integral coefficient K of constant-current output negative feedback control loop i A multiplier fed into the FPGA device; the voltage control increment delta u is obtained after multiplication operation is carried out by a multiplier in the FPGA device v [n]Current control increment deltau i [n]。
Further, deltau v [n]＝K v ·err v [n]；Δu i [n]＝K i ·err i [n]。
Further, the voltage is controlled by delta u v [n]Current control increment deltau i [n]Feeding into a minimum comparator inside the FPGA device to compare the minimum value U [ n ] of the two]And outputting the constant voltage output to a PID controller until the DAC is driven to perform constant voltage output and current limiting protection.
Further, U [ n ]]＝MIN(Δu v [n]，Δu i [n])。
In another aspect, the present invention provides a real-time digital over-current protection system for a precision source meter, comprising: an FPGA device; the FPGA device is connected with the MCU of the precise source meter; the FPGA device acquires an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value; the FPGA device calculates the deviation value of the output voltage set value and the voltage measured value according to the output voltage set value and the voltage measured value, and calculates the deviation value of the current limiting protection set value and the current measured value according to the current limiting protection set value and the current measured value; the FPGA device calculates a voltage control increment and a current control increment according to the deviation value of the voltage set value and the voltage measured value and the deviation value of the current limiting protection set value and the current measured value; the FPGA device compares the voltage control increment with the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection.
Further, the output voltage is set to V set Voltage measurement V measured at ADC_V terminal meas Current limiting protection set point I lim Current measurement I measured at ADC_I end meas Subtractor fed into FPGA device and with output voltage set value V in discrete time domain n time set [n]The voltage measured value obtained by measuring the ADC_V end is V meas [n]The current-limiting protection set value is I lim [n]The measured value of the current measured by the ADC_I end is I meas [n]The method comprises the steps of carrying out a first treatment on the surface of the Subtracting the set value of the output voltage and the deviation value err of the measured value of the voltage by a subtracter in the FPGA device v [n]Deviation err between current limiting protection set value and current measured value i [n]The method comprises the steps of carrying out a first treatment on the surface of the Deviation err of the output voltage set point from the voltage measurement v [n]Integral coefficient K of constant voltage output negative feedback control loop v Deviation err of current limit protection set point and current measured value i [n]Integral coefficient K of constant-current output negative feedback control loop i A multiplier fed into the FPGA device; the voltage control increment delta u is obtained after multiplication operation is carried out by a multiplier in the FPGA device v [n]Current control increment deltau i [n]The method comprises the steps of carrying out a first treatment on the surface of the Increment delta u of voltage control v [n]Current control increment deltau i [n]Feeding into a minimum comparator inside the FPGA device to compare the minimum value U [ n ] of the two]And outputting the constant voltage output to a PID controller until the DAC is driven to perform constant voltage output and current limiting protection.
Further, err v [n]＝V set [n]-V meas [n]；err i [n]＝I lim [n]-I meas [n]；Δu v [n]＝K v ·err v [n]；Δu i [n]＝K i ·err i [n]；U[n]＝MIN(Δu v [n]，Δu i [n])。
The invention has the advantages that when the precision source meter outputs the constant voltage, the working current is automatically converted into the constant current source and the protection current is taken as output when the working current exceeds the protection current, the protection current can be set at will when the precision source meter outputs the constant voltage, the current overshoot can be responded and restrained quickly when the overcurrent protection occurs, and the protection function on the tested device is achieved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a real-time digital over-current protection method for a precision source table of the present invention;
fig. 2 is a circuit diagram of a real-time digital over-current protection system for a precision source meter of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
In this embodiment, as shown in fig. 1, the present embodiment provides a real-time digital overcurrent protection method for a precision source table, which includes: acquiring an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value; calculating the deviation value of the output voltage set value and the voltage measured value according to the output voltage set value and the voltage measured value, and calculating the deviation value of the current limiting protection set value and the current measured value according to the current limiting protection set value and the current measured value; respectively calculating a voltage control increment and a current control increment according to the deviation value of the voltage set value and the voltage measured value and the deviation value of the current limiting protection set value and the current measured value; comparing the voltage control increment and the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection.
In this embodiment, the core idea of this embodiment is to combine the digital voltage control loop and the current control loop through the comparator to form a competition mechanism, namely a so-called "double-loop competition", so that in a constant voltage output mode, when the measured current is about to exceed the protection current, the measured current is automatically converted into a constant current source, and the set protection current is used as the output current, thereby realizing the overcurrent protection with high real-time performance and high resolution.
In the embodiment, when the precision source meter outputs a constant voltage, the working current is automatically converted into the constant current source and the protection current is used as output when the working current exceeds the protection current, so that the protection current can be set arbitrarily when the precision source meter outputs the constant voltage, and the protection current can be responded quickly and the current overshoot can be restrained when the overcurrent protection occurs, thereby playing a role in protecting the tested device.
In the present embodiment, the output voltage is set to V set Voltage measurement V measured at ADC_V terminal meas Current limiting protection set point I lim Current measurement I measured at ADC_I end meas Subtractor fed into FPGA device and with output voltage set value V in discrete time domain n time set [n]The voltage measured value obtained by measuring the ADC_V end is V meas [n]The current-limiting protection set value is I lim [n]ADC_I end measurementThe measured value of the current obtained by the measuring method is I meas [n]The method comprises the steps of carrying out a first treatment on the surface of the Subtracting the set value of the output voltage and the deviation value err of the measured value of the voltage by a subtracter in the FPGA device v [n]Deviation err between current limiting protection set value and current measured value i [n]。
In this embodiment, err v ＝V set -V meas ，err i ＝I lim -I meas 。
In this embodiment, err v [n]＝V set [n]-V meas [n]；err i [n]＝I lim [n]-I meas [n]。
In the present embodiment, the output voltage set point V will be at the discrete time domain n time instant set [n]Voltage measurement V measured with ADC_V terminal meas [n]A subtracter which is sent into the FPGA device and performs subtraction operation to obtain a deviation value err of the set value of the output voltage and the measured value of the voltage v [n]The method comprises the steps of carrying out a first treatment on the surface of the Current limiting protection set point I to be at the same instant in discrete time domain n instant lim [n]Current measurement I measured from ADC_I end meas [n]A subtracter which is sent into the FPGA device and performs subtraction operation to obtain a deviation value err of the current limiting protection set value and the current measured value i [n]. Err is to v [n]And err i [n]As an input signal to the next stage circuit.
In the present embodiment, the deviation err between the output voltage set value and the voltage measured value v [n]Integral coefficient K of constant voltage output negative feedback control loop v Deviation err of current limit protection set point and current measured value i [n]Integral coefficient K of constant-current output negative feedback control loop i A multiplier fed into the FPGA device; the voltage control increment delta u is obtained after multiplication operation is carried out by a multiplier in the FPGA device v [n]Current control increment deltau i [n]。
In the present embodiment, deltau v [n]＝K v ·err v [n]；Δu i [n]＝K i ·err i [n]。
In the present embodiment, the output power obtained by the previous stage circuit is usedDeviation err of voltage set point from voltage measured value v [n]Integral coefficient K with constant voltage output negative feedback control loop v A multiplier fed into the FPGA device; at the same time, the deviation err of the current-limiting protection set value and the current measured value i [n]Integral coefficient K with constant current output negative feedback control loop i A multiplier fed into the FPGA device; two multipliers synchronously output voltage control increment delta u v [n]Current control increment deltau i [n]And serves as an input to the next stage of circuitry.
In the present embodiment, the voltage is controlled by an increment Deltau v [n]Current control increment deltau i [n]Feeding into a minimum comparator inside the FPGA device to compare the minimum value U [ n ] of the two]And outputting the constant voltage output to a PID controller until the DAC is driven to perform constant voltage output and current limiting protection.
In the present embodiment, U [ n ]]＝MIN(Δu v [n]，Δu i [n])。
In the present embodiment, the voltage control increment Deltau obtained by the previous stage circuit is used v [n]Current control increment deltau i [n]Sending the output signal to a minimum comparator, outputting the integral link of the PID controller of which the smaller one is sent to the next stage, writing the output code of the PID controller into the DAC, completing the 'double-loop competition' control, and realizing the current limiting protection at the same time of constant voltage output.
Example 2
On the basis of embodiment 1, as shown in fig. 1 to 2, the present embodiment provides a real-time digital overcurrent protection system for a precision source table, which includes: an FPGA device; the FPGA device is connected with the MCU of the precise source meter; the FPGA device acquires an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value; the FPGA device calculates the deviation value of the output voltage set value and the voltage measured value according to the output voltage set value and the voltage measured value, and calculates the deviation value of the current limiting protection set value and the current measured value according to the current limiting protection set value and the current measured value; the FPGA device calculates a voltage control increment and a current control increment according to the deviation value of the voltage set value and the voltage measured value and the deviation value of the current limiting protection set value and the current measured value; the FPGA device compares the voltage control increment with the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection.
In this embodiment, MIN represents a minimum comparator, PID Controller represents a PID negative feedback Controller, and DAC represents a digital-to-analog converter; ADC_V represents an analog-to-digital converter for voltage measurement; ADC_I represents an analog-to-digital converter for current measurement; LPF means a digital low pass filter for softening the step signal; AWG represents an arbitrary waveform generator; CIC represents the integrating comb filter.
In the present embodiment, the output voltage is set to V set Voltage measurement V measured at ADC_V terminal meas Current limiting protection set point I lim Current measurement I measured at ADC_I end meas Subtractor fed into FPGA device and with output voltage set value V in discrete time domain n time set [n]The voltage measured value obtained by measuring the ADC_V end is V meas [n]The current-limiting protection set value is I lim [n]The measured value of the current measured by the ADC_I end is I meas [n]The method comprises the steps of carrying out a first treatment on the surface of the Subtracting the set value of the output voltage and the deviation value err of the measured value of the voltage by a subtracter in the FPGA device v [n]Deviation err between current limiting protection set value and current measured value i [n]The method comprises the steps of carrying out a first treatment on the surface of the Deviation err of the output voltage set point from the voltage measurement v [n]Integral coefficient K of constant voltage output negative feedback control loop v Deviation err of current limit protection set point and current measured value i [n]Integral coefficient K of constant-current output negative feedback control loop i A multiplier fed into the FPGA device; the voltage control increment delta u is obtained after multiplication operation is carried out by a multiplier in the FPGA device v [n]Current control increment deltau i [n]The method comprises the steps of carrying out a first treatment on the surface of the Increment delta u of voltage control v [n]Current control increment deltau i [n]Feeding into a minimum comparator inside the FPGA device to compare the minimum value U [ n ] of the two]And outputting the constant voltage output to a PID controller until the DAC is driven to perform constant voltage output and current limiting protection.
In this embodiment, err v [n]＝V set [n]-V meas [n]；err i [n]＝I lim [n]-I meas [n]；Δu v [n]＝K v ·err v [n]；Δu i [n]＝K i ·err i [n]；U[n]＝MIN(Δu v [n]，Δu i [n])。
In summary, the invention can automatically change into the constant current source and take the protection current as output when the working current exceeds the protection current during constant voltage output of the precision source meter, can set the protection current at will during constant voltage output of the precision source meter, can quickly respond and restrain current overshoot when overcurrent protection occurs, and plays a role in protecting the tested device.
The components (components not illustrating specific structures) selected in the application are all common standard components or components known to those skilled in the art, and the structures and principles of the components are all known to those skilled in the art through technical manuals or through routine experimental methods.
In the description of embodiments of the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
With the above-described preferred embodiments according to the present invention as an illustration, the above-described descriptions can be used by persons skilled in the relevant art to make various changes and modifications without departing from the scope of the technical idea of the present invention. The technical scope of the present invention is not limited to the description, but must be determined according to the scope of claims.
Claims (10)
1. A real-time digital over-current protection method for a precision source meter, comprising:
acquiring an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value;
calculating the deviation value of the output voltage set value and the voltage measured value according to the output voltage set value and the voltage measured value, and calculating the deviation value of the current limiting protection set value and the current measured value according to the current limiting protection set value and the current measured value;
respectively calculating a voltage control increment and a current control increment according to the deviation value of the voltage set value and the voltage measured value and the deviation value of the current limiting protection set value and the current measured value;
comparing the voltage control increment and the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection.
2. The method for real-time digital over-current protection for a precision source meter as set forth in claim 1, wherein,
will output a voltage set point V set Voltage measurement V measured at adc_v terminal meas Current limiting protection set point I lim Current measurement I measured at ADC_I end meas Subtractor fed into FPGA device and with output voltage set value V in discrete time domain n time set [n]The voltage measured value obtained by measuring the ADC_V end is V meas [n]The current-limiting protection set value is I lim [n]The measured value of the current measured by the ADC_I end is I meas [n]；
Subtracting the set value of the output voltage and the deviation value err of the measured value of the voltage by a subtracter in the FPGA device v [n]Deviation err between current limiting protection set value and current measured value i [n]。
3. A real-time digital over-current protection method for precision source tables according to claim 2,
err v [n]＝V set [n]-V meas [n]；
err i [n]＝I lim [n]-I meas [n]。
4. a real-time digital over-current protection method for precision source tables according to claim 2,
setting the output voltageDeviation value err of value from voltage measurement v [n]Integral coefficient K of constant voltage output negative feedback control loop v Deviation err of current limit protection set point and current measured value i [n]Integral coefficient K of constant-current output negative feedback control loop i A multiplier fed into the FPGA device;
the voltage control increment delta u is obtained after multiplication operation is carried out by a multiplier in the FPGA device v [n]Current control increment deltau i [n]。
5. The method for real-time digital over-current protection for a precision source meter as set forth in claim 4, wherein,
Δu v [n]＝K v ·err v [n]；
Δu i [n]＝K i ·err i [n]。
6. the method for real-time digital over-current protection for a precision source meter as set forth in claim 4, wherein,
increment delta u of voltage control v [n]Current control increment deltau i [n]Feeding into a minimum comparator inside the FPGA device to compare the minimum value U [ n ] of the two]And outputting the constant voltage output to a PID controller until the DAC is driven to perform constant voltage output and current limiting protection.
7. The method for real-time digital over-current protection for a precision source meter as defined in claim 6,
U[n]＝MIN(Δu v [n]，Δu i [n])。
8. a real-time digital over-current protection system for a precision source meter, comprising:
an FPGA device; wherein the method comprises the steps of
The FPGA device is connected with an MCU of the precise source meter;
the FPGA device acquires an output voltage set value, a voltage measured value, a current limiting protection set value and a current measured value;
the FPGA device calculates the deviation value of the output voltage set value and the voltage measured value according to the output voltage set value and the voltage measured value, and calculates the deviation value of the current limiting protection set value and the current measured value according to the current limiting protection set value and the current measured value;
the FPGA device calculates a voltage control increment and a current control increment according to the deviation value of the voltage set value and the voltage measured value and the deviation value of the current limiting protection set value and the current measured value;
the FPGA device compares the voltage control increment with the current control increment to output the lowest value of the voltage control increment and the current control increment for constant voltage output and current limiting protection.
9. The real-time digital over-current protection system for a precision source meter as set forth in claim 8,
will output a voltage set point V set Voltage measurement V measured at ADC_V terminal meas Current limiting protection set point I lim Current measurement I measured at ADC_I end meas Subtractor fed into FPGA device and with output voltage set value V in discrete time domain n time set [n]The voltage measured value obtained by measuring the ADC_V end is V meas [n]The current-limiting protection set value is I lim [n]The measured value of the current measured by the ADC_I end is I meas [n]；
Subtracting the set value of the output voltage and the deviation value err of the measured value of the voltage by a subtracter in the FPGA device v [n]Deviation err between current limiting protection set value and current measured value i [n]；
Deviation err of the output voltage set point from the voltage measurement v [n]Integral coefficient K of constant voltage output negative feedback control loop v Deviation err of current limit protection set point and current measured value i [n]Integral coefficient K of constant-current output negative feedback control loop i A multiplier fed into the FPGA device;
the voltage control increment delta u is obtained after multiplication operation is carried out by a multiplier in the FPGA device v [n]Current control increment deltau i [n]；
Increment delta u of voltage control v [n]Current control increment deltau i [n]Feeding into a minimum comparator inside the FPGA device to compare the minimum value U [ n ] of the two]And outputting the constant voltage output to a PID controller until the DAC is driven to perform constant voltage output and current limiting protection.
10. The real-time digital over-current protection system for a precision source meter as set forth in claim 9,
err v [n]＝V set [n]-V meas [n]；
err i [n]＝I lim [n]-I meas [n]；
Δu v [n]＝K v ·err v [n]；
Δu i [n]＝K i ·err i [n]；
U[n]＝MIN(Δu v [n]，Δu i [n])。
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| US20150035510A1 (en) * | 2013-08-01 | 2015-02-05 | Rohm Co., Ltd. | Switching power supply control circuit |
| CN106451707A (en) * | 2016-07-04 | 2017-02-22 | 上海交通大学 | Constant-current and constant-voltage controlled charging circuit |
| CN107104593A (en) * | 2017-05-16 | 2017-08-29 | 湖南拓天节能控制技术股份有限公司 | The shared integral term PID double-closed-loop control devices of PWM count word power supply |
| CN112260544A (en) * | 2020-09-22 | 2021-01-22 | 易事特集团股份有限公司 | LLC resonant converter control method and control system thereof |
| CN112636597A (en) * | 2020-12-03 | 2021-04-09 | 成都芯源系统有限公司 | Power management circuit, integrated circuit and overcurrent protection method thereof |
-
2023
- 2023-02-13 CN CN202310106587.3A patent/CN116316492A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150035510A1 (en) * | 2013-08-01 | 2015-02-05 | Rohm Co., Ltd. | Switching power supply control circuit |
| CN106451707A (en) * | 2016-07-04 | 2017-02-22 | 上海交通大学 | Constant-current and constant-voltage controlled charging circuit |
| CN107104593A (en) * | 2017-05-16 | 2017-08-29 | 湖南拓天节能控制技术股份有限公司 | The shared integral term PID double-closed-loop control devices of PWM count word power supply |
| CN112260544A (en) * | 2020-09-22 | 2021-01-22 | 易事特集团股份有限公司 | LLC resonant converter control method and control system thereof |
| CN112636597A (en) * | 2020-12-03 | 2021-04-09 | 成都芯源系统有限公司 | Power management circuit, integrated circuit and overcurrent protection method thereof |
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