CN116314522A - LED chip and method for manufacturing LED chip - Google Patents

LED chip and method for manufacturing LED chip Download PDF

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Publication number
CN116314522A
CN116314522A CN202310316581.9A CN202310316581A CN116314522A CN 116314522 A CN116314522 A CN 116314522A CN 202310316581 A CN202310316581 A CN 202310316581A CN 116314522 A CN116314522 A CN 116314522A
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layer
type transmission
transmission unit
type
type semiconductor
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杨晓宇
马莉
卢长军
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Leyard Optoelectronic Co Ltd
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Leyard Optoelectronic Co Ltd
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Priority to CN202310316581.9A priority Critical patent/CN116314522A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses an LED chip and a method for preparing the LED chip. Wherein, this LED chip includes: the substrate, the protective layer, the active layer, the transmission unit that set gradually from bottom to top, wherein, the transmission unit includes p type transmission unit and n type transmission unit, p type transmission unit includes p type transmission layer and is located the first conducting layer of the one side that the active layer was kept away from to p type transmission layer, p type transmission layer passes through first conducting layer and is connected with first electrode electricity, n type transmission unit includes n type transmission layer and is located the second conducting layer of the one side that the active layer was kept away from to n type transmission layer, n type transmission layer passes through second conducting layer and is connected with the second electrode electricity.

Description

LED chip and method for manufacturing LED chip
Technical Field
The invention relates to the field of LED chips, in particular to an LED chip and a method for preparing the LED chip.
Background
At present, the application of the LED chip in production and life is more and more extensive, the area of the active layer of the LED chip is the light emitting area of the LED chip, so that the utilization rate of the active layer is crucial to the light emission of the LED chip, but the problem that the utilization rate of the active layer of the flip LED chip is lower exists in the related technology, so that the problem of improving the utilization rate of the active layer of the flip LED chip is a current problem.
In view of the above problems, no effective solution has been proposed at present.
Disclosure of Invention
The embodiment of the invention provides an LED chip and a method for preparing the LED chip, which at least solve the technical problem of low utilization rate of an active layer of a flip LED chip in the related art.
According to an aspect of an embodiment of the present invention, there is provided an LED chip including: the device comprises a substrate, a protective layer, an active layer and a transmission unit which are sequentially arranged from bottom to top, wherein the transmission unit comprises a p-type transmission unit and an n-type transmission unit, the p-type transmission unit comprises a p-type transmission layer and a first conductive layer which is positioned on one side of the p-type transmission layer far away from the active layer, the p-type transmission layer is electrically connected with a first electrode through the first conductive layer, the n-type transmission unit comprises an n-type transmission layer and a second conductive layer which is positioned on one side of the n-type transmission layer far away from the active layer, and the n-type transmission layer is electrically connected with a second electrode through the second conductive layer.
Optionally, the protective layer includes: the buffer layer is located between the insulating layer and the substrate, wherein the insulating layer is used for blocking carriers transmitted by the active layer from entering the buffer layer, the buffer layer is used for ensuring that a crystal lattice of the substrate is matched with that of an epitaxial structure, and the epitaxial structure comprises the protective layer, the active layer and the transmission unit.
Optionally, the p-type transmission units are plural, and the n-type transmission units are plural, wherein the plural p-type transmission units and the plural n-type transmission units are alternately arranged.
Alternatively, among the plurality of p-type transmission units and the plurality of n-type transmission units that are alternately arranged, two adjacent p-type transmission units share the n-type transmission unit therebetween, and two adjacent n-type transmission units share the p-type transmission unit therebetween.
Optionally, the first electrode is used for injecting holes, and the second electrode is used for injecting electrons.
Optionally, the active layer is a quantum well active layer.
Optionally, the protective layer includes a buffer layer, and a dielectric constant value of the buffer layer is determined according to a doping element of the buffer layer.
According to an aspect of an embodiment of the present invention, there is provided a method for manufacturing an LED chip, including: depositing a protective layer on the substrate; depositing an active layer on the protective layer; preparing a transmission unit on the active layer, wherein the transmission unit comprises a p-type transmission unit and an n-type transmission unit, the p-type transmission unit comprises a p-type transmission layer and a first conductive layer positioned on one side of the p-type transmission layer away from the active layer, and the n-type transmission unit comprises an n-type transmission layer and a second conductive layer positioned on one side of the n-type transmission layer away from the active layer; and preparing a first electrode on the first conductive layer, and preparing a second electrode on the second conductive layer to obtain the LED chip.
Optionally, the depositing a protective layer on the substrate includes: depositing a buffer layer on the substrate in the case where the protective layer includes the buffer layer and an insulating layer; and depositing the insulating layer on the buffer layer.
Optionally, the preparing a transmission unit on the active layer includes: depositing a p-type semiconductor layer on the active layer; depositing a first mask layer on the p-type semiconductor layer; etching the first mask layer and the p-type semiconductor layer to form a first groove, wherein the first groove extends downwards to the upper surface of the active layer, and a second mask layer and a p-type semiconductor intermediate layer are obtained; depositing a first n-type semiconductor layer on the second mask layer, and depositing a second n-type semiconductor layer on the exposed surface of the first groove on the active layer, wherein the second n-type semiconductor layer is connected with the p-type semiconductor interlayer; removing the second mask layer and the first n-type semiconductor layer; depositing a conductive layer on the second n-type semiconductor layer and the p-type semiconductor intermediate layer to obtain a transmission unit layer, wherein the transmission unit layer comprises the second n-type semiconductor layer, the p-type semiconductor intermediate layer and the conductive layer; and cutting the transmission unit layer at a position corresponding to the connection position of the second n-type semiconductor layer and the p-type semiconductor intermediate layer so as to separate the second n-type semiconductor layer from the p-type semiconductor intermediate layer, thereby obtaining the p-type transmission unit and the n-type transmission unit.
In the embodiment of the invention, an LED chip is provided, which comprises a substrate, a protective layer, an active layer and a transmission unit which are sequentially arranged from bottom to top, wherein the transmission unit comprises a p-type transmission unit and an n-type transmission unit, the p-type transmission unit is electrically connected with a first electrode through a corresponding first conductive layer, and the n-type transmission unit is electrically connected with a second electrode through a corresponding second conductive layer. The p-type transmission unit and the n-type transmission unit are both positioned on the active layer, the first electrode can be electrically connected with the p-type transmission layer through the first conductive layer in the p-type transmission unit, and the second electrode can be electrically connected with the n-type transmission layer through the second conductive layer in the n-type transmission unit, so that the electrode can be constructed without etching the active layer. Through the LED chip, the purpose that the luminous area of the LED chip is equal to the bottom area of the LED chip is achieved, so that the technical effect of improving the utilization rate of the active layer of the LED chip is achieved, and the technical problem that the utilization rate of the active layer of the flip LED chip is lower in the related technology is solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1 is a schematic diagram of an LED chip according to an embodiment of the invention;
fig. 2 is a flowchart of a method for fabricating an LED chip according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a process for fabricating an LED chip according to an alternative embodiment of the present invention;
fig. 4 is a schematic diagram of the working principle of an LED chip according to an alternative embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
According to an embodiment of the present invention, there is provided an embodiment of a Light Emitting Diode (LED) chip.
It should be noted that in the related art, the flip-chip LED chip is generally formed by sequentially depositing n-GaN, an active layer, and p-GaN on a substrate by layer-by-layer epitaxy, where n-GaN is n-type gallium nitride, i.e., a reasonable element doped in gallium nitride GaN such as Si, etc. to provide a higher electron concentration, and p-GaN is p-type gallium nitride, i.e., a reasonable element doped in gallium nitride GaN such as Mg, etc. to provide a higher hole concentration.
The bottom n-GaN is then exposed by etching to facilitate the subsequent deposition of the n-type electrode. Therefore, the flip-chip LED chip requires sacrificing the active layer area of the etched portion, which reduces the utilization of the active layer of the entire LED chip.
It should also be noted that the LED chip in the present application may be a flip-chip LED chip.
Fig. 1 is a schematic diagram of an LED chip according to an embodiment of the present invention, in fig. 1: 1. the LED chip comprises a substrate 1, a protective layer 2, an active layer 3 and a transmission unit 4 which are sequentially arranged from bottom to top, wherein the transmission unit 4 comprises a p-type transmission unit, the p-type transmission unit comprises a p-type transmission layer 5 and a first conductive layer 7 positioned on one side of the p-type transmission layer far away from the active layer, and an n-type transmission unit, the n-type transmission unit comprises an n-type transmission layer 6 and a second conductive layer 8,p positioned on one side of the n-type transmission layer far away from the active layer, the n-type transmission unit comprises an n-type transmission layer 6 and a second conductive layer 8,p which is electrically connected with the first electrode 9 through the corresponding first conductive layer 7, and the n-type transmission layer 6 is electrically connected with the second electrode 10 through the corresponding second conductive layer 8.
As an alternative embodiment, there is provided an LED chip including: the substrate, the protective layer, the active layer, the transmission unit that set gradually from bottom to top, wherein, the transmission unit includes p type transmission unit and n type transmission unit, p type transmission unit includes p type transmission layer and is located the first conducting layer of the one side that the active layer was kept away from to p type transmission layer, p type transmission layer passes through first conducting layer and is connected with first electrode electricity, n type transmission unit includes n type transmission layer and is located the second conducting layer of the one side that the active layer was kept away from to n type transmission layer, n type transmission layer passes through second conducting layer and is connected with the second electrode electricity.
In this embodiment, there is provided an LED chip, which includes a substrate, a protective layer, an active layer, and a transmission unit sequentially disposed from bottom to top, wherein the transmission unit includes a p-type transmission unit and an n-type transmission unit, the p-type transmission unit is electrically connected to a first electrode through a corresponding first conductive layer, and the n-type transmission unit is electrically connected to a second electrode through a corresponding second conductive layer. The p-type transmission unit and the n-type transmission unit are both positioned on the active layer, the first electrode can be electrically connected with the p-type transmission layer through the first conductive layer in the p-type transmission unit, and the second electrode can be electrically connected with the n-type transmission layer through the second conductive layer in the n-type transmission unit, so that the electrode can be constructed without etching the active layer. Through the LED chip, the purpose that the luminous area of the LED chip is equal to the bottom area of the LED chip is achieved, so that the technical effect of improving the utilization rate of the active layer of the LED chip is achieved, and the technical problem that the utilization rate of the active layer of the flip LED chip is lower in the related technology is solved. In the related art, the utilization rate of an active layer of the flip LED chip is low, wherein an LED is short for a light emitting diode.
It should be noted that the material of the substrate may be sapphire aluminum oxide Al 2 O 3 The material of the p-type transmission layer can be p-GaN, namely, the gallium nitride GaN is doped with reasonable elements such as magnesium Mg and the like which can provide higher hole concentration, and the material of the n-type transmission layer can be n-GaN, namely, the gallium nitride GaN is doped with reasonable elements such as silicon Si and the like which can provide higher electron concentration. The material of the first conductive layer can be transparent conductive electrode indium tin oxide ITO, fluorine F doped tin dioxide SnO 2 Conductive glass FTO, aluminum Al doped zinc oxide ZnO conductive glass AZO, other conductive materials may be selected, for example: high reflection metals such as nano silver wire, silver Ag, aluminum Al, etc. The material of the second conductive layer can be transparent conductive electrode indium tin oxide ITO, fluorine F doped tin dioxide SnO 2 Conductive glass FTO, aluminum Al doped zinc oxide ZnO conductive glass AZO, other conductive materials may be selected, for example: high reflection metals such as nano silver wire, silver Ag, aluminum Al, etc. The material of the first conductive layer and the material of the second conductive layer may be the same. The material of the first electrode can be metal, the material of the second electrode can be metal, and the material of the first electrode and the material of the second electrode can be the same. The p-type transmission layer and the n-type transmission layer are made of common gallium nitride GaN-based transmission layer materials of the LED chip, the deposition parameters are also conventional chip deposition parameters, and it should be noted that,the p-type transmission layer and the n-type transmission layer which are respectively deposited can be kept consistent, and uniform deposition of the conductive layer on the upper part of the transmission layer is facilitated.
As an alternative embodiment, the protective layer includes: the buffer layer is used for blocking carriers transmitted in the active layer from entering the buffer layer, the buffer layer is used for ensuring lattice matching of the substrate and the epitaxial structure, and the epitaxial structure comprises a protection layer, the active layer and a transmission unit.
In this embodiment, the material of the buffer layer may be selected from iii-v semiconductor materials including gallium nitride GaN, aluminum gallium nitride AlGaN, gallium arsenide GaAs, etc., or other high temperature resistant, lattice constant matched inorganic compound materials, where the buffer layer is used to ensure the lattice matching between the substrate and the lattice of the epitaxial structure, and the iii-v semiconductor material is a compound composed of a group iii a element and a group va element, where the group iii a element includes boron, aluminum, gallium, indium, thallium, and the group va element includes nitrogen, phosphorus, arsenic, antimony, and bismuth. The material of the insulating layer can be selected from III-V gallium nitride GaN-based or gallium arsenide GaAs-based wide band gap semiconductors or insulating materials. The band gap of the raw materials can be widened through doping or stress engineering, so that the valence band and conduction band of the insulating layer are deep enough, the energy band structures of the insulating layer and the active layer are greatly different, and the insulating layer is ensured to play a role of blocking carriers, wherein the carriers comprise electrons and holes. It is also noted that the lattice of the material of the insulating layer is required to meet the good epitaxial growth of the overlying active layer. In case the protective layer comprises a buffer layer, a better operation of the LED chip may be ensured by the lattice matching of the substrate of the LED chip and the lattice of the epitaxial layer. In the case where the protective layer includes an insulating layer, carriers can move only in the active layer on the upper portion of the insulating layer, and cannot enter the insulating layer and the lower portion of the insulating layer, and by this structure, sufficient utilization of carriers can be ensured.
As an alternative embodiment, the p-type transmission units are plural, and the n-type transmission units are plural, wherein the plural p-type transmission units and the plural n-type transmission units are alternately arranged.
In this embodiment, in the case where the p-type transmission unit and the n-type transmission unit are plural and the plural p-type transmission units and the plural n-type transmission units are alternately arranged, holes flowing through the p-type transmission unit into the active layer and electrons flowing through the n-type transmission unit into the active layer are distributed more uniformly in the active layer, and thus the positions where the electrons and holes combine in the active layer to form photons are also more uniform, so that the active layer emits light more uniformly, that is, the LED chip emits light more uniformly.
As an alternative embodiment, among the plurality of p-type transmission units and the plurality of n-type transmission units alternately arranged, two adjacent p-type transmission units share an n-type transmission unit in between, and two adjacent n-type transmission units share a p-type transmission unit in between.
In this embodiment, two adjacent p-type transmission units may share a middle n-type transmission unit, that is, electrons passing through the middle n-type transmission unit may combine with holes passing through the left p-type transmission unit to generate photons, and electrons passing through the middle n-type transmission unit may also combine with holes passing through the right p-type transmission unit to generate photons. Two adjacent n-type transmission units share an intermediate p-type transmission unit, that is, a hole passing through the intermediate p-type transmission unit may combine with an electron passing through the n-type transmission unit on the left side to generate a photon, and a hole passing through the intermediate p-type transmission unit may combine with an electron passing through the n-type transmission unit on the right side to generate a photon. Due to this property, each p-type transmission unit and each n-type transmission unit can be fully utilized, so that the active layer emits light more uniformly, i.e., the LED chip emits light more uniformly.
As an alternative embodiment, the first electrode is used for injecting holes and the second electrode is used for injecting electrons.
In this embodiment, due to the performance difference between the p-type transmission unit and the n-type transmission unit, the first electrode electrically connected to the p-type transmission unit is used for injecting holes, and the second electrode electrically connected to the n-type transmission unit is used for injecting electrons, by which it is ensured that holes and electrons are injected to the LED chip at the same time, so that the LED chip operates normally.
As an alternative embodiment, the active layer is a quantum well active layer.
In this embodiment, the quantum well is a potential well on a microscopic scale comparable to the de broglie wavelength of electrons, which is a potential well of electrons or holes with a pronounced quantum confinement effect formed by the alternating arrangement of two different semiconductor materials. The quantum well active layer has the advantages of small frequency, low threshold current, narrow spectral line width, high output power, high modulation speed, wide temperature application range and the like, so that when the active layer is the quantum well active layer, the performance of the LED chip is better.
As an alternative embodiment, the protective layer comprises a buffer layer, the dielectric constant value of which is determined in dependence on the doping element of the buffer layer.
In this embodiment, since the buffer layer is located on the light emitting surface of the LED chip, different elements may be doped in the buffer layer to adjust the optical dielectric constant of the buffer layer, so as to adjust the light coupling efficiency, and meanwhile, the buffer layer with different periodic structures (e.g., photonic crystal structures) may be grown to adjust the optical coupling condition. For example, the use of a porous GaN buffer layer will facilitate optical coupling efficiency and concentrated light extraction. The dielectric constant value of the buffer layer is determined according to the doping elements of the buffer layer, namely, the dielectric constant value of the buffer layer can be adjusted by doping different elements according to actual needs, so that the LED chip meets the actual needs more.
Example 2
According to an embodiment of the present invention, there is provided an embodiment of a method for manufacturing an LED chip, it being noted that the steps shown in the flowchart of the drawings may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is shown in the flowchart, in some cases the steps shown or described may be performed in an order different from that herein.
Fig. 2 is a flowchart of a method for manufacturing an LED chip according to an embodiment of the present invention, as shown in fig. 2, the method including the steps of:
step S202, depositing a protective layer on a substrate;
in the technical scheme provided in the step S202, the protective layer may enable the performance of the LED chip to be better.
Step S204, depositing an active layer on the protective layer;
in the technical scheme provided in the step S204, electrons and holes are combined in the active layer, so that photons can be obtained, and the LED chip emits light normally, and the active layer is an essential part of the LED chip.
Step S206, preparing a transmission unit on the active layer, wherein the transmission unit comprises a p-type transmission unit and an n-type transmission unit, the p-type transmission unit comprises a p-type transmission layer and a first conductive layer positioned on one side of the p-type transmission layer far away from the active layer, and the n-type transmission unit comprises an n-type transmission layer and a second conductive layer positioned on one side of the n-type transmission layer far away from the active layer;
in the technical scheme provided in the step S206, holes can enter the active layer through the p-type transmission unit, electrons can enter the active layer through the n-type transmission unit, and the LED chip can be ensured to work better through preparing the transmission unit.
Step S208, preparing a first electrode on the first conductive layer, preparing a second conductive layer on the n-type transmission unit, and preparing a second electrode on the second conductive layer to obtain the LED chip.
In the technical solution provided in step S208 of the present invention, the first electrode is used for injecting holes, the second electrode is used for injecting electrons, the first conductive layer can ensure that the injection of holes is more uniform, and the second conductive layer can ensure that the injection of electrons is more uniform. The performance of the LED chip obtained in this way is better.
Through the step S202 to the step S208, the LED chip is obtained by depositing a protective layer on the substrate, depositing an active layer on the protective layer, and then preparing a transmission unit on the active layer, wherein the transmission unit includes a p-type transmission unit and an n-type transmission unit, the p-type transmission unit includes a p-type transmission layer and a first conductive layer located at a side of the p-type transmission layer far away from the active layer, the n-type transmission unit includes an n-type transmission layer and a second conductive layer located at a side of the n-type transmission layer far away from the active layer, then preparing a first electrode on the first conductive layer, and preparing a second electrode on the second conductive layer. Since the first conductive layer can ensure more uniform injection of holes and the second conductive layer can ensure more uniform injection of electrons, the LED chip emits light more uniformly. The electrode can be constructed without etching the active layer, so that the utilization rate of the active layer in the LED chip is high, the purpose that the light emitting area of the LED chip is equal to the bottom area of the LED chip is achieved, the technical effect of improving the utilization rate of the active layer of the LED chip is achieved, and the technical problem that the utilization rate of the active layer of the flip LED chip is low in the related art is solved.
As an alternative embodiment, depositing a protective layer on a substrate includes: depositing a buffer layer on the substrate in the case where the protective layer includes the buffer layer and the insulating layer; an insulating layer is deposited over the buffer layer.
In this embodiment, the insulating layer is used to block carriers transported in the active layer from entering the buffer layer, which is used to ensure that the lattice of the substrate matches the lattice of the epitaxial structure. By sequentially depositing the buffer layer and the active layer on the substrate, the LED chip can be ensured to have better performance.
As an alternative embodiment, the transmission unit is prepared on the active layer, comprising: depositing a p-type semiconductor layer on the active layer; depositing a first mask layer on the p-type semiconductor layer, wherein the first mask layer comprises an oxide; etching the first mask layer and the p-type semiconductor layer to form a first groove, wherein the first groove extends downwards to the upper surface of the active layer, and a second mask layer and a p-type semiconductor intermediate layer are obtained; depositing a first n-type semiconductor layer on the second mask layer, and depositing a second n-type semiconductor layer on the exposed surface of the first groove on the active layer, wherein the second n-type semiconductor layer is connected with the p-type semiconductor interlayer; removing the second mask layer and the first n-type semiconductor layer; depositing a conductive layer on the second n-type semiconductor layer and the p-type semiconductor intermediate layer to obtain a transmission unit layer, wherein the transmission unit layer comprises the second n-type semiconductor layer, the p-type semiconductor intermediate layer and the conductive layer; and cutting the transmission unit layer at a position corresponding to the connection position of the second n-type semiconductor layer and the p-type semiconductor intermediate layer so as to separate the second n-type semiconductor layer from the p-type semiconductor intermediate layer, thereby obtaining a p-type transmission unit and an n-type transmission unit.
In this embodiment, the P-type semiconductor may be P-GaN, the N-type semiconductor may be N-GaN, and the material of the first mask layer may be aluminum oxide Al with high temperature resistance 2 O 3 The material can also be other oxide materials which are high temperature resistant and easy to etch and process. After the p-type semiconductor layer is deposited on the active layer, the first mask layer and the p-type semiconductor layer are etched, a first groove is formed by etching, and the first groove extends downwards to the upper surface of the active layer, namely only the selected area is etched, and other areas are not affected, so that the expected second mask layer and the p-type semiconductor intermediate layer can be obtained. Depositing an N-type semiconductor at the top, namely depositing a first N-type semiconductor layer on the second mask layer, and depositing a second N-type semiconductor layer on the exposed surface of the first groove on the active layer to obtain a second N-type semiconductor layer and a first N-type semiconductor layer, wherein the second N-type semiconductor layer is connected with the p-type semiconductor interlayer. And removing the second mask layer and the first n-type semiconductor layer, and depositing a conductive layer on the second n-type semiconductor layer and the p-type semiconductor intermediate layer to obtain a transmission unit layer, wherein the transmission unit layer comprises the second n-type semiconductor layer, the p-type semiconductor intermediate layer and the conductive layer, and no interval exists between the p-type semiconductor intermediate layer and the second n-type semiconductor layer. And cutting at a position corresponding to the connection part of the second n-type semiconductor layer and the p-type semiconductor intermediate layer so as to separate the second n-type semiconductor layer from the p-type semiconductor intermediate layer, thereby obtaining a p-type transmission unit and an n-type transmission unit. In this way, a better transmission unit can be obtained quickly and at a lower cost.
Based on the foregoing embodiments and optional embodiments, an optional implementation is provided, and is specifically described below.
In the related art, there is a problem in that the utilization rate of the active layer of the flip-chip LED chip is low.
In view of this, an alternative embodiment of the present invention provides an LED chip with a higher utilization of the active layer of the LED chip.
Fig. 3 is a schematic diagram of a process for manufacturing an LED chip according to an alternative embodiment of the present invention, in fig. 3, a structure corresponding to S1 is sequentially a substrate, a buffer layer, a structure corresponding to S2 is sequentially a substrate, a buffer layer, an insulating layer, and an active layer from bottom to top, a structure corresponding to S3 is sequentially a substrate, a buffer layer, an insulating layer, an active layer, and a p-type semiconductor layer from bottom to top, a structure corresponding to S4 is sequentially a substrate, a buffer layer, an insulating layer, an active layer, and a p-type semiconductor layer from bottom to top, a structure corresponding to S5 is sequentially a substrate, a buffer layer, an insulating layer, an active layer, a p-type semiconductor layer, and a first mask layer from bottom to top, a structure corresponding to S6 is sequentially a substrate, a buffer layer, an insulating layer, an active layer, a p-type semiconductor intermediate layer, and a second mask layer from bottom to top, the structure corresponding to S7 is a substrate, a buffer layer, an insulating layer, an active layer, a layer including a p-type semiconductor layer and a p-type semiconductor intermediate layer, a second mask layer, and a first n-type semiconductor layer from bottom to top, the structure corresponding to S8 is a substrate, a buffer layer, an insulating layer, an active layer, a layer including a p-type semiconductor layer and a p-type semiconductor intermediate layer from bottom to top, the structure corresponding to S9 is a substrate, a buffer layer, an insulating layer, an active layer, and a transmission unit layer from bottom to top, the structure corresponding to S10 is a substrate, a buffer layer, an insulating layer, an active layer, a transmission unit, and a transmission unit after electrode evaporation from bottom to top, and as shown in fig. 3, the process for preparing the LED chip is as follows:
take a common blue light chip as an example.
S1, depositing a buffer layer on a conventional sapphire substrate, wherein the purpose of the buffer layer is to relieve lattice stress generated by subsequent growth of GaN-based materials, and meanwhile, the luminous coupling efficiency can be improved by selecting and designing the buffer layer with a reasonable periodic structure and a refractive index;
s2, a barrier layer (equivalent to the insulating layer) for blocking carriers is deposited on the buffer layer, wherein the barrier layer is generally made of a GaN-based wide forbidden band semiconductor material, and the valence band and the conduction band depth of the barrier layer are far away from the energy level of the quantum well, so that the barrier layer plays a role in blocking electrons and holes;
s3, depositing a quantum well active layer on the barrier layer, wherein the quantum well layer (corresponding to the quantum well active layer) can be a single layer or a conventional multilayer;
s4 and S5, followed by sequential deposition of p-GaN (corresponding to the p-type semiconductor layer above) and Al on the quantum well active layer 2 O 3 Mask (corresponding to the first mask layer above), al 2 O 3 The mask can bear 2000 ℃ high temperature, and can keep stable mask action in the subsequent high temperature deposition process;
s6, etching Al by adopting a laser mask slotting mode 2 O 3 Masking and etching the p-GaN to obtain a concave pattern (corresponding to etching the first masking layer and the p-type semiconductor layer to obtain a second masking layer and a p-type semiconductor intermediate layer);
s7, depositing an n-GaN layer (corresponding to the second n-type semiconductor layer and the first n-type semiconductor layer) on the surface of the etched chip;
s8, the residual Al is processed by a solution mode 2 O 3 Mask etching, which also removes the deposited Al 2 O 3 The n-GaN on the mask (corresponding to the removal of the second mask layer and the first n-type semiconductor layer above) leaves a layer of substantially planar p-GaN (corresponding to the p-type semiconductor intermediate layer above) alternating with n-GaN (corresponding to the second n-type semiconductor layer above);
s9, redeposition an ITO conductive layer (corresponding to the deposition of the conductive layer on the second n-type semiconductor layer and the p-type semiconductor interlayer) to improve the current injection efficiency and uniformity;
s10, isolating the p-GaN from the n-GaN transmission layer by means of laser grooving or etching to obtain a p-type transmission unit and an n-type transmission unit (which is equivalent to cutting the transmission unit layer at the position corresponding to the connection position of the second n-type semiconductor layer and the p-type semiconductor intermediate layer so as to separate the second n-type semiconductor layer from the p-type semiconductor intermediate layer to obtain the p-type transmission unit and the n-type transmission unit);
s11, preparing a first electrode on the first conductive layer, and preparing a second electrode on the second conductive layer to obtain the LED chip, namely, completing the preparation of the LED chip.
The specific steps and principles of the present application will be further explained with reference to the following embodiments:
firstly, polishing and cleaning a sapphire substrate (corresponding to the substrate), and then depositing 3 mu m undoped GaN as a buffer layer on the sapphire substrate to ensure that the lattice stress of the GaN on the surface of the sapphire substrate is reduced to a lower level; and then epitaxially growing doped AlGaN on the GaN buffer layer to serve as an insulating barrier layer (corresponding to the insulating layer), wherein the thickness of the doped AlGaN buffer layer is 100nm, so that the doped AlGaN buffer layer plays a role in blocking injected electrons and holes, and simultaneously provides an epitaxial substrate suitable for quantum well structure epitaxy.
Second, a quantum well structure Al0.5Ga0.5N (5 nm)/Al0.42Ga0.58N (2 nm)/Al0.5Ga0.5N (5 nm) is deposited on the insulating barrier layer as an active light emitting layer (corresponding to the active layer above) of the chip, and then 400nm P-type AlGaN+10nm P-type heavily doped AlGaN (corresponding to the P-type semiconductor above) is deposited on the active layer as a P-type semiconductor layer.
Third, depositing 300nm uniform and compact Al on the p-type semiconductor layer 2 O 3 As a mask layer (corresponding to the first mask layer above), the mask is then grooved by means of laser etching; in this example, the LED chip only includes one n-type transmission layer and two p-type transmission layers, so only the first mask layer and the central region of the p-type semiconductor layer need to be grooved by laser scribing, and if more uniform chip current injection is desired, multi-line laser grooving can be implemented in combination with interdigital electrodes, i.e., multiple n-type transmission layers and multiple p-type transmission layers are designed. And then etching the p-type transmission layer of the exposed part of the groove until all p-type transmission layers on the quantum well active layer are completely etched.
In a fourth step, 410nm N-type Al0.64Ga0.36N (corresponding to the above N-type semiconductor) is deposited as N-type semiconductor layer (corresponding to the above first and second N-type semiconductor layers) on the patterned chip, and the deposition parameters need to be adjusted to obtain a layer thickness corresponding to the thickness of the p-type semiconductor interlayer. Then soaking the residual Al in hydrochloric acid 2 O 3 Etching the mask layer to furtherRemoving Al 2 O 3 An n-type transmission layer (corresponding to the first n-type conductor layer above) deposited thereon, a transmission layer (corresponding to one of the second n-type semiconductor layer, the p-type semiconductor intermediate layer above) with patterning is obtained.
Fifth, a 150nm ITO conductive layer (corresponding to the conductive layer above) is further deposited on the surface of the transmission layer to ensure uniformity of current injection. The transport layer is then separated by laser grooving (corresponding to the above cutting of the transport unit layer at a position corresponding to the junction of the second n-type semiconductor layer and the p-type semiconductor intermediate layer to separate the p-type semiconductor intermediate layer and the second n-type semiconductor layer), ensuring that the injection of positive and negative carriers only passes through the active layer and recombination of light is performed therein. Finally, the metal electrodes (corresponding to the first electrode and the second electrode) are respectively evaporated on the corresponding transmission units, so that the preparation of the LED chip can be finished, and the LED chip can emit blue light or green light.
It should be noted that in the second to fourth steps, p-type and n-type doping of the GaN layer may be achieved by depositing the intrinsic GaN layer first and then performing corresponding ion implantation respectively, so as to achieve a structure in which p-GaN and n-GaN are staggered, i.e., another way to obtain the above transport layer.
It should be further noted that, in the fifth step, the ITO conductive layer may be replaced by a highly reflective Ag conductive layer, so that light emitted downward is emitted upward through high reflection, thereby achieving higher light-emitting efficiency.
It should be noted that the material of the buffer layer may be replaced with AlGaN, so that the LED chip may emit violet light, and the material of the buffer layer may be replaced with GaAs, so that the LED chip may emit red light, and thus, the preparation of LED chips with different light emission colors may be realized by selecting different materials as the buffer layer.
Fig. 4 is a schematic diagram of an operation principle of an LED chip according to an alternative embodiment of the present invention, in fig. 4, an insulating barrier layer corresponds to an insulating layer above, a sapphire substrate corresponds to a substrate above, an electrode through which holes pass is a first electrode, an electrode through which electrons pass is a second electrode, an electrically conductive layer through which holes pass is a first electrically conductive layer, an electrically conductive layer through which electrons pass is a second electrically conductive layer, a broadband barrier layer corresponds to an insulating layer above, carriers can be restricted to move only in a quantum well active layer, a buffer layer can adjust lattice stress responsible for growth of GaN material and adjust optical coupling, holes are injected from the first electrode, electrons are injected from the second electrode, holes through the p-type transmission layer on the left side and electrons through the n-type transmission layer in the middle can be combined in the quantum well active layer to form photons, and photons can be emitted from the substrate through the buffer layer, thereby realizing light emission of the LED chip.
By the alternative embodiments, at least the following advantages can be achieved:
(1) The utilization rate of the active layer is high, and the light emitting area of the LED chip is large;
(2) The LED chip emits light uniformly;
(3) The LED chip has better luminous efficiency, and can break through the efficiency limit of the LED chip in the related technology;
(4) The efficiency of out-coupling can be adjusted by doping different elements to change the dielectric constant value of the buffer layer.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present invention is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present invention. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present invention.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method of the various embodiments of the present invention.
The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
In the foregoing embodiments of the present invention, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.
In the several embodiments provided in the present application, it should be understood that the disclosed technology content may be implemented in other manners. Wherein the above described device embodiments are merely illustrative.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.

Claims (10)

1. A light emitting diode, LED, chip comprising: the device comprises a substrate, a protective layer, an active layer and a transmission unit which are sequentially arranged from bottom to top, wherein the transmission unit comprises a p-type transmission unit and an n-type transmission unit, the p-type transmission unit comprises a p-type transmission layer and a first conductive layer which is positioned on one side of the p-type transmission layer far away from the active layer, the p-type transmission layer is electrically connected with a first electrode through the first conductive layer, the n-type transmission unit comprises an n-type transmission layer and a second conductive layer which is positioned on one side of the n-type transmission layer far away from the active layer, and the n-type transmission layer is electrically connected with a second electrode through the second conductive layer.
2. The LED chip of claim 1, wherein said protective layer comprises: a buffer layer and an insulating layer, the buffer layer being located between the insulating layer and the substrate, wherein,
the insulating layer is used for blocking carriers transmitted in the active layer from entering the buffer layer, the buffer layer is used for ensuring lattice matching of the substrate and an epitaxial structure, and the epitaxial structure comprises the protective layer, the active layer and the transmission unit.
3. The LED chip of claim 1, wherein said p-type transmission units are plural and said n-type transmission units are plural, wherein plural said p-type transmission units and plural said n-type transmission units are alternately arranged.
4. The LED chip of claim 3, wherein among said plurality of p-type transmission units and said plurality of n-type transmission units alternately arranged, two adjacent ones of said p-type transmission units share said n-type transmission unit therebetween, and two adjacent ones of said n-type transmission units share said p-type transmission unit therebetween.
5. The LED chip of claim 1, wherein said first electrode is for injecting holes and said second electrode is for injecting electrons.
6. The LED chip of claim 1, wherein said active layer is a quantum well active layer.
7. The LED chip of any of claims 1 to 6, wherein the protective layer comprises a buffer layer, the dielectric constant value of the buffer layer being determined in dependence of the doping element of the buffer layer.
8. A method for preparing the LED chip of claim 1, comprising:
depositing a protective layer on the substrate;
depositing an active layer on the protective layer;
preparing a transmission unit on the active layer, wherein the transmission unit comprises a p-type transmission unit and an n-type transmission unit, the p-type transmission unit comprises a p-type transmission layer and a first conductive layer positioned on one side of the p-type transmission layer away from the active layer, and the n-type transmission unit comprises an n-type transmission layer and a second conductive layer positioned on one side of the n-type transmission layer away from the active layer;
and preparing a first electrode on the first conductive layer, and preparing a second electrode on the second conductive layer to obtain the LED chip.
9. The method of claim 8, wherein depositing a protective layer on the substrate comprises:
in the case where the protective layer includes a buffer layer and an insulating layer,
depositing the buffer layer on the substrate;
and depositing the insulating layer on the buffer layer.
10. The method of claim 8, wherein the preparing a transmission unit on the active layer comprises:
depositing a p-type semiconductor layer on the active layer;
depositing a first mask layer on the p-type semiconductor layer;
etching the first mask layer and the p-type semiconductor layer to form a first groove, wherein the first groove extends downwards to the upper surface of the active layer, and a second mask layer and a p-type semiconductor intermediate layer are obtained;
depositing a first n-type semiconductor layer on the second mask layer, and depositing a second n-type semiconductor layer on the exposed surface of the first groove on the active layer, wherein the second n-type semiconductor layer is connected with the p-type semiconductor interlayer;
removing the second mask layer and the first n-type semiconductor layer;
depositing a conductive layer on the second n-type semiconductor layer and the p-type semiconductor intermediate layer to obtain a transmission unit layer, wherein the transmission unit layer comprises the second n-type semiconductor layer, the p-type semiconductor intermediate layer and the conductive layer;
and cutting the transmission unit layer at a position corresponding to the connection position of the second n-type semiconductor layer and the p-type semiconductor intermediate layer so as to separate the second n-type semiconductor layer from the p-type semiconductor intermediate layer, thereby obtaining the p-type transmission unit and the n-type transmission unit.
CN202310316581.9A 2023-03-28 2023-03-28 LED chip and method for manufacturing LED chip Pending CN116314522A (en)

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