CN116302771A - Apparatus for signal integrity verification and a signal integrity verification method - Google Patents

Apparatus for signal integrity verification and a signal integrity verification method Download PDF

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Publication number
CN116302771A
CN116302771A CN202310020222.9A CN202310020222A CN116302771A CN 116302771 A CN116302771 A CN 116302771A CN 202310020222 A CN202310020222 A CN 202310020222A CN 116302771 A CN116302771 A CN 116302771A
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control processing
target
processing system
module
power
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赵胜
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/2733—Test interface between tester and unit under test

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  • General Physics & Mathematics (AREA)
  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)

Abstract

The embodiment of the invention provides equipment for signal integrity verification and a signal integrity verification method, wherein the equipment comprises the following steps: the device can comprise a logic control module, a power supply module connected with the logic control module and a plurality of control processing systems; each control processing system is connected with a corresponding type of slot. The plurality of control processing systems and the corresponding slots are deployed in one device, and the control processing systems and the slots are selectively powered, so that the signal integrity of different types of devices is verified, the cost of signal integrity verification is reduced, the times of taking devices with different control processing systems by an experimenter are reduced, and the working efficiency of the experimenter in signal integrity verification is improved.

Description

Apparatus for signal integrity verification and a signal integrity verification method
Technical Field
The present invention relates to the field of detection technology, and in particular, to a device and a method for signal integrity verification.
Background
With the rapid development of electronic and communication technologies, challenges in several major aspects of high-speed system design are more and more prominent, and are distinct from the past:
The integration scale is larger and larger, the I/O number is larger and larger, the single board interconnection density is continuously increased, the clock rate is higher and the signal edge rate is faster and faster.
This results in more significant system and board signal integrity issues, and product development and market time is continually reduced, and the success of a one-time design is very important; the above issues, leading to signal integrity issues in high speed circuits, are becoming increasingly prominent.
In the process of hardware development, how to rapidly judge the reliability of the high-speed signal integrity becomes the current problem to be solved.
Disclosure of Invention
In view of the above, it is proposed to provide an apparatus for signal integrity verification and a signal integrity verification method, which overcome or at least partially solve the above problems, comprising:
an apparatus for signal integrity verification, comprising: the system comprises a logic control module, a plurality of control processing systems and a power module connected with the logic control module; each control processing system is connected with a corresponding type of slot;
the groove is used for being connected with equipment for verifying signal integrity;
the control processing systems are used for receiving signal data sent by the corresponding slots and verifying signal integrity according to the signal data; the signal data are sent by the equipment connected with the corresponding slot position;
The logic control module is used for controlling the power supply module to supply power to at least one control processing system in the plurality of control processing systems and at least one slot position corresponding to the at least one control processing system according to the received target instruction;
the power module is connected with each control processing system and each slot position respectively and is used for supplying power to the control processing systems and the slot positions.
Optionally, the target instruction includes a target identifier;
the logic control module is used for determining a target control processing system and a target slot position according to the target identifier; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
Optionally, the target instruction comprises a follow instruction;
the logic control module is used for determining a used slot position of the current inserted equipment and determining a control processing system connected with the used slot position; and controlling the power supply module to supply power to the used slot position and the corresponding control processing system, controlling the power supply module to stop supplying power to other control processing systems except the control processing system connected with the used slot position, and controlling the power supply module to stop supplying power to other slot positions except the used slot position.
Optionally, the power module comprises a main power module and a standby power module;
the main power module is used for supplying power to the control processing system and the slot position;
the standby power module is used for supplying power to the control processing system and the slot position when the main power module is abnormal.
Alternatively, the process may be carried out in a single-stage,
the logic control module is also used for acquiring current attributes of the current output to the slot position by the power supply module from the power supply module; and when the abnormal value exists in the current attribute, controlling the power supply module to stop supplying power to the slot position.
Optionally, the logic control module includes a serial port, and the serial port is connected with a display device;
the logic control module is used for acquiring a verification result of signal integrity verification from the at least one control processing system and sending the verification result to the display device for display through the serial port.
Optionally, the slot includes at least one of:
2x16_slot slot, 2x16_open core protocol OCP slot, U.2 _serial hard disk SATA/serial small computer system interface SAS slot, minissas slot.
The embodiment of the invention also provides a signal integrity verification method which is applied to the equipment described in any one of the above, and comprises the following steps:
Receiving a target instruction;
according to the target instruction, the control power module supplies power to at least one control processing system in a plurality of control processing systems and at least one operation corresponding to the at least one control processing system;
when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position;
when the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
The embodiment of the invention also provides a signal integrity verification device, which is applied to the equipment described in any one of the above, and comprises:
the instruction receiving module is used for receiving a target instruction;
the control module is used for controlling the power supply module to supply power to at least one control processing system in the plurality of control processing systems and at least one operation corresponding to the at least one control processing system according to the target instruction; when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position; when the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
The embodiment of the invention also provides electronic equipment, which comprises a processor, a memory and a computer program stored on the memory and capable of running on the processor, wherein the computer program realizes the signal integrity verification method when being executed by the processor.
The embodiment of the invention has the following advantages:
the embodiment of the invention provides equipment for verifying signal integrity; the device can comprise a logic control module, a power supply module connected with the logic control module and a plurality of control processing systems; each control processing system is connected with a corresponding type of slot. The plurality of control processing systems and the corresponding slots are deployed in one device, and the control processing systems and the slots are selectively powered, so that the signal integrity of different types of devices is verified, the cost of signal integrity verification is reduced, the times of taking devices with different control processing systems by an experimenter are reduced, and the working efficiency of the experimenter in signal integrity verification is improved.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the drawings that are needed in the description of the present invention will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 is a block diagram of an apparatus for signal integrity verification in accordance with an embodiment of the present invention;
FIG. 2 is a block diagram of another apparatus for signal integrity verification in accordance with an embodiment of the present invention;
FIG. 3 is a schematic diagram of power logic of a power module according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of power logic of another power module according to an embodiment of the invention;
FIG. 5 is a flow chart of steps of a method for verifying signal integrity in accordance with an embodiment of the present invention;
FIG. 6 is a schematic diagram of a signal integrity verification apparatus according to an embodiment of the invention;
FIG. 7 is a schematic diagram of an electronic device according to an embodiment of the present invention;
fig. 8 is a schematic structural view of a nonvolatile computer-readable storage medium according to an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Signal integrity may refer to the quality of a signal on a transmission path, which may be a conventional wire, may be an optical device, or may be other medium. A signal having good signal integrity means that it has the voltage level value that must be reached when it is needed. Poor signal integrity is not caused by a single factor, but rather is caused by a combination of factors in the system design.
In practical applications, different devices may correspond to different types of slots, for example: slot, SATA (serial ata) slot, OCP (Open Core Protoco1, open core protocol) slot, etc.; when the signal integrity of a device is required to be verified, the device can be inserted into a control processing system provided with a corresponding slot; the control processing system may verify the signal integrity of the device based on the received signal.
However, a plurality of different types of devices may be deployed in the server, and the different types of devices correspond to different slots, so that multiple control processing systems are required for performing signal integrity verification for the different types of devices. The different control processing systems are carried in different devices, so that when the signal integrity of different types of devices in one server is verified, a plurality of devices carrying the different control processing systems are needed, and therefore the verification cost is increased, and the workload of experimenters is increased (namely, the different devices need to be frequently taken).
In order to reduce the cost of signal integrity verification and improve the working efficiency of experimenters in signal integrity verification, the embodiment of the invention provides equipment for signal integrity verification; the device can comprise a logic control module, a power supply module connected with the logic control module and a plurality of control processing systems; each control processing system is connected with a corresponding type of slot.
The groove is used for being connected with equipment for verifying signal integrity; the control processing systems are used for receiving signal data sent by the corresponding slots and verifying signal integrity according to the signal data; the signal data are sent by the equipment connected with the corresponding slot position; the logic control module is used for controlling the power supply module to supply power to at least one control processing system in the plurality of control processing systems and at least one operation corresponding to the at least one control processing system according to the received target instruction; the power module is connected with each control processing system and each slot position respectively and is used for supplying power to the control processing systems and the slot positions. The plurality of control processing systems and the corresponding slots are deployed in one device, and the control processing systems and the slots are selectively powered, so that the signal integrity of different types of devices is verified, the cost of signal integrity verification is reduced, the times of taking devices with different control processing systems by an experimenter are reduced, and the working efficiency of the experimenter in signal integrity verification is improved.
Referring to fig. 1, a block diagram illustrating a device for signal integrity verification according to an embodiment of the present invention may include the following modules: the system comprises a logic control module, a plurality of control processing systems and a power module connected with the logic control module; each control processing system is connected with a corresponding type of slot.
The groove is used for being connected with equipment for verifying signal integrity;
the control processing systems are used for receiving signal data sent by the corresponding slots and verifying signal integrity according to the signal data; the signal data are sent by the equipment connected with the corresponding slot position;
the logic control module is used for controlling the power supply module to supply power to at least one control processing system in the plurality of control processing systems and at least one operation corresponding to the at least one control processing system according to the received target instruction;
the power module is connected with each control processing system and each slot position respectively and is used for supplying power to the control processing systems and the slot positions.
Wherein the slot may comprise any one or more of the following: 2x16_slot slot, 2x16_ocp slot, U.2_sata/SAS (Serial Attached SCSI, serial SCSI (Small Computer System Interface, small computer system interface)) slot, miniSAS slot, etc., different kinds of slots being adapted to connect different devices.
Specifically, since slots corresponding to different devices are different, in order to adapt to verifying signal integrity of different types of devices, in the embodiment of the present invention, a plurality of different types of slots may be disposed in the device, so as to facilitate connection of different types of devices with signal integrity to be verified.
In actual practice, the control processing system may include any one or more of the following: pmc_pcie5.0 control processing system, broadcom_pcie5.0 control processing system, pmc_sas3.0 control processing system; the equipment that each control processing system can perform signal integrity verification is different, and the types of slots corresponding to different equipment are different.
Accordingly, a corresponding slot or slots may be deployed for each control processing system based on the slot or slots corresponding to the device for which the control processing system is capable of signal integrity verification, and the corresponding slot or slots may be connected to the corresponding control processing system.
After an experimenter inserts equipment for verifying signal integrity on a slot, the inserted equipment sends signal data to a control processing system corresponding to the slot through the slot; after the slot receives the signal data, the received signal can be transmitted to a correspondingly connected control processing system for verifying the signal integrity.
As an example, the pmc_pcie5.0 control processing system may implement identifying PCIE5.0 devices that link the maximum bandwidth to X1, X2, X4, X8, X16 to meet the slot of the standard and the slot of the OCP interface; the broadcom_PCIE5.0 control processing system can realize the identification of PCIE5.0 equipment which links the maximum bandwidth to X1, X2, X4, X8 and X16, and meets the slot positions of standard slot positions and the slot positions of OCP interfaces; the PMC_SAS3.0 control processing system can meet the identification demonstration of the signal integrity of the SAS/minisAS interface of U.2, and simultaneously, the verification of downward compatible SATA.
In practical application, the logic control module may be a CPLD (Complex Programmable Logic Device ); the logic control module can be used for receiving the instruction and controlling the power supply module connected with the logic control module according to the instruction.
Specifically, before/during/after the experimenter inserts the device for verifying the signal integrity on the slot, a target command may be sent to the logic control module.
The logic control module may control the power module to supply power to at least one control processing system of the plurality of control processing systems and at least one slot corresponding to the at least one control processing system in response to the target instruction after receiving the target instruction.
When needed, the at least one slot may be a slot of a device that has/is to be inserted into the signal integrity to be verified; the at least one control processing system may be a control processing system corresponding to the at least one slot.
In one embodiment of the invention, the target instruction may include a target identification; when the target instruction comprises a target identifier, the logic control module is used for determining a target control processing system and a target slot position according to the target identifier; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
The target identification can be used for determining a target control processing system and a target slot position needing power supply, and the target identification can be preselected by an experimenter.
As an example, the target identification may include a power status of each control processing system and each slot; for example: a represents a first control processing system, B represents a second control processing system, and C represents a third control processing system; 1 represents power supply, 0 represents no power supply; if the target identification is "A-1, B-0, C-0," it may be indicated that the first control processing system is the target control processing system, power needs to be supplied to the first control processing system, and power is stopped to the second control processing system and the third control processing system.
As another example, the target identification may also include a target control processing system identification and a target slot identification, such as: a represents a first control processing system, B represents a second control processing system, and C represents a third control processing system; if the target is identified as "A", it may be indicated that the first control processing system is the target control processing system, power needs to be supplied to the first control processing system, and power supply to the second control processing system and the third control processing system is stopped.
In practical application, when an experimenter needs to perform signal integrity verification on a device, a target instruction including a target identifier can be input to a logic control module; the logic control module, after receiving the target instruction, can determine the target control processing system and the target slot position which need to be powered on based on the target identification therein.
After the logic control module determines the target control processing system and the target slot position, the logic control module can control the power supply module to supply power to the target control processing system and the target slot position; thus, a device plugged into a target slot may send signal data to a powered target control processing system for verification of signal integrity.
As an example, to reduce unnecessary resource waste, the power supply module may be controlled to stop supplying power to other control processing systems than the target control processing system, and the power supply module may be controlled to stop supplying power to other slots than the target slot, which the embodiments of the present invention are not limited to.
In one embodiment of the invention, the target instruction may also include a follow instruction; when the target instruction comprises a following instruction, the logic control module is used for determining a used slot position of the current inserted equipment and determining a control processing system connected with the used slot position; and controlling the power supply module to supply power to the used slot position and the corresponding control processing system, controlling the power supply module to stop supplying power to other control processing systems except the control processing system connected with the used slot position, and controlling the power supply module to stop supplying power to other slot positions except the used slot position.
In practical application, in order to further reduce the operations of the experimenter and realize automatic switching of the control processing system, the experimenter may send a following instruction to the logic control module, where the following instruction may be used by the logic control module to determine which control processing system and slot needs to be powered according to the slot of the device currently inserted.
Specifically, if the logic control module receives a target instruction including a following instruction, the logic control module may detect whether each slot is inserted into the device; the detection process may be accomplished by sensors deployed in the slots.
When the logic control module detects that a slot is inserted into the device for which signal integrity is to be verified, the slot may be used as a used slot and a control processing system connected to the used slot may be determined.
Then, the logic control module can control the power supply module to supply power to the used slot position and the corresponding control processing system; so that a device plugged into a used slot can send signal data to the powered control processing system for verification of signal integrity.
As an example, to reduce unnecessary resource waste, the power module may be controlled to stop supplying power to other control processing systems than the control processing system that has used the slot connection, and the power module may be controlled to stop supplying power to other slots than the used slot, which embodiments of the present invention are not limited.
In an embodiment of the present invention, one slot may be connected to at least two control processing systems simultaneously; when one slot is connected with at least two control processing systems, signal integrity verification can be performed on signal data received by the at least two control processing systems based on the at least two control processing systems, so that an experimenter can mutually take verification results of at least two signal integrity verifications as reference results, which is not limited in the embodiment of the invention.
As an example, the logic control module includes a serial port, which is connected to a display device; the logic control module is used for acquiring a verification result of signal integrity verification from the at least one control processing system and sending the verification result to the display device for display through the serial port.
In practical application, the logic control module may be connected to the display device through a serial port, and the verification result for signal integrity verification obtained from the control processing system is sent to the display device through the serial port.
When the verification result is received, the display device can display the verification result so as to display the verification result to an experimenter.
As an example, when the verification result for one signal data includes at least two, the at least two verification results may be simultaneously presented so that an experimenter analyzes the signal integrity of the device to be verified for signal integrity using the at least two verification results as reference results to each other.
As another example, the target instruction may be generated by an experimenter after performing a user operation on the display device; after generating the target instruction, the display device can send the target instruction to the logic control module through the serial port.
In practical applications, the signal integrity verification may be a lengthy process, and may cause interruption of the signal integrity verification process if the power supply of the power module is problematic; in order to ensure the stability of the device provided by the embodiment of the invention, in one embodiment of the invention, the power module comprises a main power module and a standby power module; the main power module is used for supplying power to the control processing system and the slot position; the standby power module is used for supplying power to the control processing system and the slot position when the main power module is abnormal.
Specifically, the power module may include a main power module and a standby power module that are connected to each other; the main power module and the standby power module can be respectively connected with the logic control module.
When the main power module is in a normal state, the logic control module can control the main control module to supply power to the control processing system and the slot position; when the main power module is abnormal, the logic control module can control the main control module to stop supplying power to the control processing system and the slot position, and control the power preparation module to supply power to the control processing system and the slot position.
For example: the logic control module can collect alert, vin (power input), pst (PSU in place) and pg (normal voltage) signals of the main power module, and when any signal is abnormal, the logic control module can be converted from a mode of supplying power by adopting the main power module to a mode of supplying power by adopting the standby power module.
As an example, the power reserve of the backup power module is limited; therefore, when the power supply time of the standby power module exceeds the preset time, the standby power module can automatically shut down.
In addition, in order to ensure that the standby power module is in a full power state when the standby power module is required to be used, the electric quantity of the standby power module can be acquired according to a preset time interval during the normal power supply period of the main power module. If the logic control module detects that the electric quantity of the standby power module is lower than a preset value, the logic control module can send a BBU_charge_en signal to the standby power module; the standby power module may be charged through a connection with the main power module after receiving the bbu_charge_en signal.
When the main power module is abnormal, the charging process to the standby power module is forbidden, so that the situation that the control processing system and the slot in the equipment have no power supply is avoided.
In practical applications, since the slot needs to be plugged and unplugged frequently, abnormal power supply of the slot of the power module box may occur, for example: overcurrent, current backflow and other anomalies; in order to avoid such anomalies and further cause damage to the device provided by the embodiment of the present invention or the device for verifying the integrity of the signal, in an embodiment of the present invention, the logic control module is further configured to obtain, from the power module, a current attribute of the current output by the power module to the slot; and when the abnormal value exists in the current attribute, controlling the power supply module to stop supplying power to the slot position.
Specifically, a hot plug power supply system may be disposed in the power module, where the hot plug power supply system may monitor, in real time, a current attribute of a current output by the power module to the slot, for example: the magnitude of the current, the direction of the current, etc.
The logic control module can acquire the current attribute of the current output to the slot position by the power supply module from the hot plug power supply system of the power supply module in real time or according to a certain time interval; and based on the current attribute, identifying whether the current output to the slot position by the power supply module is abnormal; for example: whether overcurrent, whether to flow backward, etc.
When the logic control module recognizes that the current output to the slot by the power supply module is abnormal based on the current attribute, in order to protect the equipment or the equipment with the integrity of the signal to be verified provided by the embodiment of the invention from being damaged by the abnormal current, the logic control module can control the power supply module to stop supplying power to the slot so as to protect the reliable operation of the equipment.
In an embodiment of the present invention, a low voltage power controller may be further added to the power module to control the power supply from the power module to the slot.
Referring to fig. 2, a block diagram of another apparatus for signal integrity verification according to an embodiment of the present invention is shown:
The device may include a CPLD logic control module, a power module (including PSU (PC Power supplyunit, computer power supply unit) control module (i.e., the above main power module), BBU (Battery Backup Unit, backup battery pack) backup power module (i.e., the above backup power module), a 12V power supply combining control tributary, a 100m_clock buffer controller, six hot-plug power supply systems (1, 2, 3, 4, 5, 6)), a pmc_pcie5.0 control processing system, a broadcom_pcie5.0 control processing system, a pmc_sas3.0 control processing system, 2x16_slot slot, 2x16_ocp slot, U.2_sata/SAS slot, miniSAS slot.
The experimenter can communicate with the CPLD logic control module through a serial port; when dialing is performed on the display device, a target instruction may be sent to the CPLD logic control module.
As in table 1, part of the dialing logic is shown:
Figure SMS_1
when abc=100, after the identification of the CPLD logic control module is completed, the 12V power supply and combination control branch is controlled, and the 100m_clock buffer controller is driven to supply power to the pmc_pcie5.0 control processing system as a reference clock, and the power supply to the pmc_pcie5.0 control processing system is realized at the same time, while the broadcom_pcie5.0 control processing system and the pmc_sas3.0 control processing system are in a cold standby state, that is, no power supply is provided.
When abc=010, after the identification of the CPLD logic control module is completed, the 12V power supply circuit combination control branch is controlled, and the 100m_clock buffer controller is driven to serve as a reference clock for the broadcom_pcie5.0 control processing system, and meanwhile, power supply to the broadcom_pcie5.0 control processing system is achieved, and the pmc_pcie5.0 control processing system and the pmc_sas3.0 control processing system are in a cold standby state.
When abc=0010, after the identification of the CPLD logic control module is completed, the 12V power supply circuit combination control branch is controlled, and the 100m_clock buffer controller is driven to serve as a reference clock for the pmc_sas3.0 control processing system, so that power supply to the pmc_sas3.0 control processing system is realized, and the pmc_pcie5.0 control processing system and the broadcom_pcie5.0 control processing system are in a cold standby state.
Meanwhile, when abc=111, the target instruction is a following instruction; at this time, the power supply branch circuit can be switched according to the inserted slot position, and the BBU standby mode is entered.
As shown in fig. 3, when the PSU control module is powered on and operates normally, the PSU control module is used to supply power to the whole device, and during this period, the CPLD logic controller collects signals of alert (alarm), vin (power input), pst (PSU in place) and pg (12V voltage normal) of the PSU, and when any one of the signals is abnormal, the CPLD logic controller drives a signal of bbu_en, so as to control the discharging logic of the BBU standby module.
When the BBU standby module is used for supplying power, the CPLD logic control module can also perform time detection, and when the standby time exceeds 16 hours, the BBU standby module can be automatically powered off.
During normal power supply of the PSU control module, the BBU standby module is electrified for the first time and acquires electric quantity once every 30 minutes, and transmits the electric quantity to the CPLD logic control module; when the CPLD logic control module finds that the electric quantity of the BBU standby module is insufficient, the CPLD logic control module sends a BBU_charge_en signal to the BBU standby module, so that the BBU standby module charges.
And during the abnormal power supply period of the PSU control module, the BBU standby module prohibits the charging process.
When the PSU control module is adopted to supply power, the standby power function of the BBU standby power module is adopted to prevent any abnormality in the power supply of the PSU control module in the actual operation process, the BBU standby power module is adopted to supply power in time, the signal integrity verification is timely carried out, the signal integrity verification period of the conventional PCIE5.0/PCIE4.0/PCIE3.0 is not more than 12H, and the normal operation of the equipment is completely satisfied by the low-power operation of the conventional PCIE5.0/PCIE4.0/PCIE 3.0.
In the power supply branch, a TPS246 controller is added, a 6-way overcurrent-preventing and hot plug-supporting power supply combined circuit control system is designed, and both the PSU control module and the BBU power supply module need to pass through a 12V power supply combined circuit control branch and match with a hot plug-in power supply system, so that the functions of current backflow prevention, overcurrent protection and the like are realized.
As shown in fig. 4, the power module has a current backflow monitoring function, and once the current backflow is found, the overcurrent phenomenon can be automatically disconnected; the PSU control module and the BBU standby module are combined into a path of 12V_in through a 12V power supply and combining control branch, and the path of 12V_in is distributed and supplied to 2X16_slot, 2X16_OCP slot and 2X16_OCP slot of a PMC_PCIE5.0 control processing system through a hot-plug power supply system capable of preventing overcurrent and hot-plug and backward flow, and the 2X16_slot, the 2X16_OCP slot and the 2X16_OCP slot of the Broadcom_PCIE5.0 control processing system are all distributed and supplied to a miniSAS slot and a U.2_SAS/SATA slot of the PMC_SAS3.0 control processing system.
When the current passes through the hot plug power supply system, the hot plug power supply system can collect the current attribute of the current and send the current attribute to the logic control module; when the logic control module recognizes that the current provided by the power supply module to the slot bit is over-current based on the current attribute, the current protection circuit is used for avoiding the over-current transmitted to the slot bit; or when the current provided by the power supply module to the slot position is identified to flow backwards, controlling the power supply module to stop supplying power to the slot position.
The embodiment of the invention provides equipment for verifying signal integrity; the device can comprise a logic control module, a power supply module connected with the logic control module and a plurality of control processing systems; each control processing system is connected with a corresponding type of slot. The plurality of control processing systems and the corresponding slots are deployed in one device, and the control processing systems and the slots are selectively powered, so that the signal integrity of different types of devices is verified, the cost of signal integrity verification is reduced, the times of taking devices with different control processing systems by an experimenter are reduced, and the working efficiency of the experimenter in signal integrity verification is improved.
Referring to fig. 5, a flowchart of the steps of a signal integrity verification method of an embodiment of the invention is shown as applied to a device as described in any of the above.
Specifically, the method may include the steps of:
step 501, receiving a target instruction.
Before/during/after the experimenter inserts the device for verifying the signal integrity on the slot, a target command may be sent to the logic control module.
Step 502, controlling a power module to supply power to at least one control processing system in a plurality of control processing systems and at least one operation corresponding to the at least one control processing system according to the target instruction.
The logic control module may control the power module to supply power to at least one control processing system of the plurality of control processing systems and at least one slot corresponding to the at least one control processing system in response to the target instruction after receiving the target instruction.
In an embodiment of the present invention, when the target instruction includes a target control processing system identifier, determining a target control processing system and a target slot according to the target identifier; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
In practical application, when an experimenter needs to perform signal integrity verification on a device, a target instruction including a target identifier can be input to a logic control module; the logic control module, after receiving the target instruction, can determine the target control processing system and the target slot position which need to be powered on based on the target identification therein.
After the logic control module determines the target control processing system and the target slot position, the logic control module can control the power supply module to supply power to the target control processing system and the target slot position; thus, a device plugged into a target slot may send signal data to a powered target control processing system for verification of signal integrity.
As an example, to reduce unnecessary resource waste, the power supply module may be controlled to stop supplying power to other control processing systems than the target control processing system, and the power supply module may be controlled to stop supplying power to other slots than the target slot, which the embodiments of the present invention are not limited to.
In another embodiment of the present invention, when the target instruction includes a follow instruction, determining a target slot of a currently inserted device, and determining a target control processing system connected to the target slot; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
In practical application, in order to further reduce the operations of the experimenter and realize automatic switching of the control processing system, the experimenter may send a following instruction to the logic control module, where the following instruction may be used by the logic control module to determine which control processing system and slot needs to be powered according to the slot of the device currently inserted.
Specifically, if the logic control module receives a target instruction including a following instruction, the logic control module may detect whether each slot is inserted into the device; the detection process may be accomplished by sensors deployed in the slots.
When the logic control module detects that a slot is inserted into the device for which signal integrity is to be verified, the slot may be used as a used slot and a control processing system connected to the used slot may be determined.
Then, the logic control module can control the power supply module to supply power to the used slot position and the corresponding control processing system; so that a device plugged into a used slot can send signal data to the powered control processing system for verification of signal integrity.
As an example, to reduce unnecessary resource waste, the power module may be controlled to stop supplying power to other control processing systems than the control processing system that has used the slot connection, and the power module may be controlled to stop supplying power to other slots than the used slot, which embodiments of the present invention are not limited.
In the embodiment of the invention, a logic control module receives a target instruction; according to the target instruction, the control power module supplies power to at least one control processing system in a plurality of control processing systems and at least one operation corresponding to the at least one control processing system; when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position; when the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position. The plurality of control processing systems and the corresponding slots are deployed in one device, and the control processing systems and the slots are selectively powered, so that the signal integrity of different types of devices is verified, the cost of signal integrity verification is reduced, the times of taking devices with different control processing systems by an experimenter are reduced, and the working efficiency of the experimenter in signal integrity verification is improved.
It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
Referring to fig. 6, a schematic structural diagram of a signal integrity verification device according to an embodiment of the present invention is shown, applied to the apparatus as described in any one of the above.
Specifically, the method can comprise the following modules:
an instruction receiving module 601, configured to receive a target instruction;
a control module 602, configured to control the power module to supply power to at least one control processing system of the plurality of control processing systems and at least one operation corresponding to the at least one control processing system according to the target instruction; when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position; when the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
In the embodiment of the invention, a logic control module receives a target instruction; according to the target instruction, the control power module supplies power to at least one control processing system in a plurality of control processing systems and at least one operation corresponding to the at least one control processing system; when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position; when the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position. The plurality of control processing systems and the corresponding slots are deployed in one device, and the control processing systems and the slots are selectively powered, so that the signal integrity of different types of devices is verified, the cost of signal integrity verification is reduced, the times of taking devices with different control processing systems by an experimenter are reduced, and the working efficiency of the experimenter in signal integrity verification is improved.
The embodiment of the present application further provides an electronic device, including a processor 701, a memory 702 and a computer program stored in the memory 702 and capable of running on the processor as shown in fig. 7, where the computer program when executed by the processor 701 implements each process of the above embodiment of the signal integrity verification method, and the same technical effects can be achieved, so that repetition is avoided and redundant description is omitted here.
In addition, the embodiment of the present application further provides a non-volatile computer readable storage medium, as shown in fig. 8, in which a computer program 81 is stored on the non-volatile computer readable storage medium 8, and when the computer program 81 is executed by a processor, the processes of the above-mentioned signal integrity verification method embodiment are implemented, and the same technical effects can be achieved, so that repetition is avoided, and no redundant description is provided herein.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The foregoing has outlined the more detailed description of the apparatus for signal integrity verification and a method for signal integrity verification, wherein specific examples are provided herein to illustrate the principles and embodiments of the present invention and to provide an overview for understanding the method and core concept of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.

Claims (10)

1. An apparatus for signal integrity verification, comprising: the system comprises a logic control module, a plurality of control processing systems and a power module connected with the logic control module; each control processing system is connected with a corresponding type of slot;
the groove is used for being connected with equipment for verifying signal integrity;
the control processing systems are used for receiving signal data sent by the corresponding slots and verifying signal integrity according to the signal data; the signal data are sent by the equipment connected with the corresponding slot position;
the logic control module is used for controlling the power supply module to supply power to at least one control processing system in the plurality of control processing systems and at least one slot position corresponding to the at least one control processing system according to the received target instruction;
the power module is connected with each control processing system and each slot position respectively and is used for supplying power to the control processing systems and the slot positions.
2. The apparatus of claim 1, wherein the target instruction comprises a target identification;
the logic control module is used for determining a target control processing system and a target slot position according to the target identifier; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
3. The apparatus of claim 1, wherein the target instruction comprises a follow instruction;
the logic control module is used for determining a used slot position of the current inserted equipment and determining a control processing system connected with the used slot position; and controlling the power supply module to supply power to the used slot position and the corresponding control processing system, controlling the power supply module to stop supplying power to other control processing systems except the control processing system connected with the used slot position, and controlling the power supply module to stop supplying power to other slot positions except the used slot position.
4. The apparatus of claim 1, wherein the power module comprises a main power module and a backup power module;
the main power module is used for supplying power to the control processing system and the slot position;
the standby power module is used for supplying power to the control processing system and the slot position when the main power module is abnormal.
5. The apparatus of claim 1, wherein the device comprises a plurality of sensors,
the logic control module is also used for acquiring current attributes of the current output to the slot position by the power supply module from the power supply module; and when the abnormal value exists in the current attribute, controlling the power supply module to stop supplying power to the slot position.
6. The device of claim 1, wherein the logic control module comprises a serial port, the serial port being coupled to a display device;
the logic control module is used for acquiring a verification result of signal integrity verification from the at least one control processing system and sending the verification result to the display device for display through the serial port.
7. The apparatus of any one of claims 1-6, wherein the slot comprises at least one of:
2x16_slot slot, 2x16_open core protocol OCP slot, U.2 _serial hard disk SATA/serial small computer system interface SAS slot, minissas slot.
8. A method of signal integrity verification as applied to the apparatus of any one of claims 1-7, the method comprising:
receiving a target instruction;
according to the target instruction, the control power module supplies power to at least one control processing system in a plurality of control processing systems and at least one operation corresponding to the at least one control processing system;
when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position;
When the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
9. A signal integrity verification apparatus for use with a device as claimed in any one of claims 1 to 7, said apparatus comprising:
the instruction receiving module is used for receiving a target instruction;
the control module is used for controlling the power supply module to supply power to at least one control processing system in the plurality of control processing systems and at least one operation corresponding to the at least one control processing system according to the target instruction; when the target instruction comprises a target control processing system identifier, determining a target control processing system and a target slot position according to the target identifier; controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position; when the target instruction comprises a following instruction, determining a target slot position of the current inserting equipment, and determining a target control processing system connected with the target slot position; and controlling the power supply module to supply power to the target control processing system and the target slot position, controlling the power supply module to stop supplying power to other control processing systems except the target control processing system, and controlling the power supply module to stop supplying power to other slot positions except the target slot position.
10. An electronic device comprising a processor, a memory, and a computer program stored on the memory and capable of running on the processor, the computer program implementing the signal integrity verification method of claim 8 when executed by the processor.
CN202310020222.9A 2023-01-06 2023-01-06 Apparatus for signal integrity verification and a signal integrity verification method Pending CN116302771A (en)

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Application Number Priority Date Filing Date Title
CN202310020222.9A CN116302771A (en) 2023-01-06 2023-01-06 Apparatus for signal integrity verification and a signal integrity verification method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310020222.9A CN116302771A (en) 2023-01-06 2023-01-06 Apparatus for signal integrity verification and a signal integrity verification method

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