CN116300586A - Mechanism and method for acquiring multipath frequency signals by single chip microcomputer - Google Patents
Mechanism and method for acquiring multipath frequency signals by single chip microcomputer Download PDFInfo
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- CN116300586A CN116300586A CN202310136512.XA CN202310136512A CN116300586A CN 116300586 A CN116300586 A CN 116300586A CN 202310136512 A CN202310136512 A CN 202310136512A CN 116300586 A CN116300586 A CN 116300586A
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- 230000007246 mechanism Effects 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000005070 sampling Methods 0.000 description 5
- 238000001228 spectrum Methods 0.000 description 4
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- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24215—Scada supervisory control and data acquisition
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract
The invention discloses a mechanism and a method for acquiring multipath frequency signals by a singlechip, wherein the mechanism comprises the following steps: s1, setting 250us timing by a 51 singlechip, and connecting 16 signals to 16 IN ports of a multiplexer; s2, the 51 single chip microcomputer inputs high level or low level to an A port, a B port, a C port and a D port of the multiplexer through a GPIO2 port, a GPIO3 port, a GPIO4 port and a GPIO5 port; s3, the multiplexer selects an IN port to be communicated with an OUT port according to high level or low level received by the A port, the B port, the C port and the D port, and outputs signals to the 51 single-chip microcomputer; s4, the 51 single chip microcomputer sequentially collects signals of 16 IN ports, and the signals are collected again every 250 us; s5, the 51 single chip microcomputer compares the high-low level state of the acquired 16 paths of signals with the state acquired last time, the count is increased by 1 when the signals are changed, and the frequency is increased by 1 when the signals are changed twice.
Description
Technical Field
The invention relates to the field of single-chip computers, in particular to a mechanism and a method for acquiring multipath frequency signals by using a single-chip computer.
Background
The single chip microcomputer is a small and perfect microcomputer system which is formed by integrating a CPU (central processing unit), a RAM (random access memory), a ROM (read only memory), various I/O (input/output) ports and interrupt systems, a timer/counter, a display driving circuit, a pulse width modulation circuit, an analog multiplexer, an A/D (analog/digital) converter and the like with a silicon chip by adopting a very large scale integrated circuit technology, is widely applied in the field of industrial control, and can be carried out through external interrupt when measuring and processing multipath frequency signals.
The traditional singlechip collects multiple paths of frequency signals, namely input signals of each path are connected to GP I O ports of the singlechip, and 16 paths of signals are required to be collected, so that 16 GP I O ports are required to be occupied; moreover, few singlechips can support 16 external interrupts, generally support 1 to 2 external interrupts, and cannot measure signals with 16 frequencies; and the frequency count measured by the external interruption of the singlechip has errors.
Disclosure of Invention
In order to solve the technical problems, the invention provides a mechanism for acquiring multipath frequency signals by a singlechip, which comprises: a multiplexer connected with the multipath frequency signals through a plurality of I N ports; the multi-path selector also comprises an output interface OUT port, the OUT port is connected with a GP I O1 port of the 51 single-chip microcomputer, one I N port is selected to be communicated, and signals received by the I N port are output to the 51 single-chip microcomputer; the multi-path selector further comprises an address port A, an address port B, an address port C and an address port D, which are sequentially connected with a GP I O2 port, a GP I O3 port, a GP I O4 port and a GP I O5 port of the 51 single-chip microcomputer; and the high level or low level is input to the A port, the B port, the C port and the D port through the GP I O2 port, the GP I O3 port, the GP I O4 port and the GP I O5 port to control and select the I N port communicated with the OUT port.
Preferably: the multi-channel frequency signals are 16 channels of 0-1000Hz frequency signals, and the number of the I N ports is 16.
Preferably: the multiplexer is a 16-select 1 multiplexer CD4067.
Preferably: the 51 singlechip is provided with a timer.
Preferably: the 51 singlechips collect signals every 250 us.
Preferably: the multiplexer also comprises an I NH port used for controlling the on-off of the I N port and the OUT port.
Preferably: and the I NH port is connected with the 51 singlechip.
The method is suitable for any mechanism in the technical scheme, and comprises the following steps:
s1, setting 250us timing by a 51 singlechip, and connecting 16 paths of signals to 16I N ports of a multiplexer;
s2, the 51 single chip microcomputer inputs high level or low level to an A port, a B port, a C port and a D port of the multiplexer through a GPIO2 port, a GPIO3 port, a GPIO4 port and a GPIO5 port;
s3, the multiplexer selects one I N port to be communicated with an OUT port according to the high level or the low level received by the A port, the B port, the C port and the D port, and outputs signals to the 51 single-chip microcomputer;
s4, the 51 single chip microcomputer sequentially collects 16I N signals, and the signals are collected again every 250 us;
s5, the 51 single chip microcomputer compares the high-low level state of the acquired 16 paths of signals with the state acquired last time, the count is increased by 1 when the signals are changed, and the frequency is increased by 1 when the signals are changed twice.
Preferably: the multiplexer selects I N port to be on with OUT port according to the CD4067 truth table.
Preferably: the I NH port of the multiplexer is not connected to the OUT port when receiving a high level.
The invention has the technical effects and advantages that:
the measurement of the multipath frequency signals can be completed by only using 5 input/output ports of the singlechip, wherein GPIO1 is used as a port for commonly measuring the high-low level state of the input signals, and the other 4 GPIOs are used for controlling which path DI of the selector is input to the GPIO1, and the purpose of collecting the multipath frequency signals is achieved by collecting the high-low level and then calculating the times of the high-low level inversion; the Nyquist theorem is adopted for sampling, and a timing polling method is used for collecting, so that if a plurality of burr signals exist in a timing period, namely, the high level is changed to the low level or the low level is changed to the high level in a short time, the burr signals cannot be collected, instantaneous interference signals can be filtered, the accuracy of data is ensured, and the collected signals can contain the burr signals in a traditional external interrupt mode, so that the difference between a measured value and an actual value is overlarge.
Drawings
Fig. 1 is a schematic structural diagram of a mechanism for acquiring multiple frequency signals by a single chip microcomputer according to an embodiment of the present application;
FIG. 2 is a truth table of a multiplexer CD4067 provided in an embodiment of the present application;
fig. 3 is a schematic diagram of an acquisition method for acquiring multiple frequency signals by using a single chip microcomputer according to an embodiment of the present application.
Detailed Description
The invention will be described in further detail with reference to the drawings and the detailed description. The embodiments of the invention have been presented for purposes of illustration and description, and are not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Referring to fig. 1, in this embodiment, a mechanism for acquiring multiple frequency signals by a single chip microcomputer is provided, which includes multiple multiplexers connected to multiple frequency signals through multiple I N ports, in this embodiment, the multiple frequency signals are 16 paths of 0-1000Hz frequency signals, 16 ports are I N ports, and the multiple multiplexers are 16-1 multiple multiplexers CD4067; the multiplexer also comprises an output interface OUT port, which is connected with the GPIO1 port of the 51 single-chip microcomputer, selects one I N port to be communicated, and outputs signals received by the I N port to the 51 single-chip microcomputer; the multiplexer also comprises an address port A, an address port B, an address port C and an address port D, which are sequentially connected with a GPIO2 port, a GPIO3 port, a GPIO4 port and a GPIO5 port of the 51 single chip microcomputer; the high level or low level is input to the A port, the B port, the C port and the D port through the GPIO2 port, the GPIO3 port, the GPIO4 port and the GPIO5 port to control and select the I N port communicated with the OUT port, in the embodiment, the 51 singlechip is provided with a timer, the signals are collected every 250us, even if the multipath frequency signal is the largest 1000Hz, the high level and the low level are equivalent to 500us, the timing 250us is equivalent to 2 times of the level change frequency for sampling, and the collected signals are not aliased according to the Nyquist law: to recover the original signal from the sampled signal without distortion, the sampling frequency should be greater than 2 times the highest frequency of the signal; when the sampling frequency is less than 2 times of the highest frequency of the frequency spectrum, the frequency spectrum of the signal is aliased; when the sampling frequency is greater than 2 times of the frequency spectrum, the frequency spectrum of the signal is not aliased, so the 250us timing provided in the embodiment accords with the Nyquist law; the multiplexer also comprises an I NH port which is connected with a 51 singlechip and used for controlling the on-off of the I N port and the OUT port.
Referring to fig. 2, the GP I O2, GP I O3, GP I O4, and GP I O5 inputs high level or low level to the a, B, C, and D ports, and selects D I1 to output to the GP I O1 when the a, B, C, and D ports are all low level; if the ports a, B and C are low and the port D is high, D I is selected and output to GP I O1, and so on, and if the port I NH is high, no port I N is connected to the port OUT.
Referring to fig. 3, in this embodiment, a method for acquiring multiple frequency signals by a single chip microcomputer is provided, where the method includes:
s1, setting 250us timing by a 51 singlechip, and connecting 16 paths of signals to 16I N ports of a multiplexer;
s2, the 51 single chip microcomputer inputs high level or low level to an A port, a B port, a C port and a D port of the multiplexer through a GP I O2 port, a GP I O3 port, a GP I O4 port and a GP I O5 port;
s3, the multiplexer selects one I N port to be communicated with an OUT port according to the high level or the low level received by the A port, the B port, the C port and the D port, and outputs signals to the 51 single-chip microcomputer;
s4, the 51 single chip microcomputer sequentially collects 16I N signals, and the signals are collected again every 250 us;
s5, the 51 single chip microcomputer compares the high-low level state of the acquired 16 paths of signals with the state acquired last time, the count is increased by 1 when the signals are changed, and the frequency is increased by 1 when the signals are changed twice.
The method comprises the steps of collecting the high-low level turnover times of an input signal when collecting the principle of multipath frequency signals, wherein the frequency is 1Hz under the condition that the input signal changes from high to low to high for 1 time per second, and the like; the multi-path selector has the functions of saving the number of GP I O ports of the singlechip, namely, using GP I O1 to collect 16 paths of signals in a time-sharing way, timing one path of selection input signals, measuring the high and low level states of each path of signals, comparing the states collected at the last time, counting and adding 1 when the state is changed, and adding 1 when the state is changed at the second time.
The mechanism and the acquisition method for acquiring the multipath frequency signals by the singlechip adopt a timing polling method to acquire the multipath signals, are different from the traditional external interrupt mode by the singlechip, so that if a plurality of burr signals exist in a timing period, namely, the change from high level to low level or from low level to high level in a very short time, the burr signals cannot be acquired, instantaneous interference signals can be filtered, the accuracy of data is ensured, and the traditional external interrupt mode is reversely observed, the acquired signals contain the burr signals, so that the measured value and the actual value have excessively large phase difference.
It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art and which are included in the embodiments of the present invention without the inventive step, are intended to be within the scope of the present invention. Structures, devices and methods of operation not specifically described and illustrated herein, unless otherwise indicated and limited, are implemented according to conventional means in the art.
Claims (10)
1. The utility model provides a mechanism of multichannel frequency signal is gathered to singlechip which characterized in that includes:
a multiplexer connected with the multipath frequency signals through a plurality of IN ports;
the multi-path selector also comprises an output interface OUT port, wherein the OUT port is connected with a GPIO1 port of the 51 single-chip microcomputer, one of the IN ports is selected to be communicated, and signals received by the IN port are output to the 51 single-chip microcomputer;
the multi-path selector further comprises an address port A, an address port B, an address port C and an address port D, which are sequentially connected with a GPIO2 port, a GPIO3 port, a GPIO4 port and a GPIO5 port of the 51 single-chip microcomputer;
and the high level or low level is input to the A port, the B port, the C port and the D port through the GPIO2 port, the GPIO3 port, the GPIO4 port and the GPIO5 port to control and select the IN port communicated with the OUT port.
2. The mechanism for acquiring multiple frequency signals by using the single chip microcomputer according to claim 1, wherein the multiple frequency signals are 16 paths of 0-1000Hz frequency signals, and the number of the IN ports is 16.
3. The mechanism for acquiring multiple frequency signals by a single chip microcomputer according to claim 2, wherein the multiplexer is a 16-to-1 multiplexer CD4067.
4. A mechanism for acquiring multiple frequency signals by a single-chip microcomputer according to claim 3, wherein the 51 single-chip microcomputer is provided with a timer.
5. The mechanism for acquiring multiple frequency signals by a single chip microcomputer according to claim 4, wherein the 51 single chip microcomputer acquires signals every 250 us.
6. The mechanism for acquiring multiple frequency signals by a single chip microcomputer according to claim 1, wherein the multiplexer further comprises an INH port for controlling on-off of the IN port and the OUT port.
7. The mechanism for acquiring multiple frequency signals by using a single chip microcomputer according to claim 6, wherein the INH port is connected with the 51 single chip microcomputer.
8. A method for acquiring multiple frequency signals by a single chip microcomputer, which is suitable for any one of the mechanisms in claims 1-7, and comprises the following steps:
s1, setting 250us timing by a 51 singlechip, and connecting 16 signals to 16 IN ports of a multiplexer;
s2, the 51 single chip microcomputer inputs high level or low level to an A port, a B port, a C port and a D port of the multiplexer through a GPIO2 port, a GPIO3 port, a GPIO4 port and a GPIO5 port;
s3, the multiplexer selects an IN port to be communicated with an OUT port according to high level or low level received by the A port, the B port, the C port and the D port, and outputs signals to the 51 single-chip microcomputer;
s4, the 51 single chip microcomputer sequentially collects signals of 16 IN ports, and the signals are collected again every 250 us;
s5, the 51 single chip microcomputer compares the high-low level state of the acquired 16 paths of signals with the state acquired last time, the count is increased by 1 when the signals are changed, and the frequency is increased by 1 when the signals are changed twice.
9. The method of claim 8, wherein the selecting the IN port to be connected to the OUT port by the multiplexer is based on a CD4067 truth table.
10. The method for acquiring multiple frequency signals by using a single chip microcomputer according to claim 8, wherein the INH port of the multiplexer is not connected with the OUT port when receiving a high level.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310136512.XA CN116300586A (en) | 2023-02-20 | 2023-02-20 | Mechanism and method for acquiring multipath frequency signals by single chip microcomputer |
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| CN202310136512.XA CN116300586A (en) | 2023-02-20 | 2023-02-20 | Mechanism and method for acquiring multipath frequency signals by single chip microcomputer |
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Application publication date: 20230623 |